]> CyberLeo.Net >> Repos - FreeBSD/FreeBSD.git/blob - sys/powerpc/include/pcpu.h
Import the Linaro Cortex Strings library into contrib.
[FreeBSD/FreeBSD.git] / sys / powerpc / include / pcpu.h
1 /*-
2  * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
3  * Copyright (c) Peter Wemm <peter@netplex.com.au>
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29
30 #ifndef _MACHINE_PCPU_H_
31 #define _MACHINE_PCPU_H_
32
33 #include <machine/cpufunc.h>
34 #include <machine/slb.h>
35 #include <machine/tlb.h>
36
37 struct pmap;
38 struct pvo_entry;
39 #define CPUSAVE_LEN     9
40
41 #define PCPU_MD_COMMON_FIELDS                                           \
42         int             pc_inside_intr;                                 \
43         struct pmap     *pc_curpmap;            /* current pmap */      \
44         struct thread   *pc_fputhread;          /* current fpu user */  \
45         struct thread   *pc_vecthread;          /* current vec user */  \
46         uintptr_t       pc_hwref;                                       \
47         uint32_t        pc_pir;                                         \
48         int             pc_bsp;                                         \
49         volatile int    pc_awake;                                       \
50         uint32_t        pc_ipimask;                                     \
51         register_t      pc_tempsave[CPUSAVE_LEN];                       \
52         register_t      pc_disisave[CPUSAVE_LEN];                       \
53         register_t      pc_dbsave[CPUSAVE_LEN];                         \
54         void            *pc_restore;
55
56 #define PCPU_MD_AIM32_FIELDS                                            \
57         vm_offset_t     pc_qmap_addr;                                   \
58         struct pvo_entry *pc_qmap_pvo;                                  \
59         struct mtx      pc_qmap_lock;                                   \
60         /* char         __pad[0] */
61
62 #define PCPU_MD_AIM64_FIELDS                                            \
63         struct slb      pc_slb[64];                                     \
64         struct slb      **pc_userslb;                                   \
65         register_t      pc_slbsave[18];                                 \
66         uint8_t         pc_slbstack[1024];                              \
67         vm_offset_t     pc_qmap_addr;                                   \
68         struct pvo_entry *pc_qmap_pvo;                                  \
69         struct mtx      pc_qmap_lock;                                   \
70         char            __pad[1121 - sizeof(struct mtx)]
71
72 #ifdef __powerpc64__
73 #define PCPU_MD_AIM_FIELDS      PCPU_MD_AIM64_FIELDS
74 #else
75 #define PCPU_MD_AIM_FIELDS      PCPU_MD_AIM32_FIELDS
76 #endif
77
78 #define BOOKE_CRITSAVE_LEN      (CPUSAVE_LEN + 2)
79 #define BOOKE_TLB_MAXNEST       3
80 #define BOOKE_TLB_SAVELEN       16
81 #define BOOKE_TLBSAVE_LEN       (BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
82
83 #define PCPU_MD_BOOKE_FIELDS                                            \
84         register_t      pc_booke_critsave[BOOKE_CRITSAVE_LEN];          \
85         register_t      pc_booke_mchksave[CPUSAVE_LEN];                 \
86         register_t      pc_booke_tlbsave[BOOKE_TLBSAVE_LEN];            \
87         register_t      pc_booke_tlb_level;                             \
88         vm_offset_t     pc_qmap_addr;                                   \
89         uint32_t        *pc_booke_tlb_lock;                             \
90         int             pc_tid_next;                                    \
91         char            __pad[165]
92
93 /* Definitions for register offsets within the exception tmp save areas */
94 #define CPUSAVE_R27     0               /* where r27 gets saved */
95 #define CPUSAVE_R28     1               /* where r28 gets saved */
96 #define CPUSAVE_R29     2               /* where r29 gets saved */
97 #define CPUSAVE_R30     3               /* where r30 gets saved */
98 #define CPUSAVE_R31     4               /* where r31 gets saved */
99 #define CPUSAVE_AIM_DAR         5       /* where SPR_DAR gets saved */
100 #define CPUSAVE_AIM_DSISR       6       /* where SPR_DSISR gets saved */
101 #define CPUSAVE_BOOKE_DEAR      5       /* where SPR_DEAR gets saved */
102 #define CPUSAVE_BOOKE_ESR       6       /* where SPR_ESR gets saved */
103 #define CPUSAVE_SRR0    7               /* where SRR0 gets saved */
104 #define CPUSAVE_SRR1    8               /* where SRR1 gets saved */
105
106 /* Book-E TLBSAVE is more elaborate */
107 #define TLBSAVE_BOOKE_LR        0
108 #define TLBSAVE_BOOKE_CR        1
109 #define TLBSAVE_BOOKE_SRR0      2
110 #define TLBSAVE_BOOKE_SRR1      3
111 #define TLBSAVE_BOOKE_R20       4
112 #define TLBSAVE_BOOKE_R21       5
113 #define TLBSAVE_BOOKE_R22       6
114 #define TLBSAVE_BOOKE_R23       7
115 #define TLBSAVE_BOOKE_R24       8
116 #define TLBSAVE_BOOKE_R25       9
117 #define TLBSAVE_BOOKE_R26       10
118 #define TLBSAVE_BOOKE_R27       11
119 #define TLBSAVE_BOOKE_R28       12
120 #define TLBSAVE_BOOKE_R29       13
121 #define TLBSAVE_BOOKE_R30       14
122 #define TLBSAVE_BOOKE_R31       15
123
124 #ifdef AIM
125 #define PCPU_MD_FIELDS          \
126         PCPU_MD_COMMON_FIELDS   \
127         PCPU_MD_AIM_FIELDS
128 #endif
129 #if defined(BOOKE)
130 #define PCPU_MD_FIELDS          \
131         PCPU_MD_COMMON_FIELDS   \
132         PCPU_MD_BOOKE_FIELDS
133 #endif
134
135 /*
136  * Catch-all for ports (e.g. lsof, used by gtop)
137  */
138 #ifndef PCPU_MD_FIELDS
139 #define PCPU_MD_FIELDS                                                  \
140         int             pc_md_placeholder[32]
141 #endif
142
143 #ifdef _KERNEL
144
145 #define pcpup   ((struct pcpu *) powerpc_get_pcpup())
146
147 static __inline __pure2 struct thread *
148 __curthread(void)
149 {
150         struct thread *td;
151 #ifdef __powerpc64__
152         __asm __volatile("mr %0,13" : "=r"(td));
153 #else
154         __asm __volatile("mr %0,2" : "=r"(td));
155 #endif
156         return (td);
157 }
158 #define curthread (__curthread())
159
160 #define PCPU_GET(member)        (pcpup->pc_ ## member)
161
162 /*
163  * XXX The implementation of this operation should be made atomic
164  * with respect to preemption.
165  */
166 #define PCPU_ADD(member, value) (pcpup->pc_ ## member += (value))
167 #define PCPU_INC(member)        PCPU_ADD(member, 1)
168 #define PCPU_PTR(member)        (&pcpup->pc_ ## member)
169 #define PCPU_SET(member,value)  (pcpup->pc_ ## member = (value))
170
171 #endif  /* _KERNEL */
172
173 #endif  /* !_MACHINE_PCPU_H_ */