2 * Copyright (c) 2006-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008 Semihalf, Rafal Czubak
4 * Copyright (c) 2009 The FreeBSD Foundation
7 * Portions of this software were developed by Semihalf
8 * under sponsorship from the FreeBSD Foundation.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
45 #include <machine/bus.h>
50 #include <dev/fdt/fdt_common.h>
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
54 #include <powerpc/mpc85xx/mpc85xx.h>
56 #include "ofw_bus_if.h"
60 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
61 printf(fmt,##args); } while (0)
63 #define debugf(fmt, args...)
66 static MALLOC_DEFINE(M_LBC, "localbus", "localbus devices information");
68 static int lbc_probe(device_t);
69 static int lbc_attach(device_t);
70 static int lbc_shutdown(device_t);
71 static struct resource *lbc_alloc_resource(device_t, device_t, int, int *,
72 u_long, u_long, u_long, u_int);
73 static int lbc_print_child(device_t, device_t);
74 static int lbc_release_resource(device_t, device_t, int, int,
76 static const struct ofw_bus_devinfo *lbc_get_devinfo(device_t, device_t);
79 * Bus interface definition
81 static device_method_t lbc_methods[] = {
82 /* Device interface */
83 DEVMETHOD(device_probe, lbc_probe),
84 DEVMETHOD(device_attach, lbc_attach),
85 DEVMETHOD(device_shutdown, lbc_shutdown),
88 DEVMETHOD(bus_print_child, lbc_print_child),
89 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
90 DEVMETHOD(bus_teardown_intr, NULL),
92 DEVMETHOD(bus_alloc_resource, lbc_alloc_resource),
93 DEVMETHOD(bus_release_resource, lbc_release_resource),
94 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
95 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
97 /* OFW bus interface */
98 DEVMETHOD(ofw_bus_get_devinfo, lbc_get_devinfo),
99 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
100 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
101 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
102 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
103 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
108 static driver_t lbc_driver = {
111 sizeof(struct lbc_softc)
114 devclass_t lbc_devclass;
116 DRIVER_MODULE(lbc, fdtbus, lbc_driver, lbc_devclass, 0, 0);
119 * Calculate address mask used by OR(n) registers. Use memory region size to
120 * determine mask value. The size must be a power of two and within the range
121 * of 32KB - 4GB. Otherwise error code is returned. Value representing
122 * 4GB size can be passed as 0xffffffff.
125 lbc_address_mask(uint32_t size)
133 if (size == (1UL << n))
141 return (0xffff8000 << (n - 15));
145 lbc_banks_unmap(struct lbc_softc *sc)
150 while (r < LBC_DEV_MAX) {
151 if (sc->sc_range[r].size == 0)
154 pmap_unmapdev(sc->sc_range[r].kva, sc->sc_range[r].size);
155 law_disable(OCP85XX_TGTIF_LBC, sc->sc_range[r].addr,
156 sc->sc_range[r].size);
162 lbc_banks_map(struct lbc_softc *sc)
164 vm_paddr_t end, start;
166 u_int i, r, ranges, s;
169 bzero(sc->sc_range, sizeof(sc->sc_range));
172 * Determine number of discontiguous address ranges to program.
175 for (i = 0; i < LBC_DEV_MAX; i++) {
176 size = sc->sc_banks[i].size;
180 start = sc->sc_banks[i].addr;
181 for (r = 0; r < ranges; r++) {
182 /* Avoid wrap-around bugs. */
183 end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size;
184 if (start > 0 && end == start - 1) {
185 sc->sc_range[r].size += size;
188 /* Avoid wrap-around bugs. */
189 end = start - 1 + size;
190 if (sc->sc_range[r].addr > 0 &&
191 end == sc->sc_range[r].addr - 1) {
192 sc->sc_range[r].addr = start;
193 sc->sc_range[r].size += size;
198 /* New range; add using insertion sort */
200 while (r < ranges && sc->sc_range[r].addr < start)
202 for (s = ranges; s > r; s--)
203 sc->sc_range[s] = sc->sc_range[s-1];
204 sc->sc_range[r].addr = start;
205 sc->sc_range[r].size = size;
211 * Ranges are sorted so quickly go over the list to merge ranges
212 * that grew toward each other while building the ranges.
215 while (r < ranges - 1) {
216 end = sc->sc_range[r].addr + sc->sc_range[r].size;
217 if (end != sc->sc_range[r+1].addr) {
221 sc->sc_range[r].size += sc->sc_range[r+1].size;
222 for (s = r + 1; s < ranges - 1; s++)
223 sc->sc_range[s] = sc->sc_range[s+1];
224 bzero(&sc->sc_range[s], sizeof(sc->sc_range[s]));
229 * Configure LAW for the LBC ranges and map the physical memory
232 for (r = 0; r < ranges; r++) {
233 start = sc->sc_range[r].addr;
234 size = sc->sc_range[r].size;
235 error = law_enable(OCP85XX_TGTIF_LBC, start, size);
238 sc->sc_range[r].kva = (vm_offset_t)pmap_mapdev(start, size);
241 /* XXX: need something better here? */
245 /* Assign KVA to banks based on the enclosing range. */
246 for (i = 0; i < LBC_DEV_MAX; i++) {
247 size = sc->sc_banks[i].size;
251 start = sc->sc_banks[i].addr;
252 for (r = 0; r < ranges; r++) {
253 end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size;
254 if (start >= sc->sc_range[r].addr &&
255 start - 1 + size <= end)
259 sc->sc_banks[i].kva = sc->sc_range[r].kva +
260 (start - sc->sc_range[r].addr);
268 lbc_banks_enable(struct lbc_softc *sc)
274 for (i = 0; i < LBC_DEV_MAX; i++) {
275 size = sc->sc_banks[i].size;
280 * Compute and program BR value.
282 regval = sc->sc_banks[i].addr;
283 switch (sc->sc_banks[i].width) {
297 regval |= (sc->sc_banks[i].decc << 9);
298 regval |= (sc->sc_banks[i].wp << 8);
299 regval |= (sc->sc_banks[i].msel << 5);
300 regval |= (sc->sc_banks[i].atom << 2);
302 bus_space_write_4(sc->sc_bst, sc->sc_bsh,
303 LBC85XX_BR(i), regval);
306 * Compute and program OR value.
308 regval = lbc_address_mask(size);
309 switch (sc->sc_banks[i].msel) {
310 case LBCRES_MSEL_GPCM:
311 /* TODO Add flag support for option registers */
314 case LBCRES_MSEL_FCM:
315 /* TODO Add flag support for options register */
318 case LBCRES_MSEL_UPMA:
319 case LBCRES_MSEL_UPMB:
320 case LBCRES_MSEL_UPMC:
321 printf("UPM mode not supported yet!");
325 bus_space_write_4(sc->sc_bst, sc->sc_bsh,
326 LBC85XX_OR(i), regval);
337 fdt_lbc_fixup(phandle_t node, struct lbc_softc *sc, struct lbc_devinfo *di)
342 if (OF_getprop(node, "bank-width", (void *)&width, sizeof(width)) <= 0)
346 if (sc->sc_banks[bank].size == 0)
349 /* Express width in bits. */
350 sc->sc_banks[bank].width = width * 8;
354 fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *sc,
355 struct lbc_devinfo *di)
357 u_long start, end, count;
358 pcell_t *reg, *regptr;
359 pcell_t addr_cells, size_cells;
360 int tuple_size, tuples;
363 if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0)
366 tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
367 tuples = OF_getprop_alloc(node, "reg", tuple_size, (void **)®);
368 debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells);
369 debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size);
371 /* No 'reg' property in this node. */
375 for (i = 0; i < tuples; i++) {
377 bank = fdt_data_get((void *)reg, 1);
381 /* Get address/size. */
382 rv = fdt_data_to_res(reg, addr_cells - 1, size_cells, &start,
385 resource_list_free(&di->di_res);
388 reg += addr_cells - 1 + size_cells;
390 /* Calculate address range relative to VA base. */
391 start = sc->sc_banks[bank].kva + start;
392 end = start + count - 1;
394 debugf("reg addr bank = %d, start = %lx, end = %lx, "
395 "count = %lx\n", bank, start, end, count);
397 /* Use bank (CS) cell as rid. */
398 resource_list_add(&di->di_res, SYS_RES_MEMORY, bank, start,
403 free(regptr, M_OFWPROP);
410 struct lbc_softc *sc = arg;
413 ltesr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR);
414 sc->sc_ltesr = ltesr;
415 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ltesr);
420 lbc_probe(device_t dev)
423 if (!(ofw_bus_is_compatible(dev, "fsl,lbc") ||
424 ofw_bus_is_compatible(dev, "fsl,elbc")))
427 device_set_desc(dev, "Freescale Local Bus Controller");
428 return (BUS_PROBE_DEFAULT);
432 lbc_attach(device_t dev)
434 struct lbc_softc *sc;
435 struct lbc_devinfo *di;
437 u_long offset, start, size;
439 phandle_t node, child;
440 pcell_t *ranges, *rangesptr;
441 int tuple_size, tuples;
445 sc = device_get_softc(dev);
449 sc->sc_mres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_mrid,
451 if (sc->sc_mres == NULL)
454 sc->sc_bst = rman_get_bustag(sc->sc_mres);
455 sc->sc_bsh = rman_get_bushandle(sc->sc_mres);
457 for (bank = 0; bank < LBC_DEV_MAX; bank++) {
458 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_BR(bank), 0);
459 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_OR(bank), 0);
463 * Initialize configuration register:
465 * - set data buffer control signal function
466 * - disable parity byte select
467 * - set ECC parity type
468 * - set bus monitor timing and timer prescale
470 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LBCR, 0);
473 * Initialize clock ratio register:
474 * - disable PLL bypass mode
475 * - configure LCLK delay cycles for the assertion of LALE
476 * - set system clock divider
478 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LCRR, 0x00030008);
480 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEDR, 0);
481 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ~0);
482 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEIR, 0x64080001);
485 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
486 RF_ACTIVE | RF_SHAREABLE);
487 if (sc->sc_ires != NULL) {
488 error = bus_setup_intr(dev, sc->sc_ires,
489 INTR_TYPE_MISC | INTR_MPSAFE, NULL, lbc_intr, sc,
492 device_printf(dev, "could not activate interrupt\n");
493 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
504 rm->rm_type = RMAN_ARRAY;
505 rm->rm_descr = "Local Bus Space";
508 error = rman_init(rm);
512 error = rman_manage_region(rm, rm->rm_start, rm->rm_end);
519 * Process 'ranges' property.
521 node = ofw_bus_get_node(dev);
522 if ((fdt_addrsize_cells(node, &sc->sc_addr_cells,
523 &sc->sc_size_cells)) != 0) {
528 par_addr_cells = fdt_parent_addr_cells(node);
529 if (par_addr_cells > 2) {
530 device_printf(dev, "unsupported parent #addr-cells\n");
534 tuple_size = sizeof(pcell_t) * (sc->sc_addr_cells + par_addr_cells +
537 tuples = OF_getprop_alloc(node, "ranges", tuple_size,
540 device_printf(dev, "could not retrieve 'ranges' property\n");
546 debugf("par addr_cells = %d, addr_cells = %d, size_cells = %d, "
547 "tuple_size = %d, tuples = %d\n", par_addr_cells,
548 sc->sc_addr_cells, sc->sc_size_cells, tuple_size, tuples);
552 for (i = 0; i < tuples; i++) {
554 /* The first cell is the bank (chip select) number. */
555 bank = fdt_data_get((void *)ranges, 1);
556 if (bank < 0 || bank > LBC_DEV_MAX) {
557 device_printf(dev, "bank out of range: %d\n", bank);
564 * Remaining cells of the child address define offset into
567 offset = fdt_data_get((void *)ranges, sc->sc_addr_cells - 1);
568 ranges += sc->sc_addr_cells - 1;
570 /* Parent bus start address of this bank. */
571 start = fdt_data_get((void *)ranges, par_addr_cells);
572 ranges += par_addr_cells;
574 size = fdt_data_get((void *)ranges, sc->sc_size_cells);
575 ranges += sc->sc_size_cells;
576 debugf("bank = %d, start = %lx, size = %lx\n", bank,
579 sc->sc_banks[bank].addr = start + offset;
580 sc->sc_banks[bank].size = size;
583 * Attributes for the bank.
585 * XXX Note there are no DT bindings defined for them at the
586 * moment, so we need to provide some defaults.
588 sc->sc_banks[bank].width = 16;
589 sc->sc_banks[bank].msel = LBCRES_MSEL_GPCM;
590 sc->sc_banks[bank].decc = LBCRES_DECC_DISABLED;
591 sc->sc_banks[bank].atom = LBCRES_ATOM_DISABLED;
592 sc->sc_banks[bank].wp = 0;
596 * Initialize mem-mappings for the LBC banks (i.e. chip selects).
598 error = lbc_banks_map(sc);
603 * Walk the localbus and add direct subordinates as our children.
605 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
607 di = malloc(sizeof(*di), M_LBC, M_WAITOK | M_ZERO);
609 if (ofw_bus_gen_setup_devinfo(&di->di_ofw, child) != 0) {
611 device_printf(dev, "could not set up devinfo\n");
615 resource_list_init(&di->di_res);
617 if (fdt_lbc_reg_decode(child, sc, di)) {
618 device_printf(dev, "could not process 'reg' "
620 ofw_bus_gen_destroy_devinfo(&di->di_ofw);
625 fdt_lbc_fixup(child, sc, di);
627 /* Add newbus device for this FDT node */
628 cdev = device_add_child(dev, NULL, -1);
630 device_printf(dev, "could not add child: %s\n",
631 di->di_ofw.obd_name);
632 resource_list_free(&di->di_res);
633 ofw_bus_gen_destroy_devinfo(&di->di_ofw);
637 debugf("added child name='%s', node=%p\n", di->di_ofw.obd_name,
639 device_set_ivars(cdev, di);
645 lbc_banks_enable(sc);
647 free(rangesptr, M_OFWPROP);
648 return (bus_generic_attach(dev));
651 free(rangesptr, M_OFWPROP);
652 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mrid, sc->sc_mres);
657 lbc_shutdown(device_t dev)
664 static struct resource *
665 lbc_alloc_resource(device_t bus, device_t child, int type, int *rid,
666 u_long start, u_long end, u_long count, u_int flags)
668 struct lbc_softc *sc;
669 struct lbc_devinfo *di;
670 struct resource_list_entry *rle;
671 struct resource *res;
675 /* We only support default allocations. */
676 if (start != 0ul || end != ~0ul)
679 sc = device_get_softc(bus);
680 if (type == SYS_RES_IRQ)
681 return (bus_alloc_resource(bus, type, rid, start, end, count,
685 * Request for the default allocation with a given rid: use resource
686 * list stored in the local device info.
688 if ((di = device_get_ivars(child)) == NULL)
691 if (type == SYS_RES_IOPORT)
692 type = SYS_RES_MEMORY;
696 rle = resource_list_find(&di->di_res, type, *rid);
698 device_printf(bus, "no default resources for "
699 "rid = %d, type = %d\n", *rid, type);
704 end = start + count - 1;
706 sc = device_get_softc(bus);
708 needactivate = flags & RF_ACTIVE;
713 res = rman_reserve_resource(rm, start, end, count, flags, child);
715 device_printf(bus, "failed to reserve resource %#lx - %#lx "
716 "(%#lx)\n", start, end, count);
720 rman_set_rid(res, *rid);
721 rman_set_bustag(res, &bs_be_tag);
722 rman_set_bushandle(res, rman_get_start(res));
725 if (bus_activate_resource(child, type, *rid, res)) {
726 device_printf(child, "resource activation failed\n");
727 rman_release_resource(res);
735 lbc_print_child(device_t dev, device_t child)
737 struct lbc_devinfo *di;
738 struct resource_list *rl;
741 di = device_get_ivars(child);
745 rv += bus_print_child_header(dev, child);
746 rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
747 rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
748 rv += bus_print_child_footer(dev, child);
754 lbc_release_resource(device_t dev, device_t child, int type, int rid,
755 struct resource *res)
759 if (rman_get_flags(res) & RF_ACTIVE) {
760 err = bus_deactivate_resource(child, type, rid, res);
765 return (rman_release_resource(res));
768 static const struct ofw_bus_devinfo *
769 lbc_get_devinfo(device_t bus, device_t child)
771 struct lbc_devinfo *di;
773 di = device_get_ivars(child);
774 return (&di->di_ofw);
778 lbc_write_reg(device_t child, u_int off, uint32_t val)
781 struct lbc_softc *sc;
783 dev = device_get_parent(child);
786 device_printf(dev, "%s(%s): invalid offset %#x\n",
787 __func__, device_get_nameunit(child), off);
791 sc = device_get_softc(dev);
793 if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0u) {
794 sc->sc_ltesr ^= (val & sc->sc_ltesr);
798 if (off == LBC85XX_LTEATR && (val & 1) == 0)
800 bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
804 lbc_read_reg(device_t child, u_int off)
807 struct lbc_softc *sc;
810 dev = device_get_parent(child);
813 device_printf(dev, "%s(%s): invalid offset %#x\n",
814 __func__, device_get_nameunit(child), off);
818 sc = device_get_softc(dev);
820 if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0U)
823 val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);