2 * Copyright (c) 2006-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008 Semihalf, Rafal Czubak
4 * Copyright (c) 2009 The FreeBSD Foundation
7 * Portions of this software were developed by Semihalf
8 * under sponsorship from the FreeBSD Foundation.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
45 #include <machine/bus.h>
50 #include <dev/fdt/fdt_common.h>
51 #include <dev/ofw/ofw_bus.h>
52 #include <dev/ofw/ofw_bus_subr.h>
54 #include <powerpc/mpc85xx/mpc85xx.h>
56 #include "ofw_bus_if.h"
60 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
61 printf(fmt,##args); } while (0)
63 #define debugf(fmt, args...)
66 static MALLOC_DEFINE(M_LBC, "localbus", "localbus devices information");
68 static int lbc_probe(device_t);
69 static int lbc_attach(device_t);
70 static int lbc_shutdown(device_t);
71 static struct resource *lbc_alloc_resource(device_t, device_t, int, int *,
72 rman_res_t, rman_res_t, rman_res_t, u_int);
73 static int lbc_print_child(device_t, device_t);
74 static int lbc_release_resource(device_t, device_t, int, int,
76 static const struct ofw_bus_devinfo *lbc_get_devinfo(device_t, device_t);
79 * Bus interface definition
81 static device_method_t lbc_methods[] = {
82 /* Device interface */
83 DEVMETHOD(device_probe, lbc_probe),
84 DEVMETHOD(device_attach, lbc_attach),
85 DEVMETHOD(device_shutdown, lbc_shutdown),
88 DEVMETHOD(bus_print_child, lbc_print_child),
89 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
90 DEVMETHOD(bus_teardown_intr, NULL),
92 DEVMETHOD(bus_alloc_resource, lbc_alloc_resource),
93 DEVMETHOD(bus_release_resource, lbc_release_resource),
94 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
95 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
97 /* OFW bus interface */
98 DEVMETHOD(ofw_bus_get_devinfo, lbc_get_devinfo),
99 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
100 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
101 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
102 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
103 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
108 static driver_t lbc_driver = {
111 sizeof(struct lbc_softc)
114 devclass_t lbc_devclass;
116 EARLY_DRIVER_MODULE(lbc, ofwbus, lbc_driver, lbc_devclass,
120 * Calculate address mask used by OR(n) registers. Use memory region size to
121 * determine mask value. The size must be a power of two and within the range
122 * of 32KB - 4GB. Otherwise error code is returned. Value representing
123 * 4GB size can be passed as 0xffffffff.
126 lbc_address_mask(uint32_t size)
134 if (size == (1U << n))
142 return (0xffff8000 << (n - 15));
146 lbc_banks_unmap(struct lbc_softc *sc)
151 while (r < LBC_DEV_MAX) {
152 if (sc->sc_range[r].size == 0)
155 pmap_unmapdev(sc->sc_range[r].kva, sc->sc_range[r].size);
156 law_disable(OCP85XX_TGTIF_LBC, sc->sc_range[r].addr,
157 sc->sc_range[r].size);
163 lbc_banks_map(struct lbc_softc *sc)
165 vm_paddr_t end, start;
167 u_int i, r, ranges, s;
170 bzero(sc->sc_range, sizeof(sc->sc_range));
173 * Determine number of discontiguous address ranges to program.
176 for (i = 0; i < LBC_DEV_MAX; i++) {
177 size = sc->sc_banks[i].size;
181 start = sc->sc_banks[i].addr;
182 for (r = 0; r < ranges; r++) {
183 /* Avoid wrap-around bugs. */
184 end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size;
185 if (start > 0 && end == start - 1) {
186 sc->sc_range[r].size += size;
189 /* Avoid wrap-around bugs. */
190 end = start - 1 + size;
191 if (sc->sc_range[r].addr > 0 &&
192 end == sc->sc_range[r].addr - 1) {
193 sc->sc_range[r].addr = start;
194 sc->sc_range[r].size += size;
199 /* New range; add using insertion sort */
201 while (r < ranges && sc->sc_range[r].addr < start)
203 for (s = ranges; s > r; s--)
204 sc->sc_range[s] = sc->sc_range[s-1];
205 sc->sc_range[r].addr = start;
206 sc->sc_range[r].size = size;
212 * Ranges are sorted so quickly go over the list to merge ranges
213 * that grew toward each other while building the ranges.
216 while (r < ranges - 1) {
217 end = sc->sc_range[r].addr + sc->sc_range[r].size;
218 if (end != sc->sc_range[r+1].addr) {
222 sc->sc_range[r].size += sc->sc_range[r+1].size;
223 for (s = r + 1; s < ranges - 1; s++)
224 sc->sc_range[s] = sc->sc_range[s+1];
225 bzero(&sc->sc_range[s], sizeof(sc->sc_range[s]));
230 * Configure LAW for the LBC ranges and map the physical memory
233 for (r = 0; r < ranges; r++) {
234 start = sc->sc_range[r].addr;
235 size = sc->sc_range[r].size;
236 error = law_enable(OCP85XX_TGTIF_LBC, start, size);
239 sc->sc_range[r].kva = (vm_offset_t)pmap_mapdev(start, size);
242 /* XXX: need something better here? */
246 /* Assign KVA to banks based on the enclosing range. */
247 for (i = 0; i < LBC_DEV_MAX; i++) {
248 size = sc->sc_banks[i].size;
252 start = sc->sc_banks[i].addr;
253 for (r = 0; r < ranges; r++) {
254 end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size;
255 if (start >= sc->sc_range[r].addr &&
256 start - 1 + size <= end)
260 sc->sc_banks[i].kva = sc->sc_range[r].kva +
261 (start - sc->sc_range[r].addr);
269 lbc_banks_enable(struct lbc_softc *sc)
275 for (i = 0; i < LBC_DEV_MAX; i++) {
276 size = sc->sc_banks[i].size;
281 * Compute and program BR value.
283 regval = sc->sc_banks[i].addr;
284 switch (sc->sc_banks[i].width) {
298 regval |= (sc->sc_banks[i].decc << 9);
299 regval |= (sc->sc_banks[i].wp << 8);
300 regval |= (sc->sc_banks[i].msel << 5);
301 regval |= (sc->sc_banks[i].atom << 2);
303 bus_space_write_4(sc->sc_bst, sc->sc_bsh,
304 LBC85XX_BR(i), regval);
307 * Compute and program OR value.
309 regval = lbc_address_mask(size);
310 switch (sc->sc_banks[i].msel) {
311 case LBCRES_MSEL_GPCM:
312 /* TODO Add flag support for option registers */
315 case LBCRES_MSEL_FCM:
316 /* TODO Add flag support for options register */
319 case LBCRES_MSEL_UPMA:
320 case LBCRES_MSEL_UPMB:
321 case LBCRES_MSEL_UPMC:
322 printf("UPM mode not supported yet!");
326 bus_space_write_4(sc->sc_bst, sc->sc_bsh,
327 LBC85XX_OR(i), regval);
338 fdt_lbc_fixup(phandle_t node, struct lbc_softc *sc, struct lbc_devinfo *di)
343 if (OF_getprop(node, "bank-width", (void *)&width, sizeof(width)) <= 0)
347 if (sc->sc_banks[bank].size == 0)
350 /* Express width in bits. */
351 sc->sc_banks[bank].width = width * 8;
355 fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *sc,
356 struct lbc_devinfo *di)
358 u_long start, end, count;
359 pcell_t *reg, *regptr;
360 pcell_t addr_cells, size_cells;
361 int tuple_size, tuples;
364 if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0)
367 tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
368 tuples = OF_getprop_alloc(node, "reg", tuple_size, (void **)®);
369 debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells);
370 debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size);
372 /* No 'reg' property in this node. */
376 for (i = 0; i < tuples; i++) {
378 bank = fdt_data_get((void *)reg, 1);
382 /* Get address/size. */
383 rv = fdt_data_to_res(reg, addr_cells - 1, size_cells, &start,
386 resource_list_free(&di->di_res);
389 reg += addr_cells - 1 + size_cells;
391 /* Calculate address range relative to VA base. */
392 start = sc->sc_banks[bank].kva + start;
393 end = start + count - 1;
395 debugf("reg addr bank = %d, start = %lx, end = %lx, "
396 "count = %lx\n", bank, start, end, count);
398 /* Use bank (CS) cell as rid. */
399 resource_list_add(&di->di_res, SYS_RES_MEMORY, bank, start,
404 free(regptr, M_OFWPROP);
411 struct lbc_softc *sc = arg;
414 ltesr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR);
415 sc->sc_ltesr = ltesr;
416 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ltesr);
421 lbc_probe(device_t dev)
424 if (!(ofw_bus_is_compatible(dev, "fsl,lbc") ||
425 ofw_bus_is_compatible(dev, "fsl,elbc")))
428 device_set_desc(dev, "Freescale Local Bus Controller");
429 return (BUS_PROBE_DEFAULT);
433 lbc_attach(device_t dev)
435 struct lbc_softc *sc;
436 struct lbc_devinfo *di;
438 u_long offset, start, size;
440 phandle_t node, child;
441 pcell_t *ranges, *rangesptr;
442 int tuple_size, tuples;
446 sc = device_get_softc(dev);
450 sc->sc_mres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_mrid,
452 if (sc->sc_mres == NULL)
455 sc->sc_bst = rman_get_bustag(sc->sc_mres);
456 sc->sc_bsh = rman_get_bushandle(sc->sc_mres);
458 for (bank = 0; bank < LBC_DEV_MAX; bank++) {
459 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_BR(bank), 0);
460 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_OR(bank), 0);
464 * Initialize configuration register:
466 * - set data buffer control signal function
467 * - disable parity byte select
468 * - set ECC parity type
469 * - set bus monitor timing and timer prescale
471 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LBCR, 0);
474 * Initialize clock ratio register:
475 * - disable PLL bypass mode
476 * - configure LCLK delay cycles for the assertion of LALE
477 * - set system clock divider
479 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LCRR, 0x00030008);
481 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEDR, 0);
482 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ~0);
483 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEIR, 0x64080001);
486 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
487 RF_ACTIVE | RF_SHAREABLE);
488 if (sc->sc_ires != NULL) {
489 error = bus_setup_intr(dev, sc->sc_ires,
490 INTR_TYPE_MISC | INTR_MPSAFE, NULL, lbc_intr, sc,
493 device_printf(dev, "could not activate interrupt\n");
494 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
505 rm->rm_type = RMAN_ARRAY;
506 rm->rm_descr = "Local Bus Space";
509 error = rman_init(rm);
513 error = rman_manage_region(rm, rm->rm_start, rm->rm_end);
520 * Process 'ranges' property.
522 node = ofw_bus_get_node(dev);
523 if ((fdt_addrsize_cells(node, &sc->sc_addr_cells,
524 &sc->sc_size_cells)) != 0) {
529 par_addr_cells = fdt_parent_addr_cells(node);
530 if (par_addr_cells > 2) {
531 device_printf(dev, "unsupported parent #addr-cells\n");
535 tuple_size = sizeof(pcell_t) * (sc->sc_addr_cells + par_addr_cells +
538 tuples = OF_getprop_alloc(node, "ranges", tuple_size,
541 device_printf(dev, "could not retrieve 'ranges' property\n");
547 debugf("par addr_cells = %d, addr_cells = %d, size_cells = %d, "
548 "tuple_size = %d, tuples = %d\n", par_addr_cells,
549 sc->sc_addr_cells, sc->sc_size_cells, tuple_size, tuples);
553 for (i = 0; i < tuples; i++) {
555 /* The first cell is the bank (chip select) number. */
556 bank = fdt_data_get((void *)ranges, 1);
557 if (bank < 0 || bank > LBC_DEV_MAX) {
558 device_printf(dev, "bank out of range: %d\n", bank);
565 * Remaining cells of the child address define offset into
568 offset = fdt_data_get((void *)ranges, sc->sc_addr_cells - 1);
569 ranges += sc->sc_addr_cells - 1;
571 /* Parent bus start address of this bank. */
572 start = fdt_data_get((void *)ranges, par_addr_cells);
573 ranges += par_addr_cells;
575 size = fdt_data_get((void *)ranges, sc->sc_size_cells);
576 ranges += sc->sc_size_cells;
577 debugf("bank = %d, start = %lx, size = %lx\n", bank,
580 sc->sc_banks[bank].addr = start + offset;
581 sc->sc_banks[bank].size = size;
584 * Attributes for the bank.
586 * XXX Note there are no DT bindings defined for them at the
587 * moment, so we need to provide some defaults.
589 sc->sc_banks[bank].width = 16;
590 sc->sc_banks[bank].msel = LBCRES_MSEL_GPCM;
591 sc->sc_banks[bank].decc = LBCRES_DECC_DISABLED;
592 sc->sc_banks[bank].atom = LBCRES_ATOM_DISABLED;
593 sc->sc_banks[bank].wp = 0;
597 * Initialize mem-mappings for the LBC banks (i.e. chip selects).
599 error = lbc_banks_map(sc);
604 * Walk the localbus and add direct subordinates as our children.
606 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
608 di = malloc(sizeof(*di), M_LBC, M_WAITOK | M_ZERO);
610 if (ofw_bus_gen_setup_devinfo(&di->di_ofw, child) != 0) {
612 device_printf(dev, "could not set up devinfo\n");
616 resource_list_init(&di->di_res);
618 if (fdt_lbc_reg_decode(child, sc, di)) {
619 device_printf(dev, "could not process 'reg' "
621 ofw_bus_gen_destroy_devinfo(&di->di_ofw);
626 fdt_lbc_fixup(child, sc, di);
628 /* Add newbus device for this FDT node */
629 cdev = device_add_child(dev, NULL, -1);
631 device_printf(dev, "could not add child: %s\n",
632 di->di_ofw.obd_name);
633 resource_list_free(&di->di_res);
634 ofw_bus_gen_destroy_devinfo(&di->di_ofw);
638 debugf("added child name='%s', node=%p\n", di->di_ofw.obd_name,
640 device_set_ivars(cdev, di);
646 lbc_banks_enable(sc);
648 free(rangesptr, M_OFWPROP);
649 return (bus_generic_attach(dev));
652 free(rangesptr, M_OFWPROP);
653 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mrid, sc->sc_mres);
658 lbc_shutdown(device_t dev)
665 static struct resource *
666 lbc_alloc_resource(device_t bus, device_t child, int type, int *rid,
667 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
669 struct lbc_softc *sc;
670 struct lbc_devinfo *di;
671 struct resource_list_entry *rle;
672 struct resource *res;
676 /* We only support default allocations. */
677 if (start != 0ul || end != ~0ul)
680 sc = device_get_softc(bus);
681 if (type == SYS_RES_IRQ)
682 return (bus_alloc_resource(bus, type, rid, start, end, count,
686 * Request for the default allocation with a given rid: use resource
687 * list stored in the local device info.
689 if ((di = device_get_ivars(child)) == NULL)
692 if (type == SYS_RES_IOPORT)
693 type = SYS_RES_MEMORY;
697 rle = resource_list_find(&di->di_res, type, *rid);
699 device_printf(bus, "no default resources for "
700 "rid = %d, type = %d\n", *rid, type);
705 end = start + count - 1;
707 sc = device_get_softc(bus);
709 needactivate = flags & RF_ACTIVE;
714 res = rman_reserve_resource(rm, start, end, count, flags, child);
716 device_printf(bus, "failed to reserve resource %#lx - %#lx "
717 "(%#lx)\n", start, end, count);
721 rman_set_rid(res, *rid);
722 rman_set_bustag(res, &bs_be_tag);
723 rman_set_bushandle(res, rman_get_start(res));
726 if (bus_activate_resource(child, type, *rid, res)) {
727 device_printf(child, "resource activation failed\n");
728 rman_release_resource(res);
736 lbc_print_child(device_t dev, device_t child)
738 struct lbc_devinfo *di;
739 struct resource_list *rl;
742 di = device_get_ivars(child);
746 rv += bus_print_child_header(dev, child);
747 rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
748 rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
749 rv += bus_print_child_footer(dev, child);
755 lbc_release_resource(device_t dev, device_t child, int type, int rid,
756 struct resource *res)
760 if (rman_get_flags(res) & RF_ACTIVE) {
761 err = bus_deactivate_resource(child, type, rid, res);
766 return (rman_release_resource(res));
769 static const struct ofw_bus_devinfo *
770 lbc_get_devinfo(device_t bus, device_t child)
772 struct lbc_devinfo *di;
774 di = device_get_ivars(child);
775 return (&di->di_ofw);
779 lbc_write_reg(device_t child, u_int off, uint32_t val)
782 struct lbc_softc *sc;
784 dev = device_get_parent(child);
787 device_printf(dev, "%s(%s): invalid offset %#x\n",
788 __func__, device_get_nameunit(child), off);
792 sc = device_get_softc(dev);
794 if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0u) {
795 sc->sc_ltesr ^= (val & sc->sc_ltesr);
799 if (off == LBC85XX_LTEATR && (val & 1) == 0)
801 bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
805 lbc_read_reg(device_t child, u_int off)
808 struct lbc_softc *sc;
811 dev = device_get_parent(child);
814 device_printf(dev, "%s(%s): invalid offset %#x\n",
815 __func__, device_get_nameunit(child), off);
819 sc = device_get_softc(dev);
821 if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0U)
824 val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);