2 * Copyright (c) 2006-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008 Semihalf, Rafal Czubak
4 * Copyright (c) 2009 The FreeBSD Foundation
7 * Portions of this software were developed by Semihalf
8 * under sponsorship from the FreeBSD Foundation.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include "opt_platform.h"
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
39 #include <sys/param.h>
40 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/module.h>
47 #include <machine/bus.h>
52 #include <dev/fdt/fdt_common.h>
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
56 #include <powerpc/mpc85xx/mpc85xx.h>
58 #include "ofw_bus_if.h"
62 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
63 printf(fmt,##args); } while (0)
65 #define debugf(fmt, args...)
68 static MALLOC_DEFINE(M_LBC, "localbus", "localbus devices information");
70 static int lbc_probe(device_t);
71 static int lbc_attach(device_t);
72 static int lbc_shutdown(device_t);
73 static int lbc_activate_resource(device_t bus __unused, device_t child __unused,
74 int type, int rid __unused, struct resource *r);
75 static int lbc_deactivate_resource(device_t bus __unused,
76 device_t child __unused, int type __unused, int rid __unused,
78 static struct resource *lbc_alloc_resource(device_t, device_t, int, int *,
79 rman_res_t, rman_res_t, rman_res_t, u_int);
80 static int lbc_print_child(device_t, device_t);
81 static int lbc_release_resource(device_t, device_t, int, int,
83 static const struct ofw_bus_devinfo *lbc_get_devinfo(device_t, device_t);
86 * Bus interface definition
88 static device_method_t lbc_methods[] = {
89 /* Device interface */
90 DEVMETHOD(device_probe, lbc_probe),
91 DEVMETHOD(device_attach, lbc_attach),
92 DEVMETHOD(device_shutdown, lbc_shutdown),
95 DEVMETHOD(bus_print_child, lbc_print_child),
96 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
97 DEVMETHOD(bus_teardown_intr, NULL),
99 DEVMETHOD(bus_alloc_resource, lbc_alloc_resource),
100 DEVMETHOD(bus_release_resource, lbc_release_resource),
101 DEVMETHOD(bus_activate_resource, lbc_activate_resource),
102 DEVMETHOD(bus_deactivate_resource, lbc_deactivate_resource),
104 /* OFW bus interface */
105 DEVMETHOD(ofw_bus_get_devinfo, lbc_get_devinfo),
106 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
107 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
108 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
109 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
110 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
115 static driver_t lbc_driver = {
118 sizeof(struct lbc_softc)
121 devclass_t lbc_devclass;
123 EARLY_DRIVER_MODULE(lbc, ofwbus, lbc_driver, lbc_devclass,
127 * Calculate address mask used by OR(n) registers. Use memory region size to
128 * determine mask value. The size must be a power of two and within the range
129 * of 32KB - 4GB. Otherwise error code is returned. Value representing
130 * 4GB size can be passed as 0xffffffff.
133 lbc_address_mask(uint32_t size)
141 if (size == (1U << n))
149 return (0xffff8000 << (n - 15));
153 lbc_banks_unmap(struct lbc_softc *sc)
158 while (r < LBC_DEV_MAX) {
159 if (sc->sc_range[r].size == 0)
162 pmap_unmapdev(sc->sc_range[r].kva, sc->sc_range[r].size);
163 law_disable(OCP85XX_TGTIF_LBC, sc->sc_range[r].addr,
164 sc->sc_range[r].size);
170 lbc_banks_map(struct lbc_softc *sc)
172 vm_paddr_t end, start;
174 u_int i, r, ranges, s;
177 bzero(sc->sc_range, sizeof(sc->sc_range));
180 * Determine number of discontiguous address ranges to program.
183 for (i = 0; i < LBC_DEV_MAX; i++) {
184 size = sc->sc_banks[i].size;
188 start = sc->sc_banks[i].addr;
189 for (r = 0; r < ranges; r++) {
190 /* Avoid wrap-around bugs. */
191 end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size;
192 if (start > 0 && end == start - 1) {
193 sc->sc_range[r].size += size;
196 /* Avoid wrap-around bugs. */
197 end = start - 1 + size;
198 if (sc->sc_range[r].addr > 0 &&
199 end == sc->sc_range[r].addr - 1) {
200 sc->sc_range[r].addr = start;
201 sc->sc_range[r].size += size;
206 /* New range; add using insertion sort */
208 while (r < ranges && sc->sc_range[r].addr < start)
210 for (s = ranges; s > r; s--)
211 sc->sc_range[s] = sc->sc_range[s-1];
212 sc->sc_range[r].addr = start;
213 sc->sc_range[r].size = size;
219 * Ranges are sorted so quickly go over the list to merge ranges
220 * that grew toward each other while building the ranges.
223 while (r < ranges - 1) {
224 end = sc->sc_range[r].addr + sc->sc_range[r].size;
225 if (end != sc->sc_range[r+1].addr) {
229 sc->sc_range[r].size += sc->sc_range[r+1].size;
230 for (s = r + 1; s < ranges - 1; s++)
231 sc->sc_range[s] = sc->sc_range[s+1];
232 bzero(&sc->sc_range[s], sizeof(sc->sc_range[s]));
237 * Configure LAW for the LBC ranges and map the physical memory
240 for (r = 0; r < ranges; r++) {
241 start = sc->sc_range[r].addr;
242 size = sc->sc_range[r].size;
243 error = law_enable(OCP85XX_TGTIF_LBC, start, size);
246 sc->sc_range[r].kva = (vm_offset_t)pmap_mapdev(start, size);
249 /* XXX: need something better here? */
253 /* Assign KVA to banks based on the enclosing range. */
254 for (i = 0; i < LBC_DEV_MAX; i++) {
255 size = sc->sc_banks[i].size;
259 start = sc->sc_banks[i].addr;
260 for (r = 0; r < ranges; r++) {
261 end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size;
262 if (start >= sc->sc_range[r].addr &&
263 start - 1 + size <= end)
267 sc->sc_banks[i].kva = sc->sc_range[r].kva +
268 (start - sc->sc_range[r].addr);
276 lbc_banks_enable(struct lbc_softc *sc)
282 for (i = 0; i < LBC_DEV_MAX; i++) {
283 size = sc->sc_banks[i].size;
288 * Compute and program BR value.
290 regval = sc->sc_banks[i].addr;
291 switch (sc->sc_banks[i].width) {
305 regval |= (sc->sc_banks[i].decc << 9);
306 regval |= (sc->sc_banks[i].wp << 8);
307 regval |= (sc->sc_banks[i].msel << 5);
308 regval |= (sc->sc_banks[i].atom << 2);
310 bus_space_write_4(sc->sc_bst, sc->sc_bsh,
311 LBC85XX_BR(i), regval);
314 * Compute and program OR value.
316 regval = lbc_address_mask(size);
317 switch (sc->sc_banks[i].msel) {
318 case LBCRES_MSEL_GPCM:
319 /* TODO Add flag support for option registers */
322 case LBCRES_MSEL_FCM:
323 /* TODO Add flag support for options register */
326 case LBCRES_MSEL_UPMA:
327 case LBCRES_MSEL_UPMB:
328 case LBCRES_MSEL_UPMC:
329 printf("UPM mode not supported yet!");
333 bus_space_write_4(sc->sc_bst, sc->sc_bsh,
334 LBC85XX_OR(i), regval);
345 fdt_lbc_fixup(phandle_t node, struct lbc_softc *sc, struct lbc_devinfo *di)
350 if (OF_getprop(node, "bank-width", (void *)&width, sizeof(width)) <= 0)
354 if (sc->sc_banks[bank].size == 0)
357 /* Express width in bits. */
358 sc->sc_banks[bank].width = width * 8;
362 fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *sc,
363 struct lbc_devinfo *di)
365 rman_res_t start, end, count;
366 pcell_t *reg, *regptr;
367 pcell_t addr_cells, size_cells;
368 int tuple_size, tuples;
371 if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0)
374 tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
375 tuples = OF_getencprop_alloc(node, "reg", tuple_size, (void **)®);
376 debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells);
377 debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size);
379 /* No 'reg' property in this node. */
383 for (i = 0; i < tuples; i++) {
385 bank = fdt_data_get((void *)reg, 1);
389 /* Get address/size. */
391 for (j = 0; j < addr_cells; j++) {
395 for (j = 0; j < size_cells; j++) {
397 count |= reg[addr_cells + j - 1];
399 reg += addr_cells - 1 + size_cells;
401 /* Calculate address range relative to VA base. */
402 start = sc->sc_banks[bank].kva + start;
403 end = start + count - 1;
405 debugf("reg addr bank = %d, start = %jx, end = %jx, "
406 "count = %jx\n", bank, start, end, count);
408 /* Use bank (CS) cell as rid. */
409 resource_list_add(&di->di_res, SYS_RES_MEMORY, bank, start,
413 OF_prop_free(regptr);
420 struct lbc_softc *sc = arg;
423 ltesr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR);
424 sc->sc_ltesr = ltesr;
425 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ltesr);
430 lbc_probe(device_t dev)
433 if (!(ofw_bus_is_compatible(dev, "fsl,lbc") ||
434 ofw_bus_is_compatible(dev, "fsl,elbc")))
437 device_set_desc(dev, "Freescale Local Bus Controller");
438 return (BUS_PROBE_DEFAULT);
442 lbc_attach(device_t dev)
444 struct lbc_softc *sc;
445 struct lbc_devinfo *di;
447 uintmax_t offset, size;
450 phandle_t node, child;
451 pcell_t *ranges, *rangesptr;
452 int tuple_size, tuples;
454 int bank, error, i, j;
456 sc = device_get_softc(dev);
460 sc->sc_mres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_mrid,
462 if (sc->sc_mres == NULL)
465 sc->sc_bst = rman_get_bustag(sc->sc_mres);
466 sc->sc_bsh = rman_get_bushandle(sc->sc_mres);
468 for (bank = 0; bank < LBC_DEV_MAX; bank++) {
469 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_BR(bank), 0);
470 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_OR(bank), 0);
474 * Initialize configuration register:
476 * - set data buffer control signal function
477 * - disable parity byte select
478 * - set ECC parity type
479 * - set bus monitor timing and timer prescale
481 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LBCR, 0);
484 * Initialize clock ratio register:
485 * - disable PLL bypass mode
486 * - configure LCLK delay cycles for the assertion of LALE
487 * - set system clock divider
489 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LCRR, 0x00030008);
491 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEDR, 0);
492 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ~0);
493 bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEIR, 0x64080001);
496 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
497 RF_ACTIVE | RF_SHAREABLE);
498 if (sc->sc_ires != NULL) {
499 error = bus_setup_intr(dev, sc->sc_ires,
500 INTR_TYPE_MISC | INTR_MPSAFE, NULL, lbc_intr, sc,
503 device_printf(dev, "could not activate interrupt\n");
504 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
515 rm->rm_type = RMAN_ARRAY;
516 rm->rm_descr = "Local Bus Space";
517 error = rman_init(rm);
521 error = rman_manage_region(rm, rm->rm_start, rm->rm_end);
528 * Process 'ranges' property.
530 node = ofw_bus_get_node(dev);
531 if ((fdt_addrsize_cells(node, &sc->sc_addr_cells,
532 &sc->sc_size_cells)) != 0) {
537 par_addr_cells = fdt_parent_addr_cells(node);
538 if (par_addr_cells > 2) {
539 device_printf(dev, "unsupported parent #addr-cells\n");
543 tuple_size = sizeof(pcell_t) * (sc->sc_addr_cells + par_addr_cells +
546 tuples = OF_getencprop_alloc(node, "ranges", tuple_size,
549 device_printf(dev, "could not retrieve 'ranges' property\n");
555 debugf("par addr_cells = %d, addr_cells = %d, size_cells = %d, "
556 "tuple_size = %d, tuples = %d\n", par_addr_cells,
557 sc->sc_addr_cells, sc->sc_size_cells, tuple_size, tuples);
561 for (i = 0; i < tuples; i++) {
563 /* The first cell is the bank (chip select) number. */
564 bank = fdt_data_get(ranges, 1);
565 if (bank < 0 || bank > LBC_DEV_MAX) {
566 device_printf(dev, "bank out of range: %d\n", bank);
573 * Remaining cells of the child address define offset into
577 for (j = 0; j < sc->sc_addr_cells - 1; j++) {
578 offset <<= sizeof(pcell_t) * 8;
583 /* Parent bus start address of this bank. */
585 for (j = 0; j < par_addr_cells; j++) {
586 start <<= sizeof(pcell_t) * 8;
591 size = fdt_data_get((void *)ranges, sc->sc_size_cells);
592 ranges += sc->sc_size_cells;
593 debugf("bank = %d, start = %jx, size = %jx\n", bank,
594 (uintmax_t)start, size);
596 sc->sc_banks[bank].addr = start + offset;
597 sc->sc_banks[bank].size = size;
600 * Attributes for the bank.
602 * XXX Note there are no DT bindings defined for them at the
603 * moment, so we need to provide some defaults.
605 sc->sc_banks[bank].width = 16;
606 sc->sc_banks[bank].msel = LBCRES_MSEL_GPCM;
607 sc->sc_banks[bank].decc = LBCRES_DECC_DISABLED;
608 sc->sc_banks[bank].atom = LBCRES_ATOM_DISABLED;
609 sc->sc_banks[bank].wp = 0;
613 * Initialize mem-mappings for the LBC banks (i.e. chip selects).
615 error = lbc_banks_map(sc);
620 * Walk the localbus and add direct subordinates as our children.
622 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
624 di = malloc(sizeof(*di), M_LBC, M_WAITOK | M_ZERO);
626 if (ofw_bus_gen_setup_devinfo(&di->di_ofw, child) != 0) {
628 device_printf(dev, "could not set up devinfo\n");
632 resource_list_init(&di->di_res);
634 if (fdt_lbc_reg_decode(child, sc, di)) {
635 device_printf(dev, "could not process 'reg' "
637 ofw_bus_gen_destroy_devinfo(&di->di_ofw);
642 fdt_lbc_fixup(child, sc, di);
644 /* Add newbus device for this FDT node */
645 cdev = device_add_child(dev, NULL, -1);
647 device_printf(dev, "could not add child: %s\n",
648 di->di_ofw.obd_name);
649 resource_list_free(&di->di_res);
650 ofw_bus_gen_destroy_devinfo(&di->di_ofw);
654 debugf("added child name='%s', node=%p\n", di->di_ofw.obd_name,
656 device_set_ivars(cdev, di);
662 lbc_banks_enable(sc);
664 OF_prop_free(rangesptr);
665 return (bus_generic_attach(dev));
668 OF_prop_free(rangesptr);
669 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mrid, sc->sc_mres);
674 lbc_shutdown(device_t dev)
681 static struct resource *
682 lbc_alloc_resource(device_t bus, device_t child, int type, int *rid,
683 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
685 struct lbc_softc *sc;
686 struct lbc_devinfo *di;
687 struct resource_list_entry *rle;
688 struct resource *res;
692 /* We only support default allocations. */
693 if (!RMAN_IS_DEFAULT_RANGE(start, end))
696 sc = device_get_softc(bus);
697 if (type == SYS_RES_IRQ)
698 return (bus_alloc_resource(bus, type, rid, start, end, count,
702 * Request for the default allocation with a given rid: use resource
703 * list stored in the local device info.
705 if ((di = device_get_ivars(child)) == NULL)
708 if (type == SYS_RES_IOPORT)
709 type = SYS_RES_MEMORY;
713 rle = resource_list_find(&di->di_res, type, *rid);
715 device_printf(bus, "no default resources for "
716 "rid = %d, type = %d\n", *rid, type);
721 end = start + count - 1;
723 sc = device_get_softc(bus);
725 needactivate = flags & RF_ACTIVE;
730 res = rman_reserve_resource(rm, start, end, count, flags, child);
732 device_printf(bus, "failed to reserve resource %#jx - %#jx "
733 "(%#jx)\n", start, end, count);
737 rman_set_rid(res, *rid);
738 rman_set_bustag(res, &bs_be_tag);
739 rman_set_bushandle(res, rman_get_start(res));
742 if (bus_activate_resource(child, type, *rid, res)) {
743 device_printf(child, "resource activation failed\n");
744 rman_release_resource(res);
752 lbc_print_child(device_t dev, device_t child)
754 struct lbc_devinfo *di;
755 struct resource_list *rl;
758 di = device_get_ivars(child);
762 rv += bus_print_child_header(dev, child);
763 rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
764 rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
765 rv += bus_print_child_footer(dev, child);
771 lbc_release_resource(device_t dev, device_t child, int type, int rid,
772 struct resource *res)
776 if (rman_get_flags(res) & RF_ACTIVE) {
777 err = bus_deactivate_resource(child, type, rid, res);
782 return (rman_release_resource(res));
786 lbc_activate_resource(device_t bus __unused, device_t child __unused,
787 int type __unused, int rid __unused, struct resource *r)
790 /* Child resources were already mapped, just activate. */
791 return (rman_activate_resource(r));
795 lbc_deactivate_resource(device_t bus __unused, device_t child __unused,
796 int type __unused, int rid __unused, struct resource *r)
799 return (rman_deactivate_resource(r));
802 static const struct ofw_bus_devinfo *
803 lbc_get_devinfo(device_t bus, device_t child)
805 struct lbc_devinfo *di;
807 di = device_get_ivars(child);
808 return (&di->di_ofw);
812 lbc_write_reg(device_t child, u_int off, uint32_t val)
815 struct lbc_softc *sc;
817 dev = device_get_parent(child);
820 device_printf(dev, "%s(%s): invalid offset %#x\n",
821 __func__, device_get_nameunit(child), off);
825 sc = device_get_softc(dev);
827 if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0u) {
828 sc->sc_ltesr ^= (val & sc->sc_ltesr);
832 if (off == LBC85XX_LTEATR && (val & 1) == 0)
834 bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
838 lbc_read_reg(device_t child, u_int off)
841 struct lbc_softc *sc;
844 dev = device_get_parent(child);
847 device_printf(dev, "%s(%s): invalid offset %#x\n",
848 __func__, device_get_nameunit(child), off);
852 sc = device_get_softc(dev);
854 if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0U)
857 val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);