2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright 2002 by Peter Grehan. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Driver for KeyLargo/Pangea, the MacPPC south bridge ASIC.
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/module.h>
47 #include <machine/bus.h>
48 #include <machine/intr_machdep.h>
49 #include <machine/resource.h>
50 #include <machine/vmparam.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
54 #include <dev/ofw/openfirm.h>
56 #include <powerpc/powermac/maciovar.h>
58 #include <dev/pci/pcivar.h>
59 #include <dev/pci/pcireg.h>
68 struct rman sc_mem_rman;
72 struct resource *sc_memr;
75 static MALLOC_DEFINE(M_MACIO, "macio", "macio device information");
77 static int macio_probe(device_t);
78 static int macio_attach(device_t);
79 static int macio_print_child(device_t dev, device_t child);
80 static void macio_probe_nomatch(device_t, device_t);
81 static struct resource *macio_alloc_resource(device_t, device_t, int, int *,
82 rman_res_t, rman_res_t, rman_res_t,
84 static int macio_activate_resource(device_t, device_t, int, int,
86 static int macio_deactivate_resource(device_t, device_t, int, int,
88 static int macio_release_resource(device_t, device_t, int, int,
90 static struct resource_list *macio_get_resource_list (device_t, device_t);
91 static ofw_bus_get_devinfo_t macio_get_devinfo;
94 * Bus interface definition
96 static device_method_t macio_methods[] = {
97 /* Device interface */
98 DEVMETHOD(device_probe, macio_probe),
99 DEVMETHOD(device_attach, macio_attach),
100 DEVMETHOD(device_detach, bus_generic_detach),
101 DEVMETHOD(device_shutdown, bus_generic_shutdown),
102 DEVMETHOD(device_suspend, bus_generic_suspend),
103 DEVMETHOD(device_resume, bus_generic_resume),
106 DEVMETHOD(bus_print_child, macio_print_child),
107 DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch),
108 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
109 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
111 DEVMETHOD(bus_alloc_resource, macio_alloc_resource),
112 DEVMETHOD(bus_release_resource, macio_release_resource),
113 DEVMETHOD(bus_activate_resource, macio_activate_resource),
114 DEVMETHOD(bus_deactivate_resource, macio_deactivate_resource),
115 DEVMETHOD(bus_get_resource_list, macio_get_resource_list),
117 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
119 /* ofw_bus interface */
120 DEVMETHOD(ofw_bus_get_devinfo, macio_get_devinfo),
121 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
122 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
123 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
124 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
125 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
130 static driver_t macio_pci_driver = {
133 sizeof(struct macio_softc)
136 devclass_t macio_devclass;
138 DRIVER_MODULE(macio, pci, macio_pci_driver, macio_devclass, 0, 0);
141 * PCI ID search table
143 static struct macio_pci_dev {
146 } macio_pci_devlist[] = {
147 { 0x0017106b, "Paddington I/O Controller" },
148 { 0x0022106b, "KeyLargo I/O Controller" },
149 { 0x0025106b, "Pangea I/O Controller" },
150 { 0x003e106b, "Intrepid I/O Controller" },
151 { 0x0041106b, "K2 KeyLargo I/O Controller" },
152 { 0x004f106b, "Shasta I/O Controller" },
157 * Devices to exclude from the probe
158 * XXX some of these may be required in the future...
160 #define MACIO_QUIRK_IGNORE 0x00000001
161 #define MACIO_QUIRK_CHILD_HAS_INTR 0x00000002
162 #define MACIO_QUIRK_USE_CHILD_REG 0x00000004
164 struct macio_quirk_entry {
169 static struct macio_quirk_entry macio_quirks[] = {
170 { "escc-legacy", MACIO_QUIRK_IGNORE },
171 { "timer", MACIO_QUIRK_IGNORE },
172 { "escc", MACIO_QUIRK_CHILD_HAS_INTR },
173 { "i2s", MACIO_QUIRK_CHILD_HAS_INTR |
174 MACIO_QUIRK_USE_CHILD_REG },
179 macio_get_quirks(const char *name)
181 struct macio_quirk_entry *mqe;
183 for (mqe = macio_quirks; mqe->mq_name != NULL; mqe++)
184 if (strcmp(name, mqe->mq_name) == 0)
185 return (mqe->mq_quirks);
191 * Add an interrupt to the dev's resource list if present
194 macio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo)
201 if (dinfo->mdi_ninterrupts >= 6) {
202 printf("macio: device has more than 6 interrupts\n");
206 nintr = OF_getprop_alloc_multi(devnode, "interrupts", sizeof(*intr),
209 nintr = OF_getprop_alloc_multi(devnode, "AAPL,interrupts",
210 sizeof(*intr), (void **)&intr);
218 if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent))
220 panic("Interrupt but no interrupt parent!\n");
222 if (OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells,
223 sizeof(icells)) <= 0)
226 for (i = 0; i < nintr; i+=icells) {
227 u_int irq = MAP_IRQ(iparent, intr[i]);
229 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ,
230 dinfo->mdi_ninterrupts, irq, irq, 1);
232 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = irq;
233 dinfo->mdi_ninterrupts++;
239 macio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo)
241 struct macio_reg *reg, *regp;
244 int i, layout_id = 0, nreg, res;
246 nreg = OF_getprop_alloc_multi(devnode, "reg", sizeof(*reg), (void **)®);
251 * Some G5's have broken properties in the i2s-a area. If so we try
252 * to fix it. Right now we know of two different cases, one for
253 * sound layout-id 36 and the other one for sound layout-id 76.
254 * What is missing is the base address for the memory addresses.
255 * We take them from the parent node (i2s) and use the size
256 * information from the child.
259 if (reg[0].mr_base == 0) {
260 child = OF_child(devnode);
262 res = OF_getprop(child, "name", buf, sizeof(buf));
263 if (res > 0 && strcmp(buf, "sound") == 0)
265 child = OF_peer(child);
268 res = OF_getprop(child, "layout-id", &layout_id,
271 if (res > 0 && (layout_id == 36 || layout_id == 76)) {
272 res = OF_getprop_alloc_multi(OF_parent(devnode), "reg",
273 sizeof(*regp), (void **)®p);
275 reg[1].mr_base = regp[1].mr_base;
276 reg[2].mr_base = regp[1].mr_base + reg[1].mr_size;
280 for (i = 0; i < nreg; i++) {
281 resource_list_add(&dinfo->mdi_resources, SYS_RES_MEMORY, i,
282 reg[i].mr_base, reg[i].mr_base + reg[i].mr_size,
291 macio_probe(device_t dev)
296 devid = pci_get_devid(dev);
297 for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) {
298 if (devid == macio_pci_devlist[i].mpd_devid) {
299 device_set_desc(dev, macio_pci_devlist[i].mpd_desc);
308 * PCI attach: scan Open Firmware child nodes, and attach these as children
312 macio_attach(device_t dev)
314 struct macio_softc *sc;
315 struct macio_devinfo *dinfo;
324 sc = device_get_softc(dev);
325 root = sc->sc_node = ofw_bus_get_node(dev);
328 * Locate the device node and it's base address
330 if (OF_getprop(root, "assigned-addresses",
331 reg, sizeof(reg)) < (ssize_t)sizeof(reg)) {
335 /* Used later to see if we have to enable the I2S part. */
336 OF_getprop(root, "compatible", compat, sizeof(compat));
338 sc->sc_base = reg[2];
339 sc->sc_size = MACIO_REG_SIZE;
341 sc->sc_memrid = PCIR_BAR(0);
342 sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
343 &sc->sc_memrid, RF_ACTIVE);
345 sc->sc_mem_rman.rm_type = RMAN_ARRAY;
346 sc->sc_mem_rman.rm_descr = "MacIO Device Memory";
347 error = rman_init(&sc->sc_mem_rman);
349 device_printf(dev, "rman_init() failed. error = %d\n", error);
352 error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size);
355 "rman_manage_region() failed. error = %d\n", error);
360 * Iterate through the sub-devices
362 for (child = OF_child(root); child != 0; child = OF_peer(child)) {
363 dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO);
364 if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) !=
366 free(dinfo, M_MACIO);
369 quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name);
370 if ((quirks & MACIO_QUIRK_IGNORE) != 0) {
371 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo);
372 free(dinfo, M_MACIO);
375 resource_list_init(&dinfo->mdi_resources);
376 dinfo->mdi_ninterrupts = 0;
377 macio_add_intr(child, dinfo);
378 if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0)
379 macio_add_reg(OF_child(child), dinfo);
381 macio_add_reg(child, dinfo);
382 if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0)
383 for (subchild = OF_child(child); subchild != 0;
384 subchild = OF_peer(subchild))
385 macio_add_intr(subchild, dinfo);
386 cdev = device_add_child(dev, NULL, -1);
388 device_printf(dev, "<%s>: device_add_child failed\n",
389 dinfo->mdi_obdinfo.obd_name);
390 resource_list_free(&dinfo->mdi_resources);
391 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo);
392 free(dinfo, M_MACIO);
395 device_set_ivars(cdev, dinfo);
397 /* Set FCRs to enable some devices */
398 if (sc->sc_memr == NULL)
401 if (strcmp(ofw_bus_get_name(cdev), "bmac") == 0 ||
402 (ofw_bus_get_compat(cdev) != NULL &&
403 strcmp(ofw_bus_get_compat(cdev), "bmac+") == 0)) {
406 fcr = bus_read_4(sc->sc_memr, HEATHROW_FCR);
408 fcr |= FCR_ENET_ENABLE & ~FCR_ENET_RESET;
409 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr);
411 fcr |= FCR_ENET_RESET;
412 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr);
414 fcr &= ~FCR_ENET_RESET;
415 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr);
418 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr);
422 * Make sure the I2S0 and the I2S0_CLK are enabled.
423 * On certain G5's they are not.
425 if ((strcmp(ofw_bus_get_name(cdev), "i2s") == 0) &&
426 (strcmp(compat, "K2-Keylargo") == 0)) {
430 fcr1 = bus_read_4(sc->sc_memr, KEYLARGO_FCR1);
431 fcr1 |= FCR1_I2S0_CLK_ENABLE | FCR1_I2S0_ENABLE;
432 bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1);
437 return (bus_generic_attach(dev));
442 macio_print_child(device_t dev, device_t child)
444 struct macio_devinfo *dinfo;
445 struct resource_list *rl;
448 dinfo = device_get_ivars(child);
449 rl = &dinfo->mdi_resources;
451 retval += bus_print_child_header(dev, child);
453 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
454 retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
456 retval += bus_print_child_footer(dev, child);
463 macio_probe_nomatch(device_t dev, device_t child)
465 struct macio_devinfo *dinfo;
466 struct resource_list *rl;
470 dinfo = device_get_ivars(child);
471 rl = &dinfo->mdi_resources;
473 if ((type = ofw_bus_get_type(child)) == NULL)
475 device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child));
476 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
477 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
478 printf(" (no driver attached)\n");
483 static struct resource *
484 macio_alloc_resource(device_t bus, device_t child, int type, int *rid,
485 rman_res_t start, rman_res_t end, rman_res_t count,
488 struct macio_softc *sc;
492 u_long adjstart, adjend, adjcount;
493 struct macio_devinfo *dinfo;
494 struct resource_list_entry *rle;
496 sc = device_get_softc(bus);
497 dinfo = device_get_ivars(child);
499 needactivate = flags & RF_ACTIVE;
505 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY,
508 device_printf(bus, "no rle for %s memory %d\n",
509 device_get_nameunit(child), *rid);
513 if (start < rle->start)
514 adjstart = rle->start;
515 else if (start > rle->end)
520 if (end < rle->start)
522 else if (end > rle->end)
527 adjcount = adjend - adjstart;
529 rm = &sc->sc_mem_rman;
533 /* Check for passthrough from subattachments like macgpio */
534 if (device_get_parent(child) != bus)
535 return BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
536 type, rid, start, end, count, flags);
538 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ,
541 if (dinfo->mdi_ninterrupts >= 6) {
543 "%s has more than 6 interrupts\n",
544 device_get_nameunit(child));
547 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ,
548 dinfo->mdi_ninterrupts, start, start, 1);
550 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start;
551 dinfo->mdi_ninterrupts++;
554 return (resource_list_alloc(&dinfo->mdi_resources, bus, child,
555 type, rid, start, end, count, flags));
558 device_printf(bus, "unknown resource request from %s\n",
559 device_get_nameunit(child));
563 rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags,
567 "failed to reserve resource %#lx - %#lx (%#lx) for %s\n",
568 adjstart, adjend, adjcount, device_get_nameunit(child));
572 rman_set_rid(rv, *rid);
575 if (bus_activate_resource(child, type, *rid, rv) != 0) {
577 "failed to activate resource for %s\n",
578 device_get_nameunit(child));
579 rman_release_resource(rv);
589 macio_release_resource(device_t bus, device_t child, int type, int rid,
590 struct resource *res)
592 if (rman_get_flags(res) & RF_ACTIVE) {
593 int error = bus_deactivate_resource(child, type, rid, res);
598 return (rman_release_resource(res));
603 macio_activate_resource(device_t bus, device_t child, int type, int rid,
604 struct resource *res)
606 struct macio_softc *sc;
609 sc = device_get_softc(bus);
611 if (type == SYS_RES_IRQ)
612 return (bus_activate_resource(bus, type, rid, res));
614 if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
615 p = pmap_mapdev((vm_offset_t)rman_get_start(res) + sc->sc_base,
616 (vm_size_t)rman_get_size(res));
619 rman_set_virtual(res, p);
620 rman_set_bustag(res, &bs_le_tag);
621 rman_set_bushandle(res, (u_long)p);
624 return (rman_activate_resource(res));
629 macio_deactivate_resource(device_t bus, device_t child, int type, int rid,
630 struct resource *res)
633 * If this is a memory resource, unmap it.
635 if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
638 psize = rman_get_size(res);
639 pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize);
642 return (rman_deactivate_resource(res));
646 static struct resource_list *
647 macio_get_resource_list (device_t dev, device_t child)
649 struct macio_devinfo *dinfo;
651 dinfo = device_get_ivars(child);
652 return (&dinfo->mdi_resources);
655 static const struct ofw_bus_devinfo *
656 macio_get_devinfo(device_t dev, device_t child)
658 struct macio_devinfo *dinfo;
660 dinfo = device_get_ivars(child);
661 return (&dinfo->mdi_obdinfo);
665 macio_enable_wireless(device_t dev, bool enable)
667 struct macio_softc *sc = device_get_softc(dev);
671 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2);
673 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x);
675 /* Enable card slot. */
676 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5);
678 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4);
680 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2);
683 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x);
684 /* out8(gpio + 0x10, 4); */
686 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0);
687 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28);
688 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28);
689 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28);
690 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28);
691 bus_write_4(sc->sc_memr, 0x1c000, 0);
693 /* Initialize the card. */
694 bus_write_4(sc->sc_memr, 0x1a3e0, 0x41);
695 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2);
697 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x);
699 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2);
701 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x);
702 /* out8(gpio + 0x10, 0); */