2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (C) 2002 Benno Rice.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #ifndef _POWERPC_POWERMAC_UNINORTHVAR_H_
31 #define _POWERPC_POWERMAC_UNINORTHVAR_H_
33 #include <dev/ofw/ofw_bus_subr.h>
34 #include <dev/ofw/ofw_pci.h>
35 #include <dev/ofw/ofwpci.h>
37 struct uninorth_softc {
38 struct ofw_pci_softc pci_sc;
43 struct mtx sc_cfg_mtx;
46 struct unin_chip_softc {
50 struct rman sc_mem_rman;
55 * Format of a unin reg property entry.
57 struct unin_chip_reg {
63 * Per unin device structure.
65 struct unin_chip_devinfo {
66 int udi_interrupts[6];
69 struct ofw_bus_devinfo udi_obdinfo;
70 struct resource_list udi_resources;
79 * Clock-control register
81 #define UNIN_CLOCKCNTL 0x20
82 #define UNIN_CLOCKCNTL_GMAC 0x2
85 * Power management register
87 #define UNIN_PWR_MGMT 0x30
88 #define UNIN_PWR_NORMAL 0x00
89 #define UNIN_PWR_IDLE2 0x01
90 #define UNIN_PWR_SLEEP 0x02
91 #define UNIN_PWR_SAVE 0x03
92 #define UNIN_PWR_MASK 0x03
95 * Hardware initialization state register
97 #define UNIN_HWINIT_STATE 0x70
98 #define UNIN_SLEEPING 0x01
99 #define UNIN_RUNNING 0x02
105 #define UNIN_TOGGLE_REG 0xe0
106 #define UNIN_MPIC_RESET 0x2
107 #define UNIN_MPIC_OUTPUT_ENABLE 0x4
109 extern int unin_chip_sleep(device_t dev, int idle);
110 extern int unin_chip_wake(device_t dev);
111 #endif /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */