2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2019 Justin Hibbits
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/module.h>
34 #include <sys/kernel.h>
35 #include <sys/mutex.h>
38 #include <dev/ofw/openfirm.h>
39 #include <dev/ofw/ofw_bus.h>
40 #include <dev/ofw/ofw_bus_subr.h>
42 #include <machine/bus.h>
43 #include <machine/md_var.h>
44 #include <machine/pio.h>
45 #include <machine/resource.h>
54 #define NVRAM_BUFSIZE (65536) /* 64k blocks */
56 struct opal_nvram_softc {
61 vm_paddr_t sc_buf_phys;
67 #define NVRAM_LOCK(sc) mtx_lock(&sc->sc_mtx)
68 #define NVRAM_UNLOCK(sc) mtx_unlock(&sc->sc_mtx)
73 static int opal_nvram_probe(device_t);
74 static int opal_nvram_attach(device_t);
75 static int opal_nvram_detach(device_t);
80 static device_method_t opal_nvram_methods[] = {
81 /* Device interface */
82 DEVMETHOD(device_probe, opal_nvram_probe),
83 DEVMETHOD(device_attach, opal_nvram_attach),
84 DEVMETHOD(device_detach, opal_nvram_detach),
88 static driver_t opal_nvram_driver = {
91 sizeof(struct opal_nvram_softc)
94 DRIVER_MODULE(opal_nvram, opal, opal_nvram_driver, 0, 0);
100 static d_open_t opal_nvram_open;
101 static d_close_t opal_nvram_close;
102 static d_read_t opal_nvram_read;
103 static d_write_t opal_nvram_write;
104 static d_ioctl_t opal_nvram_ioctl;
106 static struct cdevsw opal_nvram_cdevsw = {
107 .d_version = D_VERSION,
108 .d_open = opal_nvram_open,
109 .d_close = opal_nvram_close,
110 .d_read = opal_nvram_read,
111 .d_write = opal_nvram_write,
112 .d_ioctl = opal_nvram_ioctl,
117 opal_nvram_probe(device_t dev)
120 if (!ofw_bus_is_compatible(dev, "ibm,opal-nvram"))
123 device_set_desc(dev, "OPAL NVRAM");
124 return (BUS_PROBE_DEFAULT);
128 opal_nvram_attach(device_t dev)
130 struct opal_nvram_softc *sc;
134 node = ofw_bus_get_node(dev);
135 sc = device_get_softc(dev);
139 err = OF_getencprop(node, "#bytes", &sc->sc_size,
140 sizeof(sc->sc_size));
145 sc->sc_buf = contigmalloc(NVRAM_BUFSIZE, M_DEVBUF, M_WAITOK,
146 0, BUS_SPACE_MAXADDR, PAGE_SIZE, 0);
147 if (sc->sc_buf == NULL) {
148 device_printf(dev, "No memory for buffer.\n");
151 sc->sc_buf_phys = pmap_kextract((vm_offset_t)sc->sc_buf);
152 sc->sc_cdev = make_dev(&opal_nvram_cdevsw, 0, 0, 0, 0600,
154 sc->sc_cdev->si_drv1 = sc;
156 mtx_init(&sc->sc_mtx, "opal_nvram", 0, MTX_DEF);
162 opal_nvram_detach(device_t dev)
164 struct opal_nvram_softc *sc;
166 sc = device_get_softc(dev);
168 if (sc->sc_cdev != NULL)
169 destroy_dev(sc->sc_cdev);
170 if (sc->sc_buf != NULL)
171 contigfree(sc->sc_buf, NVRAM_BUFSIZE, M_DEVBUF);
173 mtx_destroy(&sc->sc_mtx);
179 opal_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td)
181 struct opal_nvram_softc *sc = dev->si_drv1;
197 opal_nvram_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
199 struct opal_nvram_softc *sc = dev->si_drv1;
209 opal_nvram_read(struct cdev *dev, struct uio *uio, int ioflag)
211 struct opal_nvram_softc *sc = dev->si_drv1;
217 while (uio->uio_resid > 0) {
218 amnt = MIN(uio->uio_resid, sc->sc_size - uio->uio_offset);
219 amnt = MIN(amnt, NVRAM_BUFSIZE);
223 rv = opal_call(OPAL_READ_NVRAM, sc->sc_buf_phys,
224 amnt, uio->uio_offset);
225 if (rv != OPAL_SUCCESS) {
236 rv = uiomove(sc->sc_buf, amnt, uio);
246 opal_nvram_write(struct cdev *dev, struct uio *uio, int ioflag)
250 struct opal_nvram_softc *sc = dev->si_drv1;
255 while (uio->uio_resid > 0) {
256 amnt = MIN(uio->uio_resid, sc->sc_size - uio->uio_offset);
257 amnt = MIN(amnt, NVRAM_BUFSIZE);
262 offset = uio->uio_offset;
263 rv = uiomove(sc->sc_buf, amnt, uio);
266 rv = opal_call(OPAL_WRITE_NVRAM, sc->sc_buf_phys, amnt,
268 if (rv != OPAL_SUCCESS) {
287 opal_nvram_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
290 struct opal_nvram_softc *sc = dev->si_drv1;
294 *(off_t *)data = sc->sc_size;