2 * Copyright (c) 2015 Nathan Whitehorn
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
40 #include <machine/bus.h>
41 #include <machine/cpu.h>
42 #include <machine/hid.h>
43 #include <machine/platformvar.h>
44 #include <machine/pmap.h>
45 #include <machine/rtas.h>
46 #include <machine/smp.h>
47 #include <machine/spr.h>
48 #include <machine/trap.h>
50 #include <dev/ofw/openfirm.h>
51 #include <machine/ofw_machdep.h>
52 #include <powerpc/aim/mmu_oea64.h>
54 #include "platform_if.h"
61 static int powernv_probe(platform_t);
62 static int powernv_attach(platform_t);
63 void powernv_mem_regions(platform_t, struct mem_region *phys, int *physsz,
64 struct mem_region *avail, int *availsz);
65 static u_long powernv_timebase_freq(platform_t, struct cpuref *cpuref);
66 static int powernv_smp_first_cpu(platform_t, struct cpuref *cpuref);
67 static int powernv_smp_next_cpu(platform_t, struct cpuref *cpuref);
68 static int powernv_smp_get_bsp(platform_t, struct cpuref *cpuref);
69 static void powernv_smp_ap_init(platform_t);
71 static int powernv_smp_start_cpu(platform_t, struct pcpu *cpu);
72 static struct cpu_group *powernv_smp_topo(platform_t plat);
74 static void powernv_reset(platform_t);
75 static void powernv_cpu_idle(sbintime_t sbt);
77 static platform_method_t powernv_methods[] = {
78 PLATFORMMETHOD(platform_probe, powernv_probe),
79 PLATFORMMETHOD(platform_attach, powernv_attach),
80 PLATFORMMETHOD(platform_mem_regions, powernv_mem_regions),
81 PLATFORMMETHOD(platform_timebase_freq, powernv_timebase_freq),
83 PLATFORMMETHOD(platform_smp_ap_init, powernv_smp_ap_init),
84 PLATFORMMETHOD(platform_smp_first_cpu, powernv_smp_first_cpu),
85 PLATFORMMETHOD(platform_smp_next_cpu, powernv_smp_next_cpu),
86 PLATFORMMETHOD(platform_smp_get_bsp, powernv_smp_get_bsp),
88 PLATFORMMETHOD(platform_smp_start_cpu, powernv_smp_start_cpu),
89 PLATFORMMETHOD(platform_smp_topo, powernv_smp_topo),
92 PLATFORMMETHOD(platform_reset, powernv_reset),
97 static platform_def_t powernv_platform = {
103 PLATFORM_DEF(powernv_platform);
105 static int powernv_boot_pir;
108 powernv_probe(platform_t plat)
110 if (opal_check() == 0)
111 return (BUS_PROBE_SPECIFIC);
117 powernv_attach(platform_t plat)
119 uint32_t nptlp, shift = 0, slb_encoding = 0;
120 int32_t lp_size, lp_encoding;
124 int res, len, node, idx;
126 /* Ping OPAL again just to make sure */
129 cpu_idle_hook = powernv_cpu_idle;
130 powernv_boot_pir = mfspr(SPR_PIR);
133 powernv_smp_ap_init(plat);
135 /* Set SLB count from device tree */
139 res = OF_getprop(cpu, "name", buf, sizeof(buf));
140 if (res > 0 && strcmp(buf, "cpus") == 0)
149 res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
150 if (res > 0 && strcmp(buf, "cpu") == 0)
157 res = OF_getencprop(cpu, "ibm,slb-size", &prop, sizeof(prop));
162 * Scan the large page size property for PAPR compatible machines.
163 * See PAPR D.5 Changes to Section 5.1.4, 'CPU Node Properties'
164 * for the encoding of the property.
167 len = OF_getproplen(node, "ibm,segment-page-sizes");
170 * We have to use a variable length array on the stack
171 * since we have very limited stack space.
173 pcell_t arr[len/sizeof(cell_t)];
174 res = OF_getencprop(cpu, "ibm,segment-page-sizes", arr,
180 slb_encoding = arr[idx + 1];
181 nptlp = arr[idx + 2];
184 while (len > 0 && nptlp) {
186 lp_encoding = arr[idx+1];
187 if (slb_encoding == SLBV_L && lp_encoding == 0)
194 if (nptlp && slb_encoding == SLBV_L && lp_encoding == 0)
199 panic("Standard large pages (SLB[L] = 1, PTE[LP] = 0) "
200 "not supported by this system.");
202 moea64_large_page_shift = shift;
203 moea64_large_page_size = 1ULL << lp_size;
212 powernv_mem_regions(platform_t plat, struct mem_region *phys, int *physsz,
213 struct mem_region *avail, int *availsz)
216 ofw_mem_regions(phys, physsz, avail, availsz);
220 powernv_timebase_freq(platform_t plat, struct cpuref *cpuref)
225 phandle = cpuref->cr_hwref;
227 OF_getencprop(phandle, "timebase-frequency", &ticks, sizeof(ticks));
230 panic("Unable to determine timebase frequency!");
236 powernv_smp_first_cpu(platform_t plat, struct cpuref *cpuref)
239 phandle_t cpu, dev, root;
244 dev = OF_child(root);
246 res = OF_getprop(dev, "name", buf, sizeof(buf));
247 if (res > 0 && strcmp(buf, "cpus") == 0)
253 * psim doesn't have a name property on the /cpus node,
254 * but it can be found directly
256 dev = OF_finddevice("/cpus");
264 res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
265 if (res > 0 && strcmp(buf, "cpu") == 0)
272 cpuref->cr_hwref = cpu;
273 res = OF_getencprop(cpu, "ibm,ppc-interrupt-server#s", &cpuid,
276 res = OF_getencprop(cpu, "reg", &cpuid, sizeof(cpuid));
279 cpuref->cr_cpuid = cpuid;
285 powernv_smp_next_cpu(platform_t plat, struct cpuref *cpuref)
291 /* Check for whether it should be the next thread */
292 res = OF_getproplen(cpuref->cr_hwref, "ibm,ppc-interrupt-server#s");
294 cell_t interrupt_servers[res/sizeof(cell_t)];
295 OF_getencprop(cpuref->cr_hwref, "ibm,ppc-interrupt-server#s",
296 interrupt_servers, res);
297 for (i = 0; i < res/sizeof(cell_t) - 1; i++) {
298 if (interrupt_servers[i] == cpuref->cr_cpuid) {
299 cpuref->cr_cpuid = interrupt_servers[i+1];
305 /* Next CPU core/package */
306 cpu = OF_peer(cpuref->cr_hwref);
308 res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
309 if (res > 0 && strcmp(buf, "cpu") == 0)
316 cpuref->cr_hwref = cpu;
317 res = OF_getencprop(cpu, "ibm,ppc-interrupt-server#s", &cpuid,
320 res = OF_getencprop(cpu, "reg", &cpuid, sizeof(cpuid));
323 cpuref->cr_cpuid = cpuid;
329 powernv_smp_get_bsp(platform_t plat, struct cpuref *cpuref)
335 chosen = OF_finddevice("/chosen");
339 res = OF_getencprop(chosen, "fdtbootcpu", &cpuid, sizeof(cpuid));
343 /* XXX: FDT from kexec lies sometimes. PIR seems not to. */
345 cpuid = powernv_boot_pir;
347 cpuref->cr_cpuid = cpuid;
349 if (powernv_smp_first_cpu(plat, &i) != 0)
351 cpuref->cr_hwref = i.cr_hwref;
354 if (i.cr_cpuid == cpuid) {
355 cpuref->cr_hwref = i.cr_hwref;
358 } while (powernv_smp_next_cpu(plat, &i) == 0);
365 powernv_smp_start_cpu(platform_t plat, struct pcpu *pc)
372 result = opal_call(OPAL_START_CPU, pc->pc_cpuid, EXC_RST);
373 if (result != OPAL_SUCCESS) {
374 printf("OPAL error (%d): unable to start AP %d\n",
375 result, pc->pc_cpuid);
382 static struct cpu_group *
383 powernv_smp_topo(platform_t plat)
385 struct pcpu *pc, *last_pc;
386 int i, ncores, ncpus;
394 if (last_pc == NULL || pc->pc_hwref != last_pc->pc_hwref)
400 if (ncpus % ncores != 0) {
401 printf("WARNING: Irregular SMP topology. Performance may be "
402 "suboptimal (%d CPUS, %d cores)\n", ncpus, ncores);
403 return (smp_topo_none());
406 /* Don't do anything fancier for non-threaded SMP */
408 return (smp_topo_none());
410 #ifdef NOTYET /* smp_topo_1level() fails with non-consecutive CPU IDs */
411 return (smp_topo_1level(CG_SHARE_L1, ncpus / ncores, CG_FLAG_SMT));
413 return (smp_topo_none());
419 powernv_reset(platform_t platform)
422 opal_call(OPAL_CEC_REBOOT);
426 powernv_smp_ap_init(platform_t platform)
429 /* Direct interrupts to SRR instead of HSRR and reset LPCR otherwise */
430 mtspr(SPR_LPCR, LPCR_LPES);
434 powernv_cpu_idle(sbintime_t sbt)