2 * Copyright (c) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com>
3 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
8 * NASA Ames Research Center.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
39 #include <sys/cdefs.h>
40 __FBSDID("$FreeBSD$");
45 #include <sys/param.h>
46 #include <sys/systm.h>
52 #include <machine/bus.h>
53 #include <machine/pio.h>
54 #include <machine/md_var.h>
56 #define TODO panic("%s: not implemented", __func__)
58 #define MAX_EARLYBOOT_MAPPINGS 6
64 } earlyboot_mappings[MAX_EARLYBOOT_MAPPINGS];
65 static int earlyboot_map_idx = 0;
67 void bs_remap_earlyboot(void);
69 static __inline void *
70 __ppc_ba(bus_space_handle_t bsh, bus_size_t ofs)
72 return ((void *)(bsh + ofs));
76 bs_gen_map(bus_addr_t addr, bus_size_t size, int flags,
77 bus_space_handle_t *bshp)
82 * Record what we did if we haven't enabled the MMU yet. We
83 * will need to remap it as soon as the MMU comes up.
85 if (!pmap_bootstrapped) {
86 KASSERT(earlyboot_map_idx < MAX_EARLYBOOT_MAPPINGS,
87 ("%s: too many early boot mapping requests", __func__));
88 earlyboot_mappings[earlyboot_map_idx].addr = addr;
89 earlyboot_mappings[earlyboot_map_idx].size = size;
90 earlyboot_mappings[earlyboot_map_idx].flags = flags;
94 ma = VM_MEMATTR_DEFAULT;
96 case BUS_SPACE_MAP_CACHEABLE:
97 ma = VM_MEMATTR_CACHEABLE;
99 case BUS_SPACE_MAP_PREFETCHABLE:
100 ma = VM_MEMATTR_PREFETCHABLE;
103 *bshp = (bus_space_handle_t)pmap_mapdev_attr(addr, size, ma);
110 bs_remap_earlyboot(void)
119 for (i = 0; i < earlyboot_map_idx; i++) {
120 spa = earlyboot_mappings[i].addr;
122 ma = VM_MEMATTR_DEFAULT;
123 switch (earlyboot_mappings[i].flags) {
124 case BUS_SPACE_MAP_CACHEABLE:
125 ma = VM_MEMATTR_CACHEABLE;
127 case BUS_SPACE_MAP_PREFETCHABLE:
128 ma = VM_MEMATTR_PREFETCHABLE;
132 pa = trunc_page(spa);
133 while (pa < spa + earlyboot_mappings[i].size) {
134 pmap_kenter_attr(pa, pa, ma);
141 bs_gen_unmap(bus_size_t size __unused)
146 bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs,
147 bus_size_t size __unused, bus_space_handle_t *nbshp)
154 bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused,
155 bus_size_t size __unused, bus_size_t alignment __unused,
156 bus_size_t boundary __unused, int flags __unused,
157 bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused)
163 bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused)
169 bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused,
170 bus_size_t size __unused, int flags __unused)
172 __asm __volatile("eieio; sync" : : : "memory");
176 * Big-endian access functions
179 bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
181 volatile uint8_t *addr;
184 addr = __ppc_ba(bsh, ofs);
186 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
191 bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
193 volatile uint16_t *addr;
196 addr = __ppc_ba(bsh, ofs);
198 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
203 bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
205 volatile uint32_t *addr;
208 addr = __ppc_ba(bsh, ofs);
210 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
215 bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
217 volatile uint64_t *addr;
220 addr = __ppc_ba(bsh, ofs);
226 bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
228 ins8(__ppc_ba(bsh, ofs), addr, cnt);
232 bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
234 ins16(__ppc_ba(bsh, ofs), addr, cnt);
238 bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
240 ins32(__ppc_ba(bsh, ofs), addr, cnt);
244 bs_be_rm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
246 ins64(__ppc_ba(bsh, ofs), addr, cnt);
250 bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
252 volatile uint8_t *s = __ppc_ba(bsh, ofs);
256 __asm __volatile("eieio; sync");
260 bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
262 volatile uint16_t *s = __ppc_ba(bsh, ofs);
266 __asm __volatile("eieio; sync");
270 bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
272 volatile uint32_t *s = __ppc_ba(bsh, ofs);
276 __asm __volatile("eieio; sync");
280 bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
282 volatile uint64_t *s = __ppc_ba(bsh, ofs);
286 __asm __volatile("eieio; sync");
290 bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
292 volatile uint8_t *addr;
294 addr = __ppc_ba(bsh, ofs);
296 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
300 bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
302 volatile uint16_t *addr;
304 addr = __ppc_ba(bsh, ofs);
306 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
310 bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
312 volatile uint32_t *addr;
314 addr = __ppc_ba(bsh, ofs);
316 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
320 bs_be_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
322 volatile uint64_t *addr;
324 addr = __ppc_ba(bsh, ofs);
329 bs_be_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
332 outsb(__ppc_ba(bsh, ofs), addr, cnt);
336 bs_be_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
339 outsw(__ppc_ba(bsh, ofs), addr, cnt);
343 bs_be_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
346 outsl(__ppc_ba(bsh, ofs), addr, cnt);
350 bs_be_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
353 outsll(__ppc_ba(bsh, ofs), addr, cnt);
357 bs_be_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
360 volatile uint8_t *d = __ppc_ba(bsh, ofs);
364 __asm __volatile("eieio; sync");
368 bs_be_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
371 volatile uint16_t *d = __ppc_ba(bsh, ofs);
375 __asm __volatile("eieio; sync");
379 bs_be_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
382 volatile uint32_t *d = __ppc_ba(bsh, ofs);
386 __asm __volatile("eieio; sync");
390 bs_be_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
393 volatile uint64_t *d = __ppc_ba(bsh, ofs);
397 __asm __volatile("eieio; sync");
401 bs_be_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
403 volatile uint8_t *d = __ppc_ba(bsh, ofs);
407 __asm __volatile("eieio; sync");
411 bs_be_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
413 volatile uint16_t *d = __ppc_ba(bsh, ofs);
417 __asm __volatile("eieio; sync");
421 bs_be_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
423 volatile uint32_t *d = __ppc_ba(bsh, ofs);
427 __asm __volatile("eieio; sync");
431 bs_be_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
433 volatile uint64_t *d = __ppc_ba(bsh, ofs);
437 __asm __volatile("eieio; sync");
441 bs_be_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
443 volatile uint8_t *d = __ppc_ba(bsh, ofs);
447 __asm __volatile("eieio; sync");
451 bs_be_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
453 volatile uint16_t *d = __ppc_ba(bsh, ofs);
457 __asm __volatile("eieio; sync");
461 bs_be_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
463 volatile uint32_t *d = __ppc_ba(bsh, ofs);
467 __asm __volatile("eieio; sync");
471 bs_be_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
473 volatile uint64_t *d = __ppc_ba(bsh, ofs);
477 __asm __volatile("eieio; sync");
481 * Little-endian access functions
484 bs_le_rs_1(bus_space_handle_t bsh, bus_size_t ofs)
486 volatile uint8_t *addr;
489 addr = __ppc_ba(bsh, ofs);
491 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
496 bs_le_rs_2(bus_space_handle_t bsh, bus_size_t ofs)
498 volatile uint16_t *addr;
501 addr = __ppc_ba(bsh, ofs);
502 __asm __volatile("lhbrx %0, 0, %1" : "=r"(res) : "r"(addr));
503 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
508 bs_le_rs_4(bus_space_handle_t bsh, bus_size_t ofs)
510 volatile uint32_t *addr;
513 addr = __ppc_ba(bsh, ofs);
514 __asm __volatile("lwbrx %0, 0, %1" : "=r"(res) : "r"(addr));
515 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res);
520 bs_le_rs_8(bus_space_handle_t bsh, bus_size_t ofs)
526 bs_le_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
528 ins8(__ppc_ba(bsh, ofs), addr, cnt);
532 bs_le_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
534 ins16rb(__ppc_ba(bsh, ofs), addr, cnt);
538 bs_le_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
540 ins32rb(__ppc_ba(bsh, ofs), addr, cnt);
544 bs_le_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt)
550 bs_le_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt)
552 volatile uint8_t *s = __ppc_ba(bsh, ofs);
556 __asm __volatile("eieio; sync");
560 bs_le_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt)
562 volatile uint16_t *s = __ppc_ba(bsh, ofs);
565 *addr++ = in16rb(s++);
566 __asm __volatile("eieio; sync");
570 bs_le_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt)
572 volatile uint32_t *s = __ppc_ba(bsh, ofs);
575 *addr++ = in32rb(s++);
576 __asm __volatile("eieio; sync");
580 bs_le_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt)
586 bs_le_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val)
588 volatile uint8_t *addr;
590 addr = __ppc_ba(bsh, ofs);
592 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
596 bs_le_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val)
598 volatile uint16_t *addr;
600 addr = __ppc_ba(bsh, ofs);
601 __asm __volatile("sthbrx %0, 0, %1" :: "r"(val), "r"(addr));
602 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
606 bs_le_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val)
608 volatile uint32_t *addr;
610 addr = __ppc_ba(bsh, ofs);
611 __asm __volatile("stwbrx %0, 0, %1" :: "r"(val), "r"(addr));
612 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val);
616 bs_le_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val)
622 bs_le_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
625 outs8(__ppc_ba(bsh, ofs), addr, cnt);
629 bs_le_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
632 outs16rb(__ppc_ba(bsh, ofs), addr, cnt);
636 bs_le_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
639 outs32rb(__ppc_ba(bsh, ofs), addr, cnt);
643 bs_le_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
650 bs_le_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr,
653 volatile uint8_t *d = __ppc_ba(bsh, ofs);
657 __asm __volatile("eieio; sync");
661 bs_le_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr,
664 volatile uint16_t *d = __ppc_ba(bsh, ofs);
667 out16rb(d++, *addr++);
668 __asm __volatile("eieio; sync");
672 bs_le_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr,
675 volatile uint32_t *d = __ppc_ba(bsh, ofs);
678 out32rb(d++, *addr++);
679 __asm __volatile("eieio; sync");
683 bs_le_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr,
690 bs_le_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
692 volatile uint8_t *d = __ppc_ba(bsh, ofs);
696 __asm __volatile("eieio; sync");
700 bs_le_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
702 volatile uint16_t *d = __ppc_ba(bsh, ofs);
706 __asm __volatile("eieio; sync");
710 bs_le_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
712 volatile uint32_t *d = __ppc_ba(bsh, ofs);
716 __asm __volatile("eieio; sync");
720 bs_le_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
726 bs_le_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt)
728 volatile uint8_t *d = __ppc_ba(bsh, ofs);
732 __asm __volatile("eieio; sync");
736 bs_le_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt)
738 volatile uint16_t *d = __ppc_ba(bsh, ofs);
742 __asm __volatile("eieio; sync");
746 bs_le_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt)
748 volatile uint32_t *d = __ppc_ba(bsh, ofs);
752 __asm __volatile("eieio; sync");
756 bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt)
761 struct bus_space bs_be_tag = {
762 /* mapping/unmapping */
767 /* allocation/deallocation */
855 struct bus_space bs_le_tag = {
856 /* mapping/unmapping */
861 /* allocation/deallocation */