2 * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause-FreeBSD
4 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 * Copyright (C) 1995, 1996 TooLs GmbH.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by TooLs GmbH.
19 * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 * $NetBSD: clock.c,v 1.9 2000/01/19 02:52:19 msaitoh Exp $
36 * Copyright (C) 2001 Benno Rice.
37 * All rights reserved.
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in the
46 * documentation and/or other materials provided with the distribution.
48 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
51 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
52 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
53 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
54 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
55 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
56 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
57 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60 #include <sys/cdefs.h>
61 __FBSDID("$FreeBSD$");
63 #include <sys/param.h>
64 #include <sys/systm.h>
65 #include <sys/kernel.h>
67 #include <sys/interrupt.h>
69 #include <sys/sysctl.h>
70 #include <sys/timeet.h>
71 #include <sys/timetc.h>
73 #include <dev/ofw/openfirm.h>
75 #include <machine/clock.h>
76 #include <machine/cpu.h>
77 #include <machine/intr_machdep.h>
78 #include <machine/md_var.h>
79 #include <machine/smp.h>
82 * Initially we assume a processor with a bus frequency of 12.5 MHz.
84 static int initialized = 0;
85 static uint64_t ps_per_tick = 80000;
86 static u_long ticks_per_sec = 12500000;
87 static u_long *decr_counts[MAXCPU];
89 static int decr_et_start(struct eventtimer *et,
90 sbintime_t first, sbintime_t period);
91 static int decr_et_stop(struct eventtimer *et);
92 static timecounter_get_t decr_get_timecount;
95 int mode; /* 0 - off, 1 - periodic, 2 - one-shot. */
96 int32_t div; /* Periodic divisor. */
98 DPCPU_DEFINE_STATIC(struct decr_state, decr_state);
100 static struct eventtimer decr_et;
101 static struct timecounter decr_tc = {
102 decr_get_timecount, /* get_timecount */
104 ~0u, /* counter_mask */
106 "timebase" /* name */
110 * Decrementer interrupt handler.
113 decr_intr(struct trapframe *frame)
115 struct decr_state *s = DPCPU_PTR(decr_state);
122 (*decr_counts[curcpu])++;
126 * Interrupt handler must reset DIS to avoid getting another
127 * interrupt once EE is enabled.
129 mtspr(SPR_TSR, TSR_DIS);
134 * Based on the actual time delay since the last decrementer
135 * reload, we arrange for earlier interrupt next time.
137 __asm ("mfdec %0" : "=r"(val));
143 } else if (s->mode == 2) {
146 } else if (s->mode == 0) {
147 /* Potemkin timer ran out without an event. Just reset it. */
151 while (nticks-- > 0) {
152 if (decr_et.et_active)
153 decr_et.et_event_cb(&decr_et, decr_et.et_arg);
162 cpu_initclocks_bsp();
166 * BSP early initialization.
175 * Check the BSP's timebase frequency. Sometimes we can't find the BSP,
176 * so fall back to the first CPU in this case.
178 if (platform_smp_get_bsp(&cpu) != 0)
179 platform_smp_first_cpu(&cpu);
180 ticks_per_sec = platform_timebase_freq(&cpu);
181 ps_per_tick = 1000000000000 / ticks_per_sec;
183 set_cputicker(mftb, ticks_per_sec, 0);
184 snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu);
185 intrcnt_add(buf, &decr_counts[curcpu]);
192 * AP early initialization.
199 snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu);
200 intrcnt_add(buf, &decr_counts[curcpu]);
206 * Final initialization.
212 decr_tc.tc_frequency = ticks_per_sec;
214 decr_et.et_name = "decrementer";
215 decr_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT |
217 decr_et.et_quality = 1000;
218 decr_et.et_frequency = ticks_per_sec;
219 decr_et.et_min_period = (0x00000002LLU << 32) / ticks_per_sec;
220 decr_et.et_max_period = (0x7fffffffLLU << 32) / ticks_per_sec;
221 decr_et.et_start = decr_et_start;
222 decr_et.et_stop = decr_et_stop;
223 decr_et.et_priv = NULL;
224 et_register(&decr_et);
228 * Event timer start method.
231 decr_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
233 struct decr_state *s = DPCPU_PTR(decr_state);
241 s->div = (decr_et.et_frequency * period) >> 32;
247 fdiv = (decr_et.et_frequency * first) >> 32;
252 tcr = mfspr(SPR_TCR);
255 mtspr(SPR_DECAR, s->div);
269 * Event timer stop method.
272 decr_et_stop(struct eventtimer *et)
274 struct decr_state *s = DPCPU_PTR(decr_state);
282 tcr = mfspr(SPR_TCR);
283 tcr &= ~(TCR_DIE | TCR_ARE);
292 * Timecounter get method.
295 decr_get_timecount(struct timecounter *tc)
301 * Wait for about n microseconds (at least!).
310 ttb = tb + howmany((uint64_t)n * 1000000, ps_per_tick);