2 * Copyright (c) 1991 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Copyright (c) 2002 Benno Rice.
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
58 * form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20
65 #include <sys/param.h>
66 #include <sys/systm.h>
67 #include <sys/kernel.h>
68 #include <sys/queue.h>
70 #include <sys/cpuset.h>
71 #include <sys/interrupt.h>
74 #include <sys/malloc.h>
75 #include <sys/mutex.h>
78 #include <sys/syslog.h>
79 #include <sys/vmmeter.h>
82 #include <machine/frame.h>
83 #include <machine/intr_machdep.h>
84 #include <machine/md_var.h>
85 #include <machine/smp.h>
86 #include <machine/trap.h>
90 #define MAX_STRAY_LOG 5
92 static MALLOC_DEFINE(M_INTR, "intr", "interrupt handler data");
95 struct intr_event *event;
103 enum intr_trigger trig;
104 enum intr_polarity pol;
115 static u_int intrcnt_index = 0;
116 static struct mtx intr_table_lock;
117 static struct powerpc_intr *powerpc_intrs[INTR_VECTORS];
118 static struct pic piclist[MAX_PICS];
119 static u_int nvectors; /* Allocated vectors */
120 static u_int npics; /* PICs registered */
122 static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */
124 static u_int nirqs = 0; /* Allocated IRQs. */
126 static u_int stray_count;
131 static void *ipi_cookie;
135 intr_init(void *dummy __unused)
138 mtx_init(&intr_table_lock, "intr sources lock", NULL, MTX_DEF);
140 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
144 smp_intr_init(void *dummy __unused)
146 struct powerpc_intr *i;
149 for (vector = 0; vector < nvectors; vector++) {
150 i = powerpc_intrs[vector];
151 if (i != NULL && i->pic == root_pic)
152 PIC_BIND(i->pic, i->intline, i->cpu);
155 SYSINIT(smp_intr_init, SI_SUB_SMP, SI_ORDER_ANY, smp_intr_init, NULL);
159 intrcnt_setname(const char *name, int index)
162 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
167 intrcnt_add(const char *name, u_long **countp)
171 idx = atomic_fetchadd_int(&intrcnt_index, 1);
172 *countp = &intrcnt[idx];
173 intrcnt_setname(name, idx);
176 static struct powerpc_intr *
177 intr_lookup(u_int irq)
180 struct powerpc_intr *i, *iscan;
183 mtx_lock(&intr_table_lock);
184 for (vector = 0; vector < nvectors; vector++) {
185 i = powerpc_intrs[vector];
186 if (i != NULL && i->irq == irq) {
187 mtx_unlock(&intr_table_lock);
192 i = malloc(sizeof(*i), M_INTR, M_NOWAIT);
194 mtx_unlock(&intr_table_lock);
200 i->trig = INTR_TRIGGER_CONFORM;
201 i->pol = INTR_POLARITY_CONFORM;
209 CPU_SETOF(0, &i->cpu);
212 for (vector = 0; vector < INTR_VECTORS && vector <= nvectors;
214 iscan = powerpc_intrs[vector];
215 if (iscan != NULL && iscan->irq == irq)
217 if (iscan == NULL && i->vector == -1)
222 if (iscan == NULL && i->vector != -1) {
223 powerpc_intrs[i->vector] = i;
224 i->cntindex = atomic_fetchadd_int(&intrcnt_index, 1);
225 i->cntp = &intrcnt[i->cntindex];
226 sprintf(intrname, "irq%u:", i->irq);
227 intrcnt_setname(intrname, i->cntindex);
230 mtx_unlock(&intr_table_lock);
232 if (iscan != NULL || i->vector == -1) {
241 powerpc_map_irq(struct powerpc_intr *i)
247 for (idx = 0; idx < npics; idx++) {
249 cnt = p->irqs + p->ipis;
250 if (i->irq >= p->base && i->irq < p->base + cnt)
256 i->intline = i->irq - p->base;
259 /* Try a best guess if that failed */
267 powerpc_intr_eoi(void *arg)
269 struct powerpc_intr *i = arg;
271 PIC_EOI(i->pic, i->intline);
275 powerpc_intr_pre_ithread(void *arg)
277 struct powerpc_intr *i = arg;
279 PIC_MASK(i->pic, i->intline);
280 PIC_EOI(i->pic, i->intline);
284 powerpc_intr_post_ithread(void *arg)
286 struct powerpc_intr *i = arg;
288 PIC_UNMASK(i->pic, i->intline);
292 powerpc_assign_intr_cpu(void *arg, u_char cpu)
295 struct powerpc_intr *i = arg;
300 CPU_SETOF(cpu, &i->cpu);
302 if (!cold && i->pic != NULL && i->pic == root_pic)
303 PIC_BIND(i->pic, i->intline, i->cpu);
312 powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis,
319 mtx_lock(&intr_table_lock);
321 /* XXX see powerpc_get_irq(). */
322 for (idx = 0; idx < npics; idx++) {
326 if (node != 0 || p->dev == dev)
337 p->base = (atpic) ? 0 : nirqs;
341 irq = p->base + irqs + ipis;
342 nirqs = MAX(nirqs, irq);
346 mtx_unlock(&intr_table_lock);
350 powerpc_get_irq(uint32_t node, u_int pin)
357 mtx_lock(&intr_table_lock);
358 for (idx = 0; idx < npics; idx++) {
359 if (piclist[idx].node == node) {
360 mtx_unlock(&intr_table_lock);
361 return (piclist[idx].base + pin);
366 * XXX we should never encounter an unregistered PIC, but that
367 * can only be done when we properly support bus enumeration
368 * using multiple passes. Until then, fake an entry and give it
369 * some adhoc maximum number of IRQs and IPIs.
371 piclist[idx].dev = NULL;
372 piclist[idx].node = node;
373 piclist[idx].irqs = 124;
374 piclist[idx].ipis = 4;
375 piclist[idx].base = nirqs;
379 mtx_unlock(&intr_table_lock);
381 return (piclist[idx].base + pin);
385 powerpc_enable_intr(void)
387 struct powerpc_intr *i;
394 panic("no PIC detected\n");
396 if (root_pic == NULL)
397 root_pic = piclist[0].dev;
400 /* Install an IPI handler. */
402 for (n = 0; n < npics; n++) {
403 if (piclist[n].dev != root_pic)
406 KASSERT(piclist[n].ipis != 0,
407 ("%s: SMP root PIC does not supply any IPIs",
409 error = powerpc_setup_intr("IPI",
410 MAP_IRQ(piclist[n].node, piclist[n].irqs),
411 powerpc_ipi_handler, NULL, NULL,
412 INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie);
414 printf("unable to setup IPI handler\n");
421 for (vector = 0; vector < nvectors; vector++) {
422 i = powerpc_intrs[vector];
426 error = powerpc_map_irq(i);
430 if (i->trig != INTR_TRIGGER_CONFORM ||
431 i->pol != INTR_POLARITY_CONFORM)
432 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
434 if (i->event != NULL)
435 PIC_ENABLE(i->pic, i->intline, vector);
442 powerpc_setup_intr(const char *name, u_int irq, driver_filter_t filter,
443 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
445 struct powerpc_intr *i;
446 int error, enable = 0;
448 i = intr_lookup(irq);
452 if (i->event == NULL) {
453 error = intr_event_create(&i->event, (void *)i, 0, irq,
454 powerpc_intr_pre_ithread, powerpc_intr_post_ithread,
455 powerpc_intr_eoi, powerpc_assign_intr_cpu, "irq%u:", irq);
462 error = intr_event_add_handler(i->event, name, filter, handler, arg,
463 intr_priority(flags), flags, cookiep);
465 mtx_lock(&intr_table_lock);
466 intrcnt_setname(i->event->ie_fullname, i->cntindex);
467 mtx_unlock(&intr_table_lock);
470 error = powerpc_map_irq(i);
472 if (!error && (i->trig != INTR_TRIGGER_CONFORM ||
473 i->pol != INTR_POLARITY_CONFORM))
474 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
476 if (!error && i->pic == root_pic)
477 PIC_BIND(i->pic, i->intline, i->cpu);
479 if (!error && enable)
480 PIC_ENABLE(i->pic, i->intline, i->vector);
486 powerpc_teardown_intr(void *cookie)
489 return (intr_event_remove_handler(cookie));
494 powerpc_bind_intr(u_int irq, u_char cpu)
496 struct powerpc_intr *i;
498 i = intr_lookup(irq);
502 return (intr_event_bind(i->event, cpu));
507 powerpc_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol)
509 struct powerpc_intr *i;
511 i = intr_lookup(irq);
518 if (!cold && i->pic != NULL)
519 PIC_CONFIG(i->pic, i->intline, trig, pol);
525 powerpc_dispatch_intr(u_int vector, struct trapframe *tf)
527 struct powerpc_intr *i;
528 struct intr_event *ie;
530 i = powerpc_intrs[vector];
537 KASSERT(ie != NULL, ("%s: interrupt without an event", __func__));
539 if (intr_event_handle(ie, tf) != 0) {
546 if (stray_count <= MAX_STRAY_LOG) {
547 printf("stray irq %d\n", i ? i->irq : -1);
548 if (stray_count >= MAX_STRAY_LOG) {
549 printf("got %d stray interrupts, not logging anymore\n",
554 PIC_MASK(i->pic, i->intline);