2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1991 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
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17 * documentation and/or other materials provided with the distribution.
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20 * without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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35 * Copyright (c) 2002 Benno Rice.
36 * All rights reserved.
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
59 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
60 * form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #include <sys/kernel.h>
70 #include <sys/queue.h>
72 #include <sys/cpuset.h>
73 #include <sys/interrupt.h>
76 #include <sys/malloc.h>
77 #include <sys/mutex.h>
80 #include <sys/syslog.h>
81 #include <sys/vmmeter.h>
84 #include <machine/frame.h>
85 #include <machine/intr_machdep.h>
86 #include <machine/md_var.h>
87 #include <machine/smp.h>
88 #include <machine/trap.h>
92 #define MAX_STRAY_LOG 5
94 static MALLOC_DEFINE(M_INTR, "intr", "interrupt handler data");
97 struct intr_event *event;
99 void *priv; /* PIC-private data */
108 enum intr_trigger trig;
109 enum intr_polarity pol;
121 static u_int intrcnt_index = 0;
122 static struct mtx intr_table_lock;
123 static struct powerpc_intr **powerpc_intrs;
124 static struct pic piclist[MAX_PICS];
125 static u_int nvectors; /* Allocated vectors */
126 static u_int npics; /* PICs registered */
128 static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */
130 static u_int nirqs = 0; /* Allocated IRQs. */
132 static u_int stray_count;
136 size_t sintrcnt = sizeof(intrcnt);
137 size_t sintrnames = sizeof(intrnames);
144 u_int num_io_irqs = 768;
146 u_int num_io_irqs = 256;
152 static void *ipi_cookie;
156 intrcnt_setname(const char *name, int index)
159 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
164 intr_init(void *dummy __unused)
167 mtx_init(&intr_table_lock, "intr sources lock", NULL, MTX_DEF);
169 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
172 intr_init_sources(void *arg __unused)
175 powerpc_intrs = mallocarray(num_io_irqs, sizeof(*powerpc_intrs),
176 M_INTR, M_WAITOK | M_ZERO);
177 nintrcnt = 1 + num_io_irqs * 2 + mp_ncpus * 2;
180 nintrcnt += 8 * mp_ncpus;
182 intrcnt = mallocarray(nintrcnt, sizeof(u_long), M_INTR, M_WAITOK |
184 intrnames = mallocarray(nintrcnt, MAXCOMLEN + 1, M_INTR, M_WAITOK |
186 sintrcnt = nintrcnt * sizeof(u_long);
187 sintrnames = nintrcnt * (MAXCOMLEN + 1);
189 intrcnt_setname("???", 0);
193 * This needs to happen before SI_SUB_CPU
195 SYSINIT(intr_init_sources, SI_SUB_KLD, SI_ORDER_ANY, intr_init_sources, NULL);
199 smp_intr_init(void *dummy __unused)
201 struct powerpc_intr *i;
204 for (vector = 0; vector < nvectors; vector++) {
205 i = powerpc_intrs[vector];
206 if (i != NULL && i->event != NULL && i->pic == root_pic)
207 PIC_BIND(i->pic, i->intline, i->pi_cpuset, &i->priv);
210 SYSINIT(smp_intr_init, SI_SUB_SMP, SI_ORDER_ANY, smp_intr_init, NULL);
214 intrcnt_add(const char *name, u_long **countp)
218 idx = atomic_fetchadd_int(&intrcnt_index, 1);
219 KASSERT(idx < nintrcnt, ("intrcnt_add: Interrupt counter index %d/%d"
220 "reached nintrcnt : %d", intrcnt_index, idx, nintrcnt));
221 *countp = &intrcnt[idx];
222 intrcnt_setname(name, idx);
225 extern void kdb_backtrace(void);
226 static struct powerpc_intr *
227 intr_lookup(u_int irq)
230 struct powerpc_intr *i, *iscan;
233 mtx_lock(&intr_table_lock);
234 for (vector = 0; vector < nvectors; vector++) {
235 i = powerpc_intrs[vector];
236 if (i != NULL && i->irq == irq) {
237 mtx_unlock(&intr_table_lock);
242 i = malloc(sizeof(*i), M_INTR, M_NOWAIT);
244 mtx_unlock(&intr_table_lock);
251 i->trig = INTR_TRIGGER_CONFORM;
252 i->pol = INTR_POLARITY_CONFORM;
260 i->pi_cpuset = all_cpus;
262 CPU_SETOF(0, &i->pi_cpuset);
265 for (vector = 0; vector < num_io_irqs && vector <= nvectors;
267 iscan = powerpc_intrs[vector];
268 if (iscan != NULL && iscan->irq == irq)
270 if (iscan == NULL && i->vector == -1)
275 if (iscan == NULL && i->vector != -1) {
276 powerpc_intrs[i->vector] = i;
277 i->cntindex = atomic_fetchadd_int(&intrcnt_index, 1);
278 i->cntp = &intrcnt[i->cntindex];
279 sprintf(intrname, "irq%u:", i->irq);
280 intrcnt_setname(intrname, i->cntindex);
283 mtx_unlock(&intr_table_lock);
285 if (iscan != NULL || i->vector == -1) {
294 powerpc_map_irq(struct powerpc_intr *i)
300 for (idx = 0; idx < npics; idx++) {
302 cnt = p->irqs + p->ipis;
303 if (i->irq >= p->base && i->irq < p->base + cnt)
309 i->intline = i->irq - p->base;
312 /* Try a best guess if that failed */
320 powerpc_intr_eoi(void *arg)
322 struct powerpc_intr *i = arg;
324 PIC_EOI(i->pic, i->intline, i->priv);
328 powerpc_intr_pre_ithread(void *arg)
330 struct powerpc_intr *i = arg;
332 PIC_MASK(i->pic, i->intline, i->priv);
333 PIC_EOI(i->pic, i->intline, i->priv);
337 powerpc_intr_post_ithread(void *arg)
339 struct powerpc_intr *i = arg;
341 PIC_UNMASK(i->pic, i->intline, i->priv);
345 powerpc_assign_intr_cpu(void *arg, int cpu)
348 struct powerpc_intr *i = arg;
351 i->pi_cpuset = all_cpus;
353 CPU_SETOF(cpu, &i->pi_cpuset);
355 if (!cold && i->pic != NULL && i->pic == root_pic)
356 PIC_BIND(i->pic, i->intline, i->pi_cpuset, &i->priv);
365 powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis,
372 mtx_lock(&intr_table_lock);
374 /* XXX see powerpc_get_irq(). */
375 for (idx = 0; idx < npics; idx++) {
379 if (node != 0 || p->dev == dev)
390 p->base = (atpic) ? 0 : nirqs;
394 irq = p->base + irqs + ipis;
395 nirqs = MAX(nirqs, irq);
399 KASSERT(npics < MAX_PICS,
400 ("Number of PICs exceeds maximum (%d)", MAX_PICS));
402 mtx_unlock(&intr_table_lock);
408 powerpc_get_irq(uint32_t node, u_int pin)
415 mtx_lock(&intr_table_lock);
416 for (idx = 0; idx < npics; idx++) {
417 if (piclist[idx].node == node) {
418 mtx_unlock(&intr_table_lock);
419 return (piclist[idx].base + pin);
424 * XXX we should never encounter an unregistered PIC, but that
425 * can only be done when we properly support bus enumeration
426 * using multiple passes. Until then, fake an entry and give it
427 * some adhoc maximum number of IRQs and IPIs.
429 piclist[idx].dev = NULL;
430 piclist[idx].node = node;
431 piclist[idx].irqs = 124;
432 piclist[idx].ipis = 4;
433 piclist[idx].base = nirqs;
437 KASSERT(npics < MAX_PICS,
438 ("Number of PICs exceeds maximum (%d)", MAX_PICS));
440 mtx_unlock(&intr_table_lock);
442 return (piclist[idx].base + pin);
446 powerpc_enable_intr(void)
448 struct powerpc_intr *i;
455 panic("no PIC detected\n");
457 if (root_pic == NULL)
458 root_pic = piclist[0].dev;
460 KASSERT(root_pic != NULL, ("no root PIC!"));
463 /* Install an IPI handler. */
465 for (n = 0; n < npics; n++) {
466 if (piclist[n].dev != root_pic)
469 KASSERT(piclist[n].ipis != 0,
470 ("%s: SMP root PIC does not supply any IPIs",
472 error = powerpc_setup_intr("IPI",
473 MAP_IRQ(piclist[n].node, piclist[n].irqs),
474 powerpc_ipi_handler, NULL, NULL,
475 INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie,
478 printf("unable to setup IPI handler\n");
483 * Some subterfuge: disable late EOI and mark this
484 * as an IPI to the dispatch layer.
486 i = intr_lookup(MAP_IRQ(piclist[n].node,
488 i->event->ie_post_filter = NULL;
494 for (vector = 0; vector < nvectors; vector++) {
495 i = powerpc_intrs[vector];
499 error = powerpc_map_irq(i);
503 if (i->trig == INTR_TRIGGER_INVALID)
504 PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode,
506 if (i->trig != INTR_TRIGGER_CONFORM ||
507 i->pol != INTR_POLARITY_CONFORM)
508 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
510 if (i->event != NULL)
511 PIC_ENABLE(i->pic, i->intline, vector, &i->priv);
518 powerpc_setup_intr(const char *name, u_int irq, driver_filter_t filter,
519 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep,
522 struct powerpc_intr *i;
523 int error, enable = 0;
525 i = intr_lookup(irq);
529 if (i->event == NULL) {
530 error = intr_event_create(&i->event, (void *)i, 0, irq,
531 powerpc_intr_pre_ithread, powerpc_intr_post_ithread,
532 powerpc_intr_eoi, powerpc_assign_intr_cpu, "irq%u:", irq);
539 error = intr_event_add_handler(i->event, name, filter, handler, arg,
540 intr_priority(flags), flags, cookiep);
543 i->pi_domain = domain;
544 if (strcmp(name, "IPI") != 0) {
545 CPU_ZERO(&i->pi_cpuset);
546 CPU_COPY(&cpuset_domain[domain], &i->pi_cpuset);
548 mtx_lock(&intr_table_lock);
549 intrcnt_setname(i->event->ie_fullname, i->cntindex);
550 mtx_unlock(&intr_table_lock);
553 error = powerpc_map_irq(i);
556 if (i->trig == INTR_TRIGGER_INVALID)
557 PIC_TRANSLATE_CODE(i->pic, i->intline,
558 i->fwcode, &i->trig, &i->pol);
560 if (i->trig != INTR_TRIGGER_CONFORM ||
561 i->pol != INTR_POLARITY_CONFORM)
562 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
564 if (i->pic == root_pic)
565 PIC_BIND(i->pic, i->intline, i->pi_cpuset, &i->priv);
568 PIC_ENABLE(i->pic, i->intline, i->vector,
576 powerpc_teardown_intr(void *cookie)
579 return (intr_event_remove_handler(cookie));
584 powerpc_bind_intr(u_int irq, u_char cpu)
586 struct powerpc_intr *i;
588 i = intr_lookup(irq);
592 return (intr_event_bind(i->event, cpu));
597 powerpc_fw_config_intr(int irq, int sense_code)
599 struct powerpc_intr *i;
601 i = intr_lookup(irq);
605 i->trig = INTR_TRIGGER_INVALID;
606 i->pol = INTR_POLARITY_CONFORM;
607 i->fwcode = sense_code;
609 if (!cold && i->pic != NULL) {
610 PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode, &i->trig,
612 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
619 powerpc_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol)
621 struct powerpc_intr *i;
623 i = intr_lookup(irq);
630 if (!cold && i->pic != NULL)
631 PIC_CONFIG(i->pic, i->intline, trig, pol);
637 powerpc_dispatch_intr(u_int vector, struct trapframe *tf)
639 struct powerpc_intr *i;
640 struct intr_event *ie;
642 i = powerpc_intrs[vector];
649 KASSERT(ie != NULL, ("%s: interrupt without an event", __func__));
652 * IPIs are magical and need to be EOI'ed before filtering.
653 * This prevents races in IPI handling.
656 PIC_EOI(i->pic, i->intline, i->priv);
658 if (intr_event_handle(ie, tf) != 0) {
665 if (stray_count <= MAX_STRAY_LOG) {
666 printf("stray irq %d\n", i ? i->irq : -1);
667 if (stray_count >= MAX_STRAY_LOG) {
668 printf("got %d stray interrupts, not logging anymore\n",
673 PIC_MASK(i->pic, i->intline, i->priv);
677 powerpc_intr_mask(u_int irq)
679 struct powerpc_intr *i;
681 i = intr_lookup(irq);
682 if (i == NULL || i->pic == NULL)
685 PIC_MASK(i->pic, i->intline, i->priv);
689 powerpc_intr_unmask(u_int irq)
691 struct powerpc_intr *i;
693 i = intr_lookup(irq);
694 if (i == NULL || i->pic == NULL)
697 PIC_UNMASK(i->pic, i->intline, i->priv);