2 * Copyright (c) 1991 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Copyright (c) 2002 Benno Rice.
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
58 * form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20
65 #include <sys/param.h>
66 #include <sys/systm.h>
67 #include <sys/kernel.h>
68 #include <sys/queue.h>
70 #include <sys/cpuset.h>
71 #include <sys/interrupt.h>
74 #include <sys/malloc.h>
75 #include <sys/mutex.h>
78 #include <sys/syslog.h>
79 #include <sys/vmmeter.h>
82 #include <machine/frame.h>
83 #include <machine/intr_machdep.h>
84 #include <machine/md_var.h>
85 #include <machine/smp.h>
86 #include <machine/trap.h>
90 #define MAX_STRAY_LOG 5
92 static MALLOC_DEFINE(M_INTR, "intr", "interrupt handler data");
95 struct intr_event *event;
103 enum intr_trigger trig;
104 enum intr_polarity pol;
116 static u_int intrcnt_index = 0;
117 static struct mtx intr_table_lock;
118 static struct powerpc_intr *powerpc_intrs[INTR_VECTORS];
119 static struct pic piclist[MAX_PICS];
120 static u_int nvectors; /* Allocated vectors */
121 static u_int npics; /* PICs registered */
123 static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */
125 static u_int nirqs = 0; /* Allocated IRQs. */
127 static u_int stray_count;
132 static void *ipi_cookie;
136 intr_init(void *dummy __unused)
139 mtx_init(&intr_table_lock, "intr sources lock", NULL, MTX_DEF);
141 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
145 smp_intr_init(void *dummy __unused)
147 struct powerpc_intr *i;
150 for (vector = 0; vector < nvectors; vector++) {
151 i = powerpc_intrs[vector];
152 if (i != NULL && i->pic == root_pic)
153 PIC_BIND(i->pic, i->intline, i->cpu);
156 SYSINIT(smp_intr_init, SI_SUB_SMP, SI_ORDER_ANY, smp_intr_init, NULL);
160 intrcnt_setname(const char *name, int index)
163 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
168 intrcnt_add(const char *name, u_long **countp)
172 idx = atomic_fetchadd_int(&intrcnt_index, 1);
173 *countp = &intrcnt[idx];
174 intrcnt_setname(name, idx);
177 static struct powerpc_intr *
178 intr_lookup(u_int irq)
181 struct powerpc_intr *i, *iscan;
184 mtx_lock(&intr_table_lock);
185 for (vector = 0; vector < nvectors; vector++) {
186 i = powerpc_intrs[vector];
187 if (i != NULL && i->irq == irq) {
188 mtx_unlock(&intr_table_lock);
193 i = malloc(sizeof(*i), M_INTR, M_NOWAIT);
195 mtx_unlock(&intr_table_lock);
201 i->trig = INTR_TRIGGER_CONFORM;
202 i->pol = INTR_POLARITY_CONFORM;
210 CPU_SETOF(0, &i->cpu);
213 for (vector = 0; vector < INTR_VECTORS && vector <= nvectors;
215 iscan = powerpc_intrs[vector];
216 if (iscan != NULL && iscan->irq == irq)
218 if (iscan == NULL && i->vector == -1)
223 if (iscan == NULL && i->vector != -1) {
224 powerpc_intrs[i->vector] = i;
225 i->cntindex = atomic_fetchadd_int(&intrcnt_index, 1);
226 i->cntp = &intrcnt[i->cntindex];
227 sprintf(intrname, "irq%u:", i->irq);
228 intrcnt_setname(intrname, i->cntindex);
231 mtx_unlock(&intr_table_lock);
233 if (iscan != NULL || i->vector == -1) {
242 powerpc_map_irq(struct powerpc_intr *i)
248 for (idx = 0; idx < npics; idx++) {
250 cnt = p->irqs + p->ipis;
251 if (i->irq >= p->base && i->irq < p->base + cnt)
257 i->intline = i->irq - p->base;
260 /* Try a best guess if that failed */
268 powerpc_intr_eoi(void *arg)
270 struct powerpc_intr *i = arg;
272 PIC_EOI(i->pic, i->intline);
276 powerpc_intr_pre_ithread(void *arg)
278 struct powerpc_intr *i = arg;
280 PIC_MASK(i->pic, i->intline);
281 PIC_EOI(i->pic, i->intline);
285 powerpc_intr_post_ithread(void *arg)
287 struct powerpc_intr *i = arg;
289 PIC_UNMASK(i->pic, i->intline);
293 powerpc_assign_intr_cpu(void *arg, u_char cpu)
296 struct powerpc_intr *i = arg;
301 CPU_SETOF(cpu, &i->cpu);
303 if (!cold && i->pic != NULL && i->pic == root_pic)
304 PIC_BIND(i->pic, i->intline, i->cpu);
313 powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis,
320 mtx_lock(&intr_table_lock);
322 /* XXX see powerpc_get_irq(). */
323 for (idx = 0; idx < npics; idx++) {
327 if (node != 0 || p->dev == dev)
338 p->base = (atpic) ? 0 : nirqs;
342 irq = p->base + irqs + ipis;
343 nirqs = MAX(nirqs, irq);
347 mtx_unlock(&intr_table_lock);
351 powerpc_get_irq(uint32_t node, u_int pin)
358 mtx_lock(&intr_table_lock);
359 for (idx = 0; idx < npics; idx++) {
360 if (piclist[idx].node == node) {
361 mtx_unlock(&intr_table_lock);
362 return (piclist[idx].base + pin);
367 * XXX we should never encounter an unregistered PIC, but that
368 * can only be done when we properly support bus enumeration
369 * using multiple passes. Until then, fake an entry and give it
370 * some adhoc maximum number of IRQs and IPIs.
372 piclist[idx].dev = NULL;
373 piclist[idx].node = node;
374 piclist[idx].irqs = 124;
375 piclist[idx].ipis = 4;
376 piclist[idx].base = nirqs;
380 mtx_unlock(&intr_table_lock);
382 return (piclist[idx].base + pin);
386 powerpc_enable_intr(void)
388 struct powerpc_intr *i;
395 panic("no PIC detected\n");
397 if (root_pic == NULL)
398 root_pic = piclist[0].dev;
401 /* Install an IPI handler. */
403 for (n = 0; n < npics; n++) {
404 if (piclist[n].dev != root_pic)
407 KASSERT(piclist[n].ipis != 0,
408 ("%s: SMP root PIC does not supply any IPIs",
410 error = powerpc_setup_intr("IPI",
411 MAP_IRQ(piclist[n].node, piclist[n].irqs),
412 powerpc_ipi_handler, NULL, NULL,
413 INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie);
415 printf("unable to setup IPI handler\n");
422 for (vector = 0; vector < nvectors; vector++) {
423 i = powerpc_intrs[vector];
427 error = powerpc_map_irq(i);
432 PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode,
434 if (i->trig != INTR_TRIGGER_CONFORM ||
435 i->pol != INTR_POLARITY_CONFORM)
436 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
438 if (i->event != NULL)
439 PIC_ENABLE(i->pic, i->intline, vector);
446 powerpc_setup_intr(const char *name, u_int irq, driver_filter_t filter,
447 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
449 struct powerpc_intr *i;
450 int error, enable = 0;
452 i = intr_lookup(irq);
456 if (i->event == NULL) {
457 error = intr_event_create(&i->event, (void *)i, 0, irq,
458 powerpc_intr_pre_ithread, powerpc_intr_post_ithread,
459 powerpc_intr_eoi, powerpc_assign_intr_cpu, "irq%u:", irq);
466 error = intr_event_add_handler(i->event, name, filter, handler, arg,
467 intr_priority(flags), flags, cookiep);
469 mtx_lock(&intr_table_lock);
470 intrcnt_setname(i->event->ie_fullname, i->cntindex);
471 mtx_unlock(&intr_table_lock);
474 error = powerpc_map_irq(i);
478 PIC_TRANSLATE_CODE(i->pic, i->intline,
479 i->fwcode, &i->trig, &i->pol);
481 if (i->trig != INTR_TRIGGER_CONFORM ||
482 i->pol != INTR_POLARITY_CONFORM)
483 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
485 if (i->pic == root_pic)
486 PIC_BIND(i->pic, i->intline, i->cpu);
489 PIC_ENABLE(i->pic, i->intline, i->vector);
496 powerpc_teardown_intr(void *cookie)
499 return (intr_event_remove_handler(cookie));
504 powerpc_bind_intr(u_int irq, u_char cpu)
506 struct powerpc_intr *i;
508 i = intr_lookup(irq);
512 return (intr_event_bind(i->event, cpu));
517 powerpc_fw_config_intr(int irq, int sense_code)
519 struct powerpc_intr *i;
521 i = intr_lookup(irq);
526 i->pol = INTR_POLARITY_CONFORM;
527 i->fwcode = sense_code;
529 if (!cold && i->pic != NULL) {
530 PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode, &i->trig,
532 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
539 powerpc_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol)
541 struct powerpc_intr *i;
543 i = intr_lookup(irq);
550 if (!cold && i->pic != NULL)
551 PIC_CONFIG(i->pic, i->intline, trig, pol);
557 powerpc_dispatch_intr(u_int vector, struct trapframe *tf)
559 struct powerpc_intr *i;
560 struct intr_event *ie;
562 i = powerpc_intrs[vector];
569 KASSERT(ie != NULL, ("%s: interrupt without an event", __func__));
571 if (intr_event_handle(ie, tf) != 0) {
578 if (stray_count <= MAX_STRAY_LOG) {
579 printf("stray irq %d\n", i ? i->irq : -1);
580 if (stray_count >= MAX_STRAY_LOG) {
581 printf("got %d stray interrupts, not logging anymore\n",
586 PIC_MASK(i->pic, i->intline);