2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1991 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
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14 * notice, this list of conditions and the following disclaimer.
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35 * Copyright (c) 2002 Benno Rice.
36 * All rights reserved.
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
59 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
60 * form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #include <sys/kernel.h>
70 #include <sys/queue.h>
72 #include <sys/cpuset.h>
73 #include <sys/interrupt.h>
76 #include <sys/malloc.h>
77 #include <sys/mutex.h>
80 #include <sys/syslog.h>
81 #include <sys/vmmeter.h>
84 #include <machine/frame.h>
85 #include <machine/intr_machdep.h>
86 #include <machine/md_var.h>
87 #include <machine/smp.h>
88 #include <machine/trap.h>
92 #define MAX_STRAY_LOG 5
94 static MALLOC_DEFINE(M_INTR, "intr", "interrupt handler data");
97 struct intr_event *event;
99 void *priv; /* PIC-private data */
106 enum intr_trigger trig;
107 enum intr_polarity pol;
120 static u_int intrcnt_index = 0;
121 static struct mtx intr_table_lock;
122 static struct powerpc_intr *powerpc_intrs[INTR_VECTORS];
123 static struct pic piclist[MAX_PICS];
124 static u_int nvectors; /* Allocated vectors */
125 static u_int npics; /* PICs registered */
127 static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */
129 static u_int nirqs = 0; /* Allocated IRQs. */
131 static u_int stray_count;
133 u_long intrcnt[INTR_VECTORS];
134 char intrnames[INTR_VECTORS * (MAXCOMLEN + 1)];
135 size_t sintrcnt = sizeof(intrcnt);
136 size_t sintrnames = sizeof(intrnames);
141 static void *ipi_cookie;
145 intr_init(void *dummy __unused)
148 mtx_init(&intr_table_lock, "intr sources lock", NULL, MTX_DEF);
150 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
154 smp_intr_init(void *dummy __unused)
156 struct powerpc_intr *i;
159 for (vector = 0; vector < nvectors; vector++) {
160 i = powerpc_intrs[vector];
161 if (i != NULL && i->event != NULL && i->pic == root_pic)
162 PIC_BIND(i->pic, i->intline, i->cpu, &i->priv);
165 SYSINIT(smp_intr_init, SI_SUB_SMP, SI_ORDER_ANY, smp_intr_init, NULL);
169 intrcnt_setname(const char *name, int index)
172 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
177 intrcnt_add(const char *name, u_long **countp)
181 idx = atomic_fetchadd_int(&intrcnt_index, 1);
182 KASSERT(idx < INTR_VECTORS, ("intrcnt_add: Interrupt counter index "
183 "reached INTR_VECTORS"));
184 *countp = &intrcnt[idx];
185 intrcnt_setname(name, idx);
188 static struct powerpc_intr *
189 intr_lookup(u_int irq)
192 struct powerpc_intr *i, *iscan;
195 mtx_lock(&intr_table_lock);
196 for (vector = 0; vector < nvectors; vector++) {
197 i = powerpc_intrs[vector];
198 if (i != NULL && i->irq == irq) {
199 mtx_unlock(&intr_table_lock);
204 i = malloc(sizeof(*i), M_INTR, M_NOWAIT);
206 mtx_unlock(&intr_table_lock);
213 i->trig = INTR_TRIGGER_CONFORM;
214 i->pol = INTR_POLARITY_CONFORM;
224 CPU_SETOF(0, &i->cpu);
227 for (vector = 0; vector < INTR_VECTORS && vector <= nvectors;
229 iscan = powerpc_intrs[vector];
230 if (iscan != NULL && iscan->irq == irq)
232 if (iscan == NULL && i->vector == -1)
237 if (iscan == NULL && i->vector != -1) {
238 powerpc_intrs[i->vector] = i;
239 i->cntindex = atomic_fetchadd_int(&intrcnt_index, 1);
240 i->cntp = &intrcnt[i->cntindex];
241 sprintf(intrname, "irq%u:", i->irq);
242 intrcnt_setname(intrname, i->cntindex);
245 mtx_unlock(&intr_table_lock);
247 if (iscan != NULL || i->vector == -1) {
256 powerpc_map_irq(struct powerpc_intr *i)
262 for (idx = 0; idx < npics; idx++) {
264 cnt = p->irqs + p->ipis;
265 if (i->irq >= p->base && i->irq < p->base + cnt)
271 i->intline = i->irq - p->base;
274 /* Try a best guess if that failed */
282 powerpc_intr_eoi(void *arg)
284 struct powerpc_intr *i = arg;
286 PIC_EOI(i->pic, i->intline, i->priv);
290 powerpc_intr_pre_ithread(void *arg)
292 struct powerpc_intr *i = arg;
294 PIC_MASK(i->pic, i->intline, i->priv);
295 PIC_EOI(i->pic, i->intline, i->priv);
299 powerpc_intr_post_ithread(void *arg)
301 struct powerpc_intr *i = arg;
303 PIC_UNMASK(i->pic, i->intline, i->priv);
307 powerpc_assign_intr_cpu(void *arg, int cpu)
310 struct powerpc_intr *i = arg;
315 CPU_SETOF(cpu, &i->cpu);
317 if (!cold && i->pic != NULL && i->pic == root_pic)
318 PIC_BIND(i->pic, i->intline, i->cpu, &i->priv);
327 powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis,
334 mtx_lock(&intr_table_lock);
336 /* XXX see powerpc_get_irq(). */
337 for (idx = 0; idx < npics; idx++) {
341 if (node != 0 || p->dev == dev)
352 p->base = (atpic) ? 0 : nirqs;
356 irq = p->base + irqs + ipis;
357 nirqs = MAX(nirqs, irq);
361 KASSERT(npics < MAX_PICS,
362 ("Number of PICs exceeds maximum (%d)", MAX_PICS));
364 mtx_unlock(&intr_table_lock);
370 powerpc_get_irq(uint32_t node, u_int pin)
377 mtx_lock(&intr_table_lock);
378 for (idx = 0; idx < npics; idx++) {
379 if (piclist[idx].node == node) {
380 mtx_unlock(&intr_table_lock);
381 return (piclist[idx].base + pin);
386 * XXX we should never encounter an unregistered PIC, but that
387 * can only be done when we properly support bus enumeration
388 * using multiple passes. Until then, fake an entry and give it
389 * some adhoc maximum number of IRQs and IPIs.
391 piclist[idx].dev = NULL;
392 piclist[idx].node = node;
393 piclist[idx].irqs = 124;
394 piclist[idx].ipis = 4;
395 piclist[idx].base = nirqs;
399 KASSERT(npics < MAX_PICS,
400 ("Number of PICs exceeds maximum (%d)", MAX_PICS));
402 mtx_unlock(&intr_table_lock);
404 return (piclist[idx].base + pin);
408 powerpc_enable_intr(void)
410 struct powerpc_intr *i;
417 panic("no PIC detected\n");
419 if (root_pic == NULL)
420 root_pic = piclist[0].dev;
423 /* Install an IPI handler. */
425 for (n = 0; n < npics; n++) {
426 if (piclist[n].dev != root_pic)
429 KASSERT(piclist[n].ipis != 0,
430 ("%s: SMP root PIC does not supply any IPIs",
432 error = powerpc_setup_intr("IPI",
433 MAP_IRQ(piclist[n].node, piclist[n].irqs),
434 powerpc_ipi_handler, NULL, NULL,
435 INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie);
437 printf("unable to setup IPI handler\n");
442 * Some subterfuge: disable late EOI and mark this
443 * as an IPI to the dispatch layer.
445 i = intr_lookup(MAP_IRQ(piclist[n].node,
447 i->event->ie_post_filter = NULL;
453 for (vector = 0; vector < nvectors; vector++) {
454 i = powerpc_intrs[vector];
458 error = powerpc_map_irq(i);
462 if (i->trig == INTR_TRIGGER_INVALID)
463 PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode,
465 if (i->trig != INTR_TRIGGER_CONFORM ||
466 i->pol != INTR_POLARITY_CONFORM)
467 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
469 if (i->event != NULL)
470 PIC_ENABLE(i->pic, i->intline, vector, &i->priv);
477 powerpc_setup_intr(const char *name, u_int irq, driver_filter_t filter,
478 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
480 struct powerpc_intr *i;
481 int error, enable = 0;
483 i = intr_lookup(irq);
487 if (i->event == NULL) {
488 error = intr_event_create(&i->event, (void *)i, 0, irq,
489 powerpc_intr_pre_ithread, powerpc_intr_post_ithread,
490 powerpc_intr_eoi, powerpc_assign_intr_cpu, "irq%u:", irq);
497 error = intr_event_add_handler(i->event, name, filter, handler, arg,
498 intr_priority(flags), flags, cookiep);
500 mtx_lock(&intr_table_lock);
501 intrcnt_setname(i->event->ie_fullname, i->cntindex);
502 mtx_unlock(&intr_table_lock);
505 error = powerpc_map_irq(i);
508 if (i->trig == INTR_TRIGGER_INVALID)
509 PIC_TRANSLATE_CODE(i->pic, i->intline,
510 i->fwcode, &i->trig, &i->pol);
512 if (i->trig != INTR_TRIGGER_CONFORM ||
513 i->pol != INTR_POLARITY_CONFORM)
514 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
516 if (i->pic == root_pic)
517 PIC_BIND(i->pic, i->intline, i->cpu, &i->priv);
520 PIC_ENABLE(i->pic, i->intline, i->vector,
528 powerpc_teardown_intr(void *cookie)
531 return (intr_event_remove_handler(cookie));
536 powerpc_bind_intr(u_int irq, u_char cpu)
538 struct powerpc_intr *i;
540 i = intr_lookup(irq);
544 return (intr_event_bind(i->event, cpu));
549 powerpc_fw_config_intr(int irq, int sense_code)
551 struct powerpc_intr *i;
553 i = intr_lookup(irq);
557 i->trig = INTR_TRIGGER_INVALID;
558 i->pol = INTR_POLARITY_CONFORM;
559 i->fwcode = sense_code;
561 if (!cold && i->pic != NULL) {
562 PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode, &i->trig,
564 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
571 powerpc_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol)
573 struct powerpc_intr *i;
575 i = intr_lookup(irq);
582 if (!cold && i->pic != NULL)
583 PIC_CONFIG(i->pic, i->intline, trig, pol);
589 powerpc_dispatch_intr(u_int vector, struct trapframe *tf)
591 struct powerpc_intr *i;
592 struct intr_event *ie;
594 i = powerpc_intrs[vector];
601 KASSERT(ie != NULL, ("%s: interrupt without an event", __func__));
604 * IPIs are magical and need to be EOI'ed before filtering.
605 * This prevents races in IPI handling.
608 PIC_EOI(i->pic, i->intline, i->priv);
610 if (intr_event_handle(ie, tf) != 0) {
617 if (stray_count <= MAX_STRAY_LOG) {
618 printf("stray irq %d\n", i ? i->irq : -1);
619 if (stray_count >= MAX_STRAY_LOG) {
620 printf("got %d stray interrupts, not logging anymore\n",
625 PIC_MASK(i->pic, i->intline, i->priv);
629 powerpc_intr_mask(u_int irq)
631 struct powerpc_intr *i;
633 i = intr_lookup(irq);
634 if (i == NULL || i->pic == NULL)
637 PIC_MASK(i->pic, i->intline, i->priv);
641 powerpc_intr_unmask(u_int irq)
643 struct powerpc_intr *i;
645 i = intr_lookup(irq);
646 if (i == NULL || i->pic == NULL)
649 PIC_UNMASK(i->pic, i->intline, i->priv);