2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1991 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
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17 * documentation and/or other materials provided with the distribution.
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20 * without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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35 * Copyright (c) 2002 Benno Rice.
36 * All rights reserved.
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
59 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
60 * form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #include <sys/kernel.h>
70 #include <sys/queue.h>
72 #include <sys/cpuset.h>
73 #include <sys/interrupt.h>
76 #include <sys/malloc.h>
77 #include <sys/mutex.h>
80 #include <sys/syslog.h>
81 #include <sys/vmmeter.h>
84 #include <machine/frame.h>
85 #include <machine/intr_machdep.h>
86 #include <machine/md_var.h>
87 #include <machine/smp.h>
88 #include <machine/trap.h>
92 #define MAX_STRAY_LOG 5
94 static MALLOC_DEFINE(M_INTR, "intr", "interrupt handler data");
97 struct intr_event *event;
99 void *priv; /* PIC-private data */
106 enum intr_trigger trig;
107 enum intr_polarity pol;
120 static u_int intrcnt_index = 0;
121 static struct mtx intr_table_lock;
122 static struct powerpc_intr **powerpc_intrs;
123 static struct pic piclist[MAX_PICS];
124 static u_int nvectors; /* Allocated vectors */
125 static u_int npics; /* PICs registered */
127 static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */
129 static u_int nirqs = 0; /* Allocated IRQs. */
131 static u_int stray_count;
135 size_t sintrcnt = sizeof(intrcnt);
136 size_t sintrnames = sizeof(intrnames);
143 u_int num_io_irqs = 768;
145 u_int num_io_irqs = 256;
151 static void *ipi_cookie;
155 intrcnt_setname(const char *name, int index)
158 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
163 intr_init(void *dummy __unused)
166 mtx_init(&intr_table_lock, "intr sources lock", NULL, MTX_DEF);
168 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
171 intr_init_sources(void *arg __unused)
174 powerpc_intrs = mallocarray(num_io_irqs, sizeof(*powerpc_intrs),
175 M_INTR, M_WAITOK | M_ZERO);
176 nintrcnt = 1 + num_io_irqs * 2 + mp_ncpus * 2;
179 nintrcnt += 8 * mp_ncpus;
181 intrcnt = mallocarray(nintrcnt, sizeof(u_long), M_INTR, M_WAITOK |
183 intrnames = mallocarray(nintrcnt, MAXCOMLEN + 1, M_INTR, M_WAITOK |
185 sintrcnt = nintrcnt * sizeof(u_long);
186 sintrnames = nintrcnt * (MAXCOMLEN + 1);
188 intrcnt_setname("???", 0);
192 * This needs to happen before SI_SUB_CPU
194 SYSINIT(intr_init_sources, SI_SUB_KLD, SI_ORDER_ANY, intr_init_sources, NULL);
198 smp_intr_init(void *dummy __unused)
200 struct powerpc_intr *i;
203 for (vector = 0; vector < nvectors; vector++) {
204 i = powerpc_intrs[vector];
205 if (i != NULL && i->event != NULL && i->pic == root_pic)
206 PIC_BIND(i->pic, i->intline, i->cpu, &i->priv);
209 SYSINIT(smp_intr_init, SI_SUB_SMP, SI_ORDER_ANY, smp_intr_init, NULL);
213 intrcnt_add(const char *name, u_long **countp)
217 idx = atomic_fetchadd_int(&intrcnt_index, 1);
218 KASSERT(idx < nintrcnt, ("intrcnt_add: Interrupt counter index %d/%d"
219 "reached nintrcnt : %d", intrcnt_index, idx, nintrcnt));
220 *countp = &intrcnt[idx];
221 intrcnt_setname(name, idx);
224 extern void kdb_backtrace(void);
225 static struct powerpc_intr *
226 intr_lookup(u_int irq)
229 struct powerpc_intr *i, *iscan;
232 mtx_lock(&intr_table_lock);
233 for (vector = 0; vector < nvectors; vector++) {
234 i = powerpc_intrs[vector];
235 if (i != NULL && i->irq == irq) {
236 mtx_unlock(&intr_table_lock);
241 i = malloc(sizeof(*i), M_INTR, M_NOWAIT);
243 mtx_unlock(&intr_table_lock);
250 i->trig = INTR_TRIGGER_CONFORM;
251 i->pol = INTR_POLARITY_CONFORM;
261 CPU_SETOF(0, &i->cpu);
264 for (vector = 0; vector < num_io_irqs && vector <= nvectors;
266 iscan = powerpc_intrs[vector];
267 if (iscan != NULL && iscan->irq == irq)
269 if (iscan == NULL && i->vector == -1)
274 if (iscan == NULL && i->vector != -1) {
275 powerpc_intrs[i->vector] = i;
276 i->cntindex = atomic_fetchadd_int(&intrcnt_index, 1);
277 i->cntp = &intrcnt[i->cntindex];
278 sprintf(intrname, "irq%u:", i->irq);
279 intrcnt_setname(intrname, i->cntindex);
282 mtx_unlock(&intr_table_lock);
284 if (iscan != NULL || i->vector == -1) {
293 powerpc_map_irq(struct powerpc_intr *i)
299 for (idx = 0; idx < npics; idx++) {
301 cnt = p->irqs + p->ipis;
302 if (i->irq >= p->base && i->irq < p->base + cnt)
308 i->intline = i->irq - p->base;
311 /* Try a best guess if that failed */
319 powerpc_intr_eoi(void *arg)
321 struct powerpc_intr *i = arg;
323 PIC_EOI(i->pic, i->intline, i->priv);
327 powerpc_intr_pre_ithread(void *arg)
329 struct powerpc_intr *i = arg;
331 PIC_MASK(i->pic, i->intline, i->priv);
332 PIC_EOI(i->pic, i->intline, i->priv);
336 powerpc_intr_post_ithread(void *arg)
338 struct powerpc_intr *i = arg;
340 PIC_UNMASK(i->pic, i->intline, i->priv);
344 powerpc_assign_intr_cpu(void *arg, int cpu)
347 struct powerpc_intr *i = arg;
352 CPU_SETOF(cpu, &i->cpu);
354 if (!cold && i->pic != NULL && i->pic == root_pic)
355 PIC_BIND(i->pic, i->intline, i->cpu, &i->priv);
364 powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis,
371 mtx_lock(&intr_table_lock);
373 /* XXX see powerpc_get_irq(). */
374 for (idx = 0; idx < npics; idx++) {
378 if (node != 0 || p->dev == dev)
389 p->base = (atpic) ? 0 : nirqs;
393 irq = p->base + irqs + ipis;
394 nirqs = MAX(nirqs, irq);
398 KASSERT(npics < MAX_PICS,
399 ("Number of PICs exceeds maximum (%d)", MAX_PICS));
401 mtx_unlock(&intr_table_lock);
407 powerpc_get_irq(uint32_t node, u_int pin)
414 mtx_lock(&intr_table_lock);
415 for (idx = 0; idx < npics; idx++) {
416 if (piclist[idx].node == node) {
417 mtx_unlock(&intr_table_lock);
418 return (piclist[idx].base + pin);
423 * XXX we should never encounter an unregistered PIC, but that
424 * can only be done when we properly support bus enumeration
425 * using multiple passes. Until then, fake an entry and give it
426 * some adhoc maximum number of IRQs and IPIs.
428 piclist[idx].dev = NULL;
429 piclist[idx].node = node;
430 piclist[idx].irqs = 124;
431 piclist[idx].ipis = 4;
432 piclist[idx].base = nirqs;
436 KASSERT(npics < MAX_PICS,
437 ("Number of PICs exceeds maximum (%d)", MAX_PICS));
439 mtx_unlock(&intr_table_lock);
441 return (piclist[idx].base + pin);
445 powerpc_enable_intr(void)
447 struct powerpc_intr *i;
454 panic("no PIC detected\n");
456 if (root_pic == NULL)
457 root_pic = piclist[0].dev;
460 /* Install an IPI handler. */
462 for (n = 0; n < npics; n++) {
463 if (piclist[n].dev != root_pic)
466 KASSERT(piclist[n].ipis != 0,
467 ("%s: SMP root PIC does not supply any IPIs",
469 error = powerpc_setup_intr("IPI",
470 MAP_IRQ(piclist[n].node, piclist[n].irqs),
471 powerpc_ipi_handler, NULL, NULL,
472 INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie);
474 printf("unable to setup IPI handler\n");
479 * Some subterfuge: disable late EOI and mark this
480 * as an IPI to the dispatch layer.
482 i = intr_lookup(MAP_IRQ(piclist[n].node,
484 i->event->ie_post_filter = NULL;
490 for (vector = 0; vector < nvectors; vector++) {
491 i = powerpc_intrs[vector];
495 error = powerpc_map_irq(i);
499 if (i->trig == INTR_TRIGGER_INVALID)
500 PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode,
502 if (i->trig != INTR_TRIGGER_CONFORM ||
503 i->pol != INTR_POLARITY_CONFORM)
504 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
506 if (i->event != NULL)
507 PIC_ENABLE(i->pic, i->intline, vector, &i->priv);
514 powerpc_setup_intr(const char *name, u_int irq, driver_filter_t filter,
515 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
517 struct powerpc_intr *i;
518 int error, enable = 0;
520 i = intr_lookup(irq);
524 if (i->event == NULL) {
525 error = intr_event_create(&i->event, (void *)i, 0, irq,
526 powerpc_intr_pre_ithread, powerpc_intr_post_ithread,
527 powerpc_intr_eoi, powerpc_assign_intr_cpu, "irq%u:", irq);
534 error = intr_event_add_handler(i->event, name, filter, handler, arg,
535 intr_priority(flags), flags, cookiep);
537 mtx_lock(&intr_table_lock);
538 intrcnt_setname(i->event->ie_fullname, i->cntindex);
539 mtx_unlock(&intr_table_lock);
542 error = powerpc_map_irq(i);
545 if (i->trig == INTR_TRIGGER_INVALID)
546 PIC_TRANSLATE_CODE(i->pic, i->intline,
547 i->fwcode, &i->trig, &i->pol);
549 if (i->trig != INTR_TRIGGER_CONFORM ||
550 i->pol != INTR_POLARITY_CONFORM)
551 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
553 if (i->pic == root_pic)
554 PIC_BIND(i->pic, i->intline, i->cpu, &i->priv);
557 PIC_ENABLE(i->pic, i->intline, i->vector,
565 powerpc_teardown_intr(void *cookie)
568 return (intr_event_remove_handler(cookie));
573 powerpc_bind_intr(u_int irq, u_char cpu)
575 struct powerpc_intr *i;
577 i = intr_lookup(irq);
581 return (intr_event_bind(i->event, cpu));
586 powerpc_fw_config_intr(int irq, int sense_code)
588 struct powerpc_intr *i;
590 i = intr_lookup(irq);
594 i->trig = INTR_TRIGGER_INVALID;
595 i->pol = INTR_POLARITY_CONFORM;
596 i->fwcode = sense_code;
598 if (!cold && i->pic != NULL) {
599 PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode, &i->trig,
601 PIC_CONFIG(i->pic, i->intline, i->trig, i->pol);
608 powerpc_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol)
610 struct powerpc_intr *i;
612 i = intr_lookup(irq);
619 if (!cold && i->pic != NULL)
620 PIC_CONFIG(i->pic, i->intline, trig, pol);
626 powerpc_dispatch_intr(u_int vector, struct trapframe *tf)
628 struct powerpc_intr *i;
629 struct intr_event *ie;
631 i = powerpc_intrs[vector];
638 KASSERT(ie != NULL, ("%s: interrupt without an event", __func__));
641 * IPIs are magical and need to be EOI'ed before filtering.
642 * This prevents races in IPI handling.
645 PIC_EOI(i->pic, i->intline, i->priv);
647 if (intr_event_handle(ie, tf) != 0) {
654 if (stray_count <= MAX_STRAY_LOG) {
655 printf("stray irq %d\n", i ? i->irq : -1);
656 if (stray_count >= MAX_STRAY_LOG) {
657 printf("got %d stray interrupts, not logging anymore\n",
662 PIC_MASK(i->pic, i->intline, i->priv);
666 powerpc_intr_mask(u_int irq)
668 struct powerpc_intr *i;
670 i = intr_lookup(irq);
671 if (i == NULL || i->pic == NULL)
674 PIC_MASK(i->pic, i->intline, i->priv);
678 powerpc_intr_unmask(u_int irq)
680 struct powerpc_intr *i;
682 i = intr_lookup(irq);
683 if (i == NULL || i->pic == NULL)
686 PIC_UNMASK(i->pic, i->intline, i->priv);