2 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the NetBSD
19 * Foundation, Inc. and its contributors.
20 * 4. Neither the name of The NetBSD Foundation nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
38 * Copyright (C) 1995, 1996 TooLs GmbH.
39 * All rights reserved.
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 * must display the following acknowledgement:
51 * This product includes software developed by TooLs GmbH.
52 * 4. The name of TooLs GmbH may not be used to endorse or promote products
53 * derived from this software without specific prior written permission.
55 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
56 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
57 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
58 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
60 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
61 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
62 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
63 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
64 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
66 * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $
69 * Copyright (C) 2001 Benno Rice.
70 * All rights reserved.
72 * Redistribution and use in source and binary forms, with or without
73 * modification, are permitted provided that the following conditions
75 * 1. Redistributions of source code must retain the above copyright
76 * notice, this list of conditions and the following disclaimer.
77 * 2. Redistributions in binary form must reproduce the above copyright
78 * notice, this list of conditions and the following disclaimer in the
79 * documentation and/or other materials provided with the distribution.
81 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
82 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
83 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
84 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
85 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
86 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
87 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
88 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
89 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
90 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
94 static const char rcsid[] =
99 * Manages physical address maps.
101 * In addition to hardware address maps, this module is called upon to
102 * provide software-use-only maps which may or may not be stored in the
103 * same form as hardware maps. These pseudo-maps are used to store
104 * intermediate results from copy operations to and from address spaces.
106 * Since the information managed by this module is also stored by the
107 * logical address mapping module, this module may throw away valid virtual
108 * to physical mappings at almost any time. However, invalidations of
109 * mappings must be done as requested.
111 * In order to cope with hardware architectures which make virtual to
112 * physical map invalidates expensive, this module may delay invalidate
113 * reduced protection operations until such time as they are actually
114 * necessary. This module is given full information as to which processors
115 * are currently using which maps, and to when physical maps must be made
119 #include <sys/param.h>
120 #include <sys/kernel.h>
122 #include <sys/lock.h>
123 #include <sys/msgbuf.h>
124 #include <sys/mutex.h>
125 #include <sys/proc.h>
126 #include <sys/sysctl.h>
127 #include <sys/systm.h>
128 #include <sys/vmmeter.h>
130 #include <dev/ofw/openfirm.h>
133 #include <vm/vm_param.h>
134 #include <vm/vm_kern.h>
135 #include <vm/vm_page.h>
136 #include <vm/vm_map.h>
137 #include <vm/vm_object.h>
138 #include <vm/vm_extern.h>
139 #include <vm/vm_pageout.h>
140 #include <vm/vm_pager.h>
141 #include <vm/vm_zone.h>
143 #include <machine/bat.h>
144 #include <machine/frame.h>
145 #include <machine/md_var.h>
146 #include <machine/psl.h>
147 #include <machine/pte.h>
148 #include <machine/sr.h>
152 #define TODO panic("%s: not implemented", __func__);
154 #define PMAP_LOCK(pm)
155 #define PMAP_UNLOCK(pm)
157 #define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va))
158 #define TLBSYNC() __asm __volatile("tlbsync");
159 #define SYNC() __asm __volatile("sync");
160 #define EIEIO() __asm __volatile("eieio");
162 #define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4))
163 #define VSID_TO_SR(vsid) ((vsid) & 0xf)
164 #define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff)
166 #define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */
167 #define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */
168 #define PVO_WIRED 0x0010 /* PVO entry is wired */
169 #define PVO_MANAGED 0x0020 /* PVO entry is managed */
170 #define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */
171 #define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF)
172 #define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE)
173 #define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK)
174 #define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID)
175 #define PVO_PTEGIDX_CLR(pvo) \
176 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK)))
177 #define PVO_PTEGIDX_SET(pvo, i) \
178 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID))
180 #define PMAP_PVO_CHECK(pvo)
183 vm_offset_t mr_start;
194 int pmap_bootstrapped = 0;
197 * Virtual and physical address of message buffer.
199 struct msgbuf *msgbufp;
200 vm_offset_t msgbuf_phys;
203 * Physical addresses of first and last available physical page.
205 vm_offset_t avail_start;
206 vm_offset_t avail_end;
209 * Map of physical memory regions.
211 vm_offset_t phys_avail[128];
212 u_int phys_avail_count;
213 static struct mem_region regions[128];
214 static struct ofw_map translations[128];
215 static int translations_size;
218 * First and last available kernel virtual addresses.
220 vm_offset_t virtual_avail;
221 vm_offset_t virtual_end;
222 vm_offset_t kernel_vm_end;
227 struct pmap kernel_pmap_store;
228 extern struct pmap ofw_pmap;
233 static struct pteg *pmap_pteg_table;
234 u_int pmap_pteg_count;
235 u_int pmap_pteg_mask;
240 struct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */
241 struct pvo_head pmap_pvo_kunmanaged =
242 LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */
243 struct pvo_head pmap_pvo_unmanaged =
244 LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */
246 vm_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */
247 vm_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */
248 struct vm_zone pmap_upvo_zone_store;
249 struct vm_zone pmap_mpvo_zone_store;
250 struct vm_object pmap_upvo_zone_obj;
251 struct vm_object pmap_mpvo_zone_obj;
253 #define PMAP_PVO_SIZE 1024
254 struct pvo_entry pmap_upvo_pool[PMAP_PVO_SIZE];
256 #define VSID_NBPW (sizeof(u_int32_t) * 8)
257 static u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW];
259 static boolean_t pmap_initialized = FALSE;
264 u_int pmap_pte_valid = 0;
265 u_int pmap_pte_overflow = 0;
266 u_int pmap_pte_replacements = 0;
267 u_int pmap_pvo_entries = 0;
268 u_int pmap_pvo_enter_calls = 0;
269 u_int pmap_pvo_remove_calls = 0;
270 u_int pmap_pte_spills = 0;
271 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid,
273 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD,
274 &pmap_pte_overflow, 0, "");
275 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD,
276 &pmap_pte_replacements, 0, "");
277 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries,
279 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD,
280 &pmap_pvo_enter_calls, 0, "");
281 SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD,
282 &pmap_pvo_remove_calls, 0, "");
283 SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD,
284 &pmap_pte_spills, 0, "");
286 struct pvo_entry *pmap_pvo_zeropage;
288 vm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS;
289 u_int pmap_rkva_count = 4;
292 * Allocate physical memory for use in pmap_bootstrap.
294 static vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int);
299 static int pmap_pte_insert(u_int, struct pte *);
304 static int pmap_pvo_enter(pmap_t, vm_zone_t, struct pvo_head *,
305 vm_offset_t, vm_offset_t, u_int, int);
306 static void pmap_pvo_remove(struct pvo_entry *, int);
307 static struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *);
308 static struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int);
313 static struct pvo_entry *pmap_rkva_alloc(void);
314 static void pmap_pa_map(struct pvo_entry *, vm_offset_t,
315 struct pte *, int *);
316 static void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *);
317 static void pmap_syncicache(vm_offset_t, vm_size_t);
318 static boolean_t pmap_query_bit(vm_page_t, int);
319 static boolean_t pmap_clear_bit(vm_page_t, int);
320 static void tlbia(void);
323 va_to_sr(u_int *sr, vm_offset_t va)
325 return (sr[(uintptr_t)va >> ADDR_SR_SHFT]);
328 static __inline u_int
329 va_to_pteg(u_int sr, vm_offset_t addr)
333 hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >>
335 return (hash & pmap_pteg_mask);
338 static __inline struct pvo_head *
339 pa_to_pvoh(vm_offset_t pa)
343 pg = PHYS_TO_VM_PAGE(pa);
346 return (&pmap_pvo_unmanaged);
348 return (&pg->md.mdpg_pvoh);
351 static __inline struct pvo_head *
352 vm_page_to_pvoh(vm_page_t m)
355 return (&m->md.mdpg_pvoh);
359 pmap_attr_clear(vm_page_t m, int ptebit)
362 m->md.mdpg_attrs &= ~ptebit;
366 pmap_attr_fetch(vm_page_t m)
369 return (m->md.mdpg_attrs);
373 pmap_attr_save(vm_page_t m, int ptebit)
376 m->md.mdpg_attrs |= ptebit;
380 pmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt)
382 if (pt->pte_hi == pvo_pt->pte_hi)
389 pmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which)
391 return (pt->pte_hi & ~PTE_VALID) ==
392 (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) |
393 ((va >> ADDR_API_SHFT) & PTE_API) | which);
397 pmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo)
400 * Construct a PTE. Default to IMB initially. Valid bit only gets
401 * set when the real pte is set in memory.
403 * Note: Don't set the valid bit for correct operation of tlb update.
405 pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) |
406 (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API);
411 pmap_pte_synch(struct pte *pt, struct pte *pvo_pt)
414 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG);
418 pmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit)
422 * As shown in Section 7.6.3.2.3
424 pt->pte_lo &= ~ptebit;
432 pmap_pte_set(struct pte *pt, struct pte *pvo_pt)
435 pvo_pt->pte_hi |= PTE_VALID;
438 * Update the PTE as defined in section 7.6.3.1.
439 * Note that the REF/CHG bits are from pvo_pt and thus should havce
440 * been saved so this routine can restore them (if desired).
442 pt->pte_lo = pvo_pt->pte_lo;
444 pt->pte_hi = pvo_pt->pte_hi;
450 pmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va)
453 pvo_pt->pte_hi &= ~PTE_VALID;
456 * Force the reg & chg bits back into the PTEs.
461 * Invalidate the pte.
463 pt->pte_hi &= ~PTE_VALID;
472 * Save the reg & chg bits.
474 pmap_pte_synch(pt, pvo_pt);
479 pmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va)
485 pmap_pte_unset(pt, pvo_pt, va);
486 pmap_pte_set(pt, pvo_pt);
490 * Quick sort callout for comparing memory regions.
492 static int mr_cmp(const void *a, const void *b);
493 static int om_cmp(const void *a, const void *b);
496 mr_cmp(const void *a, const void *b)
498 const struct mem_region *regiona;
499 const struct mem_region *regionb;
503 if (regiona->mr_start < regionb->mr_start)
505 else if (regiona->mr_start > regionb->mr_start)
512 om_cmp(const void *a, const void *b)
514 const struct ofw_map *mapa;
515 const struct ofw_map *mapb;
519 if (mapa->om_pa < mapb->om_pa)
521 else if (mapa->om_pa > mapb->om_pa)
528 pmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend)
530 ihandle_t pmem, mmui;
531 phandle_t chosen, mmu;
535 vm_offset_t pa, va, off;
539 * Use an IBAT and a DBAT to map the bottom segment of memory
542 batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs);
543 batl = BATL(0x00000000, BAT_M, BAT_PP_RW);
544 __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1"
545 :: "r"(batu), "r"(batl));
547 batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs);
548 batl = BATL(0x80000000, BAT_M, BAT_PP_RW);
549 __asm ("mtibatu 1,%0; mtibatl 1,%1; mtdbatu 1,%0; mtdbatl 1,%1"
550 :: "r"(batu), "r"(batl));
554 * Set the start and end of kva.
556 virtual_avail = VM_MIN_KERNEL_ADDRESS;
557 virtual_end = VM_MAX_KERNEL_ADDRESS;
559 if ((pmem = OF_finddevice("/memory")) == -1)
560 panic("pmap_bootstrap: can't locate memory device");
561 if ((sz = OF_getproplen(pmem, "available")) == -1)
562 panic("pmap_bootstrap: can't get length of available memory");
563 if (sizeof(phys_avail) < sz)
564 panic("pmap_bootstrap: phys_avail too small");
565 if (sizeof(regions) < sz)
566 panic("pmap_bootstrap: regions too small");
568 if (OF_getprop(pmem, "available", regions, sz) == -1)
569 panic("pmap_bootstrap: can't get available memory");
570 sz /= sizeof(*regions);
571 CTR0(KTR_PMAP, "pmap_bootstrap: physical memory");
572 qsort(regions, sz, sizeof(*regions), mr_cmp);
573 phys_avail_count = 0;
574 for (i = 0, j = 0; i < sz; i++, j += 2) {
575 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start,
576 regions[i].mr_start + regions[i].mr_size,
578 phys_avail[j] = regions[i].mr_start;
579 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size;
584 * Allocate PTEG table.
587 pmap_pteg_count = PTEGCOUNT;
589 pmap_pteg_count = 0x1000;
591 while (pmap_pteg_count < physmem)
592 pmap_pteg_count <<= 1;
594 pmap_pteg_count >>= 1;
595 #endif /* PTEGCOUNT */
597 size = pmap_pteg_count * sizeof(struct pteg);
598 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count,
600 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size);
601 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table);
602 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg));
603 pmap_pteg_mask = pmap_pteg_count - 1;
606 * Allocate PTE overflow lists.
608 size = sizeof(struct pvo_head) * pmap_pteg_count;
609 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size,
611 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table);
612 for (i = 0; i < pmap_pteg_count; i++)
613 LIST_INIT(&pmap_pvo_table[i]);
616 * Allocate the message buffer.
618 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0);
621 * Initialise the unmanaged pvo pool.
623 pmap_upvo_zone = &pmap_upvo_zone_store;
624 zbootinit(pmap_upvo_zone, "unmanaged pvo", sizeof (struct pvo_entry),
625 pmap_upvo_pool, PMAP_PVO_SIZE);
628 * Make sure kernel vsid is allocated as well as VSID 0.
630 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW]
631 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW);
632 pmap_vsid_bitmap[0] |= 1;
635 * Set up the OpenFirmware pmap and add it's mappings.
637 pmap_pinit(&ofw_pmap);
638 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT;
639 if ((chosen = OF_finddevice("/chosen")) == -1)
640 panic("pmap_bootstrap: can't find /chosen");
641 OF_getprop(chosen, "mmu", &mmui, 4);
642 if ((mmu = OF_instance_to_package(mmui)) == -1)
643 panic("pmap_bootstrap: can't get mmu package");
644 if ((sz = OF_getproplen(mmu, "translations")) == -1)
645 panic("pmap_bootstrap: can't get ofw translation count");
646 if (sizeof(translations) < sz)
647 panic("pmap_bootstrap: translations too small");
648 bzero(translations, sz);
649 if (OF_getprop(mmu, "translations", translations, sz) == -1)
650 panic("pmap_bootstrap: can't get ofw translations");
651 CTR0(KTR_PMAP, "pmap_bootstrap: translations");
652 qsort(translations, sz, sizeof (*translations), om_cmp);
653 for (i = 0; i < sz; i++) {
654 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x",
655 translations[i].om_pa, translations[i].om_va,
656 translations[i].om_len);
658 /* Drop stuff below something? */
660 /* Enter the pages? */
661 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) {
664 m.phys_addr = translations[i].om_pa + off;
665 pmap_enter(&ofw_pmap, translations[i].om_va + off, &m,
674 * Initialize the kernel pmap (which is statically allocated).
676 for (i = 0; i < 16; i++) {
677 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT;
679 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT;
680 kernel_pmap->pm_active = ~0;
681 kernel_pmap->pm_count = 1;
684 * Allocate a kernel stack with a guard page for thread0 and map it
685 * into the kernel page map.
687 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0);
689 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE);
690 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys,
692 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE;
693 for (i = 0; i < KSTACK_PAGES; i++) {
694 pa = kstack0_phys + i * PAGE_SIZE;
695 va = kstack0 + i * PAGE_SIZE;
701 * Calculate the first and last available physical addresses.
703 avail_start = phys_avail[0];
704 for (i = 0; phys_avail[i + 2] != 0; i += 2)
706 avail_end = phys_avail[i + 1];
707 Maxmem = powerpc_btop(avail_end);
710 * Allocate virtual address space for the message buffer.
712 msgbufp = (struct msgbuf *)virtual_avail;
713 virtual_avail += round_page(MSGBUF_SIZE);
716 * Initialize hardware.
718 for (i = 0; i < 16; i++) {
719 __asm __volatile("mtsrin %0,%1"
720 :: "r"(EMPTY_SEGMENT), "r"(i << ADDR_SR_SHFT));
722 __asm __volatile ("mtsr %0,%1"
723 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT));
724 __asm __volatile ("sync; mtsdr1 %0; isync"
725 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10)));
732 * Activate a user pmap. The pmap must be activated before it's address
733 * space can be accessed in any way.
736 pmap_activate(struct thread *td)
742 * Load all the data we need up front to encourasge the compiler to
743 * not issue any loads while we have interrupts disabled below.
745 pm = &td->td_proc->p_vmspace->vm_pmap;
747 KASSERT(pm->pm_active == 0, ("pmap_activate: pmap already active?"));
749 pm->pm_active |= PCPU_GET(cpumask);
752 * XXX: Address this again later?
756 for (i = 0; i < 16; i++) {
757 __asm __volatile("mtsr %0,%1" :: "r"(i), "r"(pm->pm_sr[i]));
759 __asm __volatile("sync; isync");
765 pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size)
772 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
778 pmap_clear_modify(vm_page_t m)
781 if (m->flags * PG_FICTITIOUS)
783 pmap_clear_bit(m, PTE_CHG);
793 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
794 vm_size_t len, vm_offset_t src_addr)
800 pmap_copy_page(vm_offset_t src, vm_offset_t dst)
806 * Zero a page of physical memory by temporarily mapping it into the tlb.
809 pmap_zero_page(vm_offset_t pa)
814 if (pa < SEGMENT_LENGTH) {
816 } else if (pmap_initialized) {
817 if (pmap_pvo_zeropage == NULL)
818 pmap_pvo_zeropage = pmap_rkva_alloc();
819 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL);
820 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage);
822 panic("pmap_zero_page: can't zero pa %#x", pa);
825 bzero(va, PAGE_SIZE);
827 for (i = PAGE_SIZE / CACHELINESIZE; i > 0; i--) {
828 __asm __volatile("dcbz 0,%0" :: "r"(va));
832 if (pa >= SEGMENT_LENGTH)
833 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL);
837 pmap_zero_page_area(vm_offset_t pa, int off, int size)
843 * Map the given physical page at the specified virtual address in the
844 * target pmap with the protection requested. If specified the page
845 * will be wired down.
848 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
851 struct pvo_head *pvo_head;
853 u_int pte_lo, pvo_flags;
856 if (!pmap_initialized) {
857 pvo_head = &pmap_pvo_kunmanaged;
858 zone = pmap_upvo_zone;
861 pvo_head = pa_to_pvoh(m->phys_addr);
862 zone = pmap_mpvo_zone;
863 pvo_flags = PVO_MANAGED;
866 pte_lo = PTE_I | PTE_G;
868 if (prot & VM_PROT_WRITE)
873 if (prot & VM_PROT_EXECUTE)
874 pvo_flags |= PVO_EXECUTABLE;
877 pvo_flags |= PVO_WIRED;
879 error = pmap_pvo_enter(pmap, zone, pvo_head, va, m->phys_addr, pte_lo,
882 if (error == ENOENT) {
884 * Flush the real memory from the cache.
886 if ((pvo_flags & PVO_EXECUTABLE) && (pte_lo & PTE_I) == 0) {
887 pmap_syncicache(m->phys_addr, PAGE_SIZE);
893 pmap_extract(pmap_t pmap, vm_offset_t va)
900 * Grow the number of kernel page table entries. Unneeded.
903 pmap_growkernel(vm_offset_t addr)
908 pmap_init(vm_offset_t phys_start, vm_offset_t phys_end)
911 CTR(KTR_PMAP, "pmap_init");
918 CTR(KTR_PMAP, "pmap_init2");
919 zinitna(pmap_upvo_zone, &pmap_upvo_zone_obj, NULL, 0, PMAP_PVO_SIZE,
921 pmap_mpvo_zone = zinit("managed pvo", sizeof(struct pvo_entry),
922 PMAP_PVO_SIZE, ZONE_INTERRUPT, 1);
923 pmap_initialized = TRUE;
927 pmap_is_modified(vm_page_t m)
934 pmap_clear_reference(vm_page_t m)
940 * pmap_ts_referenced:
942 * Return a count of reference bits for a page, clearing those bits.
943 * It is not necessary for every reference bit to be cleared, but it
944 * is necessary that 0 only be returned when there are truly no
945 * reference bits set.
947 * XXX: The exact number of bits to check and clear is a matter that
948 * should be tested and standardized at some point in the future for
949 * optimal aging of shared pages.
953 pmap_ts_referenced(vm_page_t m)
960 * Map a wired page into kernel virtual address space.
963 pmap_kenter(vm_offset_t va, vm_offset_t pa)
970 if (va < VM_MIN_KERNEL_ADDRESS)
971 panic("pmap_kenter: attempt to enter non-kernel address %#x",
975 pte_lo = PTE_I | PTE_G | PTE_BW;
976 for (i = 0; phys_avail[i + 2] != 0; i += 2) {
977 if (pa >= phys_avail[i] && pa < phys_avail[i + 1]) {
978 pte_lo &= ~(PTE_I | PTE_G);
983 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone,
984 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED);
986 if (error != 0 && error != ENOENT)
987 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va,
991 * Flush the real memory from the instruction cache.
993 if ((pte_lo & (PTE_I | PTE_G)) == 0) {
994 pmap_syncicache(pa, PAGE_SIZE);
999 pmap_kextract(vm_offset_t va)
1006 pmap_kremove(vm_offset_t va)
1012 * Map a range of physical addresses into kernel virtual address space.
1014 * The value passed in *virt is a suggested virtual address for the mapping.
1015 * Architectures which can support a direct-mapped physical to virtual region
1016 * can return the appropriate address within that region, leaving '*virt'
1017 * unchanged. We cannot and therefore do not; *virt is updated with the
1018 * first usable address after the mapped region.
1021 pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot)
1023 vm_offset_t sva, va;
1027 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE)
1028 pmap_kenter(va, pa_start);
1034 pmap_mincore(pmap_t pmap, vm_offset_t addr)
1041 * Create the uarea for a new process.
1042 * This routine directly affects the fork perf for a process.
1045 pmap_new_proc(struct proc *p)
1053 * Allocate the object for the upages.
1055 upobj = p->p_upages_obj;
1056 if (upobj == NULL) {
1057 upobj = vm_object_allocate(OBJT_DEFAULT, UAREA_PAGES);
1058 p->p_upages_obj = upobj;
1062 * Get a kernel virtual address for the uarea for this process.
1064 up = (vm_offset_t)p->p_uarea;
1066 up = kmem_alloc_nofault(kernel_map, UAREA_PAGES * PAGE_SIZE);
1068 panic("pmap_new_proc: upage allocation failed");
1069 p->p_uarea = (struct user *)up;
1072 for (i = 0; i < UAREA_PAGES; i++) {
1076 m = vm_page_grab(upobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY);
1084 * Enter the page into the kernel address space.
1086 pmap_kenter(up + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m));
1089 vm_page_flag_clear(m, PG_ZERO);
1090 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE);
1091 m->valid = VM_PAGE_BITS_ALL;
1096 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
1097 vm_pindex_t pindex, vm_size_t size, int limit)
1103 * Lower the permission for all mappings to a given page.
1106 pmap_page_protect(vm_page_t m, vm_prot_t prot)
1108 struct pvo_head *pvo_head;
1109 struct pvo_entry *pvo, *next_pvo;
1113 * Since the routine only downgrades protection, if the
1114 * maximal protection is desired, there isn't any change
1117 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) ==
1118 (VM_PROT_READ|VM_PROT_WRITE))
1123 pvo_head = vm_page_to_pvoh(m);
1124 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) {
1125 next_pvo = LIST_NEXT(pvo, pvo_vlink);
1126 PMAP_PVO_CHECK(pvo); /* sanity check */
1129 * Downgrading to no mapping at all, we just remove the entry.
1131 if ((prot & VM_PROT_READ) == 0) {
1132 pmap_pvo_remove(pvo, -1);
1137 * If EXEC permission is being revoked, just clear the flag
1140 if ((prot & VM_PROT_EXECUTE) == 0)
1141 pvo->pvo_vaddr &= ~PVO_EXECUTABLE;
1144 * If this entry is already RO, don't diddle with the page
1147 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) {
1148 PMAP_PVO_CHECK(pvo);
1153 * Grab the PTE before we diddle the bits so pvo_to_pte can
1154 * verify the pte contents are as expected.
1156 pt = pmap_pvo_to_pte(pvo, -1);
1157 pvo->pvo_pte.pte_lo &= ~PTE_PP;
1158 pvo->pvo_pte.pte_lo |= PTE_BR;
1160 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1161 PMAP_PVO_CHECK(pvo); /* sanity check */
1168 * Make the specified page pageable (or not). Unneeded.
1171 pmap_pageable(pmap_t pmap, vm_offset_t sva, vm_offset_t eva,
1177 * Returns true if the pmap's pv is one of the first
1178 * 16 pvs linked to from this page. This count may
1179 * be changed upwards or downwards in the future; it
1180 * is only necessary that true be returned for a small
1181 * subset of pmaps for proper page aging.
1184 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
1190 static u_int pmap_vsidcontext;
1193 pmap_pinit(pmap_t pmap)
1199 __asm __volatile("mftb %0" : "=r"(entropy));
1202 * Allocate some segment registers for this pmap.
1205 for (i = 0; i < NPMAPS; i += VSID_NBPW) {
1209 * Create a new value by mutiplying by a prime and adding in
1210 * entropy from the timebase register. This is to make the
1211 * VSID more random so that the PT hash function collides
1212 * less often. (Note that the prime casues gcc to do shifts
1213 * instead of a multiply.)
1215 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy;
1216 hash = pmap_vsidcontext & (NPMAPS - 1);
1217 if (hash == 0) /* 0 is special, avoid it */
1220 mask = 1 << (hash & (VSID_NBPW - 1));
1221 hash = (pmap_vsidcontext & 0xfffff);
1222 if (pmap_vsid_bitmap[n] & mask) { /* collision? */
1223 /* anything free in this bucket? */
1224 if (pmap_vsid_bitmap[n] == 0xffffffff) {
1225 entropy = (pmap_vsidcontext >> 20);
1228 i = ffs(~pmap_vsid_bitmap[i]) - 1;
1230 hash &= 0xfffff & ~(VSID_NBPW - 1);
1233 pmap_vsid_bitmap[n] |= mask;
1234 for (i = 0; i < 16; i++)
1235 pmap->pm_sr[i] = VSID_MAKE(i, hash);
1239 panic("pmap_pinit: out of segments");
1243 * Initialize the pmap associated with process 0.
1246 pmap_pinit0(pmap_t pm)
1250 bzero(&pm->pm_stats, sizeof(pm->pm_stats));
1254 pmap_pinit2(pmap_t pmap)
1256 /* XXX: Remove this stub when no longer called */
1260 pmap_prefault(pmap_t pmap, vm_offset_t va, vm_map_entry_t entry)
1266 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1272 pmap_phys_address(int ppn)
1279 pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
1283 for (i = 0; i < count; i++, va += PAGE_SIZE)
1284 pmap_kenter(va, VM_PAGE_TO_PHYS(m[i]));
1288 pmap_qremove(vm_offset_t va, int count)
1294 * Add a reference to the specified pmap.
1297 pmap_reference(pmap_t pm)
1305 pmap_release(pmap_t pmap)
1311 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1317 pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1323 pmap_swapin_proc(struct proc *p)
1329 pmap_swapout_proc(struct proc *p)
1335 * Create the kernel stack and pcb for a new thread.
1336 * This routine directly affects the fork perf for a process and
1337 * create performance for a thread.
1340 pmap_new_thread(struct thread *td)
1348 * Allocate object for the kstack.
1350 ksobj = td->td_kstack_obj;
1351 if (ksobj == NULL) {
1352 ksobj = vm_object_allocate(OBJT_DEFAULT, KSTACK_PAGES);
1353 td->td_kstack_obj = ksobj;
1357 * Get a kernel virtual address for the kstack for this thread.
1361 ks = kmem_alloc_nofault(kernel_map,
1362 (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE);
1364 panic("pmap_new_thread: kstack allocation failed");
1366 ks += KSTACK_GUARD_PAGES * PAGE_SIZE;
1370 for (i = 0; i < KSTACK_PAGES; i++) {
1372 * Get a kernel stack page.
1374 m = vm_page_grab(ksobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY);
1382 * Enter the page into the kernel address space.
1384 pmap_kenter(ks + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m));
1387 vm_page_flag_clear(m, PG_ZERO);
1388 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE);
1389 m->valid = VM_PAGE_BITS_ALL;
1394 pmap_dispose_proc(struct proc *p)
1400 pmap_dispose_thread(struct thread *td)
1406 pmap_swapin_thread(struct thread *td)
1412 pmap_swapout_thread(struct thread *td)
1418 * Allocate a physical page of memory directly from the phys_avail map.
1419 * Can only be called from pmap_bootstrap before avail start and end are
1423 pmap_bootstrap_alloc(vm_size_t size, u_int align)
1428 size = round_page(size);
1429 for (i = 0; phys_avail[i + 1] != 0; i += 2) {
1431 s = (phys_avail[i] + align - 1) & ~(align - 1);
1436 if (s < phys_avail[i] || e > phys_avail[i + 1])
1439 if (s == phys_avail[i]) {
1440 phys_avail[i] += size;
1441 } else if (e == phys_avail[i + 1]) {
1442 phys_avail[i + 1] -= size;
1444 for (j = phys_avail_count * 2; j > i; j -= 2) {
1445 phys_avail[j] = phys_avail[j - 2];
1446 phys_avail[j + 1] = phys_avail[j - 1];
1449 phys_avail[i + 3] = phys_avail[i + 1];
1450 phys_avail[i + 1] = s;
1451 phys_avail[i + 2] = e;
1457 panic("pmap_bootstrap_alloc: could not allocate memory");
1461 * Return an unmapped pvo for a kernel virtual address.
1462 * Used by pmap functions that operate on physical pages.
1464 static struct pvo_entry *
1465 pmap_rkva_alloc(void)
1467 struct pvo_entry *pvo;
1472 if (pmap_rkva_count == 0)
1473 panic("pmap_rkva_alloc: no more reserved KVAs");
1475 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count);
1476 pmap_kenter(kva, 0);
1478 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx);
1481 panic("pmap_kva_alloc: pmap_pvo_find_va failed");
1483 pt = pmap_pvo_to_pte(pvo, pteidx);
1486 panic("pmap_kva_alloc: pmap_pvo_to_pte failed");
1488 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1489 PVO_PTEGIDX_CLR(pvo);
1491 pmap_pte_overflow++;
1497 pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt,
1505 * If this pvo already has a valid pte, we need to save it so it can
1506 * be restored later. We then just reload the new PTE over the old
1509 if (saved_pt != NULL) {
1510 pt = pmap_pvo_to_pte(pvo, -1);
1513 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1514 PVO_PTEGIDX_CLR(pvo);
1515 pmap_pte_overflow++;
1518 *saved_pt = pvo->pvo_pte;
1520 pvo->pvo_pte.pte_lo &= ~PTE_RPGN;
1523 pvo->pvo_pte.pte_lo |= pa;
1525 if (!pmap_pte_spill(pvo->pvo_vaddr))
1526 panic("pmap_pa_map: could not spill pvo %p", pvo);
1528 if (depth_p != NULL)
1535 pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p)
1541 pt = pmap_pvo_to_pte(pvo, -1);
1544 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1545 PVO_PTEGIDX_CLR(pvo);
1546 pmap_pte_overflow++;
1549 pvo->pvo_pte.pte_lo &= ~PTE_RPGN;
1552 * If there is a saved PTE and it's valid, restore it and return.
1554 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) {
1555 if (depth_p != NULL && --(*depth_p) == 0)
1556 panic("pmap_pa_unmap: restoring but depth == 0");
1558 pvo->pvo_pte = *saved_pt;
1560 if (!pmap_pte_spill(pvo->pvo_vaddr))
1561 panic("pmap_pa_unmap: could not spill pvo %p", pvo);
1568 pmap_syncicache(vm_offset_t pa, vm_size_t len)
1570 __syncicache((void *)pa, len);
1579 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) {
1588 pmap_pvo_enter(pmap_t pm, vm_zone_t zone, struct pvo_head *pvo_head,
1589 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags)
1591 struct pvo_entry *pvo;
1597 pmap_pvo_enter_calls++;
1600 * Compute the PTE Group index.
1603 sr = va_to_sr(pm->pm_sr, va);
1604 ptegidx = va_to_pteg(sr, va);
1609 * Remove any existing mapping for this page. Reuse the pvo entry if
1610 * there is a mapping.
1612 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
1613 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) {
1614 pmap_pvo_remove(pvo, -1);
1620 * If we aren't overwriting a mapping, try to allocate.
1634 pvo->pvo_vaddr = va;
1636 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink);
1637 pvo->pvo_vaddr &= ~ADDR_POFF;
1638 if (flags & VM_PROT_EXECUTE)
1639 pvo->pvo_vaddr |= PVO_EXECUTABLE;
1640 if (flags & PVO_WIRED)
1641 pvo->pvo_vaddr |= PVO_WIRED;
1642 if (pvo_head != &pmap_pvo_kunmanaged)
1643 pvo->pvo_vaddr |= PVO_MANAGED;
1644 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo);
1647 * Remember if the list was empty and therefore will be the first
1650 first = LIST_FIRST(pvo_head) == NULL;
1652 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink);
1653 if (pvo->pvo_pte.pte_lo & PVO_WIRED)
1654 pvo->pvo_pmap->pm_stats.wired_count++;
1655 pvo->pvo_pmap->pm_stats.resident_count++;
1658 * We hope this succeeds but it isn't required.
1660 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte);
1662 PVO_PTEGIDX_SET(pvo, i);
1664 panic("pmap_pvo_enter: overflow");
1665 pmap_pte_overflow++;
1670 return (first ? ENOENT : 0);
1674 pmap_pvo_remove(struct pvo_entry *pvo, int pteidx)
1679 * If there is an active pte entry, we need to deactivate it (and
1680 * save the ref & cfg bits).
1682 pt = pmap_pvo_to_pte(pvo, pteidx);
1684 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr);
1685 PVO_PTEGIDX_CLR(pvo);
1687 pmap_pte_overflow--;
1691 * Update our statistics.
1693 pvo->pvo_pmap->pm_stats.resident_count--;
1694 if (pvo->pvo_pte.pte_lo & PVO_WIRED)
1695 pvo->pvo_pmap->pm_stats.wired_count--;
1698 * Save the REF/CHG bits into their cache if the page is managed.
1700 if (pvo->pvo_vaddr & PVO_MANAGED) {
1703 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo * PTE_RPGN);
1705 pmap_attr_save(pg, pvo->pvo_pte.pte_lo &
1706 (PTE_REF | PTE_CHG));
1711 * Remove this PVO from the PV list.
1713 LIST_REMOVE(pvo, pvo_vlink);
1716 * Remove this from the overflow list and return it to the pool
1717 * if we aren't going to reuse it.
1719 LIST_REMOVE(pvo, pvo_olink);
1720 zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : pmap_upvo_zone,
1723 pmap_pvo_remove_calls++;
1727 pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx)
1732 * We can find the actual pte entry without searching by grabbing
1733 * the PTEG index from 3 unused bits in pte_lo[11:9] and by
1734 * noticing the HID bit.
1736 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo);
1737 if (pvo->pvo_pte.pte_hi & PTE_HID)
1738 pteidx ^= pmap_pteg_mask * 8;
1743 static struct pvo_entry *
1744 pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p)
1746 struct pvo_entry *pvo;
1751 sr = va_to_sr(pm->pm_sr, va);
1752 ptegidx = va_to_pteg(sr, va);
1754 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
1755 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) {
1757 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx);
1766 pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx)
1771 * If we haven't been supplied the ptegidx, calculate it.
1777 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr);
1778 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr);
1779 pteidx = pmap_pvo_pte_index(pvo, ptegidx);
1782 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7];
1784 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) {
1785 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no "
1786 "valid pte index", pvo);
1789 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) {
1790 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo "
1791 "pvo but no valid pte", pvo);
1794 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) {
1795 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) {
1796 panic("pmap_pvo_to_pte: pvo %p has valid pte in "
1797 "pmap_pteg_table %p but invalid in pvo", pvo, pt);
1800 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF))
1802 panic("pmap_pvo_to_pte: pvo %p pte does not match "
1803 "pte %p in pmap_pteg_table", pvo, pt);
1809 if (pvo->pvo_pte.pte_hi & PTE_VALID) {
1810 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in "
1811 "pmap_pteg_table but valid in pvo", pvo, pt);
1818 * XXX: THIS STUFF SHOULD BE IN pte.c?
1821 pmap_pte_spill(vm_offset_t addr)
1823 struct pvo_entry *source_pvo, *victim_pvo;
1824 struct pvo_entry *pvo;
1832 __asm __volatile("mfsrin %0,%1" : "=r"(sr) : "r"(addr));
1833 ptegidx = va_to_pteg(sr, addr);
1836 * Have to substitute some entry. Use the primary hash for this.
1837 * Use low bits of timebase as random generator.
1839 pteg = &pmap_pteg_table[ptegidx];
1840 __asm __volatile("mftb %0" : "=r"(i));
1846 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) {
1848 * We need to find a pvo entry for this address.
1850 PMAP_PVO_CHECK(pvo);
1851 if (source_pvo == NULL &&
1852 pmap_pte_match(&pvo->pvo_pte, sr, addr,
1853 pvo->pvo_pte.pte_hi & PTE_HID)) {
1855 * Now found an entry to be spilled into the pteg.
1856 * The PTE is now valid, so we know it's active.
1858 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte);
1861 PVO_PTEGIDX_SET(pvo, j);
1862 pmap_pte_overflow--;
1863 PMAP_PVO_CHECK(pvo);
1869 if (victim_pvo != NULL)
1874 * We also need the pvo entry of the victim we are replacing
1875 * so save the R & C bits of the PTE.
1877 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL &&
1878 pmap_pte_compare(pt, &pvo->pvo_pte)) {
1880 if (source_pvo != NULL)
1885 if (source_pvo == NULL)
1888 if (victim_pvo == NULL) {
1889 if ((pt->pte_hi & PTE_HID) == 0)
1890 panic("pmap_pte_spill: victim p-pte (%p) has no pvo"
1894 * If this is a secondary PTE, we need to search it's primary
1895 * pvo bucket for the matching PVO.
1897 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask],
1899 PMAP_PVO_CHECK(pvo);
1901 * We also need the pvo entry of the victim we are
1902 * replacing so save the R & C bits of the PTE.
1904 if (pmap_pte_compare(pt, &pvo->pvo_pte)) {
1910 if (victim_pvo == NULL)
1911 panic("pmap_pte_spill: victim s-pte (%p) has no pvo"
1916 * We are invalidating the TLB entry for the EA we are replacing even
1917 * though it's valid. If we don't, we lose any ref/chg bit changes
1918 * contained in the TLB entry.
1920 source_pvo->pvo_pte.pte_hi &= ~PTE_HID;
1922 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr);
1923 pmap_pte_set(pt, &source_pvo->pvo_pte);
1925 PVO_PTEGIDX_CLR(victim_pvo);
1926 PVO_PTEGIDX_SET(source_pvo, i);
1927 pmap_pte_replacements++;
1929 PMAP_PVO_CHECK(victim_pvo);
1930 PMAP_PVO_CHECK(source_pvo);
1936 pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt)
1942 * First try primary hash.
1944 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) {
1945 if ((pt->pte_hi & PTE_VALID) == 0) {
1946 pvo_pt->pte_hi &= ~PTE_HID;
1947 pmap_pte_set(pt, pvo_pt);
1953 * Now try secondary hash.
1955 ptegidx ^= pmap_pteg_mask;
1957 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) {
1958 if ((pt->pte_hi & PTE_VALID) == 0) {
1959 pvo_pt->pte_hi |= PTE_HID;
1960 pmap_pte_set(pt, pvo_pt);
1965 panic("pmap_pte_insert: overflow");
1970 pmap_query_bit(vm_page_t m, int ptebit)
1972 struct pvo_entry *pvo;
1975 if (pmap_attr_fetch(m) & ptebit)
1980 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
1981 PMAP_PVO_CHECK(pvo); /* sanity check */
1984 * See if we saved the bit off. If so, cache it and return
1987 if (pvo->pvo_pte.pte_lo & ptebit) {
1988 pmap_attr_save(m, ptebit);
1989 PMAP_PVO_CHECK(pvo); /* sanity check */
1996 * No luck, now go through the hard part of looking at the PTEs
1997 * themselves. Sync so that any pending REF/CHG bits are flushed to
2001 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
2002 PMAP_PVO_CHECK(pvo); /* sanity check */
2005 * See if this pvo has a valid PTE. if so, fetch the
2006 * REF/CHG bits from the valid PTE. If the appropriate
2007 * ptebit is set, cache it and return success.
2009 pt = pmap_pvo_to_pte(pvo, -1);
2011 pmap_pte_synch(pt, &pvo->pvo_pte);
2012 if (pvo->pvo_pte.pte_lo & ptebit) {
2013 pmap_attr_save(m, ptebit);
2014 PMAP_PVO_CHECK(pvo); /* sanity check */
2026 pmap_clear_bit(vm_page_t m, int ptebit)
2028 struct pvo_entry *pvo;
2035 * Clear the cached value.
2037 rv = pmap_attr_fetch(m);
2038 pmap_attr_clear(m, ptebit);
2041 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so
2042 * we can reset the right ones). note that since the pvo entries and
2043 * list heads are accessed via BAT0 and are never placed in the page
2044 * table, we don't have to worry about further accesses setting the
2050 * For each pvo entry, clear the pvo's ptebit. If this pvo has a
2051 * valid pte clear the ptebit from the valid pte.
2053 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) {
2054 PMAP_PVO_CHECK(pvo); /* sanity check */
2055 pt = pmap_pvo_to_pte(pvo, -1);
2057 pmap_pte_synch(pt, &pvo->pvo_pte);
2058 if (pvo->pvo_pte.pte_lo & ptebit)
2059 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit);
2061 rv |= pvo->pvo_pte.pte_lo;
2062 pvo->pvo_pte.pte_lo &= ~ptebit;
2063 PMAP_PVO_CHECK(pvo); /* sanity check */
2067 return ((rv & ptebit) != 0);