2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008 Marcel Moolenaar
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
37 #include <sys/cpuset.h>
39 #include <sys/malloc.h>
40 #include <sys/mutex.h>
43 #include <sys/sched.h>
47 #include <vm/vm_param.h>
49 #include <vm/vm_map.h>
50 #include <vm/vm_extern.h>
51 #include <vm/vm_kern.h>
53 #include <machine/bus.h>
54 #include <machine/cpu.h>
55 #include <machine/intr_machdep.h>
56 #include <machine/pcb.h>
57 #include <machine/platform.h>
58 #include <machine/md_var.h>
59 #include <machine/setjmp.h>
60 #include <machine/smp.h>
64 extern struct pcpu __pcpu[MAXCPU];
66 volatile static int ap_awake;
67 volatile static u_int ap_letgo;
68 volatile static u_quad_t ap_timebase;
69 static u_int ipi_msg_cnt[32];
70 static struct mtx ap_boot_mtx;
71 struct pcb stoppcbs[MAXCPU];
74 machdep_ap_bootstrap(void)
78 __asm __volatile("msync; isync");
81 __asm __volatile("or 27,27,27");
82 __asm __volatile("or 6,6,6");
85 * Set timebase as soon as possible to meet an implicit rendezvous
86 * from cpu_mp_unleash(), which sets ap_letgo and then immediately
89 * Note that this is instrinsically racy and is only relevant on
90 * platforms that do not support better mechanisms.
92 platform_smp_timebase_sync(ap_timebase, 1);
94 /* Give platform code a chance to do anything else necessary */
95 platform_smp_ap_init();
97 /* Initialize decrementer */
100 /* Serialize console output and AP count increment */
101 mtx_lock_spin(&ap_boot_mtx);
104 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid));
106 printf("%s%d%s", ap_awake == 2 ? "Launching APs: " : "",
107 PCPU_GET(cpuid), ap_awake == mp_ncpus ? "\n" : " ");
108 mtx_unlock_spin(&ap_boot_mtx);
110 while(smp_started == 0)
113 /* Start per-CPU event timers. */
116 /* Announce ourselves awake, and enter the scheduler */
121 cpu_mp_setmaxid(void)
123 struct cpuref cpuref;
128 error = platform_smp_first_cpu(&cpuref);
131 mp_maxid = max(cpuref.cr_cpuid, mp_maxid);
132 error = platform_smp_next_cpu(&cpuref);
144 * We're not going to enable SMP if there's only 1 processor.
146 return (mp_ncpus > 1);
152 struct cpuref bsp, cpu;
156 error = platform_smp_get_bsp(&bsp);
157 KASSERT(error == 0, ("Don't know BSP"));
159 error = platform_smp_first_cpu(&cpu);
161 if (cpu.cr_cpuid >= MAXCPU) {
162 printf("SMP: cpu%d: skipped -- ID out of range\n",
166 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) {
167 printf("SMP: cpu%d: skipped - duplicate ID\n",
171 if (cpu.cr_cpuid != bsp.cr_cpuid) {
174 pc = &__pcpu[cpu.cr_cpuid];
175 dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK |
177 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc));
178 dpcpu_init(dpcpu, cpu.cr_cpuid);
181 pc->pc_cpuid = bsp.cr_cpuid;
184 pc->pc_hwref = cpu.cr_hwref;
185 CPU_SET(pc->pc_cpuid, &all_cpus);
187 error = platform_smp_next_cpu(&cpu);
192 cpu_mp_announce(void)
204 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref);
212 cpu_mp_unleash(void *dummy)
221 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
228 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
232 printf("Waking up CPU %d (dev=%x)\n",
233 pc->pc_cpuid, (int)pc->pc_hwref);
235 ret = platform_smp_start_cpu(pc);
237 timeout = 2000; /* wait 2sec for the AP */
238 while (!pc->pc_awake && --timeout > 0)
246 printf("Adding CPU %d, hwref=%jx, awake=%x\n",
247 pc->pc_cpuid, (uintmax_t)pc->pc_hwref,
251 CPU_SET(pc->pc_cpuid, &stopped_cpus);
256 /* Provide our current DEC and TB values for APs */
257 ap_timebase = mftb() + 10;
258 __asm __volatile("msync; isync");
260 /* Let APs continue */
261 atomic_store_rel_int(&ap_letgo, 1);
263 platform_smp_timebase_sync(ap_timebase, 0);
265 while (ap_awake < smp_cpus)
268 if (smp_cpus != cpus || cpus != mp_ncpus) {
269 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
270 mp_ncpus, cpus, smp_cpus);
274 atomic_store_rel_int(&smp_started, 1);
276 /* Let the APs get into the scheduler */
281 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
284 powerpc_ipi_handler(void *arg)
290 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr());
292 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask));
294 return (FILTER_STRAY);
295 while ((msg = ffs(ipimask) - 1) != -1) {
296 ipimask &= ~(1u << msg);
300 CTR1(KTR_SMP, "%s: IPI_AST", __func__);
303 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
304 sched_preempt(curthread);
307 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__);
308 smp_rendezvous_action();
313 * IPI_STOP_HARD is mapped to IPI_STOP so it is not
314 * necessary to add such case in the switch.
316 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)",
318 cpuid = PCPU_GET(cpuid);
319 savectx(&stoppcbs[cpuid]);
320 savectx(PCPU_GET(curpcb));
321 CPU_SET_ATOMIC(cpuid, &stopped_cpus);
322 while (!CPU_ISSET(cpuid, &started_cpus))
324 CPU_CLR_ATOMIC(cpuid, &stopped_cpus);
325 CPU_CLR_ATOMIC(cpuid, &started_cpus);
326 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__);
329 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
335 return (FILTER_HANDLED);
339 ipi_send(struct pcpu *pc, int ipi)
342 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__,
343 pc, pc->pc_cpuid, ipi);
345 atomic_set_32(&pc->pc_ipimask, (1 << ipi));
347 PIC_IPI(root_pic, pc->pc_cpuid);
349 CTR1(KTR_SMP, "%s: sent", __func__);
352 /* Send an IPI to a set of cpus. */
354 ipi_selected(cpuset_t cpus, int ipi)
358 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
359 if (CPU_ISSET(pc->pc_cpuid, &cpus))
364 /* Send an IPI to a specific CPU. */
366 ipi_cpu(int cpu, u_int ipi)
369 ipi_send(cpuid_to_pcpu[cpu], ipi);
372 /* Send an IPI to all CPUs EXCEPT myself. */
374 ipi_all_but_self(int ipi)
378 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {