2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008 Marcel Moolenaar
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
37 #include <sys/cpuset.h>
39 #include <sys/malloc.h>
40 #include <sys/mutex.h>
43 #include <sys/sched.h>
47 #include <vm/vm_param.h>
49 #include <vm/vm_map.h>
50 #include <vm/vm_extern.h>
51 #include <vm/vm_kern.h>
53 #include <machine/bus.h>
54 #include <machine/cpu.h>
55 #include <machine/intr_machdep.h>
56 #include <machine/pcb.h>
57 #include <machine/platform.h>
58 #include <machine/md_var.h>
59 #include <machine/setjmp.h>
60 #include <machine/smp.h>
64 extern struct pcpu __pcpu[MAXCPU];
66 volatile static int ap_awake;
67 volatile static u_int ap_letgo;
68 volatile static u_quad_t ap_timebase;
69 static u_int ipi_msg_cnt[32];
70 static struct mtx ap_boot_mtx;
71 struct pcb stoppcbs[MAXCPU];
74 machdep_ap_bootstrap(void)
78 PCPU_SET(pir, mfspr(SPR_PIR));
80 __asm __volatile("msync; isync");
83 __asm __volatile("or 27,27,27");
84 __asm __volatile("or 6,6,6");
86 /* Initialize DEC and TB, sync with the BSP values */
87 platform_smp_timebase_sync(ap_timebase, 1);
90 /* Give platform code a chance to do anything necessary */
91 platform_smp_ap_init();
93 /* Serialize console output and AP count increment */
94 mtx_lock_spin(&ap_boot_mtx);
96 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid));
97 mtx_unlock_spin(&ap_boot_mtx);
99 /* Start per-CPU event timers. */
102 /* Announce ourselves awake, and enter the scheduler */
107 cpu_mp_setmaxid(void)
109 struct cpuref cpuref;
114 error = platform_smp_first_cpu(&cpuref);
117 mp_maxid = max(cpuref.cr_cpuid, mp_maxid);
118 error = platform_smp_next_cpu(&cpuref);
130 * We're not going to enable SMP if there's only 1 processor.
132 return (mp_ncpus > 1);
138 struct cpuref bsp, cpu;
142 error = platform_smp_get_bsp(&bsp);
143 KASSERT(error == 0, ("Don't know BSP"));
145 error = platform_smp_first_cpu(&cpu);
147 if (cpu.cr_cpuid >= MAXCPU) {
148 printf("SMP: cpu%d: skipped -- ID out of range\n",
152 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) {
153 printf("SMP: cpu%d: skipped - duplicate ID\n",
157 if (cpu.cr_cpuid != bsp.cr_cpuid) {
160 pc = &__pcpu[cpu.cr_cpuid];
161 dpcpu = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE,
163 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc));
164 dpcpu_init(dpcpu, cpu.cr_cpuid);
167 pc->pc_cpuid = bsp.cr_cpuid;
170 pc->pc_hwref = cpu.cr_hwref;
171 CPU_SET(pc->pc_cpuid, &all_cpus);
173 error = platform_smp_next_cpu(&cpu);
178 cpu_mp_announce(void)
190 printf("cpu%d: dev=%x", i, (int)pc->pc_hwref);
198 cpu_mp_unleash(void *dummy)
206 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
213 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
217 printf("Waking up CPU %d (dev=%x)\n",
218 pc->pc_cpuid, (int)pc->pc_hwref);
220 platform_smp_start_cpu(pc);
222 timeout = 2000; /* wait 2sec for the AP */
223 while (!pc->pc_awake && --timeout > 0)
227 PCPU_SET(pir, mfspr(SPR_PIR));
232 printf("Adding CPU %d, pir=%x, awake=%x\n",
233 pc->pc_cpuid, pc->pc_pir, pc->pc_awake);
236 CPU_SET(pc->pc_cpuid, &stopped_cpus);
241 /* Provide our current DEC and TB values for APs */
242 ap_timebase = mftb() + 10;
243 __asm __volatile("msync; isync");
245 /* Let APs continue */
246 atomic_store_rel_int(&ap_letgo, 1);
248 platform_smp_timebase_sync(ap_timebase, 0);
250 while (ap_awake < smp_cpus)
253 if (smp_cpus != cpus || cpus != mp_ncpus) {
254 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
255 mp_ncpus, cpus, smp_cpus);
258 /* Let the APs get into the scheduler */
261 /* XXX Atomic set operation? */
265 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
268 powerpc_ipi_handler(void *arg)
274 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr());
276 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask));
278 return (FILTER_STRAY);
279 while ((msg = ffs(ipimask) - 1) != -1) {
280 ipimask &= ~(1u << msg);
284 CTR1(KTR_SMP, "%s: IPI_AST", __func__);
287 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
288 sched_preempt(curthread);
291 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__);
292 smp_rendezvous_action();
297 * IPI_STOP_HARD is mapped to IPI_STOP so it is not
298 * necessary to add such case in the switch.
300 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)",
302 cpuid = PCPU_GET(cpuid);
303 savectx(&stoppcbs[cpuid]);
304 savectx(PCPU_GET(curpcb));
305 CPU_SET_ATOMIC(cpuid, &stopped_cpus);
306 while (!CPU_ISSET(cpuid, &started_cpus))
308 CPU_CLR_ATOMIC(cpuid, &stopped_cpus);
309 CPU_CLR_ATOMIC(cpuid, &started_cpus);
310 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__);
313 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
319 return (FILTER_HANDLED);
323 ipi_send(struct pcpu *pc, int ipi)
326 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__,
327 pc, pc->pc_cpuid, ipi);
329 atomic_set_32(&pc->pc_ipimask, (1 << ipi));
331 PIC_IPI(root_pic, pc->pc_cpuid);
333 CTR1(KTR_SMP, "%s: sent", __func__);
336 /* Send an IPI to a set of cpus. */
338 ipi_selected(cpuset_t cpus, int ipi)
342 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
343 if (CPU_ISSET(pc->pc_cpuid, &cpus))
348 /* Send an IPI to a specific CPU. */
350 ipi_cpu(int cpu, u_int ipi)
353 ipi_send(cpuid_to_pcpu[cpu], ipi);
356 /* Send an IPI to all CPUs EXCEPT myself. */
358 ipi_all_but_self(int ipi)
362 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {