2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008 Marcel Moolenaar
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
37 #include <sys/cpuset.h>
38 #include <sys/domainset.h>
40 #include <sys/malloc.h>
41 #include <sys/mutex.h>
44 #include <sys/sched.h>
48 #include <vm/vm_param.h>
50 #include <vm/vm_map.h>
51 #include <vm/vm_extern.h>
52 #include <vm/vm_kern.h>
54 #include <machine/bus.h>
55 #include <machine/cpu.h>
56 #include <machine/intr_machdep.h>
57 #include <machine/pcb.h>
58 #include <machine/platform.h>
59 #include <machine/md_var.h>
60 #include <machine/setjmp.h>
61 #include <machine/smp.h>
65 volatile static int ap_awake;
66 volatile static u_int ap_letgo;
67 volatile static u_quad_t ap_timebase;
68 static u_int ipi_msg_cnt[32];
69 static struct mtx ap_boot_mtx;
70 struct pcb stoppcbs[MAXCPU];
73 machdep_ap_bootstrap(void)
77 __asm __volatile("msync; isync");
84 * Set timebase as soon as possible to meet an implicit rendezvous
85 * from cpu_mp_unleash(), which sets ap_letgo and then immediately
88 * Note that this is instrinsically racy and is only relevant on
89 * platforms that do not support better mechanisms.
91 platform_smp_timebase_sync(ap_timebase, 1);
93 /* Give platform code a chance to do anything else necessary */
94 platform_smp_ap_init();
96 /* Initialize decrementer */
99 /* Serialize console output and AP count increment */
100 mtx_lock_spin(&ap_boot_mtx);
103 printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid));
105 printf("%s%d%s", ap_awake == 2 ? "Launching APs: " : "",
106 PCPU_GET(cpuid), ap_awake == mp_ncpus ? "\n" : " ");
107 mtx_unlock_spin(&ap_boot_mtx);
109 while(smp_started == 0)
112 /* Start per-CPU event timers. */
115 /* Announce ourselves awake, and enter the scheduler */
120 cpu_mp_setmaxid(void)
122 struct cpuref cpuref;
127 error = platform_smp_first_cpu(&cpuref);
130 mp_maxid = max(cpuref.cr_cpuid, mp_maxid);
131 error = platform_smp_next_cpu(&cpuref);
143 * We're not going to enable SMP if there's only 1 processor.
145 return (mp_ncpus > 1);
151 struct cpuref bsp, cpu;
155 error = platform_smp_get_bsp(&bsp);
156 KASSERT(error == 0, ("Don't know BSP"));
158 error = platform_smp_first_cpu(&cpu);
160 if (cpu.cr_cpuid >= MAXCPU) {
161 printf("SMP: cpu%d: skipped -- ID out of range\n",
165 if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) {
166 printf("SMP: cpu%d: skipped - duplicate ID\n",
172 domain = cpu.cr_domain;
176 if (cpu.cr_cpuid != bsp.cr_cpuid) {
179 pc = &__pcpu[cpu.cr_cpuid];
180 dpcpu = (void *)kmem_malloc_domainset(DOMAINSET_PREF(domain),
181 DPCPU_SIZE, M_WAITOK | M_ZERO);
182 pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc));
183 dpcpu_init(dpcpu, cpu.cr_cpuid);
186 pc->pc_cpuid = bsp.cr_cpuid;
189 pc->pc_domain = domain;
190 pc->pc_hwref = cpu.cr_hwref;
192 CPU_SET(pc->pc_cpuid, &cpuset_domain[pc->pc_domain]);
193 KASSERT(pc->pc_domain < MAXMEMDOM, ("bad domain value %d\n",
195 CPU_SET(pc->pc_cpuid, &all_cpus);
197 error = platform_smp_next_cpu(&cpu);
201 platform_smp_probe_threads();
206 cpu_mp_announce(void)
218 printf("cpu%d: dev=%x domain=%d ", i, (int)pc->pc_hwref, pc->pc_domain);
226 cpu_mp_unleash(void *dummy)
235 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
242 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
246 printf("Waking up CPU %d (dev=%x)\n",
247 pc->pc_cpuid, (int)pc->pc_hwref);
249 ret = platform_smp_start_cpu(pc);
251 timeout = 2000; /* wait 2sec for the AP */
252 while (!pc->pc_awake && --timeout > 0)
260 printf("Adding CPU %d, hwref=%jx, awake=%x\n",
261 pc->pc_cpuid, (uintmax_t)pc->pc_hwref,
265 CPU_SET(pc->pc_cpuid, &stopped_cpus);
270 /* Provide our current DEC and TB values for APs */
271 ap_timebase = mftb() + 10;
272 __asm __volatile("msync; isync");
274 /* Let APs continue */
275 atomic_store_rel_int(&ap_letgo, 1);
277 platform_smp_timebase_sync(ap_timebase, 0);
279 while (ap_awake < smp_cpus)
282 if (smp_cpus != cpus || cpus != mp_ncpus) {
283 printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
284 mp_ncpus, cpus, smp_cpus);
288 atomic_store_rel_int(&smp_started, 1);
290 /* Let the APs get into the scheduler */
295 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
298 powerpc_ipi_handler(void *arg)
304 CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr());
306 ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask));
308 return (FILTER_STRAY);
309 while ((msg = ffs(ipimask) - 1) != -1) {
310 ipimask &= ~(1u << msg);
314 CTR1(KTR_SMP, "%s: IPI_AST", __func__);
317 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
318 sched_preempt(curthread);
321 CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__);
322 smp_rendezvous_action();
327 * IPI_STOP_HARD is mapped to IPI_STOP so it is not
328 * necessary to add such case in the switch.
330 CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)",
332 cpuid = PCPU_GET(cpuid);
333 savectx(&stoppcbs[cpuid]);
334 CPU_SET_ATOMIC(cpuid, &stopped_cpus);
335 while (!CPU_ISSET(cpuid, &started_cpus))
337 CPU_CLR_ATOMIC(cpuid, &stopped_cpus);
338 CPU_CLR_ATOMIC(cpuid, &started_cpus);
339 CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__);
342 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
348 return (FILTER_HANDLED);
352 ipi_send(struct pcpu *pc, int ipi)
355 CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__,
356 pc, pc->pc_cpuid, ipi);
358 atomic_set_32(&pc->pc_ipimask, (1 << ipi));
360 PIC_IPI(root_pic, pc->pc_cpuid);
362 CTR1(KTR_SMP, "%s: sent", __func__);
365 /* Send an IPI to a set of cpus. */
367 ipi_selected(cpuset_t cpus, int ipi)
371 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
372 if (CPU_ISSET(pc->pc_cpuid, &cpus))
377 /* Send an IPI to a specific CPU. */
379 ipi_cpu(int cpu, u_int ipi)
382 ipi_send(cpuid_to_pcpu[cpu], ipi);
385 /* Send an IPI to all CPUs EXCEPT myself. */
387 ipi_all_but_self(int ipi)
391 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {