sys/powerpc/powerpc/trap.c

   1 /*-
   2  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   3  * Copyright (C) 1995, 1996 TooLs GmbH.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. All advertising materials mentioning features or use of this software
  15  *    must display the following acknowledgement:
  16  *      This product includes software developed by TooLs GmbH.
  17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
  32  */
  33
  34 #include <sys/cdefs.h>
  35 __FBSDID("$FreeBSD$");
  36
  37 #include <sys/param.h>
  38 #include <sys/kdb.h>
  39 #include <sys/proc.h>
  40 #include <sys/ktr.h>
  41 #include <sys/lock.h>
  42 #include <sys/mutex.h>
  43 #include <sys/pioctl.h>
  44 #include <sys/ptrace.h>
  45 #include <sys/reboot.h>
  46 #include <sys/syscall.h>
  47 #include <sys/sysent.h>
  48 #include <sys/systm.h>
  49 #include <sys/kernel.h>
  50 #include <sys/uio.h>
  51 #include <sys/signalvar.h>
  52 #include <sys/vmmeter.h>
  53
  54 #include <security/audit/audit.h>
  55
  56 #include <vm/vm.h>
  57 #include <vm/pmap.h>
  58 #include <vm/vm_extern.h>
  59 #include <vm/vm_param.h>
  60 #include <vm/vm_kern.h>
  61 #include <vm/vm_map.h>
  62 #include <vm/vm_page.h>
  63
  64 #include <machine/_inttypes.h>
  65 #include <machine/altivec.h>
  66 #include <machine/cpu.h>
  67 #include <machine/db_machdep.h>
  68 #include <machine/fpu.h>
  69 #include <machine/frame.h>
  70 #include <machine/pcb.h>
  71 #include <machine/psl.h>
  72 #include <machine/trap.h>
  73 #include <machine/spr.h>
  74 #include <machine/sr.h>
  75
  76 /* Below matches setjmp.S */
  77 #define FAULTBUF_LR     21
  78 #define FAULTBUF_R1     1
  79 #define FAULTBUF_R2     2
  80 #define FAULTBUF_CR     22
  81 #define FAULTBUF_R14    3
  82
  83 #define MOREARGS(sp)    ((caddr_t)((uintptr_t)(sp) + \
  84     sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
  85
  86 static void     trap_fatal(struct trapframe *frame);
  87 static void     printtrap(u_int vector, struct trapframe *frame, int isfatal,
  88                     int user);
  89 static int      trap_pfault(struct trapframe *frame, int user);
  90 static int      fix_unaligned(struct thread *td, struct trapframe *frame);
  91 static int      handle_onfault(struct trapframe *frame);
  92 static void     syscall(struct trapframe *frame);
  93
  94 #if defined(__powerpc64__) && defined(AIM)
  95        void     handle_kernel_slb_spill(int, register_t, register_t);
  96 static int      handle_user_slb_spill(pmap_t pm, vm_offset_t addr);
  97 extern int      n_slbs;
  98 #endif
  99
 100 #ifdef KDB
 101 int db_trap_glue(struct trapframe *);           /* Called from trap_subr.S */
 102 #endif
 103
 104 struct powerpc_exception {
 105         u_int   vector;
 106         char    *name;
 107 };
 108
 109 #ifdef KDTRACE_HOOKS
 110 #include <sys/dtrace_bsd.h>
 111
 112 int (*dtrace_invop_jump_addr)(struct trapframe *);
 113 #endif
 114
 115 static struct powerpc_exception powerpc_exceptions[] = {
 116         { EXC_CRIT,     "critical input" },
 117         { EXC_RST,      "system reset" },
 118         { EXC_MCHK,     "machine check" },
 119         { EXC_DSI,      "data storage interrupt" },
 120         { EXC_DSE,      "data segment exception" },
 121         { EXC_ISI,      "instruction storage interrupt" },
 122         { EXC_ISE,      "instruction segment exception" },
 123         { EXC_EXI,      "external interrupt" },
 124         { EXC_ALI,      "alignment" },
 125         { EXC_PGM,      "program" },
 126         { EXC_FPU,      "floating-point unavailable" },
 127         { EXC_APU,      "auxiliary proc unavailable" },
 128         { EXC_DECR,     "decrementer" },
 129         { EXC_FIT,      "fixed-interval timer" },
 130         { EXC_WDOG,     "watchdog timer" },
 131         { EXC_SC,       "system call" },
 132         { EXC_TRC,      "trace" },
 133         { EXC_FPA,      "floating-point assist" },
 134         { EXC_DEBUG,    "debug" },
 135         { EXC_PERF,     "performance monitoring" },
 136         { EXC_VEC,      "altivec unavailable" },
 137         { EXC_VSX,      "vsx unavailable" },
 138         { EXC_ITMISS,   "instruction tlb miss" },
 139         { EXC_DLMISS,   "data load tlb miss" },
 140         { EXC_DSMISS,   "data store tlb miss" },
 141         { EXC_BPT,      "instruction breakpoint" },
 142         { EXC_SMI,      "system management" },
 143         { EXC_VECAST_G4,        "altivec assist" },
 144         { EXC_THRM,     "thermal management" },
 145         { EXC_RUNMODETRC,       "run mode/trace" },
 146         { EXC_LAST,     NULL }
 147 };
 148
 149 static const char *
 150 trapname(u_int vector)
 151 {
 152         struct  powerpc_exception *pe;
 153
 154         for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
 155                 if (pe->vector == vector)
 156                         return (pe->name);
 157         }
 158
 159         return ("unknown");
 160 }
 161
 162 void
 163 trap(struct trapframe *frame)
 164 {
 165         struct thread   *td;
 166         struct proc     *p;
 167 #ifdef KDTRACE_HOOKS
 168         uint32_t inst;
 169 #endif
 170         int             sig, type, user;
 171         u_int           ucode;
 172         ksiginfo_t      ksi;
 173
 174         VM_CNT_INC(v_trap);
 175
 176         td = curthread;
 177         p = td->td_proc;
 178
 179         type = ucode = frame->exc;
 180         sig = 0;
 181         user = frame->srr1 & PSL_PR;
 182
 183         CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
 184             trapname(type), user ? "user" : "kernel");
 185
 186 #ifdef KDTRACE_HOOKS
 187         /*
 188          * A trap can occur while DTrace executes a probe. Before
 189          * executing the probe, DTrace blocks re-scheduling and sets
 190          * a flag in its per-cpu flags to indicate that it doesn't
 191          * want to fault. On returning from the probe, the no-fault
 192          * flag is cleared and finally re-scheduling is enabled.
 193          *
 194          * If the DTrace kernel module has registered a trap handler,
 195          * call it and if it returns non-zero, assume that it has
 196          * handled the trap and modified the trap frame so that this
 197          * function can return normally.
 198          */
 199         if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
 200                 return;
 201 #endif
 202
 203         if (user) {
 204                 td->td_pticks = 0;
 205                 td->td_frame = frame;
 206                 if (td->td_cowgen != p->p_cowgen)
 207                         thread_cow_update(td);
 208
 209                 /* User Mode Traps */
 210                 switch (type) {
 211                 case EXC_RUNMODETRC:
 212                 case EXC_TRC:
 213                         frame->srr1 &= ~PSL_SE;
 214                         sig = SIGTRAP;
 215                         ucode = TRAP_TRACE;
 216                         break;
 217
 218 #if defined(__powerpc64__) && defined(AIM)
 219                 case EXC_ISE:
 220                 case EXC_DSE:
 221                         if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
 222                             (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
 223                                 sig = SIGSEGV;
 224                                 ucode = SEGV_MAPERR;
 225                         }
 226                         break;
 227 #endif
 228                 case EXC_DSI:
 229                 case EXC_ISI:
 230                         sig = trap_pfault(frame, 1);
 231                         if (sig == SIGSEGV)
 232                                 ucode = SEGV_MAPERR;
 233                         break;
 234
 235                 case EXC_SC:
 236                         syscall(frame);
 237                         break;
 238
 239                 case EXC_FPU:
 240                         KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
 241                             ("FPU already enabled for thread"));
 242                         enable_fpu(td);
 243                         break;
 244
 245                 case EXC_VEC:
 246                         KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
 247                             ("Altivec already enabled for thread"));
 248                         enable_vec(td);
 249                         break;
 250
 251                 case EXC_VSX:
 252                         KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
 253                             ("VSX already enabled for thread"));
 254                         if (!(td->td_pcb->pcb_flags & PCB_VEC))
 255                                 enable_vec(td);
 256                         if (!(td->td_pcb->pcb_flags & PCB_FPU))
 257                                 save_fpu(td);
 258                         td->td_pcb->pcb_flags |= PCB_VSX;
 259                         enable_fpu(td);
 260                         break;
 261
 262                 case EXC_VECAST_E:
 263                 case EXC_VECAST_G4:
 264                 case EXC_VECAST_G5:
 265                         /*
 266                          * We get a VPU assist exception for IEEE mode
 267                          * vector operations on denormalized floats.
 268                          * Emulating this is a giant pain, so for now,
 269                          * just switch off IEEE mode and treat them as
 270                          * zero.
 271                          */
 272
 273                         save_vec(td);
 274                         td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
 275                         enable_vec(td);
 276                         break;
 277
 278                 case EXC_ALI:
 279                         if (fix_unaligned(td, frame) != 0) {
 280                                 sig = SIGBUS;
 281                                 ucode = BUS_ADRALN;
 282                         }
 283                         else
 284                                 frame->srr0 += 4;
 285                         break;
 286
 287                 case EXC_DEBUG: /* Single stepping */
 288                         mtspr(SPR_DBSR, mfspr(SPR_DBSR));
 289                         frame->srr1 &= ~PSL_DE;
 290                         frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
 291                         sig = SIGTRAP;
 292                         ucode = TRAP_TRACE;
 293                         break;
 294
 295                 case EXC_PGM:
 296                         /* Identify the trap reason */
 297 #ifdef AIM
 298                         if (frame->srr1 & EXC_PGM_TRAP) {
 299 #else
 300                         if (frame->cpu.booke.esr & ESR_PTR) {
 301 #endif
 302 #ifdef KDTRACE_HOOKS
 303                                 inst = fuword32((const void *)frame->srr0);
 304                                 if (inst == 0x0FFFDDDD &&
 305                                     dtrace_pid_probe_ptr != NULL) {
 306                                         struct reg regs;
 307                                         fill_regs(td, &regs);
 308                                         (*dtrace_pid_probe_ptr)(&regs);
 309                                         break;
 310                                 }
 311 #endif
 312                                 sig = SIGTRAP;
 313                                 ucode = TRAP_BRKPT;
 314                         } else {
 315                                 sig = ppc_instr_emulate(frame, td->td_pcb);
 316                                 if (sig == SIGILL) {
 317                                         if (frame->srr1 & EXC_PGM_PRIV)
 318                                                 ucode = ILL_PRVOPC;
 319                                         else if (frame->srr1 & EXC_PGM_ILLEGAL)
 320                                                 ucode = ILL_ILLOPC;
 321                                 } else if (sig == SIGFPE)
 322                                         ucode = FPE_FLTINV;     /* Punt for now, invalid operation. */
 323                         }
 324                         break;
 325
 326                 case EXC_MCHK:
 327                         /*
 328                          * Note that this may not be recoverable for the user
 329                          * process, depending on the type of machine check,
 330                          * but it at least prevents the kernel from dying.
 331                          */
 332                         sig = SIGBUS;
 333                         ucode = BUS_OBJERR;
 334                         break;
 335
 336                 default:
 337                         trap_fatal(frame);
 338                 }
 339         } else {
 340                 /* Kernel Mode Traps */
 341
 342                 KASSERT(cold || td->td_ucred != NULL,
 343                     ("kernel trap doesn't have ucred"));
 344                 switch (type) {
 345                 case EXC_PGM:
 346 #ifdef KDTRACE_HOOKS
 347 #ifdef AIM
 348                         if (frame->srr1 & EXC_PGM_TRAP) {
 349 #else
 350                         if (frame->cpu.booke.esr & ESR_PTR) {
 351 #endif
 352                                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
 353                                         if (dtrace_invop_jump_addr != NULL) {
 354                                                 dtrace_invop_jump_addr(frame);
 355                                                 return;
 356                                         }
 357                                 }
 358                         }
 359 #endif
 360 #ifdef KDB
 361                         if (db_trap_glue(frame))
 362                                 return;
 363 #endif
 364                         break;
 365 #if defined(__powerpc64__) && defined(AIM)
 366                 case EXC_DSE:
 367                         if ((frame->dar & SEGMENT_MASK) == USER_ADDR) {
 368                                 __asm __volatile ("slbmte %0, %1" ::
 369                                         "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
 370                                         "r"(USER_SLB_SLBE));
 371                                 return;
 372                         }
 373                         break;
 374 #endif
 375                 case EXC_DSI:
 376                         if (trap_pfault(frame, 0) == 0)
 377                                 return;
 378                         break;
 379                 case EXC_MCHK:
 380                         if (handle_onfault(frame))
 381                                 return;
 382                         break;
 383                 default:
 384                         break;
 385                 }
 386                 trap_fatal(frame);
 387         }
 388
 389         if (sig != 0) {
 390                 if (p->p_sysent->sv_transtrap != NULL)
 391                         sig = (p->p_sysent->sv_transtrap)(sig, type);
 392                 ksiginfo_init_trap(&ksi);
 393                 ksi.ksi_signo = sig;
 394                 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
 395                 /* ksi.ksi_addr = ? */
 396                 ksi.ksi_trapno = type;
 397                 trapsignal(td, &ksi);
 398         }
 399
 400         userret(td, frame);
 401 }
 402
 403 static void
 404 trap_fatal(struct trapframe *frame)
 405 {
 406
 407         printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
 408 #ifdef KDB
 409         if ((debugger_on_panic || kdb_active) &&
 410             kdb_trap(frame->exc, 0, frame))
 411                 return;
 412 #endif
 413         panic("%s trap", trapname(frame->exc));
 414 }
 415
 416 static void
 417 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 418 {
 419         uint16_t ver;
 420 #ifdef BOOKE
 421         vm_paddr_t pa;
 422 #endif
 423
 424         printf("\n");
 425         printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
 426             user ? "user" : "kernel");
 427         printf("\n");
 428         printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
 429         switch (vector) {
 430         case EXC_DSE:
 431         case EXC_DSI:
 432         case EXC_DTMISS:
 433                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
 434 #ifdef AIM
 435                 printf("   dsisr           = 0x%lx\n",
 436                     (u_long)frame->cpu.aim.dsisr);
 437 #endif
 438                 break;
 439         case EXC_ISE:
 440         case EXC_ISI:
 441         case EXC_ITMISS:
 442                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
 443                 break;
 444         case EXC_MCHK:
 445                 ver = mfpvr() >> 16;
 446 #if defined(AIM)
 447                 if (MPC745X_P(ver))
 448                         printf("    msssr0         = 0x%lx\n",
 449                             (u_long)mfspr(SPR_MSSSR0));
 450 #elif defined(BOOKE)
 451                 pa = mfspr(SPR_MCARU);
 452                 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
 453                 printf("   mcsr            = 0x%lx\n", (u_long)mfspr(SPR_MCSR));
 454                 printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
 455 #endif
 456                 break;
 457         }
 458 #ifdef BOOKE
 459         printf("   esr             = 0x%" PRIxPTR "\n",
 460             frame->cpu.booke.esr);
 461 #endif
 462         printf("   srr0            = 0x%" PRIxPTR "\n", frame->srr0);
 463         printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
 464         printf("   lr              = 0x%" PRIxPTR "\n", frame->lr);
 465         printf("   curthread       = %p\n", curthread);
 466         if (curthread != NULL)
 467                 printf("          pid = %d, comm = %s\n",
 468                     curthread->td_proc->p_pid, curthread->td_name);
 469         printf("\n");
 470 }
 471
 472 /*
 473  * Handles a fatal fault when we have onfault state to recover.  Returns
 474  * non-zero if there was onfault recovery state available.
 475  */
 476 static int
 477 handle_onfault(struct trapframe *frame)
 478 {
 479         struct          thread *td;
 480         jmp_buf         *fb;
 481
 482         td = curthread;
 483         fb = td->td_pcb->pcb_onfault;
 484         if (fb != NULL) {
 485                 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
 486                 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
 487                 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
 488                 frame->fixreg[3] = 1;
 489                 frame->cr = (*fb)->_jb[FAULTBUF_CR];
 490                 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
 491                     18 * sizeof(register_t));
 492                 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
 493                 return (1);
 494         }
 495         return (0);
 496 }
 497
 498 int
 499 cpu_fetch_syscall_args(struct thread *td, struct syscall_args *sa)
 500 {
 501         struct proc *p;
 502         struct trapframe *frame;
 503         caddr_t params;
 504         size_t argsz;
 505         int error, n, i;
 506
 507         p = td->td_proc;
 508         frame = td->td_frame;
 509
 510         sa->code = frame->fixreg[0];
 511         params = (caddr_t)(frame->fixreg + FIRSTARG);
 512         n = NARGREG;
 513
 514         if (sa->code == SYS_syscall) {
 515                 /*
 516                  * code is first argument,
 517                  * followed by actual args.
 518                  */
 519                 sa->code = *(register_t *) params;
 520                 params += sizeof(register_t);
 521                 n -= 1;
 522         } else if (sa->code == SYS___syscall) {
 523                 /*
 524                  * Like syscall, but code is a quad,
 525                  * so as to maintain quad alignment
 526                  * for the rest of the args.
 527                  */
 528                 if (SV_PROC_FLAG(p, SV_ILP32)) {
 529                         params += sizeof(register_t);
 530                         sa->code = *(register_t *) params;
 531                         params += sizeof(register_t);
 532                         n -= 2;
 533                 } else {
 534                         sa->code = *(register_t *) params;
 535                         params += sizeof(register_t);
 536                         n -= 1;
 537                 }
 538         }
 539
 540         if (p->p_sysent->sv_mask)
 541                 sa->code &= p->p_sysent->sv_mask;
 542         if (sa->code >= p->p_sysent->sv_size)
 543                 sa->callp = &p->p_sysent->sv_table[0];
 544         else
 545                 sa->callp = &p->p_sysent->sv_table[sa->code];
 546
 547         sa->narg = sa->callp->sy_narg;
 548
 549         if (SV_PROC_FLAG(p, SV_ILP32)) {
 550                 argsz = sizeof(uint32_t);
 551
 552                 for (i = 0; i < n; i++)
 553                         sa->args[i] = ((u_register_t *)(params))[i] &
 554                             0xffffffff;
 555         } else {
 556                 argsz = sizeof(uint64_t);
 557
 558                 for (i = 0; i < n; i++)
 559                         sa->args[i] = ((u_register_t *)(params))[i];
 560         }
 561
 562         if (sa->narg > n)
 563                 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
 564                                (sa->narg - n) * argsz);
 565         else
 566                 error = 0;
 567
 568 #ifdef __powerpc64__
 569         if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
 570                 /* Expand the size of arguments copied from the stack */
 571
 572                 for (i = sa->narg; i >= n; i--)
 573                         sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
 574         }
 575 #endif
 576
 577         if (error == 0) {
 578                 td->td_retval[0] = 0;
 579                 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
 580         }
 581         return (error);
 582 }
 583
 584 #include "../../kern/subr_syscall.c"
 585
 586 void
 587 syscall(struct trapframe *frame)
 588 {
 589         struct thread *td;
 590         struct syscall_args sa;
 591         int error;
 592
 593         td = curthread;
 594         td->td_frame = frame;
 595
 596 #if defined(__powerpc64__) && defined(AIM)
 597         /*
 598          * Speculatively restore last user SLB segment, which we know is
 599          * invalid already, since we are likely to do copyin()/copyout().
 600          */
 601         __asm __volatile ("slbmte %0, %1; isync" ::
 602             "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
 603 #endif
 604
 605         error = syscallenter(td, &sa);
 606         syscallret(td, error, &sa);
 607 }
 608
 609 #if defined(__powerpc64__) && defined(AIM)
 610 /* Handle kernel SLB faults -- runs in real mode, all seat belts off */
 611 void
 612 handle_kernel_slb_spill(int type, register_t dar, register_t srr0)
 613 {
 614         struct slb *slbcache;
 615         uint64_t slbe, slbv;
 616         uint64_t esid, addr;
 617         int i;
 618
 619         addr = (type == EXC_ISE) ? srr0 : dar;
 620         slbcache = PCPU_GET(slb);
 621         esid = (uintptr_t)addr >> ADDR_SR_SHFT;
 622         slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID;
 623
 624         /* See if the hardware flushed this somehow (can happen in LPARs) */
 625         for (i = 0; i < n_slbs; i++)
 626                 if (slbcache[i].slbe == (slbe | (uint64_t)i))
 627                         return;
 628
 629         /* Not in the map, needs to actually be added */
 630         slbv = kernel_va_to_slbv(addr);
 631         if (slbcache[USER_SLB_SLOT].slbe == 0) {
 632                 for (i = 0; i < n_slbs; i++) {
 633                         if (i == USER_SLB_SLOT)
 634                                 continue;
 635                         if (!(slbcache[i].slbe & SLBE_VALID))
 636                                 goto fillkernslb;
 637                 }
 638
 639                 if (i == n_slbs)
 640                         slbcache[USER_SLB_SLOT].slbe = 1;
 641         }
 642
 643         /* Sacrifice a random SLB entry that is not the user entry */
 644         i = mftb() % n_slbs;
 645         if (i == USER_SLB_SLOT)
 646                 i = (i+1) % n_slbs;
 647
 648 fillkernslb:
 649         /* Write new entry */
 650         slbcache[i].slbv = slbv;
 651         slbcache[i].slbe = slbe | (uint64_t)i;
 652
 653         /* Trap handler will restore from cache on exit */
 654 }
 655
 656 static int
 657 handle_user_slb_spill(pmap_t pm, vm_offset_t addr)
 658 {
 659         struct slb *user_entry;
 660         uint64_t esid;
 661         int i;
 662
 663         esid = (uintptr_t)addr >> ADDR_SR_SHFT;
 664
 665         PMAP_LOCK(pm);
 666         user_entry = user_va_to_slb_entry(pm, addr);
 667
 668         if (user_entry == NULL) {
 669                 /* allocate_vsid auto-spills it */
 670                 (void)allocate_user_vsid(pm, esid, 0);
 671         } else {
 672                 /*
 673                  * Check that another CPU has not already mapped this.
 674                  * XXX: Per-thread SLB caches would be better.
 675                  */
 676                 for (i = 0; i < pm->pm_slb_len; i++)
 677                         if (pm->pm_slb[i] == user_entry)
 678                                 break;
 679
 680                 if (i == pm->pm_slb_len)
 681                         slb_insert_user(pm, user_entry);
 682         }
 683         PMAP_UNLOCK(pm);
 684
 685         return (0);
 686 }
 687 #endif
 688
 689 static int
 690 trap_pfault(struct trapframe *frame, int user)
 691 {
 692         vm_offset_t     eva, va;
 693         struct          thread *td;
 694         struct          proc *p;
 695         vm_map_t        map;
 696         vm_prot_t       ftype;
 697         int             rv;
 698 #ifdef AIM
 699         register_t      user_sr;
 700 #endif
 701
 702         td = curthread;
 703         p = td->td_proc;
 704         if (frame->exc == EXC_ISI) {
 705                 eva = frame->srr0;
 706                 ftype = VM_PROT_EXECUTE;
 707                 if (frame->srr1 & SRR1_ISI_PFAULT)
 708                         ftype |= VM_PROT_READ;
 709         } else {
 710                 eva = frame->dar;
 711 #ifdef BOOKE
 712                 if (frame->cpu.booke.esr & ESR_ST)
 713 #else
 714                 if (frame->cpu.aim.dsisr & DSISR_STORE)
 715 #endif
 716                         ftype = VM_PROT_WRITE;
 717                 else
 718                         ftype = VM_PROT_READ;
 719         }
 720
 721         if (user) {
 722                 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace  NULL"));
 723                 map = &p->p_vmspace->vm_map;
 724         } else {
 725 #ifdef BOOKE
 726                 if (eva < VM_MAXUSER_ADDRESS) {
 727 #else
 728                 if ((eva >> ADDR_SR_SHFT) == (USER_ADDR >> ADDR_SR_SHFT)) {
 729 #endif
 730                         map = &p->p_vmspace->vm_map;
 731
 732 #ifdef AIM
 733                         user_sr = td->td_pcb->pcb_cpu.aim.usr_segm;
 734                         eva &= ADDR_PIDX | ADDR_POFF;
 735                         eva |= user_sr << ADDR_SR_SHFT;
 736 #endif
 737                 } else {
 738                         map = kernel_map;
 739                 }
 740         }
 741         va = trunc_page(eva);
 742
 743         /* Fault in the page. */
 744         rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
 745         /*
 746          * XXXDTRACE: add dtrace_doubletrap_func here?
 747          */
 748
 749         if (rv == KERN_SUCCESS)
 750                 return (0);
 751
 752         if (!user && handle_onfault(frame))
 753                 return (0);
 754
 755         return (SIGSEGV);
 756 }
 757
 758 /*
 759  * For now, this only deals with the particular unaligned access case
 760  * that gcc tends to generate.  Eventually it should handle all of the
 761  * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
 762  */
 763
 764 static int
 765 fix_unaligned(struct thread *td, struct trapframe *frame)
 766 {
 767         struct thread   *fputhread;
 768 #ifdef  __SPE__
 769         uint32_t        inst;
 770 #endif
 771         int             indicator, reg;
 772         double          *fpr;
 773
 774 #ifdef __SPE__
 775         indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
 776         if (indicator & ESR_SPE) {
 777                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 778                         return (-1);
 779                 reg = EXC_ALI_SPE_REG(inst);
 780                 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
 781                 fputhread = PCPU_GET(vecthread);
 782
 783                 /* Juggle the SPE to ensure that we've initialized
 784                  * the registers, and that their current state is in
 785                  * the PCB.
 786                  */
 787                 if (fputhread != td) {
 788                         if (fputhread)
 789                                 save_vec(fputhread);
 790                         enable_vec(td);
 791                 }
 792                 save_vec(td);
 793
 794                 if (!(indicator & ESR_ST)) {
 795                         if (copyin((void *)frame->dar, fpr,
 796                             sizeof(double)) != 0)
 797                                 return (-1);
 798                         frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
 799                         enable_vec(td);
 800                 } else {
 801                         td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
 802                         if (copyout(fpr, (void *)frame->dar,
 803                             sizeof(double)) != 0)
 804                                 return (-1);
 805                 }
 806                 return (0);
 807         }
 808 #else
 809         indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
 810
 811         switch (indicator) {
 812         case EXC_ALI_LFD:
 813         case EXC_ALI_STFD:
 814                 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
 815                 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
 816                 fputhread = PCPU_GET(fputhread);
 817
 818                 /* Juggle the FPU to ensure that we've initialized
 819                  * the FPRs, and that their current state is in
 820                  * the PCB.
 821                  */
 822                 if (fputhread != td) {
 823                         if (fputhread)
 824                                 save_fpu(fputhread);
 825                         enable_fpu(td);
 826                 }
 827                 save_fpu(td);
 828
 829                 if (indicator == EXC_ALI_LFD) {
 830                         if (copyin((void *)frame->dar, fpr,
 831                             sizeof(double)) != 0)
 832                                 return (-1);
 833                         enable_fpu(td);
 834                 } else {
 835                         if (copyout(fpr, (void *)frame->dar,
 836                             sizeof(double)) != 0)
 837                                 return (-1);
 838                 }
 839                 return (0);
 840                 break;
 841         }
 842 #endif
 843
 844         return (-1);
 845 }
 846
 847 #ifdef KDB
 848 int
 849 db_trap_glue(struct trapframe *frame)
 850 {
 851
 852         if (!(frame->srr1 & PSL_PR)
 853             && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
 854 #ifdef AIM
 855                 || (frame->exc == EXC_PGM
 856                     && (frame->srr1 & EXC_PGM_TRAP))
 857 #else
 858                 || (frame->exc == EXC_DEBUG)
 859                 || (frame->cpu.booke.esr & ESR_PTR)
 860 #endif
 861                 || frame->exc == EXC_BPT
 862                 || frame->exc == EXC_DSI)) {
 863                 int type = frame->exc;
 864
 865                 /* Ignore DTrace traps. */
 866                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
 867                         return (0);
 868 #ifdef AIM
 869                 if (type == EXC_PGM && (frame->srr1 & EXC_PGM_TRAP)) {
 870 #else
 871                 if (type == EXC_DEBUG ||
 872                     (frame->cpu.booke.esr & ESR_PTR)) {
 873 #endif
 874                         type = T_BREAKPOINT;
 875                 }
 876                 return (kdb_trap(type, 0, frame));
 877         }
 878
 879         return (0);
 880 }
 881 #endif