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1 /*-
2  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3  * Copyright (C) 1995, 1996 TooLs GmbH.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *      This product includes software developed by TooLs GmbH.
17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
32  */
33
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
36
37 #include <sys/param.h>
38 #include <sys/kdb.h>
39 #include <sys/proc.h>
40 #include <sys/ktr.h>
41 #include <sys/lock.h>
42 #include <sys/mutex.h>
43 #include <sys/pioctl.h>
44 #include <sys/ptrace.h>
45 #include <sys/reboot.h>
46 #include <sys/syscall.h>
47 #include <sys/sysent.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/uio.h>
51 #include <sys/signalvar.h>
52 #include <sys/vmmeter.h>
53
54 #include <security/audit/audit.h>
55
56 #include <vm/vm.h>
57 #include <vm/pmap.h>
58 #include <vm/vm_extern.h>
59 #include <vm/vm_param.h>
60 #include <vm/vm_kern.h>
61 #include <vm/vm_map.h>
62 #include <vm/vm_page.h>
63
64 #include <machine/_inttypes.h>
65 #include <machine/altivec.h>
66 #include <machine/cpu.h>
67 #include <machine/db_machdep.h>
68 #include <machine/fpu.h>
69 #include <machine/frame.h>
70 #include <machine/pcb.h>
71 #include <machine/psl.h>
72 #include <machine/trap.h>
73 #include <machine/spr.h>
74 #include <machine/sr.h>
75
76 /* Below matches setjmp.S */
77 #define FAULTBUF_LR     21
78 #define FAULTBUF_R1     1
79 #define FAULTBUF_R2     2
80 #define FAULTBUF_CR     22
81 #define FAULTBUF_R14    3
82
83 #define MOREARGS(sp)    ((caddr_t)((uintptr_t)(sp) + \
84     sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
85
86 static void     trap_fatal(struct trapframe *frame);
87 static void     printtrap(u_int vector, struct trapframe *frame, int isfatal,
88                     int user);
89 static int      trap_pfault(struct trapframe *frame, int user);
90 static int      fix_unaligned(struct thread *td, struct trapframe *frame);
91 static int      handle_onfault(struct trapframe *frame);
92 static void     syscall(struct trapframe *frame);
93
94 #if defined(__powerpc64__) && defined(AIM)
95        void     handle_kernel_slb_spill(int, register_t, register_t);
96 static int      handle_user_slb_spill(pmap_t pm, vm_offset_t addr);
97 extern int      n_slbs;
98 #endif
99
100 extern vm_offset_t __startkernel;
101
102 #ifdef KDB
103 int db_trap_glue(struct trapframe *);           /* Called from trap_subr.S */
104 #endif
105
106 struct powerpc_exception {
107         u_int   vector;
108         char    *name;
109 };
110
111 #ifdef KDTRACE_HOOKS
112 #include <sys/dtrace_bsd.h>
113
114 int (*dtrace_invop_jump_addr)(struct trapframe *);
115 #endif
116
117 static struct powerpc_exception powerpc_exceptions[] = {
118         { EXC_CRIT,     "critical input" },
119         { EXC_RST,      "system reset" },
120         { EXC_MCHK,     "machine check" },
121         { EXC_DSI,      "data storage interrupt" },
122         { EXC_DSE,      "data segment exception" },
123         { EXC_ISI,      "instruction storage interrupt" },
124         { EXC_ISE,      "instruction segment exception" },
125         { EXC_EXI,      "external interrupt" },
126         { EXC_ALI,      "alignment" },
127         { EXC_PGM,      "program" },
128         { EXC_HEA,      "hypervisor emulation assistance" },
129         { EXC_FPU,      "floating-point unavailable" },
130         { EXC_APU,      "auxiliary proc unavailable" },
131         { EXC_DECR,     "decrementer" },
132         { EXC_FIT,      "fixed-interval timer" },
133         { EXC_WDOG,     "watchdog timer" },
134         { EXC_SC,       "system call" },
135         { EXC_TRC,      "trace" },
136         { EXC_FPA,      "floating-point assist" },
137         { EXC_DEBUG,    "debug" },
138         { EXC_PERF,     "performance monitoring" },
139         { EXC_VEC,      "altivec unavailable" },
140         { EXC_VSX,      "vsx unavailable" },
141         { EXC_FAC,      "facility unavailable" },
142         { EXC_ITMISS,   "instruction tlb miss" },
143         { EXC_DLMISS,   "data load tlb miss" },
144         { EXC_DSMISS,   "data store tlb miss" },
145         { EXC_BPT,      "instruction breakpoint" },
146         { EXC_SMI,      "system management" },
147         { EXC_VECAST_G4,        "altivec assist" },
148         { EXC_THRM,     "thermal management" },
149         { EXC_RUNMODETRC,       "run mode/trace" },
150         { EXC_LAST,     NULL }
151 };
152
153 #define ESR_BITMASK                                                     \
154     "\20"                                                               \
155     "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP"               \
156     "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE"             \
157     "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23"          \
158     "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
159 #define MCSR_BITMASK                                                    \
160     "\20"                                                               \
161     "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7"      \
162     "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF"             \
163     "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23"            \
164     "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
165 #define MSSSR_BITMASK                                                   \
166     "\20"                                                               \
167     "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7"                  \
168     "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG"      \
169     "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23"        \
170     "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
171
172
173 static const char *
174 trapname(u_int vector)
175 {
176         struct  powerpc_exception *pe;
177
178         for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
179                 if (pe->vector == vector)
180                         return (pe->name);
181         }
182
183         return ("unknown");
184 }
185
186 static inline bool
187 frame_is_trap_inst(struct trapframe *frame)
188 {
189 #ifdef AIM
190         return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
191 #else
192         return (frame->exc == EXC_DEBUG || frame->cpu.booke.esr & ESR_PTR);
193 #endif
194 }
195
196 void
197 trap(struct trapframe *frame)
198 {
199         struct thread   *td;
200         struct proc     *p;
201 #ifdef KDTRACE_HOOKS
202         uint32_t inst;
203 #endif
204         int             sig, type, user;
205         u_int           ucode;
206         ksiginfo_t      ksi;
207
208         VM_CNT_INC(v_trap);
209
210         td = curthread;
211         p = td->td_proc;
212
213         type = ucode = frame->exc;
214         sig = 0;
215         user = frame->srr1 & PSL_PR;
216
217         CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
218             trapname(type), user ? "user" : "kernel");
219
220 #ifdef KDTRACE_HOOKS
221         /*
222          * A trap can occur while DTrace executes a probe. Before
223          * executing the probe, DTrace blocks re-scheduling and sets
224          * a flag in its per-cpu flags to indicate that it doesn't
225          * want to fault. On returning from the probe, the no-fault
226          * flag is cleared and finally re-scheduling is enabled.
227          *
228          * If the DTrace kernel module has registered a trap handler,
229          * call it and if it returns non-zero, assume that it has
230          * handled the trap and modified the trap frame so that this
231          * function can return normally.
232          */
233         if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
234                 return;
235 #endif
236
237         if (user) {
238                 td->td_pticks = 0;
239                 td->td_frame = frame;
240                 if (td->td_cowgen != p->p_cowgen)
241                         thread_cow_update(td);
242
243                 /* User Mode Traps */
244                 switch (type) {
245                 case EXC_RUNMODETRC:
246                 case EXC_TRC:
247                         frame->srr1 &= ~PSL_SE;
248                         sig = SIGTRAP;
249                         ucode = TRAP_TRACE;
250                         break;
251
252 #if defined(__powerpc64__) && defined(AIM)
253                 case EXC_ISE:
254                 case EXC_DSE:
255                         if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
256                             (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
257                                 sig = SIGSEGV;
258                                 ucode = SEGV_MAPERR;
259                         }
260                         break;
261 #endif
262                 case EXC_DSI:
263                 case EXC_ISI:
264                         sig = trap_pfault(frame, 1);
265                         if (sig == SIGSEGV)
266                                 ucode = SEGV_MAPERR;
267                         break;
268
269                 case EXC_SC:
270                         syscall(frame);
271                         break;
272
273                 case EXC_FPU:
274                         KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
275                             ("FPU already enabled for thread"));
276                         enable_fpu(td);
277                         break;
278
279                 case EXC_VEC:
280                         KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
281                             ("Altivec already enabled for thread"));
282                         enable_vec(td);
283                         break;
284
285                 case EXC_VSX:
286                         KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
287                             ("VSX already enabled for thread"));
288                         if (!(td->td_pcb->pcb_flags & PCB_VEC))
289                                 enable_vec(td);
290                         if (!(td->td_pcb->pcb_flags & PCB_FPU))
291                                 save_fpu(td);
292                         td->td_pcb->pcb_flags |= PCB_VSX;
293                         enable_fpu(td);
294                         break;
295
296                 case EXC_FAC:
297                         sig = SIGILL;
298                         ucode = ILL_ILLOPC;
299                         break;
300
301                 case EXC_VECAST_E:
302                 case EXC_VECAST_G4:
303                 case EXC_VECAST_G5:
304                         /*
305                          * We get a VPU assist exception for IEEE mode
306                          * vector operations on denormalized floats.
307                          * Emulating this is a giant pain, so for now,
308                          * just switch off IEEE mode and treat them as
309                          * zero.
310                          */
311
312                         save_vec(td);
313                         td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
314                         enable_vec(td);
315                         break;
316
317                 case EXC_ALI:
318                         if (fix_unaligned(td, frame) != 0) {
319                                 sig = SIGBUS;
320                                 ucode = BUS_ADRALN;
321                         }
322                         else
323                                 frame->srr0 += 4;
324                         break;
325
326                 case EXC_DEBUG: /* Single stepping */
327                         mtspr(SPR_DBSR, mfspr(SPR_DBSR));
328                         frame->srr1 &= ~PSL_DE;
329                         frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
330                         sig = SIGTRAP;
331                         ucode = TRAP_TRACE;
332                         break;
333
334                 case EXC_PGM:
335                         /* Identify the trap reason */
336                         if (frame_is_trap_inst(frame)) {
337 #ifdef KDTRACE_HOOKS
338                                 inst = fuword32((const void *)frame->srr0);
339                                 if (inst == 0x0FFFDDDD &&
340                                     dtrace_pid_probe_ptr != NULL) {
341                                         (*dtrace_pid_probe_ptr)(frame);
342                                         break;
343                                 }
344 #endif
345                                 sig = SIGTRAP;
346                                 ucode = TRAP_BRKPT;
347                         } else {
348                                 sig = ppc_instr_emulate(frame, td->td_pcb);
349                                 if (sig == SIGILL) {
350                                         if (frame->srr1 & EXC_PGM_PRIV)
351                                                 ucode = ILL_PRVOPC;
352                                         else if (frame->srr1 & EXC_PGM_ILLEGAL)
353                                                 ucode = ILL_ILLOPC;
354                                 } else if (sig == SIGFPE)
355                                         ucode = FPE_FLTINV;     /* Punt for now, invalid operation. */
356                         }
357                         break;
358
359                 case EXC_MCHK:
360                         /*
361                          * Note that this may not be recoverable for the user
362                          * process, depending on the type of machine check,
363                          * but it at least prevents the kernel from dying.
364                          */
365                         sig = SIGBUS;
366                         ucode = BUS_OBJERR;
367                         break;
368
369                 default:
370                         trap_fatal(frame);
371                 }
372         } else {
373                 /* Kernel Mode Traps */
374
375                 KASSERT(cold || td->td_ucred != NULL,
376                     ("kernel trap doesn't have ucred"));
377                 switch (type) {
378                 case EXC_PGM:
379 #ifdef KDTRACE_HOOKS
380                         if (frame_is_trap_inst(frame)) {
381                                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
382                                         if (dtrace_invop_jump_addr != NULL) {
383                                                 dtrace_invop_jump_addr(frame);
384                                                 return;
385                                         }
386                                 }
387                         }
388 #endif
389 #ifdef KDB
390                         if (db_trap_glue(frame))
391                                 return;
392 #endif
393                         break;
394 #if defined(__powerpc64__) && defined(AIM)
395                 case EXC_DSE:
396                         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 &&
397                             (frame->dar & SEGMENT_MASK) == USER_ADDR) {
398                                 __asm __volatile ("slbmte %0, %1" ::
399                                         "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
400                                         "r"(USER_SLB_SLBE));
401                                 return;
402                         }
403                         break;
404 #endif
405                 case EXC_DSI:
406                         if (trap_pfault(frame, 0) == 0)
407                                 return;
408                         break;
409                 case EXC_MCHK:
410                         if (handle_onfault(frame))
411                                 return;
412                         break;
413                 default:
414                         break;
415                 }
416                 trap_fatal(frame);
417         }
418
419         if (sig != 0) {
420                 if (p->p_sysent->sv_transtrap != NULL)
421                         sig = (p->p_sysent->sv_transtrap)(sig, type);
422                 ksiginfo_init_trap(&ksi);
423                 ksi.ksi_signo = sig;
424                 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
425                 /* ksi.ksi_addr = ? */
426                 ksi.ksi_trapno = type;
427                 trapsignal(td, &ksi);
428         }
429
430         userret(td, frame);
431 }
432
433 static void
434 trap_fatal(struct trapframe *frame)
435 {
436
437         printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
438 #ifdef KDB
439         if ((debugger_on_panic || kdb_active) &&
440             kdb_trap(frame->exc, 0, frame))
441                 return;
442 #endif
443         panic("%s trap", trapname(frame->exc));
444 }
445
446 static void
447 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
448 {
449         uint16_t ver;
450 #ifdef BOOKE
451         vm_paddr_t pa;
452 #endif
453
454         printf("\n");
455         printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
456             user ? "user" : "kernel");
457         printf("\n");
458         printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
459         switch (vector) {
460         case EXC_DSE:
461         case EXC_DSI:
462         case EXC_DTMISS:
463                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
464 #ifdef AIM
465                 printf("   dsisr           = 0x%lx\n",
466                     (u_long)frame->cpu.aim.dsisr);
467 #endif
468                 break;
469         case EXC_ISE:
470         case EXC_ISI:
471         case EXC_ITMISS:
472                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
473                 break;
474         case EXC_MCHK:
475                 ver = mfpvr() >> 16;
476 #if defined(AIM)
477                 if (MPC745X_P(ver))
478                         printf("    msssr0         = 0x%b\n",
479                             (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
480 #elif defined(BOOKE)
481                 pa = mfspr(SPR_MCARU);
482                 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
483                 printf("   mcsr            = 0x%b\n",
484                     (int)mfspr(SPR_MCSR), MCSR_BITMASK);
485                 printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
486 #endif
487                 break;
488         }
489 #ifdef BOOKE
490         printf("   esr             = 0x%b\n",
491             (int)frame->cpu.booke.esr, ESR_BITMASK);
492 #endif
493         printf("   srr0            = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
494             frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
495         printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
496         printf("   lr              = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
497             frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
498         printf("   curthread       = %p\n", curthread);
499         if (curthread != NULL)
500                 printf("          pid = %d, comm = %s\n",
501                     curthread->td_proc->p_pid, curthread->td_name);
502         printf("\n");
503 }
504
505 /*
506  * Handles a fatal fault when we have onfault state to recover.  Returns
507  * non-zero if there was onfault recovery state available.
508  */
509 static int
510 handle_onfault(struct trapframe *frame)
511 {
512         struct          thread *td;
513         jmp_buf         *fb;
514
515         td = curthread;
516         fb = td->td_pcb->pcb_onfault;
517         if (fb != NULL) {
518                 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
519                 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
520                 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
521                 frame->fixreg[3] = 1;
522                 frame->cr = (*fb)->_jb[FAULTBUF_CR];
523                 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
524                     18 * sizeof(register_t));
525                 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
526                 return (1);
527         }
528         return (0);
529 }
530
531 int
532 cpu_fetch_syscall_args(struct thread *td)
533 {
534         struct proc *p;
535         struct trapframe *frame;
536         struct syscall_args *sa;
537         caddr_t params;
538         size_t argsz;
539         int error, n, i;
540
541         p = td->td_proc;
542         frame = td->td_frame;
543         sa = &td->td_sa;
544
545         sa->code = frame->fixreg[0];
546         params = (caddr_t)(frame->fixreg + FIRSTARG);
547         n = NARGREG;
548
549         if (sa->code == SYS_syscall) {
550                 /*
551                  * code is first argument,
552                  * followed by actual args.
553                  */
554                 sa->code = *(register_t *) params;
555                 params += sizeof(register_t);
556                 n -= 1;
557         } else if (sa->code == SYS___syscall) {
558                 /*
559                  * Like syscall, but code is a quad,
560                  * so as to maintain quad alignment
561                  * for the rest of the args.
562                  */
563                 if (SV_PROC_FLAG(p, SV_ILP32)) {
564                         params += sizeof(register_t);
565                         sa->code = *(register_t *) params;
566                         params += sizeof(register_t);
567                         n -= 2;
568                 } else {
569                         sa->code = *(register_t *) params;
570                         params += sizeof(register_t);
571                         n -= 1;
572                 }
573         }
574
575         if (p->p_sysent->sv_mask)
576                 sa->code &= p->p_sysent->sv_mask;
577         if (sa->code >= p->p_sysent->sv_size)
578                 sa->callp = &p->p_sysent->sv_table[0];
579         else
580                 sa->callp = &p->p_sysent->sv_table[sa->code];
581
582         sa->narg = sa->callp->sy_narg;
583
584         if (SV_PROC_FLAG(p, SV_ILP32)) {
585                 argsz = sizeof(uint32_t);
586
587                 for (i = 0; i < n; i++)
588                         sa->args[i] = ((u_register_t *)(params))[i] &
589                             0xffffffff;
590         } else {
591                 argsz = sizeof(uint64_t);
592
593                 for (i = 0; i < n; i++)
594                         sa->args[i] = ((u_register_t *)(params))[i];
595         }
596
597         if (sa->narg > n)
598                 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
599                                (sa->narg - n) * argsz);
600         else
601                 error = 0;
602
603 #ifdef __powerpc64__
604         if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
605                 /* Expand the size of arguments copied from the stack */
606
607                 for (i = sa->narg; i >= n; i--)
608                         sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
609         }
610 #endif
611
612         if (error == 0) {
613                 td->td_retval[0] = 0;
614                 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
615         }
616         return (error);
617 }
618
619 #include "../../kern/subr_syscall.c"
620
621 void
622 syscall(struct trapframe *frame)
623 {
624         struct thread *td;
625         int error;
626
627         td = curthread;
628         td->td_frame = frame;
629
630 #if defined(__powerpc64__) && defined(AIM)
631         /*
632          * Speculatively restore last user SLB segment, which we know is
633          * invalid already, since we are likely to do copyin()/copyout().
634          */
635         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0)
636                 __asm __volatile ("slbmte %0, %1; isync" ::
637                     "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
638 #endif
639
640         error = syscallenter(td);
641         syscallret(td, error);
642 }
643
644 #if defined(__powerpc64__) && defined(AIM)
645 /* Handle kernel SLB faults -- runs in real mode, all seat belts off */
646 void
647 handle_kernel_slb_spill(int type, register_t dar, register_t srr0)
648 {
649         struct slb *slbcache;
650         uint64_t slbe, slbv;
651         uint64_t esid, addr;
652         int i;
653
654         addr = (type == EXC_ISE) ? srr0 : dar;
655         slbcache = PCPU_GET(slb);
656         esid = (uintptr_t)addr >> ADDR_SR_SHFT;
657         slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID;
658         
659         /* See if the hardware flushed this somehow (can happen in LPARs) */
660         for (i = 0; i < n_slbs; i++)
661                 if (slbcache[i].slbe == (slbe | (uint64_t)i))
662                         return;
663
664         /* Not in the map, needs to actually be added */
665         slbv = kernel_va_to_slbv(addr);
666         if (slbcache[USER_SLB_SLOT].slbe == 0) {
667                 for (i = 0; i < n_slbs; i++) {
668                         if (i == USER_SLB_SLOT)
669                                 continue;
670                         if (!(slbcache[i].slbe & SLBE_VALID))
671                                 goto fillkernslb;
672                 }
673
674                 if (i == n_slbs)
675                         slbcache[USER_SLB_SLOT].slbe = 1;
676         }
677
678         /* Sacrifice a random SLB entry that is not the user entry */
679         i = mftb() % n_slbs;
680         if (i == USER_SLB_SLOT)
681                 i = (i+1) % n_slbs;
682
683 fillkernslb:
684         /* Write new entry */
685         slbcache[i].slbv = slbv;
686         slbcache[i].slbe = slbe | (uint64_t)i;
687
688         /* Trap handler will restore from cache on exit */
689 }
690
691 static int 
692 handle_user_slb_spill(pmap_t pm, vm_offset_t addr)
693 {
694         struct slb *user_entry;
695         uint64_t esid;
696         int i;
697
698         if (pm->pm_slb == NULL)
699                 return (-1);
700
701         esid = (uintptr_t)addr >> ADDR_SR_SHFT;
702
703         PMAP_LOCK(pm);
704         user_entry = user_va_to_slb_entry(pm, addr);
705
706         if (user_entry == NULL) {
707                 /* allocate_vsid auto-spills it */
708                 (void)allocate_user_vsid(pm, esid, 0);
709         } else {
710                 /*
711                  * Check that another CPU has not already mapped this.
712                  * XXX: Per-thread SLB caches would be better.
713                  */
714                 for (i = 0; i < pm->pm_slb_len; i++)
715                         if (pm->pm_slb[i] == user_entry)
716                                 break;
717
718                 if (i == pm->pm_slb_len)
719                         slb_insert_user(pm, user_entry);
720         }
721         PMAP_UNLOCK(pm);
722
723         return (0);
724 }
725 #endif
726
727 static int
728 trap_pfault(struct trapframe *frame, int user)
729 {
730         vm_offset_t     eva, va;
731         struct          thread *td;
732         struct          proc *p;
733         vm_map_t        map;
734         vm_prot_t       ftype;
735         int             rv, is_user;
736
737         td = curthread;
738         p = td->td_proc;
739         if (frame->exc == EXC_ISI) {
740                 eva = frame->srr0;
741                 ftype = VM_PROT_EXECUTE;
742                 if (frame->srr1 & SRR1_ISI_PFAULT)
743                         ftype |= VM_PROT_READ;
744         } else {
745                 eva = frame->dar;
746 #ifdef BOOKE
747                 if (frame->cpu.booke.esr & ESR_ST)
748 #else
749                 if (frame->cpu.aim.dsisr & DSISR_STORE)
750 #endif
751                         ftype = VM_PROT_WRITE;
752                 else
753                         ftype = VM_PROT_READ;
754         }
755
756         if (user) {
757                 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace  NULL"));
758                 map = &p->p_vmspace->vm_map;
759         } else {
760                 rv = pmap_decode_kernel_ptr(eva, &is_user, &eva);
761                 if (rv != 0)
762                         return (SIGSEGV);
763
764                 if (is_user)
765                         map = &p->p_vmspace->vm_map;
766                 else
767                         map = kernel_map;
768         }
769         va = trunc_page(eva);
770
771         /* Fault in the page. */
772         rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
773         /*
774          * XXXDTRACE: add dtrace_doubletrap_func here?
775          */
776
777         if (rv == KERN_SUCCESS)
778                 return (0);
779
780         if (!user && handle_onfault(frame))
781                 return (0);
782
783         return (SIGSEGV);
784 }
785
786 /*
787  * For now, this only deals with the particular unaligned access case
788  * that gcc tends to generate.  Eventually it should handle all of the
789  * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
790  */
791
792 static int
793 fix_unaligned(struct thread *td, struct trapframe *frame)
794 {
795         struct thread   *fputhread;
796 #ifdef  __SPE__
797         uint32_t        inst;
798 #endif
799         int             indicator, reg;
800         double          *fpr;
801
802 #ifdef __SPE__
803         indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
804         if (indicator & ESR_SPE) {
805                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
806                         return (-1);
807                 reg = EXC_ALI_SPE_REG(inst);
808                 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
809                 fputhread = PCPU_GET(vecthread);
810
811                 /* Juggle the SPE to ensure that we've initialized
812                  * the registers, and that their current state is in
813                  * the PCB.
814                  */
815                 if (fputhread != td) {
816                         if (fputhread)
817                                 save_vec(fputhread);
818                         enable_vec(td);
819                 }
820                 save_vec(td);
821
822                 if (!(indicator & ESR_ST)) {
823                         if (copyin((void *)frame->dar, fpr,
824                             sizeof(double)) != 0)
825                                 return (-1);
826                         frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
827                         enable_vec(td);
828                 } else {
829                         td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
830                         if (copyout(fpr, (void *)frame->dar,
831                             sizeof(double)) != 0)
832                                 return (-1);
833                 }
834                 return (0);
835         }
836 #else
837         indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
838
839         switch (indicator) {
840         case EXC_ALI_LFD:
841         case EXC_ALI_STFD:
842                 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
843                 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
844                 fputhread = PCPU_GET(fputhread);
845
846                 /* Juggle the FPU to ensure that we've initialized
847                  * the FPRs, and that their current state is in
848                  * the PCB.
849                  */
850                 if (fputhread != td) {
851                         if (fputhread)
852                                 save_fpu(fputhread);
853                         enable_fpu(td);
854                 }
855                 save_fpu(td);
856
857                 if (indicator == EXC_ALI_LFD) {
858                         if (copyin((void *)frame->dar, fpr,
859                             sizeof(double)) != 0)
860                                 return (-1);
861                         enable_fpu(td);
862                 } else {
863                         if (copyout(fpr, (void *)frame->dar,
864                             sizeof(double)) != 0)
865                                 return (-1);
866                 }
867                 return (0);
868                 break;
869         }
870 #endif
871
872         return (-1);
873 }
874
875 #ifdef KDB
876 int
877 db_trap_glue(struct trapframe *frame)
878 {
879
880         if (!(frame->srr1 & PSL_PR)
881             && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
882                 || frame_is_trap_inst(frame)
883                 || frame->exc == EXC_BPT
884                 || frame->exc == EXC_DSI)) {
885                 int type = frame->exc;
886
887                 /* Ignore DTrace traps. */
888                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
889                         return (0);
890                 if (frame_is_trap_inst(frame)) {
891                         type = T_BREAKPOINT;
892                 }
893                 return (kdb_trap(type, 0, frame));
894         }
895
896         return (0);
897 }
898 #endif