sys/powerpc/powerpc/trap.c

   1 /*-
   2  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   3  * Copyright (C) 1995, 1996 TooLs GmbH.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. All advertising materials mentioning features or use of this software
  15  *    must display the following acknowledgement:
  16  *      This product includes software developed by TooLs GmbH.
  17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
  32  */
  33
  34 #include <sys/cdefs.h>
  35 __FBSDID("$FreeBSD$");
  36
  37 #include <sys/param.h>
  38 #include <sys/kdb.h>
  39 #include <sys/proc.h>
  40 #include <sys/ktr.h>
  41 #include <sys/lock.h>
  42 #include <sys/mutex.h>
  43 #include <sys/pioctl.h>
  44 #include <sys/ptrace.h>
  45 #include <sys/reboot.h>
  46 #include <sys/syscall.h>
  47 #include <sys/sysent.h>
  48 #include <sys/systm.h>
  49 #include <sys/kernel.h>
  50 #include <sys/uio.h>
  51 #include <sys/signalvar.h>
  52 #include <sys/vmmeter.h>
  53
  54 #include <security/audit/audit.h>
  55
  56 #include <vm/vm.h>
  57 #include <vm/pmap.h>
  58 #include <vm/vm_extern.h>
  59 #include <vm/vm_param.h>
  60 #include <vm/vm_kern.h>
  61 #include <vm/vm_map.h>
  62 #include <vm/vm_page.h>
  63
  64 #include <machine/_inttypes.h>
  65 #include <machine/altivec.h>
  66 #include <machine/cpu.h>
  67 #include <machine/db_machdep.h>
  68 #include <machine/fpu.h>
  69 #include <machine/frame.h>
  70 #include <machine/pcb.h>
  71 #include <machine/psl.h>
  72 #include <machine/trap.h>
  73 #include <machine/spr.h>
  74 #include <machine/sr.h>
  75
  76 /* Below matches setjmp.S */
  77 #define FAULTBUF_LR     21
  78 #define FAULTBUF_R1     1
  79 #define FAULTBUF_R2     2
  80 #define FAULTBUF_CR     22
  81 #define FAULTBUF_R14    3
  82
  83 #define MOREARGS(sp)    ((caddr_t)((uintptr_t)(sp) + \
  84     sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
  85
  86 static void     trap_fatal(struct trapframe *frame);
  87 static void     printtrap(u_int vector, struct trapframe *frame, int isfatal,
  88                     int user);
  89 static int      trap_pfault(struct trapframe *frame, int user);
  90 static int      fix_unaligned(struct thread *td, struct trapframe *frame);
  91 static int      handle_onfault(struct trapframe *frame);
  92 static void     syscall(struct trapframe *frame);
  93
  94 #if defined(__powerpc64__) && defined(AIM)
  95        void     handle_kernel_slb_spill(int, register_t, register_t);
  96 static int      handle_user_slb_spill(pmap_t pm, vm_offset_t addr);
  97 extern int      n_slbs;
  98 #endif
  99
 100 #ifdef KDB
 101 int db_trap_glue(struct trapframe *);           /* Called from trap_subr.S */
 102 #endif
 103
 104 struct powerpc_exception {
 105         u_int   vector;
 106         char    *name;
 107 };
 108
 109 #ifdef KDTRACE_HOOKS
 110 #include <sys/dtrace_bsd.h>
 111
 112 int (*dtrace_invop_jump_addr)(struct trapframe *);
 113 #endif
 114
 115 static struct powerpc_exception powerpc_exceptions[] = {
 116         { EXC_CRIT,     "critical input" },
 117         { EXC_RST,      "system reset" },
 118         { EXC_MCHK,     "machine check" },
 119         { EXC_DSI,      "data storage interrupt" },
 120         { EXC_DSE,      "data segment exception" },
 121         { EXC_ISI,      "instruction storage interrupt" },
 122         { EXC_ISE,      "instruction segment exception" },
 123         { EXC_EXI,      "external interrupt" },
 124         { EXC_ALI,      "alignment" },
 125         { EXC_PGM,      "program" },
 126         { EXC_FPU,      "floating-point unavailable" },
 127         { EXC_APU,      "auxiliary proc unavailable" },
 128         { EXC_DECR,     "decrementer" },
 129         { EXC_FIT,      "fixed-interval timer" },
 130         { EXC_WDOG,     "watchdog timer" },
 131         { EXC_SC,       "system call" },
 132         { EXC_TRC,      "trace" },
 133         { EXC_FPA,      "floating-point assist" },
 134         { EXC_DEBUG,    "debug" },
 135         { EXC_PERF,     "performance monitoring" },
 136         { EXC_VEC,      "altivec unavailable" },
 137         { EXC_VSX,      "vsx unavailable" },
 138         { EXC_ITMISS,   "instruction tlb miss" },
 139         { EXC_DLMISS,   "data load tlb miss" },
 140         { EXC_DSMISS,   "data store tlb miss" },
 141         { EXC_BPT,      "instruction breakpoint" },
 142         { EXC_SMI,      "system management" },
 143         { EXC_VECAST_G4,        "altivec assist" },
 144         { EXC_THRM,     "thermal management" },
 145         { EXC_RUNMODETRC,       "run mode/trace" },
 146         { EXC_LAST,     NULL }
 147 };
 148
 149 static const char *
 150 trapname(u_int vector)
 151 {
 152         struct  powerpc_exception *pe;
 153
 154         for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
 155                 if (pe->vector == vector)
 156                         return (pe->name);
 157         }
 158
 159         return ("unknown");
 160 }
 161
 162 void
 163 trap(struct trapframe *frame)
 164 {
 165         struct thread   *td;
 166         struct proc     *p;
 167 #ifdef KDTRACE_HOOKS
 168         uint32_t inst;
 169 #endif
 170         int             sig, type, user;
 171         u_int           ucode;
 172         ksiginfo_t      ksi;
 173
 174         VM_CNT_INC(v_trap);
 175
 176         td = curthread;
 177         p = td->td_proc;
 178
 179         type = ucode = frame->exc;
 180         sig = 0;
 181         user = frame->srr1 & PSL_PR;
 182
 183         CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
 184             trapname(type), user ? "user" : "kernel");
 185
 186 #ifdef KDTRACE_HOOKS
 187         /*
 188          * A trap can occur while DTrace executes a probe. Before
 189          * executing the probe, DTrace blocks re-scheduling and sets
 190          * a flag in its per-cpu flags to indicate that it doesn't
 191          * want to fault. On returning from the probe, the no-fault
 192          * flag is cleared and finally re-scheduling is enabled.
 193          *
 194          * If the DTrace kernel module has registered a trap handler,
 195          * call it and if it returns non-zero, assume that it has
 196          * handled the trap and modified the trap frame so that this
 197          * function can return normally.
 198          */
 199         if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
 200                 return;
 201 #endif
 202
 203         if (user) {
 204                 td->td_pticks = 0;
 205                 td->td_frame = frame;
 206                 if (td->td_cowgen != p->p_cowgen)
 207                         thread_cow_update(td);
 208
 209                 /* User Mode Traps */
 210                 switch (type) {
 211                 case EXC_RUNMODETRC:
 212                 case EXC_TRC:
 213                         frame->srr1 &= ~PSL_SE;
 214                         sig = SIGTRAP;
 215                         ucode = TRAP_TRACE;
 216                         break;
 217
 218 #if defined(__powerpc64__) && defined(AIM)
 219                 case EXC_ISE:
 220                 case EXC_DSE:
 221                         if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
 222                             (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
 223                                 sig = SIGSEGV;
 224                                 ucode = SEGV_MAPERR;
 225                         }
 226                         break;
 227 #endif
 228                 case EXC_DSI:
 229                 case EXC_ISI:
 230                         sig = trap_pfault(frame, 1);
 231                         if (sig == SIGSEGV)
 232                                 ucode = SEGV_MAPERR;
 233                         break;
 234
 235                 case EXC_SC:
 236                         syscall(frame);
 237                         break;
 238
 239                 case EXC_FPU:
 240                         KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
 241                             ("FPU already enabled for thread"));
 242                         enable_fpu(td);
 243                         break;
 244
 245                 case EXC_VEC:
 246                         KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
 247                             ("Altivec already enabled for thread"));
 248                         enable_vec(td);
 249                         break;
 250
 251                 case EXC_VSX:
 252                         KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
 253                             ("VSX already enabled for thread"));
 254                         if (!(td->td_pcb->pcb_flags & PCB_VEC))
 255                                 enable_vec(td);
 256                         if (!(td->td_pcb->pcb_flags & PCB_FPU))
 257                                 save_fpu(td);
 258                         td->td_pcb->pcb_flags |= PCB_VSX;
 259                         enable_fpu(td);
 260                         break;
 261
 262                 case EXC_VECAST_E:
 263                 case EXC_VECAST_G4:
 264                 case EXC_VECAST_G5:
 265                         /*
 266                          * We get a VPU assist exception for IEEE mode
 267                          * vector operations on denormalized floats.
 268                          * Emulating this is a giant pain, so for now,
 269                          * just switch off IEEE mode and treat them as
 270                          * zero.
 271                          */
 272
 273                         save_vec(td);
 274                         td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
 275                         enable_vec(td);
 276                         break;
 277
 278                 case EXC_ALI:
 279                         if (fix_unaligned(td, frame) != 0) {
 280                                 sig = SIGBUS;
 281                                 ucode = BUS_ADRALN;
 282                         }
 283                         else
 284                                 frame->srr0 += 4;
 285                         break;
 286
 287                 case EXC_DEBUG: /* Single stepping */
 288                         mtspr(SPR_DBSR, mfspr(SPR_DBSR));
 289                         frame->srr1 &= ~PSL_DE;
 290                         frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
 291                         sig = SIGTRAP;
 292                         ucode = TRAP_TRACE;
 293                         break;
 294
 295                 case EXC_PGM:
 296                         /* Identify the trap reason */
 297 #ifdef AIM
 298                         if (frame->srr1 & EXC_PGM_TRAP) {
 299 #else
 300                         if (frame->cpu.booke.esr & ESR_PTR) {
 301 #endif
 302 #ifdef KDTRACE_HOOKS
 303                                 inst = fuword32((const void *)frame->srr0);
 304                                 if (inst == 0x0FFFDDDD &&
 305                                     dtrace_pid_probe_ptr != NULL) {
 306                                         (*dtrace_pid_probe_ptr)(frame);
 307                                         break;
 308                                 }
 309 #endif
 310                                 sig = SIGTRAP;
 311                                 ucode = TRAP_BRKPT;
 312                         } else {
 313                                 sig = ppc_instr_emulate(frame, td->td_pcb);
 314                                 if (sig == SIGILL) {
 315                                         if (frame->srr1 & EXC_PGM_PRIV)
 316                                                 ucode = ILL_PRVOPC;
 317                                         else if (frame->srr1 & EXC_PGM_ILLEGAL)
 318                                                 ucode = ILL_ILLOPC;
 319                                 } else if (sig == SIGFPE)
 320                                         ucode = FPE_FLTINV;     /* Punt for now, invalid operation. */
 321                         }
 322                         break;
 323
 324                 case EXC_MCHK:
 325                         /*
 326                          * Note that this may not be recoverable for the user
 327                          * process, depending on the type of machine check,
 328                          * but it at least prevents the kernel from dying.
 329                          */
 330                         sig = SIGBUS;
 331                         ucode = BUS_OBJERR;
 332                         break;
 333
 334                 default:
 335                         trap_fatal(frame);
 336                 }
 337         } else {
 338                 /* Kernel Mode Traps */
 339
 340                 KASSERT(cold || td->td_ucred != NULL,
 341                     ("kernel trap doesn't have ucred"));
 342                 switch (type) {
 343                 case EXC_PGM:
 344 #ifdef KDTRACE_HOOKS
 345 #ifdef AIM
 346                         if (frame->srr1 & EXC_PGM_TRAP) {
 347 #else
 348                         if (frame->cpu.booke.esr & ESR_PTR) {
 349 #endif
 350                                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
 351                                         if (dtrace_invop_jump_addr != NULL) {
 352                                                 dtrace_invop_jump_addr(frame);
 353                                                 return;
 354                                         }
 355                                 }
 356                         }
 357 #endif
 358 #ifdef KDB
 359                         if (db_trap_glue(frame))
 360                                 return;
 361 #endif
 362                         break;
 363 #if defined(__powerpc64__) && defined(AIM)
 364                 case EXC_DSE:
 365                         if ((frame->dar & SEGMENT_MASK) == USER_ADDR) {
 366                                 __asm __volatile ("slbmte %0, %1" ::
 367                                         "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
 368                                         "r"(USER_SLB_SLBE));
 369                                 return;
 370                         }
 371                         break;
 372 #endif
 373                 case EXC_DSI:
 374                         if (trap_pfault(frame, 0) == 0)
 375                                 return;
 376                         break;
 377                 case EXC_MCHK:
 378                         if (handle_onfault(frame))
 379                                 return;
 380                         break;
 381                 default:
 382                         break;
 383                 }
 384                 trap_fatal(frame);
 385         }
 386
 387         if (sig != 0) {
 388                 if (p->p_sysent->sv_transtrap != NULL)
 389                         sig = (p->p_sysent->sv_transtrap)(sig, type);
 390                 ksiginfo_init_trap(&ksi);
 391                 ksi.ksi_signo = sig;
 392                 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
 393                 /* ksi.ksi_addr = ? */
 394                 ksi.ksi_trapno = type;
 395                 trapsignal(td, &ksi);
 396         }
 397
 398         userret(td, frame);
 399 }
 400
 401 static void
 402 trap_fatal(struct trapframe *frame)
 403 {
 404
 405         printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
 406 #ifdef KDB
 407         if ((debugger_on_panic || kdb_active) &&
 408             kdb_trap(frame->exc, 0, frame))
 409                 return;
 410 #endif
 411         panic("%s trap", trapname(frame->exc));
 412 }
 413
 414 static void
 415 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 416 {
 417         uint16_t ver;
 418 #ifdef BOOKE
 419         vm_paddr_t pa;
 420 #endif
 421
 422         printf("\n");
 423         printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
 424             user ? "user" : "kernel");
 425         printf("\n");
 426         printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
 427         switch (vector) {
 428         case EXC_DSE:
 429         case EXC_DSI:
 430         case EXC_DTMISS:
 431                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
 432 #ifdef AIM
 433                 printf("   dsisr           = 0x%lx\n",
 434                     (u_long)frame->cpu.aim.dsisr);
 435 #endif
 436                 break;
 437         case EXC_ISE:
 438         case EXC_ISI:
 439         case EXC_ITMISS:
 440                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
 441                 break;
 442         case EXC_MCHK:
 443                 ver = mfpvr() >> 16;
 444 #if defined(AIM)
 445                 if (MPC745X_P(ver))
 446                         printf("    msssr0         = 0x%lx\n",
 447                             (u_long)mfspr(SPR_MSSSR0));
 448 #elif defined(BOOKE)
 449                 pa = mfspr(SPR_MCARU);
 450                 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
 451                 printf("   mcsr            = 0x%lx\n", (u_long)mfspr(SPR_MCSR));
 452                 printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
 453 #endif
 454                 break;
 455         }
 456 #ifdef BOOKE
 457         printf("   esr             = 0x%" PRIxPTR "\n",
 458             frame->cpu.booke.esr);
 459 #endif
 460         printf("   srr0            = 0x%" PRIxPTR "\n", frame->srr0);
 461         printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
 462         printf("   lr              = 0x%" PRIxPTR "\n", frame->lr);
 463         printf("   curthread       = %p\n", curthread);
 464         if (curthread != NULL)
 465                 printf("          pid = %d, comm = %s\n",
 466                     curthread->td_proc->p_pid, curthread->td_name);
 467         printf("\n");
 468 }
 469
 470 /*
 471  * Handles a fatal fault when we have onfault state to recover.  Returns
 472  * non-zero if there was onfault recovery state available.
 473  */
 474 static int
 475 handle_onfault(struct trapframe *frame)
 476 {
 477         struct          thread *td;
 478         jmp_buf         *fb;
 479
 480         td = curthread;
 481         fb = td->td_pcb->pcb_onfault;
 482         if (fb != NULL) {
 483                 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
 484                 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
 485                 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
 486                 frame->fixreg[3] = 1;
 487                 frame->cr = (*fb)->_jb[FAULTBUF_CR];
 488                 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
 489                     18 * sizeof(register_t));
 490                 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
 491                 return (1);
 492         }
 493         return (0);
 494 }
 495
 496 int
 497 cpu_fetch_syscall_args(struct thread *td)
 498 {
 499         struct proc *p;
 500         struct trapframe *frame;
 501         struct syscall_args *sa;
 502         caddr_t params;
 503         size_t argsz;
 504         int error, n, i;
 505
 506         p = td->td_proc;
 507         frame = td->td_frame;
 508         sa = &td->td_sa;
 509
 510         sa->code = frame->fixreg[0];
 511         params = (caddr_t)(frame->fixreg + FIRSTARG);
 512         n = NARGREG;
 513
 514         if (sa->code == SYS_syscall) {
 515                 /*
 516                  * code is first argument,
 517                  * followed by actual args.
 518                  */
 519                 sa->code = *(register_t *) params;
 520                 params += sizeof(register_t);
 521                 n -= 1;
 522         } else if (sa->code == SYS___syscall) {
 523                 /*
 524                  * Like syscall, but code is a quad,
 525                  * so as to maintain quad alignment
 526                  * for the rest of the args.
 527                  */
 528                 if (SV_PROC_FLAG(p, SV_ILP32)) {
 529                         params += sizeof(register_t);
 530                         sa->code = *(register_t *) params;
 531                         params += sizeof(register_t);
 532                         n -= 2;
 533                 } else {
 534                         sa->code = *(register_t *) params;
 535                         params += sizeof(register_t);
 536                         n -= 1;
 537                 }
 538         }
 539
 540         if (p->p_sysent->sv_mask)
 541                 sa->code &= p->p_sysent->sv_mask;
 542         if (sa->code >= p->p_sysent->sv_size)
 543                 sa->callp = &p->p_sysent->sv_table[0];
 544         else
 545                 sa->callp = &p->p_sysent->sv_table[sa->code];
 546
 547         sa->narg = sa->callp->sy_narg;
 548
 549         if (SV_PROC_FLAG(p, SV_ILP32)) {
 550                 argsz = sizeof(uint32_t);
 551
 552                 for (i = 0; i < n; i++)
 553                         sa->args[i] = ((u_register_t *)(params))[i] &
 554                             0xffffffff;
 555         } else {
 556                 argsz = sizeof(uint64_t);
 557
 558                 for (i = 0; i < n; i++)
 559                         sa->args[i] = ((u_register_t *)(params))[i];
 560         }
 561
 562         if (sa->narg > n)
 563                 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
 564                                (sa->narg - n) * argsz);
 565         else
 566                 error = 0;
 567
 568 #ifdef __powerpc64__
 569         if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
 570                 /* Expand the size of arguments copied from the stack */
 571
 572                 for (i = sa->narg; i >= n; i--)
 573                         sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
 574         }
 575 #endif
 576
 577         if (error == 0) {
 578                 td->td_retval[0] = 0;
 579                 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
 580         }
 581         return (error);
 582 }
 583
 584 #include "../../kern/subr_syscall.c"
 585
 586 void
 587 syscall(struct trapframe *frame)
 588 {
 589         struct thread *td;
 590         int error;
 591
 592         td = curthread;
 593         td->td_frame = frame;
 594
 595 #if defined(__powerpc64__) && defined(AIM)
 596         /*
 597          * Speculatively restore last user SLB segment, which we know is
 598          * invalid already, since we are likely to do copyin()/copyout().
 599          */
 600         __asm __volatile ("slbmte %0, %1; isync" ::
 601             "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
 602 #endif
 603
 604         error = syscallenter(td);
 605         syscallret(td, error);
 606 }
 607
 608 #if defined(__powerpc64__) && defined(AIM)
 609 /* Handle kernel SLB faults -- runs in real mode, all seat belts off */
 610 void
 611 handle_kernel_slb_spill(int type, register_t dar, register_t srr0)
 612 {
 613         struct slb *slbcache;
 614         uint64_t slbe, slbv;
 615         uint64_t esid, addr;
 616         int i;
 617
 618         addr = (type == EXC_ISE) ? srr0 : dar;
 619         slbcache = PCPU_GET(slb);
 620         esid = (uintptr_t)addr >> ADDR_SR_SHFT;
 621         slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID;
 622
 623         /* See if the hardware flushed this somehow (can happen in LPARs) */
 624         for (i = 0; i < n_slbs; i++)
 625                 if (slbcache[i].slbe == (slbe | (uint64_t)i))
 626                         return;
 627
 628         /* Not in the map, needs to actually be added */
 629         slbv = kernel_va_to_slbv(addr);
 630         if (slbcache[USER_SLB_SLOT].slbe == 0) {
 631                 for (i = 0; i < n_slbs; i++) {
 632                         if (i == USER_SLB_SLOT)
 633                                 continue;
 634                         if (!(slbcache[i].slbe & SLBE_VALID))
 635                                 goto fillkernslb;
 636                 }
 637
 638                 if (i == n_slbs)
 639                         slbcache[USER_SLB_SLOT].slbe = 1;
 640         }
 641
 642         /* Sacrifice a random SLB entry that is not the user entry */
 643         i = mftb() % n_slbs;
 644         if (i == USER_SLB_SLOT)
 645                 i = (i+1) % n_slbs;
 646
 647 fillkernslb:
 648         /* Write new entry */
 649         slbcache[i].slbv = slbv;
 650         slbcache[i].slbe = slbe | (uint64_t)i;
 651
 652         /* Trap handler will restore from cache on exit */
 653 }
 654
 655 static int
 656 handle_user_slb_spill(pmap_t pm, vm_offset_t addr)
 657 {
 658         struct slb *user_entry;
 659         uint64_t esid;
 660         int i;
 661
 662         esid = (uintptr_t)addr >> ADDR_SR_SHFT;
 663
 664         PMAP_LOCK(pm);
 665         user_entry = user_va_to_slb_entry(pm, addr);
 666
 667         if (user_entry == NULL) {
 668                 /* allocate_vsid auto-spills it */
 669                 (void)allocate_user_vsid(pm, esid, 0);
 670         } else {
 671                 /*
 672                  * Check that another CPU has not already mapped this.
 673                  * XXX: Per-thread SLB caches would be better.
 674                  */
 675                 for (i = 0; i < pm->pm_slb_len; i++)
 676                         if (pm->pm_slb[i] == user_entry)
 677                                 break;
 678
 679                 if (i == pm->pm_slb_len)
 680                         slb_insert_user(pm, user_entry);
 681         }
 682         PMAP_UNLOCK(pm);
 683
 684         return (0);
 685 }
 686 #endif
 687
 688 static int
 689 trap_pfault(struct trapframe *frame, int user)
 690 {
 691         vm_offset_t     eva, va;
 692         struct          thread *td;
 693         struct          proc *p;
 694         vm_map_t        map;
 695         vm_prot_t       ftype;
 696         int             rv;
 697 #ifdef AIM
 698         register_t      user_sr;
 699 #endif
 700
 701         td = curthread;
 702         p = td->td_proc;
 703         if (frame->exc == EXC_ISI) {
 704                 eva = frame->srr0;
 705                 ftype = VM_PROT_EXECUTE;
 706                 if (frame->srr1 & SRR1_ISI_PFAULT)
 707                         ftype |= VM_PROT_READ;
 708         } else {
 709                 eva = frame->dar;
 710 #ifdef BOOKE
 711                 if (frame->cpu.booke.esr & ESR_ST)
 712 #else
 713                 if (frame->cpu.aim.dsisr & DSISR_STORE)
 714 #endif
 715                         ftype = VM_PROT_WRITE;
 716                 else
 717                         ftype = VM_PROT_READ;
 718         }
 719
 720         if (user) {
 721                 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace  NULL"));
 722                 map = &p->p_vmspace->vm_map;
 723         } else {
 724 #ifdef BOOKE
 725                 if (eva < VM_MAXUSER_ADDRESS) {
 726 #else
 727                 if ((eva >> ADDR_SR_SHFT) == (USER_ADDR >> ADDR_SR_SHFT)) {
 728 #endif
 729                         map = &p->p_vmspace->vm_map;
 730
 731 #ifdef AIM
 732                         user_sr = td->td_pcb->pcb_cpu.aim.usr_segm;
 733                         eva &= ADDR_PIDX | ADDR_POFF;
 734                         eva |= user_sr << ADDR_SR_SHFT;
 735 #endif
 736                 } else {
 737                         map = kernel_map;
 738                 }
 739         }
 740         va = trunc_page(eva);
 741
 742         /* Fault in the page. */
 743         rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
 744         /*
 745          * XXXDTRACE: add dtrace_doubletrap_func here?
 746          */
 747
 748         if (rv == KERN_SUCCESS)
 749                 return (0);
 750
 751         if (!user && handle_onfault(frame))
 752                 return (0);
 753
 754         return (SIGSEGV);
 755 }
 756
 757 /*
 758  * For now, this only deals with the particular unaligned access case
 759  * that gcc tends to generate.  Eventually it should handle all of the
 760  * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
 761  */
 762
 763 static int
 764 fix_unaligned(struct thread *td, struct trapframe *frame)
 765 {
 766         struct thread   *fputhread;
 767 #ifdef  __SPE__
 768         uint32_t        inst;
 769 #endif
 770         int             indicator, reg;
 771         double          *fpr;
 772
 773 #ifdef __SPE__
 774         indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
 775         if (indicator & ESR_SPE) {
 776                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 777                         return (-1);
 778                 reg = EXC_ALI_SPE_REG(inst);
 779                 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
 780                 fputhread = PCPU_GET(vecthread);
 781
 782                 /* Juggle the SPE to ensure that we've initialized
 783                  * the registers, and that their current state is in
 784                  * the PCB.
 785                  */
 786                 if (fputhread != td) {
 787                         if (fputhread)
 788                                 save_vec(fputhread);
 789                         enable_vec(td);
 790                 }
 791                 save_vec(td);
 792
 793                 if (!(indicator & ESR_ST)) {
 794                         if (copyin((void *)frame->dar, fpr,
 795                             sizeof(double)) != 0)
 796                                 return (-1);
 797                         frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
 798                         enable_vec(td);
 799                 } else {
 800                         td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
 801                         if (copyout(fpr, (void *)frame->dar,
 802                             sizeof(double)) != 0)
 803                                 return (-1);
 804                 }
 805                 return (0);
 806         }
 807 #else
 808         indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
 809
 810         switch (indicator) {
 811         case EXC_ALI_LFD:
 812         case EXC_ALI_STFD:
 813                 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
 814                 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
 815                 fputhread = PCPU_GET(fputhread);
 816
 817                 /* Juggle the FPU to ensure that we've initialized
 818                  * the FPRs, and that their current state is in
 819                  * the PCB.
 820                  */
 821                 if (fputhread != td) {
 822                         if (fputhread)
 823                                 save_fpu(fputhread);
 824                         enable_fpu(td);
 825                 }
 826                 save_fpu(td);
 827
 828                 if (indicator == EXC_ALI_LFD) {
 829                         if (copyin((void *)frame->dar, fpr,
 830                             sizeof(double)) != 0)
 831                                 return (-1);
 832                         enable_fpu(td);
 833                 } else {
 834                         if (copyout(fpr, (void *)frame->dar,
 835                             sizeof(double)) != 0)
 836                                 return (-1);
 837                 }
 838                 return (0);
 839                 break;
 840         }
 841 #endif
 842
 843         return (-1);
 844 }
 845
 846 #ifdef KDB
 847 int
 848 db_trap_glue(struct trapframe *frame)
 849 {
 850
 851         if (!(frame->srr1 & PSL_PR)
 852             && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
 853 #ifdef AIM
 854                 || (frame->exc == EXC_PGM
 855                     && (frame->srr1 & EXC_PGM_TRAP))
 856 #else
 857                 || (frame->exc == EXC_DEBUG)
 858                 || (frame->cpu.booke.esr & ESR_PTR)
 859 #endif
 860                 || frame->exc == EXC_BPT
 861                 || frame->exc == EXC_DSI)) {
 862                 int type = frame->exc;
 863
 864                 /* Ignore DTrace traps. */
 865                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
 866                         return (0);
 867 #ifdef AIM
 868                 if (type == EXC_PGM && (frame->srr1 & EXC_PGM_TRAP)) {
 869 #else
 870                 if (type == EXC_DEBUG ||
 871                     (frame->cpu.booke.esr & ESR_PTR)) {
 872 #endif
 873                         type = T_BREAKPOINT;
 874                 }
 875                 return (kdb_trap(type, 0, frame));
 876         }
 877
 878         return (0);
 879 }
 880 #endif