sys/powerpc/powerpc/trap.c

   1 /*-
   2  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   3  * Copyright (C) 1995, 1996 TooLs GmbH.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. All advertising materials mentioning features or use of this software
  15  *    must display the following acknowledgement:
  16  *      This product includes software developed by TooLs GmbH.
  17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
  32  */
  33
  34 #include <sys/cdefs.h>
  35 __FBSDID("$FreeBSD$");
  36
  37 #include <sys/param.h>
  38 #include <sys/kdb.h>
  39 #include <sys/proc.h>
  40 #include <sys/ktr.h>
  41 #include <sys/lock.h>
  42 #include <sys/mutex.h>
  43 #include <sys/ptrace.h>
  44 #include <sys/reboot.h>
  45 #include <sys/syscall.h>
  46 #include <sys/sysent.h>
  47 #include <sys/systm.h>
  48 #include <sys/kernel.h>
  49 #include <sys/uio.h>
  50 #include <sys/signalvar.h>
  51 #include <sys/vmmeter.h>
  52
  53 #include <security/audit/audit.h>
  54
  55 #include <vm/vm.h>
  56 #include <vm/pmap.h>
  57 #include <vm/vm_extern.h>
  58 #include <vm/vm_param.h>
  59 #include <vm/vm_kern.h>
  60 #include <vm/vm_map.h>
  61 #include <vm/vm_page.h>
  62
  63 #include <machine/_inttypes.h>
  64 #include <machine/altivec.h>
  65 #include <machine/cpu.h>
  66 #include <machine/db_machdep.h>
  67 #include <machine/fpu.h>
  68 #include <machine/frame.h>
  69 #include <machine/pcb.h>
  70 #include <machine/psl.h>
  71 #include <machine/slb.h>
  72 #include <machine/spr.h>
  73 #include <machine/sr.h>
  74 #include <machine/trap.h>
  75
  76 /* Below matches setjmp.S */
  77 #define FAULTBUF_LR     21
  78 #define FAULTBUF_R1     1
  79 #define FAULTBUF_R2     2
  80 #define FAULTBUF_CR     22
  81 #define FAULTBUF_R14    3
  82
  83 #define MOREARGS(sp)    ((caddr_t)((uintptr_t)(sp) + \
  84     sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
  85
  86 static void     trap_fatal(struct trapframe *frame);
  87 static void     printtrap(u_int vector, struct trapframe *frame, int isfatal,
  88                     int user);
  89 static bool     trap_pfault(struct trapframe *frame, bool user, int *signo,
  90                     int *ucode);
  91 static int      fix_unaligned(struct thread *td, struct trapframe *frame);
  92 static int      handle_onfault(struct trapframe *frame);
  93 static void     syscall(struct trapframe *frame);
  94
  95 #if defined(__powerpc64__) && defined(AIM)
  96 static void     normalize_inputs(void);
  97 #endif
  98
  99 extern vm_offset_t __startkernel;
 100
 101 #ifdef KDB
 102 int db_trap_glue(struct trapframe *);           /* Called from trap_subr.S */
 103 #endif
 104
 105 struct powerpc_exception {
 106         u_int   vector;
 107         char    *name;
 108 };
 109
 110 #ifdef KDTRACE_HOOKS
 111 #include <sys/dtrace_bsd.h>
 112
 113 int (*dtrace_invop_jump_addr)(struct trapframe *);
 114 #endif
 115
 116 static struct powerpc_exception powerpc_exceptions[] = {
 117         { EXC_CRIT,     "critical input" },
 118         { EXC_RST,      "system reset" },
 119         { EXC_MCHK,     "machine check" },
 120         { EXC_DSI,      "data storage interrupt" },
 121         { EXC_DSE,      "data segment exception" },
 122         { EXC_ISI,      "instruction storage interrupt" },
 123         { EXC_ISE,      "instruction segment exception" },
 124         { EXC_EXI,      "external interrupt" },
 125         { EXC_ALI,      "alignment" },
 126         { EXC_PGM,      "program" },
 127         { EXC_HEA,      "hypervisor emulation assistance" },
 128         { EXC_FPU,      "floating-point unavailable" },
 129         { EXC_APU,      "auxiliary proc unavailable" },
 130         { EXC_DECR,     "decrementer" },
 131         { EXC_FIT,      "fixed-interval timer" },
 132         { EXC_WDOG,     "watchdog timer" },
 133         { EXC_SC,       "system call" },
 134         { EXC_TRC,      "trace" },
 135         { EXC_FPA,      "floating-point assist" },
 136         { EXC_DEBUG,    "debug" },
 137         { EXC_PERF,     "performance monitoring" },
 138         { EXC_VEC,      "altivec unavailable" },
 139         { EXC_VSX,      "vsx unavailable" },
 140         { EXC_FAC,      "facility unavailable" },
 141         { EXC_ITMISS,   "instruction tlb miss" },
 142         { EXC_DLMISS,   "data load tlb miss" },
 143         { EXC_DSMISS,   "data store tlb miss" },
 144         { EXC_BPT,      "instruction breakpoint" },
 145         { EXC_SMI,      "system management" },
 146         { EXC_VECAST_G4,        "altivec assist" },
 147         { EXC_THRM,     "thermal management" },
 148         { EXC_RUNMODETRC,       "run mode/trace" },
 149         { EXC_SOFT_PATCH, "soft patch exception" },
 150         { EXC_LAST,     NULL }
 151 };
 152
 153 #define ESR_BITMASK                                                     \
 154     "\20"                                                               \
 155     "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP"               \
 156     "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE"             \
 157     "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23"          \
 158     "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
 159 #define MCSR_BITMASK                                                    \
 160     "\20"                                                               \
 161     "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7"      \
 162     "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF"             \
 163     "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23"            \
 164     "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
 165 #define MSSSR_BITMASK                                                   \
 166     "\20"                                                               \
 167     "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7"                  \
 168     "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG"      \
 169     "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23"        \
 170     "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
 171
 172
 173 static const char *
 174 trapname(u_int vector)
 175 {
 176         struct  powerpc_exception *pe;
 177
 178         for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
 179                 if (pe->vector == vector)
 180                         return (pe->name);
 181         }
 182
 183         return ("unknown");
 184 }
 185
 186 static inline bool
 187 frame_is_trap_inst(struct trapframe *frame)
 188 {
 189 #ifdef AIM
 190         return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
 191 #else
 192         return ((frame->cpu.booke.esr & ESR_PTR) != 0);
 193 #endif
 194 }
 195
 196 void
 197 trap(struct trapframe *frame)
 198 {
 199         struct thread   *td;
 200         struct proc     *p;
 201 #ifdef KDTRACE_HOOKS
 202         uint32_t inst;
 203 #endif
 204         int             sig, type, user;
 205         u_int           ucode;
 206         ksiginfo_t      ksi;
 207         register_t      fscr;
 208
 209         VM_CNT_INC(v_trap);
 210
 211 #ifdef KDB
 212         if (kdb_active) {
 213                 kdb_reenter();
 214                 return;
 215         }
 216 #endif
 217
 218         td = curthread;
 219         p = td->td_proc;
 220
 221         type = ucode = frame->exc;
 222         sig = 0;
 223         user = frame->srr1 & PSL_PR;
 224
 225         CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
 226             trapname(type), user ? "user" : "kernel");
 227
 228 #ifdef KDTRACE_HOOKS
 229         /*
 230          * A trap can occur while DTrace executes a probe. Before
 231          * executing the probe, DTrace blocks re-scheduling and sets
 232          * a flag in its per-cpu flags to indicate that it doesn't
 233          * want to fault. On returning from the probe, the no-fault
 234          * flag is cleared and finally re-scheduling is enabled.
 235          *
 236          * If the DTrace kernel module has registered a trap handler,
 237          * call it and if it returns non-zero, assume that it has
 238          * handled the trap and modified the trap frame so that this
 239          * function can return normally.
 240          */
 241         if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
 242                 return;
 243 #endif
 244
 245         if (user) {
 246                 td->td_pticks = 0;
 247                 td->td_frame = frame;
 248                 if (td->td_cowgen != p->p_cowgen)
 249                         thread_cow_update(td);
 250
 251                 /* User Mode Traps */
 252                 switch (type) {
 253                 case EXC_RUNMODETRC:
 254                 case EXC_TRC:
 255                         frame->srr1 &= ~PSL_SE;
 256                         sig = SIGTRAP;
 257                         ucode = TRAP_TRACE;
 258                         break;
 259
 260 #if defined(__powerpc64__) && defined(AIM)
 261                 case EXC_ISE:
 262                 case EXC_DSE:
 263                         if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
 264                             (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
 265                                 sig = SIGSEGV;
 266                                 ucode = SEGV_MAPERR;
 267                         }
 268                         break;
 269 #endif
 270                 case EXC_DSI:
 271                 case EXC_ISI:
 272                         if (trap_pfault(frame, true, &sig, &ucode))
 273                                 sig = 0;
 274                         break;
 275
 276                 case EXC_SC:
 277                         syscall(frame);
 278                         break;
 279
 280                 case EXC_FPU:
 281                         KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
 282                             ("FPU already enabled for thread"));
 283                         enable_fpu(td);
 284                         break;
 285
 286                 case EXC_VEC:
 287                         KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
 288                             ("Altivec already enabled for thread"));
 289                         enable_vec(td);
 290                         break;
 291
 292                 case EXC_VSX:
 293                         KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
 294                             ("VSX already enabled for thread"));
 295                         if (!(td->td_pcb->pcb_flags & PCB_VEC))
 296                                 enable_vec(td);
 297                         if (td->td_pcb->pcb_flags & PCB_FPU)
 298                                 save_fpu(td);
 299                         td->td_pcb->pcb_flags |= PCB_VSX;
 300                         enable_fpu(td);
 301                         break;
 302
 303                 case EXC_FAC:
 304                         fscr = mfspr(SPR_FSCR);
 305                         switch (fscr & FSCR_IC_MASK) {
 306                         case FSCR_IC_HTM:
 307                                 CTR0(KTR_TRAP,
 308                                     "Hardware Transactional Memory subsystem disabled");
 309                                 sig = SIGILL;
 310                                 ucode = ILL_ILLOPC;
 311                                 break;
 312                         case FSCR_IC_DSCR:
 313                                 td->td_pcb->pcb_flags |= PCB_CFSCR | PCB_CDSCR;
 314                                 fscr |= FSCR_DSCR;
 315                                 mtspr(SPR_DSCR, 0);
 316                                 break;
 317                         case FSCR_IC_EBB:
 318                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 319                                 fscr |= FSCR_EBB;
 320                                 mtspr(SPR_EBBHR, 0);
 321                                 mtspr(SPR_EBBRR, 0);
 322                                 mtspr(SPR_BESCR, 0);
 323                                 break;
 324                         case FSCR_IC_TAR:
 325                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 326                                 fscr |= FSCR_TAR;
 327                                 mtspr(SPR_TAR, 0);
 328                                 break;
 329                         case FSCR_IC_LM:
 330                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 331                                 fscr |= FSCR_LM;
 332                                 mtspr(SPR_LMRR, 0);
 333                                 mtspr(SPR_LMSER, 0);
 334                                 break;
 335                         default:
 336                                 sig = SIGILL;
 337                                 ucode = ILL_ILLOPC;
 338                         }
 339                         mtspr(SPR_FSCR, fscr & ~FSCR_IC_MASK);
 340                         break;
 341                 case EXC_HEA:
 342                         sig = SIGILL;
 343                         ucode = ILL_ILLOPC;
 344                         break;
 345
 346                 case EXC_VECAST_E:
 347                 case EXC_VECAST_G4:
 348                 case EXC_VECAST_G5:
 349                         /*
 350                          * We get a VPU assist exception for IEEE mode
 351                          * vector operations on denormalized floats.
 352                          * Emulating this is a giant pain, so for now,
 353                          * just switch off IEEE mode and treat them as
 354                          * zero.
 355                          */
 356
 357                         save_vec(td);
 358                         td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
 359                         enable_vec(td);
 360                         break;
 361
 362                 case EXC_ALI:
 363                         if (fix_unaligned(td, frame) != 0) {
 364                                 sig = SIGBUS;
 365                                 ucode = BUS_ADRALN;
 366                         }
 367                         else
 368                                 frame->srr0 += 4;
 369                         break;
 370
 371                 case EXC_DEBUG: /* Single stepping */
 372                         mtspr(SPR_DBSR, mfspr(SPR_DBSR));
 373                         frame->srr1 &= ~PSL_DE;
 374                         frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
 375                         sig = SIGTRAP;
 376                         ucode = TRAP_TRACE;
 377                         break;
 378
 379                 case EXC_PGM:
 380                         /* Identify the trap reason */
 381                         if (frame_is_trap_inst(frame)) {
 382 #ifdef KDTRACE_HOOKS
 383                                 inst = fuword32((const void *)frame->srr0);
 384                                 if (inst == 0x0FFFDDDD &&
 385                                     dtrace_pid_probe_ptr != NULL) {
 386                                         (*dtrace_pid_probe_ptr)(frame);
 387                                         break;
 388                                 }
 389 #endif
 390                                 sig = SIGTRAP;
 391                                 ucode = TRAP_BRKPT;
 392                         } else {
 393                                 sig = ppc_instr_emulate(frame, td);
 394                                 if (sig == SIGILL) {
 395                                         if (frame->srr1 & EXC_PGM_PRIV)
 396                                                 ucode = ILL_PRVOPC;
 397                                         else if (frame->srr1 & EXC_PGM_ILLEGAL)
 398                                                 ucode = ILL_ILLOPC;
 399                                 } else if (sig == SIGFPE)
 400                                         ucode = FPE_FLTINV;     /* Punt for now, invalid operation. */
 401                         }
 402                         break;
 403
 404                 case EXC_MCHK:
 405                         sig = cpu_machine_check(td, frame, &ucode);
 406                         printtrap(frame->exc, frame, 0, (frame->srr1 & PSL_PR));
 407                         break;
 408
 409 #if defined(__powerpc64__) && defined(AIM)
 410                 case EXC_SOFT_PATCH:
 411                         /*
 412                          * Point to the instruction that generated the exception to execute it again,
 413                          * and normalize the register values.
 414                          */
 415                         frame->srr0 -= 4;
 416                         normalize_inputs();
 417                         break;
 418 #endif
 419
 420                 default:
 421                         trap_fatal(frame);
 422                 }
 423         } else {
 424                 /* Kernel Mode Traps */
 425
 426                 KASSERT(cold || td->td_ucred != NULL,
 427                     ("kernel trap doesn't have ucred"));
 428                 switch (type) {
 429                 case EXC_PGM:
 430 #ifdef KDTRACE_HOOKS
 431                         if (frame_is_trap_inst(frame)) {
 432                                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
 433                                         if (dtrace_invop_jump_addr != NULL) {
 434                                                 dtrace_invop_jump_addr(frame);
 435                                                 return;
 436                                         }
 437                                 }
 438                         }
 439 #endif
 440 #ifdef KDB
 441                         if (db_trap_glue(frame))
 442                                 return;
 443 #endif
 444                         break;
 445 #if defined(__powerpc64__) && defined(AIM)
 446                 case EXC_DSE:
 447                         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 &&
 448                             (frame->dar & SEGMENT_MASK) == USER_ADDR) {
 449                                 __asm __volatile ("slbmte %0, %1" ::
 450                                         "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
 451                                         "r"(USER_SLB_SLBE));
 452                                 return;
 453                         }
 454                         break;
 455 #endif
 456                 case EXC_DSI:
 457                         if (trap_pfault(frame, false, NULL, NULL))
 458                                 return;
 459                         break;
 460                 case EXC_MCHK:
 461                         if (handle_onfault(frame))
 462                                 return;
 463                         break;
 464                 default:
 465                         break;
 466                 }
 467                 trap_fatal(frame);
 468         }
 469
 470         if (sig != 0) {
 471                 if (p->p_sysent->sv_transtrap != NULL)
 472                         sig = (p->p_sysent->sv_transtrap)(sig, type);
 473                 ksiginfo_init_trap(&ksi);
 474                 ksi.ksi_signo = sig;
 475                 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
 476                 ksi.ksi_addr = (void *)frame->srr0;
 477                 ksi.ksi_trapno = type;
 478                 trapsignal(td, &ksi);
 479         }
 480
 481         userret(td, frame);
 482 }
 483
 484 static void
 485 trap_fatal(struct trapframe *frame)
 486 {
 487 #ifdef KDB
 488         bool handled;
 489 #endif
 490
 491         printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
 492 #ifdef KDB
 493         if (debugger_on_trap) {
 494                 kdb_why = KDB_WHY_TRAP;
 495                 handled = kdb_trap(frame->exc, 0, frame);
 496                 kdb_why = KDB_WHY_UNSET;
 497                 if (handled)
 498                         return;
 499         }
 500 #endif
 501         panic("%s trap", trapname(frame->exc));
 502 }
 503
 504 static void
 505 cpu_printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 506 {
 507 #ifdef AIM
 508         uint16_t ver;
 509
 510         switch (vector) {
 511         case EXC_MCHK:
 512                 ver = mfpvr() >> 16;
 513                 if (MPC745X_P(ver))
 514                         printf("    msssr0         = 0x%b\n",
 515                             (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
 516         case EXC_DSE:
 517         case EXC_DSI:
 518         case EXC_DTMISS:
 519                 printf("   dsisr           = 0x%lx\n",
 520                     (u_long)frame->cpu.aim.dsisr);
 521                 break;
 522         }
 523 #elif defined(BOOKE)
 524         vm_paddr_t pa;
 525
 526         switch (vector) {
 527         case EXC_MCHK:
 528                 pa = mfspr(SPR_MCARU);
 529                 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
 530                 printf("   mcsr            = 0x%b\n",
 531                     (int)mfspr(SPR_MCSR), MCSR_BITMASK);
 532                 printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
 533         }
 534         printf("   esr             = 0x%b\n",
 535             (int)frame->cpu.booke.esr, ESR_BITMASK);
 536 #endif
 537 }
 538
 539 static void
 540 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 541 {
 542
 543         printf("\n");
 544         printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
 545             user ? "user" : "kernel");
 546         printf("\n");
 547         printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
 548         switch (vector) {
 549         case EXC_DSE:
 550         case EXC_DSI:
 551         case EXC_DTMISS:
 552         case EXC_ALI:
 553         case EXC_MCHK:
 554                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
 555                 break;
 556         case EXC_ISE:
 557         case EXC_ISI:
 558         case EXC_ITMISS:
 559                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
 560                 break;
 561         }
 562         cpu_printtrap(vector, frame, isfatal, user);
 563         printf("   srr0            = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
 564             frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
 565         printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
 566         printf("   current msr     = 0x%" PRIxPTR "\n", mfmsr());
 567         printf("   lr              = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
 568             frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
 569         printf("   frame           = %p\n", frame);
 570         printf("   curthread       = %p\n", curthread);
 571         if (curthread != NULL)
 572                 printf("          pid = %d, comm = %s\n",
 573                     curthread->td_proc->p_pid, curthread->td_name);
 574         printf("\n");
 575 }
 576
 577 /*
 578  * Handles a fatal fault when we have onfault state to recover.  Returns
 579  * non-zero if there was onfault recovery state available.
 580  */
 581 static int
 582 handle_onfault(struct trapframe *frame)
 583 {
 584         struct          thread *td;
 585         jmp_buf         *fb;
 586
 587         td = curthread;
 588         fb = td->td_pcb->pcb_onfault;
 589         if (fb != NULL) {
 590                 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
 591                 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
 592                 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
 593                 frame->fixreg[3] = 1;
 594                 frame->cr = (*fb)->_jb[FAULTBUF_CR];
 595                 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
 596                     18 * sizeof(register_t));
 597                 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
 598                 return (1);
 599         }
 600         return (0);
 601 }
 602
 603 int
 604 cpu_fetch_syscall_args(struct thread *td)
 605 {
 606         struct proc *p;
 607         struct trapframe *frame;
 608         struct syscall_args *sa;
 609         caddr_t params;
 610         size_t argsz;
 611         int error, n, i;
 612
 613         p = td->td_proc;
 614         frame = td->td_frame;
 615         sa = &td->td_sa;
 616
 617         sa->code = frame->fixreg[0];
 618         params = (caddr_t)(frame->fixreg + FIRSTARG);
 619         n = NARGREG;
 620
 621         if (sa->code == SYS_syscall) {
 622                 /*
 623                  * code is first argument,
 624                  * followed by actual args.
 625                  */
 626                 sa->code = *(register_t *) params;
 627                 params += sizeof(register_t);
 628                 n -= 1;
 629         } else if (sa->code == SYS___syscall) {
 630                 /*
 631                  * Like syscall, but code is a quad,
 632                  * so as to maintain quad alignment
 633                  * for the rest of the args.
 634                  */
 635                 if (SV_PROC_FLAG(p, SV_ILP32)) {
 636                         params += sizeof(register_t);
 637                         sa->code = *(register_t *) params;
 638                         params += sizeof(register_t);
 639                         n -= 2;
 640                 } else {
 641                         sa->code = *(register_t *) params;
 642                         params += sizeof(register_t);
 643                         n -= 1;
 644                 }
 645         }
 646
 647         if (sa->code >= p->p_sysent->sv_size)
 648                 sa->callp = &p->p_sysent->sv_table[0];
 649         else
 650                 sa->callp = &p->p_sysent->sv_table[sa->code];
 651
 652         sa->narg = sa->callp->sy_narg;
 653
 654         if (SV_PROC_FLAG(p, SV_ILP32)) {
 655                 argsz = sizeof(uint32_t);
 656
 657                 for (i = 0; i < n; i++)
 658                         sa->args[i] = ((u_register_t *)(params))[i] &
 659                             0xffffffff;
 660         } else {
 661                 argsz = sizeof(uint64_t);
 662
 663                 for (i = 0; i < n; i++)
 664                         sa->args[i] = ((u_register_t *)(params))[i];
 665         }
 666
 667         if (sa->narg > n)
 668                 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
 669                                (sa->narg - n) * argsz);
 670         else
 671                 error = 0;
 672
 673 #ifdef __powerpc64__
 674         if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
 675                 /* Expand the size of arguments copied from the stack */
 676
 677                 for (i = sa->narg; i >= n; i--)
 678                         sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
 679         }
 680 #endif
 681
 682         if (error == 0) {
 683                 td->td_retval[0] = 0;
 684                 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
 685         }
 686         return (error);
 687 }
 688
 689 #include "../../kern/subr_syscall.c"
 690
 691 void
 692 syscall(struct trapframe *frame)
 693 {
 694         struct thread *td;
 695
 696         td = curthread;
 697         td->td_frame = frame;
 698
 699 #if defined(__powerpc64__) && defined(AIM)
 700         /*
 701          * Speculatively restore last user SLB segment, which we know is
 702          * invalid already, since we are likely to do copyin()/copyout().
 703          */
 704         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0)
 705                 __asm __volatile ("slbmte %0, %1; isync" ::
 706                     "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
 707 #endif
 708
 709         syscallenter(td);
 710         syscallret(td);
 711 }
 712
 713 static bool
 714 trap_pfault(struct trapframe *frame, bool user, int *signo, int *ucode)
 715 {
 716         vm_offset_t     eva;
 717         struct          thread *td;
 718         struct          proc *p;
 719         vm_map_t        map;
 720         vm_prot_t       ftype;
 721         int             rv, is_user;
 722
 723         td = curthread;
 724         p = td->td_proc;
 725         if (frame->exc == EXC_ISI) {
 726                 eva = frame->srr0;
 727                 ftype = VM_PROT_EXECUTE;
 728                 if (frame->srr1 & SRR1_ISI_PFAULT)
 729                         ftype |= VM_PROT_READ;
 730         } else {
 731                 eva = frame->dar;
 732 #ifdef BOOKE
 733                 if (frame->cpu.booke.esr & ESR_ST)
 734 #else
 735                 if (frame->cpu.aim.dsisr & DSISR_STORE)
 736 #endif
 737                         ftype = VM_PROT_WRITE;
 738                 else
 739                         ftype = VM_PROT_READ;
 740         }
 741
 742         if (user) {
 743                 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace  NULL"));
 744                 map = &p->p_vmspace->vm_map;
 745         } else {
 746                 rv = pmap_decode_kernel_ptr(eva, &is_user, &eva);
 747                 if (rv != 0)
 748                         return (false);
 749
 750                 if (is_user)
 751                         map = &p->p_vmspace->vm_map;
 752                 else
 753                         map = kernel_map;
 754         }
 755
 756         /* Fault in the page. */
 757         rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode);
 758         /*
 759          * XXXDTRACE: add dtrace_doubletrap_func here?
 760          */
 761
 762         if (rv == KERN_SUCCESS)
 763                 return (true);
 764
 765         if (!user && handle_onfault(frame))
 766                 return (true);
 767
 768         return (false);
 769 }
 770
 771 /*
 772  * For now, this only deals with the particular unaligned access case
 773  * that gcc tends to generate.  Eventually it should handle all of the
 774  * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
 775  */
 776
 777 static int
 778 fix_unaligned(struct thread *td, struct trapframe *frame)
 779 {
 780         struct thread   *fputhread;
 781 #ifdef BOOKE
 782         uint32_t        inst;
 783 #endif
 784         int             indicator, reg;
 785         double          *fpr;
 786
 787 #ifdef __SPE__
 788         indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
 789         if (indicator & ESR_SPE) {
 790                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 791                         return (-1);
 792                 reg = EXC_ALI_INST_RST(inst);
 793                 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
 794                 fputhread = PCPU_GET(vecthread);
 795
 796                 /* Juggle the SPE to ensure that we've initialized
 797                  * the registers, and that their current state is in
 798                  * the PCB.
 799                  */
 800                 if (fputhread != td) {
 801                         if (fputhread)
 802                                 save_vec(fputhread);
 803                         enable_vec(td);
 804                 }
 805                 save_vec(td);
 806
 807                 if (!(indicator & ESR_ST)) {
 808                         if (copyin((void *)frame->dar, fpr,
 809                             sizeof(double)) != 0)
 810                                 return (-1);
 811                         frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
 812                         enable_vec(td);
 813                 } else {
 814                         td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
 815                         if (copyout(fpr, (void *)frame->dar,
 816                             sizeof(double)) != 0)
 817                                 return (-1);
 818                 }
 819                 return (0);
 820         }
 821 #else
 822 #ifdef BOOKE
 823         indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
 824 #else
 825         indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
 826 #endif
 827
 828         switch (indicator) {
 829         case EXC_ALI_LFD:
 830         case EXC_ALI_STFD:
 831 #ifdef BOOKE
 832                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 833                         return (-1);
 834                 reg = EXC_ALI_INST_RST(inst);
 835 #else
 836                 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
 837 #endif
 838                 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
 839                 fputhread = PCPU_GET(fputhread);
 840
 841                 /* Juggle the FPU to ensure that we've initialized
 842                  * the FPRs, and that their current state is in
 843                  * the PCB.
 844                  */
 845                 if (fputhread != td) {
 846                         if (fputhread)
 847                                 save_fpu(fputhread);
 848                         enable_fpu(td);
 849                 }
 850                 save_fpu(td);
 851
 852                 if (indicator == EXC_ALI_LFD) {
 853                         if (copyin((void *)frame->dar, fpr,
 854                             sizeof(double)) != 0)
 855                                 return (-1);
 856                         enable_fpu(td);
 857                 } else {
 858                         if (copyout(fpr, (void *)frame->dar,
 859                             sizeof(double)) != 0)
 860                                 return (-1);
 861                 }
 862                 return (0);
 863                 break;
 864         }
 865 #endif
 866
 867         return (-1);
 868 }
 869
 870 #if defined(__powerpc64__) && defined(AIM)
 871 #define MSKNSHL(x, m, n) "(((" #x ") & " #m ") << " #n ")"
 872 #define MSKNSHR(x, m, n) "(((" #x ") & " #m ") >> " #n ")"
 873
 874 /* xvcpsgndp instruction, built in opcode format.
 875  * This can be changed to use mnemonic after a toolchain update.
 876  */
 877 #define XVCPSGNDP(xt, xa, xb) \
 878         __asm __volatile(".long (" \
 879                 MSKNSHL(60, 0x3f, 26) " | " \
 880                 MSKNSHL(xt, 0x1f, 21) " | " \
 881                 MSKNSHL(xa, 0x1f, 16) " | " \
 882                 MSKNSHL(xb, 0x1f, 11) " | " \
 883                 MSKNSHL(240, 0xff, 3) " | " \
 884                 MSKNSHR(xa,  0x20, 3) " | " \
 885                 MSKNSHR(xa,  0x20, 4) " | " \
 886                 MSKNSHR(xa,  0x20, 5) ")")
 887
 888 /* Macros to normalize 1 or 10 VSX registers */
 889 #define NORM(x) XVCPSGNDP(x, x, x)
 890 #define NORM10(x) \
 891         NORM(x ## 0); NORM(x ## 1); NORM(x ## 2); NORM(x ## 3); NORM(x ## 4); \
 892         NORM(x ## 5); NORM(x ## 6); NORM(x ## 7); NORM(x ## 8); NORM(x ## 9)
 893
 894 static void
 895 normalize_inputs(void)
 896 {
 897         unsigned long msr;
 898
 899         /* enable VSX */
 900         msr = mfmsr();
 901         mtmsr(msr | PSL_VSX);
 902
 903         NORM(0);   NORM(1);   NORM(2);   NORM(3);   NORM(4);
 904         NORM(5);   NORM(6);   NORM(7);   NORM(8);   NORM(9);
 905         NORM10(1); NORM10(2); NORM10(3); NORM10(4); NORM10(5);
 906         NORM(60);  NORM(61);  NORM(62);  NORM(63);
 907
 908         /* restore MSR */
 909         mtmsr(msr);
 910 }
 911 #endif
 912
 913 #ifdef KDB
 914 int
 915 db_trap_glue(struct trapframe *frame)
 916 {
 917
 918         if (!(frame->srr1 & PSL_PR)
 919             && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
 920                 || frame_is_trap_inst(frame)
 921                 || frame->exc == EXC_BPT
 922                 || frame->exc == EXC_DEBUG
 923                 || frame->exc == EXC_DSI)) {
 924                 int type = frame->exc;
 925
 926                 /* Ignore DTrace traps. */
 927                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
 928                         return (0);
 929                 if (frame_is_trap_inst(frame)) {
 930                         type = T_BREAKPOINT;
 931                 }
 932                 return (kdb_trap(type, 0, frame));
 933         }
 934
 935         return (0);
 936 }
 937 #endif