2 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3 * Copyright (C) 1995, 1996 TooLs GmbH.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by TooLs GmbH.
17 * 4. The name of TooLs GmbH may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
42 #include <sys/mutex.h>
43 #include <sys/pioctl.h>
44 #include <sys/ptrace.h>
45 #include <sys/reboot.h>
46 #include <sys/syscall.h>
47 #include <sys/sysent.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
51 #include <sys/signalvar.h>
52 #include <sys/vmmeter.h>
54 #include <security/audit/audit.h>
58 #include <vm/vm_extern.h>
59 #include <vm/vm_param.h>
60 #include <vm/vm_kern.h>
61 #include <vm/vm_map.h>
62 #include <vm/vm_page.h>
64 #include <machine/_inttypes.h>
65 #include <machine/altivec.h>
66 #include <machine/cpu.h>
67 #include <machine/db_machdep.h>
68 #include <machine/fpu.h>
69 #include <machine/frame.h>
70 #include <machine/pcb.h>
71 #include <machine/psl.h>
72 #include <machine/trap.h>
73 #include <machine/spr.h>
74 #include <machine/sr.h>
76 /* Below matches setjmp.S */
77 #define FAULTBUF_LR 21
80 #define FAULTBUF_CR 22
81 #define FAULTBUF_R14 3
83 #define MOREARGS(sp) ((caddr_t)((uintptr_t)(sp) + \
84 sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
86 static void trap_fatal(struct trapframe *frame);
87 static void printtrap(u_int vector, struct trapframe *frame, int isfatal,
89 static int trap_pfault(struct trapframe *frame, int user);
90 static int fix_unaligned(struct thread *td, struct trapframe *frame);
91 static int handle_onfault(struct trapframe *frame);
92 static void syscall(struct trapframe *frame);
94 #if defined(__powerpc64__) && defined(AIM)
95 void handle_kernel_slb_spill(int, register_t, register_t);
96 static int handle_user_slb_spill(pmap_t pm, vm_offset_t addr);
101 int db_trap_glue(struct trapframe *); /* Called from trap_subr.S */
104 struct powerpc_exception {
110 #include <sys/dtrace_bsd.h>
112 int (*dtrace_invop_jump_addr)(struct trapframe *);
115 static struct powerpc_exception powerpc_exceptions[] = {
116 { EXC_CRIT, "critical input" },
117 { EXC_RST, "system reset" },
118 { EXC_MCHK, "machine check" },
119 { EXC_DSI, "data storage interrupt" },
120 { EXC_DSE, "data segment exception" },
121 { EXC_ISI, "instruction storage interrupt" },
122 { EXC_ISE, "instruction segment exception" },
123 { EXC_EXI, "external interrupt" },
124 { EXC_ALI, "alignment" },
125 { EXC_PGM, "program" },
126 { EXC_FPU, "floating-point unavailable" },
127 { EXC_APU, "auxiliary proc unavailable" },
128 { EXC_DECR, "decrementer" },
129 { EXC_FIT, "fixed-interval timer" },
130 { EXC_WDOG, "watchdog timer" },
131 { EXC_SC, "system call" },
132 { EXC_TRC, "trace" },
133 { EXC_FPA, "floating-point assist" },
134 { EXC_DEBUG, "debug" },
135 { EXC_PERF, "performance monitoring" },
136 { EXC_VEC, "altivec unavailable" },
137 { EXC_VSX, "vsx unavailable" },
138 { EXC_FAC, "facility unavailable" },
139 { EXC_ITMISS, "instruction tlb miss" },
140 { EXC_DLMISS, "data load tlb miss" },
141 { EXC_DSMISS, "data store tlb miss" },
142 { EXC_BPT, "instruction breakpoint" },
143 { EXC_SMI, "system management" },
144 { EXC_VECAST_G4, "altivec assist" },
145 { EXC_THRM, "thermal management" },
146 { EXC_RUNMODETRC, "run mode/trace" },
150 #define ESR_BITMASK \
152 "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP" \
153 "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE" \
154 "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \
155 "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
156 #define MCSR_BITMASK \
158 "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7" \
159 "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF" \
160 "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23" \
161 "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
162 #define MSSSR_BITMASK \
164 "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \
165 "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG" \
166 "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23" \
167 "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
171 trapname(u_int vector)
173 struct powerpc_exception *pe;
175 for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
176 if (pe->vector == vector)
184 trap(struct trapframe *frame)
200 type = ucode = frame->exc;
202 user = frame->srr1 & PSL_PR;
204 CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
205 trapname(type), user ? "user" : "kernel");
209 * A trap can occur while DTrace executes a probe. Before
210 * executing the probe, DTrace blocks re-scheduling and sets
211 * a flag in its per-cpu flags to indicate that it doesn't
212 * want to fault. On returning from the probe, the no-fault
213 * flag is cleared and finally re-scheduling is enabled.
215 * If the DTrace kernel module has registered a trap handler,
216 * call it and if it returns non-zero, assume that it has
217 * handled the trap and modified the trap frame so that this
218 * function can return normally.
220 if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
226 td->td_frame = frame;
227 if (td->td_cowgen != p->p_cowgen)
228 thread_cow_update(td);
230 /* User Mode Traps */
234 frame->srr1 &= ~PSL_SE;
239 #if defined(__powerpc64__) && defined(AIM)
242 if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
243 (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
251 sig = trap_pfault(frame, 1);
261 KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
262 ("FPU already enabled for thread"));
267 KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
268 ("Altivec already enabled for thread"));
273 KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
274 ("VSX already enabled for thread"));
275 if (!(td->td_pcb->pcb_flags & PCB_VEC))
277 if (!(td->td_pcb->pcb_flags & PCB_FPU))
279 td->td_pcb->pcb_flags |= PCB_VSX;
292 * We get a VPU assist exception for IEEE mode
293 * vector operations on denormalized floats.
294 * Emulating this is a giant pain, so for now,
295 * just switch off IEEE mode and treat them as
300 td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
305 if (fix_unaligned(td, frame) != 0) {
313 case EXC_DEBUG: /* Single stepping */
314 mtspr(SPR_DBSR, mfspr(SPR_DBSR));
315 frame->srr1 &= ~PSL_DE;
316 frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
322 /* Identify the trap reason */
324 if (frame->srr1 & EXC_PGM_TRAP) {
326 if (frame->cpu.booke.esr & ESR_PTR) {
329 inst = fuword32((const void *)frame->srr0);
330 if (inst == 0x0FFFDDDD &&
331 dtrace_pid_probe_ptr != NULL) {
332 (*dtrace_pid_probe_ptr)(frame);
339 sig = ppc_instr_emulate(frame, td->td_pcb);
341 if (frame->srr1 & EXC_PGM_PRIV)
343 else if (frame->srr1 & EXC_PGM_ILLEGAL)
345 } else if (sig == SIGFPE)
346 ucode = FPE_FLTINV; /* Punt for now, invalid operation. */
352 * Note that this may not be recoverable for the user
353 * process, depending on the type of machine check,
354 * but it at least prevents the kernel from dying.
364 /* Kernel Mode Traps */
366 KASSERT(cold || td->td_ucred != NULL,
367 ("kernel trap doesn't have ucred"));
372 if (frame->srr1 & EXC_PGM_TRAP) {
374 if (frame->cpu.booke.esr & ESR_PTR) {
376 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
377 if (dtrace_invop_jump_addr != NULL) {
378 dtrace_invop_jump_addr(frame);
385 if (db_trap_glue(frame))
389 #if defined(__powerpc64__) && defined(AIM)
391 if ((frame->dar & SEGMENT_MASK) == USER_ADDR) {
392 __asm __volatile ("slbmte %0, %1" ::
393 "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
400 if (trap_pfault(frame, 0) == 0)
404 if (handle_onfault(frame))
414 if (p->p_sysent->sv_transtrap != NULL)
415 sig = (p->p_sysent->sv_transtrap)(sig, type);
416 ksiginfo_init_trap(&ksi);
418 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
419 /* ksi.ksi_addr = ? */
420 ksi.ksi_trapno = type;
421 trapsignal(td, &ksi);
428 trap_fatal(struct trapframe *frame)
431 printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
433 if ((debugger_on_panic || kdb_active) &&
434 kdb_trap(frame->exc, 0, frame))
437 panic("%s trap", trapname(frame->exc));
441 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
449 printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
450 user ? "user" : "kernel");
452 printf(" exception = 0x%x (%s)\n", vector, trapname(vector));
457 printf(" virtual address = 0x%" PRIxPTR "\n", frame->dar);
459 printf(" dsisr = 0x%lx\n",
460 (u_long)frame->cpu.aim.dsisr);
466 printf(" virtual address = 0x%" PRIxPTR "\n", frame->srr0);
472 printf(" msssr0 = 0x%b\n",
473 (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
475 pa = mfspr(SPR_MCARU);
476 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
477 printf(" mcsr = 0x%b\n",
478 (int)mfspr(SPR_MCSR), MCSR_BITMASK);
479 printf(" mcar = 0x%jx\n", (uintmax_t)pa);
484 printf(" esr = 0x%b\n",
485 (int)frame->cpu.booke.esr, ESR_BITMASK);
487 printf(" srr0 = 0x%" PRIxPTR "\n", frame->srr0);
488 printf(" srr1 = 0x%lx\n", (u_long)frame->srr1);
489 printf(" lr = 0x%" PRIxPTR "\n", frame->lr);
490 printf(" curthread = %p\n", curthread);
491 if (curthread != NULL)
492 printf(" pid = %d, comm = %s\n",
493 curthread->td_proc->p_pid, curthread->td_name);
498 * Handles a fatal fault when we have onfault state to recover. Returns
499 * non-zero if there was onfault recovery state available.
502 handle_onfault(struct trapframe *frame)
508 fb = td->td_pcb->pcb_onfault;
510 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
511 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
512 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
513 frame->fixreg[3] = 1;
514 frame->cr = (*fb)->_jb[FAULTBUF_CR];
515 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
516 18 * sizeof(register_t));
517 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
524 cpu_fetch_syscall_args(struct thread *td)
527 struct trapframe *frame;
528 struct syscall_args *sa;
534 frame = td->td_frame;
537 sa->code = frame->fixreg[0];
538 params = (caddr_t)(frame->fixreg + FIRSTARG);
541 if (sa->code == SYS_syscall) {
543 * code is first argument,
544 * followed by actual args.
546 sa->code = *(register_t *) params;
547 params += sizeof(register_t);
549 } else if (sa->code == SYS___syscall) {
551 * Like syscall, but code is a quad,
552 * so as to maintain quad alignment
553 * for the rest of the args.
555 if (SV_PROC_FLAG(p, SV_ILP32)) {
556 params += sizeof(register_t);
557 sa->code = *(register_t *) params;
558 params += sizeof(register_t);
561 sa->code = *(register_t *) params;
562 params += sizeof(register_t);
567 if (p->p_sysent->sv_mask)
568 sa->code &= p->p_sysent->sv_mask;
569 if (sa->code >= p->p_sysent->sv_size)
570 sa->callp = &p->p_sysent->sv_table[0];
572 sa->callp = &p->p_sysent->sv_table[sa->code];
574 sa->narg = sa->callp->sy_narg;
576 if (SV_PROC_FLAG(p, SV_ILP32)) {
577 argsz = sizeof(uint32_t);
579 for (i = 0; i < n; i++)
580 sa->args[i] = ((u_register_t *)(params))[i] &
583 argsz = sizeof(uint64_t);
585 for (i = 0; i < n; i++)
586 sa->args[i] = ((u_register_t *)(params))[i];
590 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
591 (sa->narg - n) * argsz);
596 if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
597 /* Expand the size of arguments copied from the stack */
599 for (i = sa->narg; i >= n; i--)
600 sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
605 td->td_retval[0] = 0;
606 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
611 #include "../../kern/subr_syscall.c"
614 syscall(struct trapframe *frame)
620 td->td_frame = frame;
622 #if defined(__powerpc64__) && defined(AIM)
624 * Speculatively restore last user SLB segment, which we know is
625 * invalid already, since we are likely to do copyin()/copyout().
627 __asm __volatile ("slbmte %0, %1; isync" ::
628 "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
631 error = syscallenter(td);
632 syscallret(td, error);
635 #if defined(__powerpc64__) && defined(AIM)
636 /* Handle kernel SLB faults -- runs in real mode, all seat belts off */
638 handle_kernel_slb_spill(int type, register_t dar, register_t srr0)
640 struct slb *slbcache;
645 addr = (type == EXC_ISE) ? srr0 : dar;
646 slbcache = PCPU_GET(slb);
647 esid = (uintptr_t)addr >> ADDR_SR_SHFT;
648 slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID;
650 /* See if the hardware flushed this somehow (can happen in LPARs) */
651 for (i = 0; i < n_slbs; i++)
652 if (slbcache[i].slbe == (slbe | (uint64_t)i))
655 /* Not in the map, needs to actually be added */
656 slbv = kernel_va_to_slbv(addr);
657 if (slbcache[USER_SLB_SLOT].slbe == 0) {
658 for (i = 0; i < n_slbs; i++) {
659 if (i == USER_SLB_SLOT)
661 if (!(slbcache[i].slbe & SLBE_VALID))
666 slbcache[USER_SLB_SLOT].slbe = 1;
669 /* Sacrifice a random SLB entry that is not the user entry */
671 if (i == USER_SLB_SLOT)
675 /* Write new entry */
676 slbcache[i].slbv = slbv;
677 slbcache[i].slbe = slbe | (uint64_t)i;
679 /* Trap handler will restore from cache on exit */
683 handle_user_slb_spill(pmap_t pm, vm_offset_t addr)
685 struct slb *user_entry;
689 esid = (uintptr_t)addr >> ADDR_SR_SHFT;
692 user_entry = user_va_to_slb_entry(pm, addr);
694 if (user_entry == NULL) {
695 /* allocate_vsid auto-spills it */
696 (void)allocate_user_vsid(pm, esid, 0);
699 * Check that another CPU has not already mapped this.
700 * XXX: Per-thread SLB caches would be better.
702 for (i = 0; i < pm->pm_slb_len; i++)
703 if (pm->pm_slb[i] == user_entry)
706 if (i == pm->pm_slb_len)
707 slb_insert_user(pm, user_entry);
716 trap_pfault(struct trapframe *frame, int user)
730 if (frame->exc == EXC_ISI) {
732 ftype = VM_PROT_EXECUTE;
733 if (frame->srr1 & SRR1_ISI_PFAULT)
734 ftype |= VM_PROT_READ;
738 if (frame->cpu.booke.esr & ESR_ST)
740 if (frame->cpu.aim.dsisr & DSISR_STORE)
742 ftype = VM_PROT_WRITE;
744 ftype = VM_PROT_READ;
748 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace NULL"));
749 map = &p->p_vmspace->vm_map;
752 if (eva < VM_MAXUSER_ADDRESS) {
754 if ((eva >> ADDR_SR_SHFT) == (USER_ADDR >> ADDR_SR_SHFT)) {
756 map = &p->p_vmspace->vm_map;
759 user_sr = td->td_pcb->pcb_cpu.aim.usr_segm;
760 eva &= ADDR_PIDX | ADDR_POFF;
761 eva |= user_sr << ADDR_SR_SHFT;
767 va = trunc_page(eva);
769 /* Fault in the page. */
770 rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
772 * XXXDTRACE: add dtrace_doubletrap_func here?
775 if (rv == KERN_SUCCESS)
778 if (!user && handle_onfault(frame))
785 * For now, this only deals with the particular unaligned access case
786 * that gcc tends to generate. Eventually it should handle all of the
787 * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
791 fix_unaligned(struct thread *td, struct trapframe *frame)
793 struct thread *fputhread;
801 indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
802 if (indicator & ESR_SPE) {
803 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
805 reg = EXC_ALI_SPE_REG(inst);
806 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
807 fputhread = PCPU_GET(vecthread);
809 /* Juggle the SPE to ensure that we've initialized
810 * the registers, and that their current state is in
813 if (fputhread != td) {
820 if (!(indicator & ESR_ST)) {
821 if (copyin((void *)frame->dar, fpr,
822 sizeof(double)) != 0)
824 frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
827 td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
828 if (copyout(fpr, (void *)frame->dar,
829 sizeof(double)) != 0)
835 indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
840 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
841 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
842 fputhread = PCPU_GET(fputhread);
844 /* Juggle the FPU to ensure that we've initialized
845 * the FPRs, and that their current state is in
848 if (fputhread != td) {
855 if (indicator == EXC_ALI_LFD) {
856 if (copyin((void *)frame->dar, fpr,
857 sizeof(double)) != 0)
861 if (copyout(fpr, (void *)frame->dar,
862 sizeof(double)) != 0)
875 db_trap_glue(struct trapframe *frame)
878 if (!(frame->srr1 & PSL_PR)
879 && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
881 || (frame->exc == EXC_PGM
882 && (frame->srr1 & EXC_PGM_TRAP))
884 || (frame->exc == EXC_DEBUG)
885 || (frame->cpu.booke.esr & ESR_PTR)
887 || frame->exc == EXC_BPT
888 || frame->exc == EXC_DSI)) {
889 int type = frame->exc;
891 /* Ignore DTrace traps. */
892 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
895 if (type == EXC_PGM && (frame->srr1 & EXC_PGM_TRAP)) {
897 if (type == EXC_DEBUG ||
898 (frame->cpu.booke.esr & ESR_PTR)) {
902 return (kdb_trap(type, 0, frame));