sys/powerpc/powerpc/trap.c

   1 /*-
   2  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   3  * Copyright (C) 1995, 1996 TooLs GmbH.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. All advertising materials mentioning features or use of this software
  15  *    must display the following acknowledgement:
  16  *      This product includes software developed by TooLs GmbH.
  17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
  32  */
  33
  34 #include <sys/cdefs.h>
  35 __FBSDID("$FreeBSD$");
  36
  37 #include <sys/param.h>
  38 #include <sys/kdb.h>
  39 #include <sys/proc.h>
  40 #include <sys/ktr.h>
  41 #include <sys/lock.h>
  42 #include <sys/mutex.h>
  43 #include <sys/pioctl.h>
  44 #include <sys/ptrace.h>
  45 #include <sys/reboot.h>
  46 #include <sys/syscall.h>
  47 #include <sys/sysent.h>
  48 #include <sys/systm.h>
  49 #include <sys/kernel.h>
  50 #include <sys/uio.h>
  51 #include <sys/signalvar.h>
  52 #include <sys/vmmeter.h>
  53
  54 #include <security/audit/audit.h>
  55
  56 #include <vm/vm.h>
  57 #include <vm/pmap.h>
  58 #include <vm/vm_extern.h>
  59 #include <vm/vm_param.h>
  60 #include <vm/vm_kern.h>
  61 #include <vm/vm_map.h>
  62 #include <vm/vm_page.h>
  63
  64 #include <machine/_inttypes.h>
  65 #include <machine/altivec.h>
  66 #include <machine/cpu.h>
  67 #include <machine/db_machdep.h>
  68 #include <machine/fpu.h>
  69 #include <machine/frame.h>
  70 #include <machine/pcb.h>
  71 #include <machine/psl.h>
  72 #include <machine/trap.h>
  73 #include <machine/spr.h>
  74 #include <machine/sr.h>
  75
  76 /* Below matches setjmp.S */
  77 #define FAULTBUF_LR     21
  78 #define FAULTBUF_R1     1
  79 #define FAULTBUF_R2     2
  80 #define FAULTBUF_CR     22
  81 #define FAULTBUF_R14    3
  82
  83 #define MOREARGS(sp)    ((caddr_t)((uintptr_t)(sp) + \
  84     sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
  85
  86 static void     trap_fatal(struct trapframe *frame);
  87 static void     printtrap(u_int vector, struct trapframe *frame, int isfatal,
  88                     int user);
  89 static int      trap_pfault(struct trapframe *frame, int user);
  90 static int      fix_unaligned(struct thread *td, struct trapframe *frame);
  91 static int      handle_onfault(struct trapframe *frame);
  92 static void     syscall(struct trapframe *frame);
  93
  94 #if defined(__powerpc64__) && defined(AIM)
  95        void     handle_kernel_slb_spill(int, register_t, register_t);
  96 static int      handle_user_slb_spill(pmap_t pm, vm_offset_t addr);
  97 extern int      n_slbs;
  98 #endif
  99
 100 #ifdef KDB
 101 int db_trap_glue(struct trapframe *);           /* Called from trap_subr.S */
 102 #endif
 103
 104 struct powerpc_exception {
 105         u_int   vector;
 106         char    *name;
 107 };
 108
 109 #ifdef KDTRACE_HOOKS
 110 #include <sys/dtrace_bsd.h>
 111
 112 int (*dtrace_invop_jump_addr)(struct trapframe *);
 113 #endif
 114
 115 static struct powerpc_exception powerpc_exceptions[] = {
 116         { EXC_CRIT,     "critical input" },
 117         { EXC_RST,      "system reset" },
 118         { EXC_MCHK,     "machine check" },
 119         { EXC_DSI,      "data storage interrupt" },
 120         { EXC_DSE,      "data segment exception" },
 121         { EXC_ISI,      "instruction storage interrupt" },
 122         { EXC_ISE,      "instruction segment exception" },
 123         { EXC_EXI,      "external interrupt" },
 124         { EXC_ALI,      "alignment" },
 125         { EXC_PGM,      "program" },
 126         { EXC_FPU,      "floating-point unavailable" },
 127         { EXC_APU,      "auxiliary proc unavailable" },
 128         { EXC_DECR,     "decrementer" },
 129         { EXC_FIT,      "fixed-interval timer" },
 130         { EXC_WDOG,     "watchdog timer" },
 131         { EXC_SC,       "system call" },
 132         { EXC_TRC,      "trace" },
 133         { EXC_FPA,      "floating-point assist" },
 134         { EXC_DEBUG,    "debug" },
 135         { EXC_PERF,     "performance monitoring" },
 136         { EXC_VEC,      "altivec unavailable" },
 137         { EXC_VSX,      "vsx unavailable" },
 138         { EXC_FAC,      "facility unavailable" },
 139         { EXC_ITMISS,   "instruction tlb miss" },
 140         { EXC_DLMISS,   "data load tlb miss" },
 141         { EXC_DSMISS,   "data store tlb miss" },
 142         { EXC_BPT,      "instruction breakpoint" },
 143         { EXC_SMI,      "system management" },
 144         { EXC_VECAST_G4,        "altivec assist" },
 145         { EXC_THRM,     "thermal management" },
 146         { EXC_RUNMODETRC,       "run mode/trace" },
 147         { EXC_LAST,     NULL }
 148 };
 149
 150 #define ESR_BITMASK                                                     \
 151     "\20"                                                               \
 152     "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP"               \
 153     "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE"             \
 154     "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23"          \
 155     "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
 156 #define MCSR_BITMASK                                                    \
 157     "\20"                                                               \
 158     "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7"      \
 159     "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF"             \
 160     "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23"            \
 161     "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
 162 #define MSSSR_BITMASK                                                   \
 163     "\20"                                                               \
 164     "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7"                  \
 165     "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG"      \
 166     "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23"        \
 167     "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
 168
 169
 170 static const char *
 171 trapname(u_int vector)
 172 {
 173         struct  powerpc_exception *pe;
 174
 175         for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
 176                 if (pe->vector == vector)
 177                         return (pe->name);
 178         }
 179
 180         return ("unknown");
 181 }
 182
 183 void
 184 trap(struct trapframe *frame)
 185 {
 186         struct thread   *td;
 187         struct proc     *p;
 188 #ifdef KDTRACE_HOOKS
 189         uint32_t inst;
 190 #endif
 191         int             sig, type, user;
 192         u_int           ucode;
 193         ksiginfo_t      ksi;
 194
 195         VM_CNT_INC(v_trap);
 196
 197         td = curthread;
 198         p = td->td_proc;
 199
 200         type = ucode = frame->exc;
 201         sig = 0;
 202         user = frame->srr1 & PSL_PR;
 203
 204         CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
 205             trapname(type), user ? "user" : "kernel");
 206
 207 #ifdef KDTRACE_HOOKS
 208         /*
 209          * A trap can occur while DTrace executes a probe. Before
 210          * executing the probe, DTrace blocks re-scheduling and sets
 211          * a flag in its per-cpu flags to indicate that it doesn't
 212          * want to fault. On returning from the probe, the no-fault
 213          * flag is cleared and finally re-scheduling is enabled.
 214          *
 215          * If the DTrace kernel module has registered a trap handler,
 216          * call it and if it returns non-zero, assume that it has
 217          * handled the trap and modified the trap frame so that this
 218          * function can return normally.
 219          */
 220         if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
 221                 return;
 222 #endif
 223
 224         if (user) {
 225                 td->td_pticks = 0;
 226                 td->td_frame = frame;
 227                 if (td->td_cowgen != p->p_cowgen)
 228                         thread_cow_update(td);
 229
 230                 /* User Mode Traps */
 231                 switch (type) {
 232                 case EXC_RUNMODETRC:
 233                 case EXC_TRC:
 234                         frame->srr1 &= ~PSL_SE;
 235                         sig = SIGTRAP;
 236                         ucode = TRAP_TRACE;
 237                         break;
 238
 239 #if defined(__powerpc64__) && defined(AIM)
 240                 case EXC_ISE:
 241                 case EXC_DSE:
 242                         if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
 243                             (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
 244                                 sig = SIGSEGV;
 245                                 ucode = SEGV_MAPERR;
 246                         }
 247                         break;
 248 #endif
 249                 case EXC_DSI:
 250                 case EXC_ISI:
 251                         sig = trap_pfault(frame, 1);
 252                         if (sig == SIGSEGV)
 253                                 ucode = SEGV_MAPERR;
 254                         break;
 255
 256                 case EXC_SC:
 257                         syscall(frame);
 258                         break;
 259
 260                 case EXC_FPU:
 261                         KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
 262                             ("FPU already enabled for thread"));
 263                         enable_fpu(td);
 264                         break;
 265
 266                 case EXC_VEC:
 267                         KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
 268                             ("Altivec already enabled for thread"));
 269                         enable_vec(td);
 270                         break;
 271
 272                 case EXC_VSX:
 273                         KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
 274                             ("VSX already enabled for thread"));
 275                         if (!(td->td_pcb->pcb_flags & PCB_VEC))
 276                                 enable_vec(td);
 277                         if (!(td->td_pcb->pcb_flags & PCB_FPU))
 278                                 save_fpu(td);
 279                         td->td_pcb->pcb_flags |= PCB_VSX;
 280                         enable_fpu(td);
 281                         break;
 282
 283                 case EXC_FAC:
 284                         sig = SIGILL;
 285                         ucode = ILL_ILLOPC;
 286                         break;
 287
 288                 case EXC_VECAST_E:
 289                 case EXC_VECAST_G4:
 290                 case EXC_VECAST_G5:
 291                         /*
 292                          * We get a VPU assist exception for IEEE mode
 293                          * vector operations on denormalized floats.
 294                          * Emulating this is a giant pain, so for now,
 295                          * just switch off IEEE mode and treat them as
 296                          * zero.
 297                          */
 298
 299                         save_vec(td);
 300                         td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
 301                         enable_vec(td);
 302                         break;
 303
 304                 case EXC_ALI:
 305                         if (fix_unaligned(td, frame) != 0) {
 306                                 sig = SIGBUS;
 307                                 ucode = BUS_ADRALN;
 308                         }
 309                         else
 310                                 frame->srr0 += 4;
 311                         break;
 312
 313                 case EXC_DEBUG: /* Single stepping */
 314                         mtspr(SPR_DBSR, mfspr(SPR_DBSR));
 315                         frame->srr1 &= ~PSL_DE;
 316                         frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
 317                         sig = SIGTRAP;
 318                         ucode = TRAP_TRACE;
 319                         break;
 320
 321                 case EXC_PGM:
 322                         /* Identify the trap reason */
 323 #ifdef AIM
 324                         if (frame->srr1 & EXC_PGM_TRAP) {
 325 #else
 326                         if (frame->cpu.booke.esr & ESR_PTR) {
 327 #endif
 328 #ifdef KDTRACE_HOOKS
 329                                 inst = fuword32((const void *)frame->srr0);
 330                                 if (inst == 0x0FFFDDDD &&
 331                                     dtrace_pid_probe_ptr != NULL) {
 332                                         (*dtrace_pid_probe_ptr)(frame);
 333                                         break;
 334                                 }
 335 #endif
 336                                 sig = SIGTRAP;
 337                                 ucode = TRAP_BRKPT;
 338                         } else {
 339                                 sig = ppc_instr_emulate(frame, td->td_pcb);
 340                                 if (sig == SIGILL) {
 341                                         if (frame->srr1 & EXC_PGM_PRIV)
 342                                                 ucode = ILL_PRVOPC;
 343                                         else if (frame->srr1 & EXC_PGM_ILLEGAL)
 344                                                 ucode = ILL_ILLOPC;
 345                                 } else if (sig == SIGFPE)
 346                                         ucode = FPE_FLTINV;     /* Punt for now, invalid operation. */
 347                         }
 348                         break;
 349
 350                 case EXC_MCHK:
 351                         /*
 352                          * Note that this may not be recoverable for the user
 353                          * process, depending on the type of machine check,
 354                          * but it at least prevents the kernel from dying.
 355                          */
 356                         sig = SIGBUS;
 357                         ucode = BUS_OBJERR;
 358                         break;
 359
 360                 default:
 361                         trap_fatal(frame);
 362                 }
 363         } else {
 364                 /* Kernel Mode Traps */
 365
 366                 KASSERT(cold || td->td_ucred != NULL,
 367                     ("kernel trap doesn't have ucred"));
 368                 switch (type) {
 369                 case EXC_PGM:
 370 #ifdef KDTRACE_HOOKS
 371 #ifdef AIM
 372                         if (frame->srr1 & EXC_PGM_TRAP) {
 373 #else
 374                         if (frame->cpu.booke.esr & ESR_PTR) {
 375 #endif
 376                                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
 377                                         if (dtrace_invop_jump_addr != NULL) {
 378                                                 dtrace_invop_jump_addr(frame);
 379                                                 return;
 380                                         }
 381                                 }
 382                         }
 383 #endif
 384 #ifdef KDB
 385                         if (db_trap_glue(frame))
 386                                 return;
 387 #endif
 388                         break;
 389 #if defined(__powerpc64__) && defined(AIM)
 390                 case EXC_DSE:
 391                         if ((frame->dar & SEGMENT_MASK) == USER_ADDR) {
 392                                 __asm __volatile ("slbmte %0, %1" ::
 393                                         "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
 394                                         "r"(USER_SLB_SLBE));
 395                                 return;
 396                         }
 397                         break;
 398 #endif
 399                 case EXC_DSI:
 400                         if (trap_pfault(frame, 0) == 0)
 401                                 return;
 402                         break;
 403                 case EXC_MCHK:
 404                         if (handle_onfault(frame))
 405                                 return;
 406                         break;
 407                 default:
 408                         break;
 409                 }
 410                 trap_fatal(frame);
 411         }
 412
 413         if (sig != 0) {
 414                 if (p->p_sysent->sv_transtrap != NULL)
 415                         sig = (p->p_sysent->sv_transtrap)(sig, type);
 416                 ksiginfo_init_trap(&ksi);
 417                 ksi.ksi_signo = sig;
 418                 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
 419                 /* ksi.ksi_addr = ? */
 420                 ksi.ksi_trapno = type;
 421                 trapsignal(td, &ksi);
 422         }
 423
 424         userret(td, frame);
 425 }
 426
 427 static void
 428 trap_fatal(struct trapframe *frame)
 429 {
 430
 431         printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
 432 #ifdef KDB
 433         if ((debugger_on_panic || kdb_active) &&
 434             kdb_trap(frame->exc, 0, frame))
 435                 return;
 436 #endif
 437         panic("%s trap", trapname(frame->exc));
 438 }
 439
 440 static void
 441 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 442 {
 443         uint16_t ver;
 444 #ifdef BOOKE
 445         vm_paddr_t pa;
 446 #endif
 447
 448         printf("\n");
 449         printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
 450             user ? "user" : "kernel");
 451         printf("\n");
 452         printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
 453         switch (vector) {
 454         case EXC_DSE:
 455         case EXC_DSI:
 456         case EXC_DTMISS:
 457                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
 458 #ifdef AIM
 459                 printf("   dsisr           = 0x%lx\n",
 460                     (u_long)frame->cpu.aim.dsisr);
 461 #endif
 462                 break;
 463         case EXC_ISE:
 464         case EXC_ISI:
 465         case EXC_ITMISS:
 466                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
 467                 break;
 468         case EXC_MCHK:
 469                 ver = mfpvr() >> 16;
 470 #if defined(AIM)
 471                 if (MPC745X_P(ver))
 472                         printf("    msssr0         = 0x%b\n",
 473                             (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
 474 #elif defined(BOOKE)
 475                 pa = mfspr(SPR_MCARU);
 476                 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
 477                 printf("   mcsr            = 0x%b\n",
 478                     (int)mfspr(SPR_MCSR), MCSR_BITMASK);
 479                 printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
 480 #endif
 481                 break;
 482         }
 483 #ifdef BOOKE
 484         printf("   esr             = 0x%b\n",
 485             (int)frame->cpu.booke.esr, ESR_BITMASK);
 486 #endif
 487         printf("   srr0            = 0x%" PRIxPTR "\n", frame->srr0);
 488         printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
 489         printf("   lr              = 0x%" PRIxPTR "\n", frame->lr);
 490         printf("   curthread       = %p\n", curthread);
 491         if (curthread != NULL)
 492                 printf("          pid = %d, comm = %s\n",
 493                     curthread->td_proc->p_pid, curthread->td_name);
 494         printf("\n");
 495 }
 496
 497 /*
 498  * Handles a fatal fault when we have onfault state to recover.  Returns
 499  * non-zero if there was onfault recovery state available.
 500  */
 501 static int
 502 handle_onfault(struct trapframe *frame)
 503 {
 504         struct          thread *td;
 505         jmp_buf         *fb;
 506
 507         td = curthread;
 508         fb = td->td_pcb->pcb_onfault;
 509         if (fb != NULL) {
 510                 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
 511                 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
 512                 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
 513                 frame->fixreg[3] = 1;
 514                 frame->cr = (*fb)->_jb[FAULTBUF_CR];
 515                 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
 516                     18 * sizeof(register_t));
 517                 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
 518                 return (1);
 519         }
 520         return (0);
 521 }
 522
 523 int
 524 cpu_fetch_syscall_args(struct thread *td)
 525 {
 526         struct proc *p;
 527         struct trapframe *frame;
 528         struct syscall_args *sa;
 529         caddr_t params;
 530         size_t argsz;
 531         int error, n, i;
 532
 533         p = td->td_proc;
 534         frame = td->td_frame;
 535         sa = &td->td_sa;
 536
 537         sa->code = frame->fixreg[0];
 538         params = (caddr_t)(frame->fixreg + FIRSTARG);
 539         n = NARGREG;
 540
 541         if (sa->code == SYS_syscall) {
 542                 /*
 543                  * code is first argument,
 544                  * followed by actual args.
 545                  */
 546                 sa->code = *(register_t *) params;
 547                 params += sizeof(register_t);
 548                 n -= 1;
 549         } else if (sa->code == SYS___syscall) {
 550                 /*
 551                  * Like syscall, but code is a quad,
 552                  * so as to maintain quad alignment
 553                  * for the rest of the args.
 554                  */
 555                 if (SV_PROC_FLAG(p, SV_ILP32)) {
 556                         params += sizeof(register_t);
 557                         sa->code = *(register_t *) params;
 558                         params += sizeof(register_t);
 559                         n -= 2;
 560                 } else {
 561                         sa->code = *(register_t *) params;
 562                         params += sizeof(register_t);
 563                         n -= 1;
 564                 }
 565         }
 566
 567         if (p->p_sysent->sv_mask)
 568                 sa->code &= p->p_sysent->sv_mask;
 569         if (sa->code >= p->p_sysent->sv_size)
 570                 sa->callp = &p->p_sysent->sv_table[0];
 571         else
 572                 sa->callp = &p->p_sysent->sv_table[sa->code];
 573
 574         sa->narg = sa->callp->sy_narg;
 575
 576         if (SV_PROC_FLAG(p, SV_ILP32)) {
 577                 argsz = sizeof(uint32_t);
 578
 579                 for (i = 0; i < n; i++)
 580                         sa->args[i] = ((u_register_t *)(params))[i] &
 581                             0xffffffff;
 582         } else {
 583                 argsz = sizeof(uint64_t);
 584
 585                 for (i = 0; i < n; i++)
 586                         sa->args[i] = ((u_register_t *)(params))[i];
 587         }
 588
 589         if (sa->narg > n)
 590                 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
 591                                (sa->narg - n) * argsz);
 592         else
 593                 error = 0;
 594
 595 #ifdef __powerpc64__
 596         if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
 597                 /* Expand the size of arguments copied from the stack */
 598
 599                 for (i = sa->narg; i >= n; i--)
 600                         sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
 601         }
 602 #endif
 603
 604         if (error == 0) {
 605                 td->td_retval[0] = 0;
 606                 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
 607         }
 608         return (error);
 609 }
 610
 611 #include "../../kern/subr_syscall.c"
 612
 613 void
 614 syscall(struct trapframe *frame)
 615 {
 616         struct thread *td;
 617         int error;
 618
 619         td = curthread;
 620         td->td_frame = frame;
 621
 622 #if defined(__powerpc64__) && defined(AIM)
 623         /*
 624          * Speculatively restore last user SLB segment, which we know is
 625          * invalid already, since we are likely to do copyin()/copyout().
 626          */
 627         __asm __volatile ("slbmte %0, %1; isync" ::
 628             "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
 629 #endif
 630
 631         error = syscallenter(td);
 632         syscallret(td, error);
 633 }
 634
 635 #if defined(__powerpc64__) && defined(AIM)
 636 /* Handle kernel SLB faults -- runs in real mode, all seat belts off */
 637 void
 638 handle_kernel_slb_spill(int type, register_t dar, register_t srr0)
 639 {
 640         struct slb *slbcache;
 641         uint64_t slbe, slbv;
 642         uint64_t esid, addr;
 643         int i;
 644
 645         addr = (type == EXC_ISE) ? srr0 : dar;
 646         slbcache = PCPU_GET(slb);
 647         esid = (uintptr_t)addr >> ADDR_SR_SHFT;
 648         slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID;
 649
 650         /* See if the hardware flushed this somehow (can happen in LPARs) */
 651         for (i = 0; i < n_slbs; i++)
 652                 if (slbcache[i].slbe == (slbe | (uint64_t)i))
 653                         return;
 654
 655         /* Not in the map, needs to actually be added */
 656         slbv = kernel_va_to_slbv(addr);
 657         if (slbcache[USER_SLB_SLOT].slbe == 0) {
 658                 for (i = 0; i < n_slbs; i++) {
 659                         if (i == USER_SLB_SLOT)
 660                                 continue;
 661                         if (!(slbcache[i].slbe & SLBE_VALID))
 662                                 goto fillkernslb;
 663                 }
 664
 665                 if (i == n_slbs)
 666                         slbcache[USER_SLB_SLOT].slbe = 1;
 667         }
 668
 669         /* Sacrifice a random SLB entry that is not the user entry */
 670         i = mftb() % n_slbs;
 671         if (i == USER_SLB_SLOT)
 672                 i = (i+1) % n_slbs;
 673
 674 fillkernslb:
 675         /* Write new entry */
 676         slbcache[i].slbv = slbv;
 677         slbcache[i].slbe = slbe | (uint64_t)i;
 678
 679         /* Trap handler will restore from cache on exit */
 680 }
 681
 682 static int
 683 handle_user_slb_spill(pmap_t pm, vm_offset_t addr)
 684 {
 685         struct slb *user_entry;
 686         uint64_t esid;
 687         int i;
 688
 689         esid = (uintptr_t)addr >> ADDR_SR_SHFT;
 690
 691         PMAP_LOCK(pm);
 692         user_entry = user_va_to_slb_entry(pm, addr);
 693
 694         if (user_entry == NULL) {
 695                 /* allocate_vsid auto-spills it */
 696                 (void)allocate_user_vsid(pm, esid, 0);
 697         } else {
 698                 /*
 699                  * Check that another CPU has not already mapped this.
 700                  * XXX: Per-thread SLB caches would be better.
 701                  */
 702                 for (i = 0; i < pm->pm_slb_len; i++)
 703                         if (pm->pm_slb[i] == user_entry)
 704                                 break;
 705
 706                 if (i == pm->pm_slb_len)
 707                         slb_insert_user(pm, user_entry);
 708         }
 709         PMAP_UNLOCK(pm);
 710
 711         return (0);
 712 }
 713 #endif
 714
 715 static int
 716 trap_pfault(struct trapframe *frame, int user)
 717 {
 718         vm_offset_t     eva, va;
 719         struct          thread *td;
 720         struct          proc *p;
 721         vm_map_t        map;
 722         vm_prot_t       ftype;
 723         int             rv;
 724 #ifdef AIM
 725         register_t      user_sr;
 726 #endif
 727
 728         td = curthread;
 729         p = td->td_proc;
 730         if (frame->exc == EXC_ISI) {
 731                 eva = frame->srr0;
 732                 ftype = VM_PROT_EXECUTE;
 733                 if (frame->srr1 & SRR1_ISI_PFAULT)
 734                         ftype |= VM_PROT_READ;
 735         } else {
 736                 eva = frame->dar;
 737 #ifdef BOOKE
 738                 if (frame->cpu.booke.esr & ESR_ST)
 739 #else
 740                 if (frame->cpu.aim.dsisr & DSISR_STORE)
 741 #endif
 742                         ftype = VM_PROT_WRITE;
 743                 else
 744                         ftype = VM_PROT_READ;
 745         }
 746
 747         if (user) {
 748                 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace  NULL"));
 749                 map = &p->p_vmspace->vm_map;
 750         } else {
 751 #ifdef BOOKE
 752                 if (eva < VM_MAXUSER_ADDRESS) {
 753 #else
 754                 if ((eva >> ADDR_SR_SHFT) == (USER_ADDR >> ADDR_SR_SHFT)) {
 755 #endif
 756                         map = &p->p_vmspace->vm_map;
 757
 758 #ifdef AIM
 759                         user_sr = td->td_pcb->pcb_cpu.aim.usr_segm;
 760                         eva &= ADDR_PIDX | ADDR_POFF;
 761                         eva |= user_sr << ADDR_SR_SHFT;
 762 #endif
 763                 } else {
 764                         map = kernel_map;
 765                 }
 766         }
 767         va = trunc_page(eva);
 768
 769         /* Fault in the page. */
 770         rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
 771         /*
 772          * XXXDTRACE: add dtrace_doubletrap_func here?
 773          */
 774
 775         if (rv == KERN_SUCCESS)
 776                 return (0);
 777
 778         if (!user && handle_onfault(frame))
 779                 return (0);
 780
 781         return (SIGSEGV);
 782 }
 783
 784 /*
 785  * For now, this only deals with the particular unaligned access case
 786  * that gcc tends to generate.  Eventually it should handle all of the
 787  * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
 788  */
 789
 790 static int
 791 fix_unaligned(struct thread *td, struct trapframe *frame)
 792 {
 793         struct thread   *fputhread;
 794 #ifdef  __SPE__
 795         uint32_t        inst;
 796 #endif
 797         int             indicator, reg;
 798         double          *fpr;
 799
 800 #ifdef __SPE__
 801         indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
 802         if (indicator & ESR_SPE) {
 803                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 804                         return (-1);
 805                 reg = EXC_ALI_SPE_REG(inst);
 806                 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
 807                 fputhread = PCPU_GET(vecthread);
 808
 809                 /* Juggle the SPE to ensure that we've initialized
 810                  * the registers, and that their current state is in
 811                  * the PCB.
 812                  */
 813                 if (fputhread != td) {
 814                         if (fputhread)
 815                                 save_vec(fputhread);
 816                         enable_vec(td);
 817                 }
 818                 save_vec(td);
 819
 820                 if (!(indicator & ESR_ST)) {
 821                         if (copyin((void *)frame->dar, fpr,
 822                             sizeof(double)) != 0)
 823                                 return (-1);
 824                         frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
 825                         enable_vec(td);
 826                 } else {
 827                         td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
 828                         if (copyout(fpr, (void *)frame->dar,
 829                             sizeof(double)) != 0)
 830                                 return (-1);
 831                 }
 832                 return (0);
 833         }
 834 #else
 835         indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
 836
 837         switch (indicator) {
 838         case EXC_ALI_LFD:
 839         case EXC_ALI_STFD:
 840                 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
 841                 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
 842                 fputhread = PCPU_GET(fputhread);
 843
 844                 /* Juggle the FPU to ensure that we've initialized
 845                  * the FPRs, and that their current state is in
 846                  * the PCB.
 847                  */
 848                 if (fputhread != td) {
 849                         if (fputhread)
 850                                 save_fpu(fputhread);
 851                         enable_fpu(td);
 852                 }
 853                 save_fpu(td);
 854
 855                 if (indicator == EXC_ALI_LFD) {
 856                         if (copyin((void *)frame->dar, fpr,
 857                             sizeof(double)) != 0)
 858                                 return (-1);
 859                         enable_fpu(td);
 860                 } else {
 861                         if (copyout(fpr, (void *)frame->dar,
 862                             sizeof(double)) != 0)
 863                                 return (-1);
 864                 }
 865                 return (0);
 866                 break;
 867         }
 868 #endif
 869
 870         return (-1);
 871 }
 872
 873 #ifdef KDB
 874 int
 875 db_trap_glue(struct trapframe *frame)
 876 {
 877
 878         if (!(frame->srr1 & PSL_PR)
 879             && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
 880 #ifdef AIM
 881                 || (frame->exc == EXC_PGM
 882                     && (frame->srr1 & EXC_PGM_TRAP))
 883 #else
 884                 || (frame->exc == EXC_DEBUG)
 885                 || (frame->cpu.booke.esr & ESR_PTR)
 886 #endif
 887                 || frame->exc == EXC_BPT
 888                 || frame->exc == EXC_DSI)) {
 889                 int type = frame->exc;
 890
 891                 /* Ignore DTrace traps. */
 892                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
 893                         return (0);
 894 #ifdef AIM
 895                 if (type == EXC_PGM && (frame->srr1 & EXC_PGM_TRAP)) {
 896 #else
 897                 if (type == EXC_DEBUG ||
 898                     (frame->cpu.booke.esr & ESR_PTR)) {
 899 #endif
 900                         type = T_BREAKPOINT;
 901                 }
 902                 return (kdb_trap(type, 0, frame));
 903         }
 904
 905         return (0);
 906 }
 907 #endif