2 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3 * Copyright (C) 1995, 1996 TooLs GmbH.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by TooLs GmbH.
17 * 4. The name of TooLs GmbH may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
42 #include <sys/mutex.h>
43 #include <sys/pioctl.h>
44 #include <sys/ptrace.h>
45 #include <sys/reboot.h>
46 #include <sys/syscall.h>
47 #include <sys/sysent.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
51 #include <sys/signalvar.h>
52 #include <sys/vmmeter.h>
54 #include <security/audit/audit.h>
58 #include <vm/vm_extern.h>
59 #include <vm/vm_param.h>
60 #include <vm/vm_kern.h>
61 #include <vm/vm_map.h>
62 #include <vm/vm_page.h>
64 #include <machine/_inttypes.h>
65 #include <machine/altivec.h>
66 #include <machine/cpu.h>
67 #include <machine/db_machdep.h>
68 #include <machine/fpu.h>
69 #include <machine/frame.h>
70 #include <machine/pcb.h>
71 #include <machine/psl.h>
72 #include <machine/trap.h>
73 #include <machine/spr.h>
74 #include <machine/sr.h>
76 /* Below matches setjmp.S */
77 #define FAULTBUF_LR 21
80 #define FAULTBUF_CR 22
81 #define FAULTBUF_R14 3
83 #define MOREARGS(sp) ((caddr_t)((uintptr_t)(sp) + \
84 sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
86 static void trap_fatal(struct trapframe *frame);
87 static void printtrap(u_int vector, struct trapframe *frame, int isfatal,
89 static int trap_pfault(struct trapframe *frame, int user);
90 static int fix_unaligned(struct thread *td, struct trapframe *frame);
91 static int handle_onfault(struct trapframe *frame);
92 static void syscall(struct trapframe *frame);
94 #if defined(__powerpc64__) && defined(AIM)
95 void handle_kernel_slb_spill(int, register_t, register_t);
96 static int handle_user_slb_spill(pmap_t pm, vm_offset_t addr);
100 extern vm_offset_t __startkernel;
103 int db_trap_glue(struct trapframe *); /* Called from trap_subr.S */
106 struct powerpc_exception {
112 #include <sys/dtrace_bsd.h>
114 int (*dtrace_invop_jump_addr)(struct trapframe *);
117 static struct powerpc_exception powerpc_exceptions[] = {
118 { EXC_CRIT, "critical input" },
119 { EXC_RST, "system reset" },
120 { EXC_MCHK, "machine check" },
121 { EXC_DSI, "data storage interrupt" },
122 { EXC_DSE, "data segment exception" },
123 { EXC_ISI, "instruction storage interrupt" },
124 { EXC_ISE, "instruction segment exception" },
125 { EXC_EXI, "external interrupt" },
126 { EXC_ALI, "alignment" },
127 { EXC_PGM, "program" },
128 { EXC_HEA, "hypervisor emulation assistance" },
129 { EXC_FPU, "floating-point unavailable" },
130 { EXC_APU, "auxiliary proc unavailable" },
131 { EXC_DECR, "decrementer" },
132 { EXC_FIT, "fixed-interval timer" },
133 { EXC_WDOG, "watchdog timer" },
134 { EXC_SC, "system call" },
135 { EXC_TRC, "trace" },
136 { EXC_FPA, "floating-point assist" },
137 { EXC_DEBUG, "debug" },
138 { EXC_PERF, "performance monitoring" },
139 { EXC_VEC, "altivec unavailable" },
140 { EXC_VSX, "vsx unavailable" },
141 { EXC_FAC, "facility unavailable" },
142 { EXC_ITMISS, "instruction tlb miss" },
143 { EXC_DLMISS, "data load tlb miss" },
144 { EXC_DSMISS, "data store tlb miss" },
145 { EXC_BPT, "instruction breakpoint" },
146 { EXC_SMI, "system management" },
147 { EXC_VECAST_G4, "altivec assist" },
148 { EXC_THRM, "thermal management" },
149 { EXC_RUNMODETRC, "run mode/trace" },
153 #define ESR_BITMASK \
155 "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP" \
156 "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE" \
157 "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \
158 "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
159 #define MCSR_BITMASK \
161 "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7" \
162 "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF" \
163 "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23" \
164 "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
165 #define MSSSR_BITMASK \
167 "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \
168 "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG" \
169 "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23" \
170 "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
174 trapname(u_int vector)
176 struct powerpc_exception *pe;
178 for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
179 if (pe->vector == vector)
187 trap(struct trapframe *frame)
203 type = ucode = frame->exc;
205 user = frame->srr1 & PSL_PR;
207 CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
208 trapname(type), user ? "user" : "kernel");
212 * A trap can occur while DTrace executes a probe. Before
213 * executing the probe, DTrace blocks re-scheduling and sets
214 * a flag in its per-cpu flags to indicate that it doesn't
215 * want to fault. On returning from the probe, the no-fault
216 * flag is cleared and finally re-scheduling is enabled.
218 * If the DTrace kernel module has registered a trap handler,
219 * call it and if it returns non-zero, assume that it has
220 * handled the trap and modified the trap frame so that this
221 * function can return normally.
223 if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
229 td->td_frame = frame;
230 if (td->td_cowgen != p->p_cowgen)
231 thread_cow_update(td);
233 /* User Mode Traps */
237 frame->srr1 &= ~PSL_SE;
242 #if defined(__powerpc64__) && defined(AIM)
245 if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
246 (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
254 sig = trap_pfault(frame, 1);
264 KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
265 ("FPU already enabled for thread"));
270 KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
271 ("Altivec already enabled for thread"));
276 KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
277 ("VSX already enabled for thread"));
278 if (!(td->td_pcb->pcb_flags & PCB_VEC))
280 if (!(td->td_pcb->pcb_flags & PCB_FPU))
282 td->td_pcb->pcb_flags |= PCB_VSX;
295 * We get a VPU assist exception for IEEE mode
296 * vector operations on denormalized floats.
297 * Emulating this is a giant pain, so for now,
298 * just switch off IEEE mode and treat them as
303 td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
308 if (fix_unaligned(td, frame) != 0) {
316 case EXC_DEBUG: /* Single stepping */
317 mtspr(SPR_DBSR, mfspr(SPR_DBSR));
318 frame->srr1 &= ~PSL_DE;
319 frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
325 /* Identify the trap reason */
327 if (frame->srr1 & EXC_PGM_TRAP) {
329 if (frame->cpu.booke.esr & ESR_PTR) {
332 inst = fuword32((const void *)frame->srr0);
333 if (inst == 0x0FFFDDDD &&
334 dtrace_pid_probe_ptr != NULL) {
335 (*dtrace_pid_probe_ptr)(frame);
342 sig = ppc_instr_emulate(frame, td->td_pcb);
344 if (frame->srr1 & EXC_PGM_PRIV)
346 else if (frame->srr1 & EXC_PGM_ILLEGAL)
348 } else if (sig == SIGFPE)
349 ucode = FPE_FLTINV; /* Punt for now, invalid operation. */
355 * Note that this may not be recoverable for the user
356 * process, depending on the type of machine check,
357 * but it at least prevents the kernel from dying.
367 /* Kernel Mode Traps */
369 KASSERT(cold || td->td_ucred != NULL,
370 ("kernel trap doesn't have ucred"));
375 if (frame->srr1 & EXC_PGM_TRAP) {
377 if (frame->cpu.booke.esr & ESR_PTR) {
379 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
380 if (dtrace_invop_jump_addr != NULL) {
381 dtrace_invop_jump_addr(frame);
388 if (db_trap_glue(frame))
392 #if defined(__powerpc64__) && defined(AIM)
394 if ((frame->dar & SEGMENT_MASK) == USER_ADDR) {
395 __asm __volatile ("slbmte %0, %1" ::
396 "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
403 if (trap_pfault(frame, 0) == 0)
407 if (handle_onfault(frame))
417 if (p->p_sysent->sv_transtrap != NULL)
418 sig = (p->p_sysent->sv_transtrap)(sig, type);
419 ksiginfo_init_trap(&ksi);
421 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
422 /* ksi.ksi_addr = ? */
423 ksi.ksi_trapno = type;
424 trapsignal(td, &ksi);
431 trap_fatal(struct trapframe *frame)
434 printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
436 if ((debugger_on_panic || kdb_active) &&
437 kdb_trap(frame->exc, 0, frame))
440 panic("%s trap", trapname(frame->exc));
444 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
452 printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
453 user ? "user" : "kernel");
455 printf(" exception = 0x%x (%s)\n", vector, trapname(vector));
460 printf(" virtual address = 0x%" PRIxPTR "\n", frame->dar);
462 printf(" dsisr = 0x%lx\n",
463 (u_long)frame->cpu.aim.dsisr);
469 printf(" virtual address = 0x%" PRIxPTR "\n", frame->srr0);
475 printf(" msssr0 = 0x%b\n",
476 (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
478 pa = mfspr(SPR_MCARU);
479 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
480 printf(" mcsr = 0x%b\n",
481 (int)mfspr(SPR_MCSR), MCSR_BITMASK);
482 printf(" mcar = 0x%jx\n", (uintmax_t)pa);
487 printf(" esr = 0x%b\n",
488 (int)frame->cpu.booke.esr, ESR_BITMASK);
490 printf(" srr0 = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
491 frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
492 printf(" srr1 = 0x%lx\n", (u_long)frame->srr1);
493 printf(" lr = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
494 frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
495 printf(" curthread = %p\n", curthread);
496 if (curthread != NULL)
497 printf(" pid = %d, comm = %s\n",
498 curthread->td_proc->p_pid, curthread->td_name);
503 * Handles a fatal fault when we have onfault state to recover. Returns
504 * non-zero if there was onfault recovery state available.
507 handle_onfault(struct trapframe *frame)
513 fb = td->td_pcb->pcb_onfault;
515 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
516 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
517 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
518 frame->fixreg[3] = 1;
519 frame->cr = (*fb)->_jb[FAULTBUF_CR];
520 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
521 18 * sizeof(register_t));
522 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
529 cpu_fetch_syscall_args(struct thread *td)
532 struct trapframe *frame;
533 struct syscall_args *sa;
539 frame = td->td_frame;
542 sa->code = frame->fixreg[0];
543 params = (caddr_t)(frame->fixreg + FIRSTARG);
546 if (sa->code == SYS_syscall) {
548 * code is first argument,
549 * followed by actual args.
551 sa->code = *(register_t *) params;
552 params += sizeof(register_t);
554 } else if (sa->code == SYS___syscall) {
556 * Like syscall, but code is a quad,
557 * so as to maintain quad alignment
558 * for the rest of the args.
560 if (SV_PROC_FLAG(p, SV_ILP32)) {
561 params += sizeof(register_t);
562 sa->code = *(register_t *) params;
563 params += sizeof(register_t);
566 sa->code = *(register_t *) params;
567 params += sizeof(register_t);
572 if (p->p_sysent->sv_mask)
573 sa->code &= p->p_sysent->sv_mask;
574 if (sa->code >= p->p_sysent->sv_size)
575 sa->callp = &p->p_sysent->sv_table[0];
577 sa->callp = &p->p_sysent->sv_table[sa->code];
579 sa->narg = sa->callp->sy_narg;
581 if (SV_PROC_FLAG(p, SV_ILP32)) {
582 argsz = sizeof(uint32_t);
584 for (i = 0; i < n; i++)
585 sa->args[i] = ((u_register_t *)(params))[i] &
588 argsz = sizeof(uint64_t);
590 for (i = 0; i < n; i++)
591 sa->args[i] = ((u_register_t *)(params))[i];
595 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
596 (sa->narg - n) * argsz);
601 if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
602 /* Expand the size of arguments copied from the stack */
604 for (i = sa->narg; i >= n; i--)
605 sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
610 td->td_retval[0] = 0;
611 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
616 #include "../../kern/subr_syscall.c"
619 syscall(struct trapframe *frame)
625 td->td_frame = frame;
627 #if defined(__powerpc64__) && defined(AIM)
629 * Speculatively restore last user SLB segment, which we know is
630 * invalid already, since we are likely to do copyin()/copyout().
632 __asm __volatile ("slbmte %0, %1; isync" ::
633 "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
636 error = syscallenter(td);
637 syscallret(td, error);
640 #if defined(__powerpc64__) && defined(AIM)
641 /* Handle kernel SLB faults -- runs in real mode, all seat belts off */
643 handle_kernel_slb_spill(int type, register_t dar, register_t srr0)
645 struct slb *slbcache;
650 addr = (type == EXC_ISE) ? srr0 : dar;
651 slbcache = PCPU_GET(slb);
652 esid = (uintptr_t)addr >> ADDR_SR_SHFT;
653 slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID;
655 /* See if the hardware flushed this somehow (can happen in LPARs) */
656 for (i = 0; i < n_slbs; i++)
657 if (slbcache[i].slbe == (slbe | (uint64_t)i))
660 /* Not in the map, needs to actually be added */
661 slbv = kernel_va_to_slbv(addr);
662 if (slbcache[USER_SLB_SLOT].slbe == 0) {
663 for (i = 0; i < n_slbs; i++) {
664 if (i == USER_SLB_SLOT)
666 if (!(slbcache[i].slbe & SLBE_VALID))
671 slbcache[USER_SLB_SLOT].slbe = 1;
674 /* Sacrifice a random SLB entry that is not the user entry */
676 if (i == USER_SLB_SLOT)
680 /* Write new entry */
681 slbcache[i].slbv = slbv;
682 slbcache[i].slbe = slbe | (uint64_t)i;
684 /* Trap handler will restore from cache on exit */
688 handle_user_slb_spill(pmap_t pm, vm_offset_t addr)
690 struct slb *user_entry;
694 esid = (uintptr_t)addr >> ADDR_SR_SHFT;
697 user_entry = user_va_to_slb_entry(pm, addr);
699 if (user_entry == NULL) {
700 /* allocate_vsid auto-spills it */
701 (void)allocate_user_vsid(pm, esid, 0);
704 * Check that another CPU has not already mapped this.
705 * XXX: Per-thread SLB caches would be better.
707 for (i = 0; i < pm->pm_slb_len; i++)
708 if (pm->pm_slb[i] == user_entry)
711 if (i == pm->pm_slb_len)
712 slb_insert_user(pm, user_entry);
721 trap_pfault(struct trapframe *frame, int user)
735 if (frame->exc == EXC_ISI) {
737 ftype = VM_PROT_EXECUTE;
738 if (frame->srr1 & SRR1_ISI_PFAULT)
739 ftype |= VM_PROT_READ;
743 if (frame->cpu.booke.esr & ESR_ST)
745 if (frame->cpu.aim.dsisr & DSISR_STORE)
747 ftype = VM_PROT_WRITE;
749 ftype = VM_PROT_READ;
753 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace NULL"));
754 map = &p->p_vmspace->vm_map;
757 if (eva < VM_MAXUSER_ADDRESS) {
759 if ((eva >> ADDR_SR_SHFT) == (USER_ADDR >> ADDR_SR_SHFT)) {
761 map = &p->p_vmspace->vm_map;
764 user_sr = td->td_pcb->pcb_cpu.aim.usr_segm;
765 eva &= ADDR_PIDX | ADDR_POFF;
766 eva |= user_sr << ADDR_SR_SHFT;
772 va = trunc_page(eva);
774 /* Fault in the page. */
775 rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
777 * XXXDTRACE: add dtrace_doubletrap_func here?
780 if (rv == KERN_SUCCESS)
783 if (!user && handle_onfault(frame))
790 * For now, this only deals with the particular unaligned access case
791 * that gcc tends to generate. Eventually it should handle all of the
792 * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
796 fix_unaligned(struct thread *td, struct trapframe *frame)
798 struct thread *fputhread;
806 indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
807 if (indicator & ESR_SPE) {
808 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
810 reg = EXC_ALI_SPE_REG(inst);
811 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
812 fputhread = PCPU_GET(vecthread);
814 /* Juggle the SPE to ensure that we've initialized
815 * the registers, and that their current state is in
818 if (fputhread != td) {
825 if (!(indicator & ESR_ST)) {
826 if (copyin((void *)frame->dar, fpr,
827 sizeof(double)) != 0)
829 frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
832 td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
833 if (copyout(fpr, (void *)frame->dar,
834 sizeof(double)) != 0)
840 indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
845 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
846 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
847 fputhread = PCPU_GET(fputhread);
849 /* Juggle the FPU to ensure that we've initialized
850 * the FPRs, and that their current state is in
853 if (fputhread != td) {
860 if (indicator == EXC_ALI_LFD) {
861 if (copyin((void *)frame->dar, fpr,
862 sizeof(double)) != 0)
866 if (copyout(fpr, (void *)frame->dar,
867 sizeof(double)) != 0)
880 db_trap_glue(struct trapframe *frame)
883 if (!(frame->srr1 & PSL_PR)
884 && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
886 || (frame->exc == EXC_PGM
887 && (frame->srr1 & EXC_PGM_TRAP))
889 || (frame->exc == EXC_DEBUG)
890 || (frame->cpu.booke.esr & ESR_PTR)
892 || frame->exc == EXC_BPT
893 || frame->exc == EXC_DSI)) {
894 int type = frame->exc;
896 /* Ignore DTrace traps. */
897 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
900 if (type == EXC_PGM && (frame->srr1 & EXC_PGM_TRAP)) {
902 if (type == EXC_DEBUG ||
903 (frame->cpu.booke.esr & ESR_PTR)) {
907 return (kdb_trap(type, 0, frame));