2 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3 * Copyright (C) 1995, 1996 TooLs GmbH.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by TooLs GmbH.
17 * 4. The name of TooLs GmbH may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
42 #include <sys/mutex.h>
43 #include <sys/ptrace.h>
44 #include <sys/reboot.h>
45 #include <sys/syscall.h>
46 #include <sys/sysent.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
50 #include <sys/signalvar.h>
51 #include <sys/vmmeter.h>
53 #include <security/audit/audit.h>
57 #include <vm/vm_extern.h>
58 #include <vm/vm_param.h>
59 #include <vm/vm_kern.h>
60 #include <vm/vm_map.h>
61 #include <vm/vm_page.h>
63 #include <machine/_inttypes.h>
64 #include <machine/altivec.h>
65 #include <machine/cpu.h>
66 #include <machine/db_machdep.h>
67 #include <machine/fpu.h>
68 #include <machine/frame.h>
69 #include <machine/pcb.h>
70 #include <machine/psl.h>
71 #include <machine/slb.h>
72 #include <machine/spr.h>
73 #include <machine/sr.h>
74 #include <machine/trap.h>
76 /* Below matches setjmp.S */
77 #define FAULTBUF_LR 21
80 #define FAULTBUF_CR 22
81 #define FAULTBUF_R14 3
83 #define MOREARGS(sp) ((caddr_t)((uintptr_t)(sp) + \
84 sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
86 static void trap_fatal(struct trapframe *frame);
87 static void printtrap(u_int vector, struct trapframe *frame, int isfatal,
89 static bool trap_pfault(struct trapframe *frame, bool user, int *signo,
91 static int fix_unaligned(struct thread *td, struct trapframe *frame);
92 static int handle_onfault(struct trapframe *frame);
93 static void syscall(struct trapframe *frame);
95 #if defined(__powerpc64__) && defined(AIM)
96 static void normalize_inputs(void);
99 extern vm_offset_t __startkernel;
101 extern int copy_fault(void);
102 extern int fusufault(void);
105 int db_trap_glue(struct trapframe *); /* Called from trap_subr.S */
108 struct powerpc_exception {
114 #include <sys/dtrace_bsd.h>
116 int (*dtrace_invop_jump_addr)(struct trapframe *);
119 static struct powerpc_exception powerpc_exceptions[] = {
120 { EXC_CRIT, "critical input" },
121 { EXC_RST, "system reset" },
122 { EXC_MCHK, "machine check" },
123 { EXC_DSI, "data storage interrupt" },
124 { EXC_DSE, "data segment exception" },
125 { EXC_ISI, "instruction storage interrupt" },
126 { EXC_ISE, "instruction segment exception" },
127 { EXC_EXI, "external interrupt" },
128 { EXC_ALI, "alignment" },
129 { EXC_PGM, "program" },
130 { EXC_HEA, "hypervisor emulation assistance" },
131 { EXC_FPU, "floating-point unavailable" },
132 { EXC_APU, "auxiliary proc unavailable" },
133 { EXC_DECR, "decrementer" },
134 { EXC_FIT, "fixed-interval timer" },
135 { EXC_WDOG, "watchdog timer" },
136 { EXC_SC, "system call" },
137 { EXC_TRC, "trace" },
138 { EXC_FPA, "floating-point assist" },
139 { EXC_DEBUG, "debug" },
140 { EXC_PERF, "performance monitoring" },
141 { EXC_VEC, "altivec unavailable" },
142 { EXC_VSX, "vsx unavailable" },
143 { EXC_FAC, "facility unavailable" },
144 { EXC_ITMISS, "instruction tlb miss" },
145 { EXC_DLMISS, "data load tlb miss" },
146 { EXC_DSMISS, "data store tlb miss" },
147 { EXC_BPT, "instruction breakpoint" },
148 { EXC_SMI, "system management" },
149 { EXC_VECAST_G4, "altivec assist" },
150 { EXC_THRM, "thermal management" },
151 { EXC_RUNMODETRC, "run mode/trace" },
152 { EXC_SOFT_PATCH, "soft patch exception" },
156 static int uprintf_signal;
157 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RWTUN,
159 "Print debugging information on trap signal to ctty");
161 #define ESR_BITMASK \
163 "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP" \
164 "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE" \
165 "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \
166 "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
167 #define MCSR_BITMASK \
169 "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7" \
170 "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF" \
171 "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23" \
172 "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
173 #define MSSSR_BITMASK \
175 "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \
176 "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG" \
177 "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23" \
178 "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
181 trapname(u_int vector)
183 struct powerpc_exception *pe;
185 for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
186 if (pe->vector == vector)
194 frame_is_trap_inst(struct trapframe *frame)
197 return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
199 return ((frame->cpu.booke.esr & ESR_PTR) != 0);
204 trap(struct trapframe *frame)
214 register_t addr, fscr;
228 type = ucode = frame->exc;
230 user = frame->srr1 & PSL_PR;
233 CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
234 trapname(type), user ? "user" : "kernel");
238 * A trap can occur while DTrace executes a probe. Before
239 * executing the probe, DTrace blocks re-scheduling and sets
240 * a flag in its per-cpu flags to indicate that it doesn't
241 * want to fault. On returning from the probe, the no-fault
242 * flag is cleared and finally re-scheduling is enabled.
244 * If the DTrace kernel module has registered a trap handler,
245 * call it and if it returns non-zero, assume that it has
246 * handled the trap and modified the trap frame so that this
247 * function can return normally.
249 if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
255 td->td_frame = frame;
257 if (td->td_cowgen != p->p_cowgen)
258 thread_cow_update(td);
260 /* User Mode Traps */
264 frame->srr1 &= ~PSL_SE;
269 #if defined(__powerpc64__) && defined(AIM)
274 /* DSE/ISE are automatically fatal with radix pmap. */
276 handle_user_slb_spill(&p->p_vmspace->vm_pmap,
287 if (trap_pfault(frame, true, &sig, &ucode))
296 KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
297 ("FPU already enabled for thread"));
302 KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
303 ("Altivec already enabled for thread"));
308 KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
309 ("VSX already enabled for thread"));
310 if (!(td->td_pcb->pcb_flags & PCB_VEC))
312 if (td->td_pcb->pcb_flags & PCB_FPU)
314 td->td_pcb->pcb_flags |= PCB_VSX;
319 fscr = mfspr(SPR_FSCR);
320 switch (fscr & FSCR_IC_MASK) {
323 "Hardware Transactional Memory subsystem disabled");
328 td->td_pcb->pcb_flags |= PCB_CFSCR | PCB_CDSCR;
333 td->td_pcb->pcb_flags |= PCB_CFSCR;
340 td->td_pcb->pcb_flags |= PCB_CFSCR;
345 td->td_pcb->pcb_flags |= PCB_CFSCR;
354 mtspr(SPR_FSCR, fscr & ~FSCR_IC_MASK);
365 * We get a VPU assist exception for IEEE mode
366 * vector operations on denormalized floats.
367 * Emulating this is a giant pain, so for now,
368 * just switch off IEEE mode and treat them as
373 td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
378 if (fix_unaligned(td, frame) != 0) {
387 case EXC_DEBUG: /* Single stepping */
388 mtspr(SPR_DBSR, mfspr(SPR_DBSR));
389 frame->srr1 &= ~PSL_DE;
390 frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
396 /* Identify the trap reason */
397 if (frame_is_trap_inst(frame)) {
399 inst = fuword32((const void *)frame->srr0);
400 if (inst == 0x0FFFDDDD &&
401 dtrace_pid_probe_ptr != NULL) {
402 (*dtrace_pid_probe_ptr)(frame);
409 sig = ppc_instr_emulate(frame, td);
411 if (frame->srr1 & EXC_PGM_PRIV)
413 else if (frame->srr1 & EXC_PGM_ILLEGAL)
415 } else if (sig == SIGFPE)
416 ucode = FPE_FLTINV; /* Punt for now, invalid operation. */
421 sig = cpu_machine_check(td, frame, &ucode);
422 printtrap(frame->exc, frame, 0, (frame->srr1 & PSL_PR));
425 #if defined(__powerpc64__) && defined(AIM)
428 * Point to the instruction that generated the exception to execute it again,
429 * and normalize the register values.
440 /* Kernel Mode Traps */
442 KASSERT(cold || td->td_ucred != NULL,
443 ("kernel trap doesn't have ucred"));
447 if (frame_is_trap_inst(frame)) {
448 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
449 if (dtrace_invop_jump_addr != NULL) {
450 dtrace_invop_jump_addr(frame);
457 if (db_trap_glue(frame))
461 #if defined(__powerpc64__) && defined(AIM)
463 /* DSE on radix mmu is automatically fatal. */
466 if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 &&
467 (frame->dar & SEGMENT_MASK) == USER_ADDR) {
468 __asm __volatile ("slbmte %0, %1" ::
469 "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
476 if (trap_pfault(frame, false, NULL, NULL))
480 if (handle_onfault(frame))
490 if (p->p_sysent->sv_transtrap != NULL)
491 sig = (p->p_sysent->sv_transtrap)(sig, type);
492 ksiginfo_init_trap(&ksi);
494 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
495 ksi.ksi_addr = (void *)addr;
496 ksi.ksi_trapno = type;
497 if (uprintf_signal) {
498 uprintf("pid %d comm %s: signal %d code %d type %d "
499 "addr 0x%lx r1 0x%lx srr0 0x%lx srr1 0x%lx\n",
500 p->p_pid, p->p_comm, sig, ucode, type,
501 (u_long)addr, (u_long)frame->fixreg[1],
502 (u_long)frame->srr0, (u_long)frame->srr1);
505 trapsignal(td, &ksi);
512 trap_fatal(struct trapframe *frame)
518 printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
520 if (debugger_on_trap) {
521 kdb_why = KDB_WHY_TRAP;
522 handled = kdb_trap(frame->exc, 0, frame);
523 kdb_why = KDB_WHY_UNSET;
528 panic("%s trap", trapname(frame->exc));
532 cpu_printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
541 printf(" msssr0 = 0x%b\n",
542 (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
546 printf(" dsisr = 0x%lx\n",
547 (u_long)frame->cpu.aim.dsisr);
555 pa = mfspr(SPR_MCARU);
556 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
557 printf(" mcsr = 0x%b\n",
558 (int)mfspr(SPR_MCSR), MCSR_BITMASK);
559 printf(" mcar = 0x%jx\n", (uintmax_t)pa);
561 printf(" esr = 0x%b\n",
562 (int)frame->cpu.booke.esr, ESR_BITMASK);
567 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
571 printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
572 user ? "user" : "kernel");
574 printf(" exception = 0x%x (%s)\n", vector, trapname(vector));
581 printf(" virtual address = 0x%" PRIxPTR "\n", frame->dar);
586 printf(" virtual address = 0x%" PRIxPTR "\n", frame->srr0);
589 cpu_printtrap(vector, frame, isfatal, user);
590 printf(" srr0 = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
591 frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
592 printf(" srr1 = 0x%lx\n", (u_long)frame->srr1);
593 printf(" current msr = 0x%" PRIxPTR "\n", mfmsr());
594 printf(" lr = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
595 frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
596 printf(" frame = %p\n", frame);
597 printf(" curthread = %p\n", curthread);
598 if (curthread != NULL)
599 printf(" pid = %d, comm = %s\n",
600 curthread->td_proc->p_pid, curthread->td_name);
605 * Handles a fatal fault when we have onfault state to recover. Returns
606 * non-zero if there was onfault recovery state available.
609 handle_onfault(struct trapframe *frame)
615 #if defined(__powerpc64__) || defined(BOOKE)
616 uintptr_t dispatch = (uintptr_t)td->td_pcb->pcb_onfault;
620 /* Short-circuit radix and Book-E paths. */
623 frame->srr0 = (uintptr_t)copy_fault;
626 frame->srr0 = (uintptr_t)fusufault;
632 fb = td->td_pcb->pcb_onfault;
634 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
635 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
636 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
637 frame->fixreg[3] = 1;
638 frame->cr = (*fb)->_jb[FAULTBUF_CR];
639 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
640 18 * sizeof(register_t));
641 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
648 cpu_fetch_syscall_args(struct thread *td)
651 struct trapframe *frame;
652 struct syscall_args *sa;
655 int error, n, narg, i;
658 frame = td->td_frame;
661 sa->code = frame->fixreg[0];
662 params = (caddr_t)(frame->fixreg + FIRSTARG);
665 if (sa->code == SYS_syscall) {
667 * code is first argument,
668 * followed by actual args.
670 sa->code = *(register_t *) params;
671 params += sizeof(register_t);
673 } else if (sa->code == SYS___syscall) {
675 * Like syscall, but code is a quad,
676 * so as to maintain quad alignment
677 * for the rest of the args.
679 if (SV_PROC_FLAG(p, SV_ILP32)) {
680 params += sizeof(register_t);
681 sa->code = *(register_t *) params;
682 params += sizeof(register_t);
685 sa->code = *(register_t *) params;
686 params += sizeof(register_t);
691 if (sa->code >= p->p_sysent->sv_size)
692 sa->callp = &p->p_sysent->sv_table[0];
694 sa->callp = &p->p_sysent->sv_table[sa->code];
696 narg = sa->callp->sy_narg;
698 if (SV_PROC_FLAG(p, SV_ILP32)) {
699 argsz = sizeof(uint32_t);
701 for (i = 0; i < n; i++)
702 sa->args[i] = ((u_register_t *)(params))[i] &
705 argsz = sizeof(uint64_t);
707 for (i = 0; i < n; i++)
708 sa->args[i] = ((u_register_t *)(params))[i];
712 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
718 if (SV_PROC_FLAG(p, SV_ILP32) && narg > n) {
719 /* Expand the size of arguments copied from the stack */
721 for (i = narg; i >= n; i--)
722 sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
727 td->td_retval[0] = 0;
728 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
733 #include "../../kern/subr_syscall.c"
736 syscall(struct trapframe *frame)
741 td->td_frame = frame;
743 #if defined(__powerpc64__) && defined(AIM)
745 * Speculatively restore last user SLB segment, which we know is
746 * invalid already, since we are likely to do copyin()/copyout().
748 if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0)
749 __asm __volatile ("slbmte %0, %1; isync" ::
750 "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
758 trap_pfault(struct trapframe *frame, bool user, int *signo, int *ucode)
769 if (frame->exc == EXC_ISI) {
771 ftype = VM_PROT_EXECUTE;
772 if (frame->srr1 & SRR1_ISI_PFAULT)
773 ftype |= VM_PROT_READ;
777 if (frame->cpu.booke.esr & ESR_ST)
779 if (frame->cpu.aim.dsisr & DSISR_STORE)
781 ftype = VM_PROT_WRITE;
783 ftype = VM_PROT_READ;
785 #if defined(__powerpc64__) && defined(AIM)
786 if (radix_mmu && pmap_nofault(&p->p_vmspace->vm_pmap, eva, ftype) == 0)
790 if (__predict_false((td->td_pflags & TDP_NOFAULTING) == 0)) {
792 * If we get a page fault while in a critical section, then
793 * it is most likely a fatal kernel page fault. The kernel
794 * is already going to panic trying to get a sleep lock to
795 * do the VM lookup, so just consider it a fatal trap so the
796 * kernel can print out a useful trap message and even get
799 * If we get a page fault while holding a non-sleepable
800 * lock, then it is most likely a fatal kernel page fault.
801 * If WITNESS is enabled, then it's going to whine about
802 * bogus LORs with various VM locks, so just skip to the
803 * fatal trap handling directly.
805 if (td->td_critnest != 0 ||
806 WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL,
807 "Kernel page fault") != 0) {
813 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace NULL"));
814 map = &p->p_vmspace->vm_map;
816 rv = pmap_decode_kernel_ptr(eva, &is_user, &eva);
821 map = &p->p_vmspace->vm_map;
826 /* Fault in the page. */
827 rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode);
829 * XXXDTRACE: add dtrace_doubletrap_func here?
832 if (rv == KERN_SUCCESS)
835 if (!user && handle_onfault(frame))
842 * For now, this only deals with the particular unaligned access case
843 * that gcc tends to generate. Eventually it should handle all of the
844 * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
848 fix_unaligned(struct thread *td, struct trapframe *frame)
850 struct thread *fputhread;
858 indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
859 if (indicator & ESR_SPE) {
860 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
862 reg = EXC_ALI_INST_RST(inst);
863 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
864 fputhread = PCPU_GET(vecthread);
866 /* Juggle the SPE to ensure that we've initialized
867 * the registers, and that their current state is in
870 if (fputhread != td) {
877 if (!(indicator & ESR_ST)) {
878 if (copyin((void *)frame->dar, fpr,
879 sizeof(double)) != 0)
881 frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
884 td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
885 if (copyout(fpr, (void *)frame->dar,
886 sizeof(double)) != 0)
893 indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
895 indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
902 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
904 reg = EXC_ALI_INST_RST(inst);
906 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
908 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
909 fputhread = PCPU_GET(fputhread);
911 /* Juggle the FPU to ensure that we've initialized
912 * the FPRs, and that their current state is in
915 if (fputhread != td) {
922 if (indicator == EXC_ALI_LFD) {
923 if (copyin((void *)frame->dar, fpr,
924 sizeof(double)) != 0)
928 if (copyout(fpr, (void *)frame->dar,
929 sizeof(double)) != 0)
940 #if defined(__powerpc64__) && defined(AIM)
941 #define MSKNSHL(x, m, n) "(((" #x ") & " #m ") << " #n ")"
942 #define MSKNSHR(x, m, n) "(((" #x ") & " #m ") >> " #n ")"
944 /* xvcpsgndp instruction, built in opcode format.
945 * This can be changed to use mnemonic after a toolchain update.
947 #define XVCPSGNDP(xt, xa, xb) \
948 __asm __volatile(".long (" \
949 MSKNSHL(60, 0x3f, 26) " | " \
950 MSKNSHL(xt, 0x1f, 21) " | " \
951 MSKNSHL(xa, 0x1f, 16) " | " \
952 MSKNSHL(xb, 0x1f, 11) " | " \
953 MSKNSHL(240, 0xff, 3) " | " \
954 MSKNSHR(xa, 0x20, 3) " | " \
955 MSKNSHR(xa, 0x20, 4) " | " \
956 MSKNSHR(xa, 0x20, 5) ")")
958 /* Macros to normalize 1 or 10 VSX registers */
959 #define NORM(x) XVCPSGNDP(x, x, x)
961 NORM(x ## 0); NORM(x ## 1); NORM(x ## 2); NORM(x ## 3); NORM(x ## 4); \
962 NORM(x ## 5); NORM(x ## 6); NORM(x ## 7); NORM(x ## 8); NORM(x ## 9)
965 normalize_inputs(void)
971 mtmsr(msr | PSL_VSX);
973 NORM(0); NORM(1); NORM(2); NORM(3); NORM(4);
974 NORM(5); NORM(6); NORM(7); NORM(8); NORM(9);
975 NORM10(1); NORM10(2); NORM10(3); NORM10(4); NORM10(5);
976 NORM(60); NORM(61); NORM(62); NORM(63);
985 db_trap_glue(struct trapframe *frame)
988 if (!(frame->srr1 & PSL_PR)
989 && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
990 || frame_is_trap_inst(frame)
991 || frame->exc == EXC_BPT
992 || frame->exc == EXC_DEBUG
993 || frame->exc == EXC_DSI)) {
994 int type = frame->exc;
996 /* Ignore DTrace traps. */
997 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
999 if (frame_is_trap_inst(frame)) {
1000 type = T_BREAKPOINT;
1002 return (kdb_trap(type, 0, frame));