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1 /*-
2  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3  * Copyright (C) 1995, 1996 TooLs GmbH.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *      This product includes software developed by TooLs GmbH.
17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
32  */
33
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
36
37 #include <sys/param.h>
38 #include <sys/kdb.h>
39 #include <sys/proc.h>
40 #include <sys/ktr.h>
41 #include <sys/lock.h>
42 #include <sys/mutex.h>
43 #include <sys/ptrace.h>
44 #include <sys/reboot.h>
45 #include <sys/syscall.h>
46 #include <sys/sysent.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
49 #include <sys/uio.h>
50 #include <sys/signalvar.h>
51 #include <sys/vmmeter.h>
52
53 #include <security/audit/audit.h>
54
55 #include <vm/vm.h>
56 #include <vm/pmap.h>
57 #include <vm/vm_extern.h>
58 #include <vm/vm_param.h>
59 #include <vm/vm_kern.h>
60 #include <vm/vm_map.h>
61 #include <vm/vm_page.h>
62
63 #include <machine/_inttypes.h>
64 #include <machine/altivec.h>
65 #include <machine/cpu.h>
66 #include <machine/db_machdep.h>
67 #include <machine/fpu.h>
68 #include <machine/frame.h>
69 #include <machine/pcb.h>
70 #include <machine/psl.h>
71 #include <machine/slb.h>
72 #include <machine/spr.h>
73 #include <machine/sr.h>
74 #include <machine/trap.h>
75
76 /* Below matches setjmp.S */
77 #define FAULTBUF_LR     21
78 #define FAULTBUF_R1     1
79 #define FAULTBUF_R2     2
80 #define FAULTBUF_CR     22
81 #define FAULTBUF_R14    3
82
83 #define MOREARGS(sp)    ((caddr_t)((uintptr_t)(sp) + \
84     sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
85
86 static void     trap_fatal(struct trapframe *frame);
87 static void     printtrap(u_int vector, struct trapframe *frame, int isfatal,
88                     int user);
89 static bool     trap_pfault(struct trapframe *frame, bool user, int *signo,
90                     int *ucode);
91 static int      fix_unaligned(struct thread *td, struct trapframe *frame);
92 static int      handle_onfault(struct trapframe *frame);
93 static void     syscall(struct trapframe *frame);
94
95 #if defined(__powerpc64__) && defined(AIM)
96 static void     normalize_inputs(void);
97 #endif
98
99 extern vm_offset_t __startkernel;
100
101 extern int      copy_fault(void);
102 extern int      fusufault(void);
103
104 #ifdef KDB
105 int db_trap_glue(struct trapframe *);           /* Called from trap_subr.S */
106 #endif
107
108 struct powerpc_exception {
109         u_int   vector;
110         char    *name;
111 };
112
113 #ifdef KDTRACE_HOOKS
114 #include <sys/dtrace_bsd.h>
115
116 int (*dtrace_invop_jump_addr)(struct trapframe *);
117 #endif
118
119 static struct powerpc_exception powerpc_exceptions[] = {
120         { EXC_CRIT,     "critical input" },
121         { EXC_RST,      "system reset" },
122         { EXC_MCHK,     "machine check" },
123         { EXC_DSI,      "data storage interrupt" },
124         { EXC_DSE,      "data segment exception" },
125         { EXC_ISI,      "instruction storage interrupt" },
126         { EXC_ISE,      "instruction segment exception" },
127         { EXC_EXI,      "external interrupt" },
128         { EXC_ALI,      "alignment" },
129         { EXC_PGM,      "program" },
130         { EXC_HEA,      "hypervisor emulation assistance" },
131         { EXC_FPU,      "floating-point unavailable" },
132         { EXC_APU,      "auxiliary proc unavailable" },
133         { EXC_DECR,     "decrementer" },
134         { EXC_FIT,      "fixed-interval timer" },
135         { EXC_WDOG,     "watchdog timer" },
136         { EXC_SC,       "system call" },
137         { EXC_TRC,      "trace" },
138         { EXC_FPA,      "floating-point assist" },
139         { EXC_DEBUG,    "debug" },
140         { EXC_PERF,     "performance monitoring" },
141         { EXC_VEC,      "altivec unavailable" },
142         { EXC_VSX,      "vsx unavailable" },
143         { EXC_FAC,      "facility unavailable" },
144         { EXC_ITMISS,   "instruction tlb miss" },
145         { EXC_DLMISS,   "data load tlb miss" },
146         { EXC_DSMISS,   "data store tlb miss" },
147         { EXC_BPT,      "instruction breakpoint" },
148         { EXC_SMI,      "system management" },
149         { EXC_VECAST_G4,        "altivec assist" },
150         { EXC_THRM,     "thermal management" },
151         { EXC_RUNMODETRC,       "run mode/trace" },
152         { EXC_SOFT_PATCH, "soft patch exception" },
153         { EXC_LAST,     NULL }
154 };
155
156 static int uprintf_signal;
157 SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RWTUN,
158     &uprintf_signal, 0,
159     "Print debugging information on trap signal to ctty");
160
161 #define ESR_BITMASK                                                     \
162     "\20"                                                               \
163     "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP"               \
164     "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE"             \
165     "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23"          \
166     "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
167 #define MCSR_BITMASK                                                    \
168     "\20"                                                               \
169     "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7"      \
170     "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF"             \
171     "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23"            \
172     "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
173 #define MSSSR_BITMASK                                                   \
174     "\20"                                                               \
175     "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7"                  \
176     "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG"      \
177     "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23"        \
178     "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
179
180 static const char *
181 trapname(u_int vector)
182 {
183         struct  powerpc_exception *pe;
184
185         for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
186                 if (pe->vector == vector)
187                         return (pe->name);
188         }
189
190         return ("unknown");
191 }
192
193 static inline bool
194 frame_is_trap_inst(struct trapframe *frame)
195 {
196 #ifdef AIM
197         return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
198 #else
199         return ((frame->cpu.booke.esr & ESR_PTR) != 0);
200 #endif
201 }
202
203 void
204 trap(struct trapframe *frame)
205 {
206         struct thread   *td;
207         struct proc     *p;
208 #ifdef KDTRACE_HOOKS
209         uint32_t inst;
210 #endif
211         int             sig, type, user;
212         u_int           ucode;
213         ksiginfo_t      ksi;
214         register_t      addr, fscr;
215
216         VM_CNT_INC(v_trap);
217
218 #ifdef KDB
219         if (kdb_active) {
220                 kdb_reenter();
221                 return;
222         }
223 #endif
224
225         td = curthread;
226         p = td->td_proc;
227
228         type = ucode = frame->exc;
229         sig = 0;
230         user = frame->srr1 & PSL_PR;
231         addr = 0;
232
233         CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
234             trapname(type), user ? "user" : "kernel");
235
236 #ifdef KDTRACE_HOOKS
237         /*
238          * A trap can occur while DTrace executes a probe. Before
239          * executing the probe, DTrace blocks re-scheduling and sets
240          * a flag in its per-cpu flags to indicate that it doesn't
241          * want to fault. On returning from the probe, the no-fault
242          * flag is cleared and finally re-scheduling is enabled.
243          *
244          * If the DTrace kernel module has registered a trap handler,
245          * call it and if it returns non-zero, assume that it has
246          * handled the trap and modified the trap frame so that this
247          * function can return normally.
248          */
249         if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
250                 return;
251 #endif
252
253         if (user) {
254                 td->td_pticks = 0;
255                 td->td_frame = frame;
256                 addr = frame->srr0;
257                 if (td->td_cowgen != p->p_cowgen)
258                         thread_cow_update(td);
259
260                 /* User Mode Traps */
261                 switch (type) {
262                 case EXC_RUNMODETRC:
263                 case EXC_TRC:
264                         frame->srr1 &= ~PSL_SE;
265                         sig = SIGTRAP;
266                         ucode = TRAP_TRACE;
267                         break;
268
269 #if defined(__powerpc64__) && defined(AIM)
270                 case EXC_DSE:
271                         addr = frame->dar;
272                         /* FALLTHROUGH */
273                 case EXC_ISE:
274                         /* DSE/ISE are automatically fatal with radix pmap. */
275                         if (radix_mmu ||
276                             handle_user_slb_spill(&p->p_vmspace->vm_pmap,
277                             addr) != 0){
278                                 sig = SIGSEGV;
279                                 ucode = SEGV_MAPERR;
280                         }
281                         break;
282 #endif
283                 case EXC_DSI:
284                         addr = frame->dar;
285                         /* FALLTHROUGH */
286                 case EXC_ISI:
287                         if (trap_pfault(frame, true, &sig, &ucode))
288                                 sig = 0;
289                         break;
290
291                 case EXC_SC:
292                         syscall(frame);
293                         break;
294
295                 case EXC_FPU:
296                         KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
297                             ("FPU already enabled for thread"));
298                         enable_fpu(td);
299                         break;
300
301                 case EXC_VEC:
302                         KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
303                             ("Altivec already enabled for thread"));
304                         enable_vec(td);
305                         break;
306
307                 case EXC_VSX:
308                         KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
309                             ("VSX already enabled for thread"));
310                         if (!(td->td_pcb->pcb_flags & PCB_VEC))
311                                 enable_vec(td);
312                         if (td->td_pcb->pcb_flags & PCB_FPU)
313                                 save_fpu(td);
314                         td->td_pcb->pcb_flags |= PCB_VSX;
315                         enable_fpu(td);
316                         break;
317
318                 case EXC_FAC:
319                         fscr = mfspr(SPR_FSCR);
320                         switch (fscr & FSCR_IC_MASK) {
321                         case FSCR_IC_HTM:
322                                 CTR0(KTR_TRAP,
323                                     "Hardware Transactional Memory subsystem disabled");
324                                 sig = SIGILL;
325                                 ucode = ILL_ILLOPC;
326                                 break;
327                         case FSCR_IC_DSCR:
328                                 td->td_pcb->pcb_flags |= PCB_CFSCR | PCB_CDSCR;
329                                 fscr |= FSCR_DSCR;
330                                 mtspr(SPR_DSCR, 0);
331                                 break;
332                         case FSCR_IC_EBB:
333                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
334                                 fscr |= FSCR_EBB;
335                                 mtspr(SPR_EBBHR, 0);
336                                 mtspr(SPR_EBBRR, 0);
337                                 mtspr(SPR_BESCR, 0);
338                                 break;
339                         case FSCR_IC_TAR:
340                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
341                                 fscr |= FSCR_TAR;
342                                 mtspr(SPR_TAR, 0);
343                                 break;
344                         case FSCR_IC_LM:
345                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
346                                 fscr |= FSCR_LM;
347                                 mtspr(SPR_LMRR, 0);
348                                 mtspr(SPR_LMSER, 0);
349                                 break;
350                         default:
351                                 sig = SIGILL;
352                                 ucode = ILL_ILLOPC;
353                         }
354                         mtspr(SPR_FSCR, fscr & ~FSCR_IC_MASK);
355                         break;
356                 case EXC_HEA:
357                         sig = SIGILL;
358                         ucode = ILL_ILLOPC;
359                         break;
360
361                 case EXC_VECAST_E:
362                 case EXC_VECAST_G4:
363                 case EXC_VECAST_G5:
364                         /*
365                          * We get a VPU assist exception for IEEE mode
366                          * vector operations on denormalized floats.
367                          * Emulating this is a giant pain, so for now,
368                          * just switch off IEEE mode and treat them as
369                          * zero.
370                          */
371
372                         save_vec(td);
373                         td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
374                         enable_vec(td);
375                         break;
376
377                 case EXC_ALI:
378                         if (fix_unaligned(td, frame) != 0) {
379                                 sig = SIGBUS;
380                                 ucode = BUS_ADRALN;
381                                 addr = frame->dar;
382                         }
383                         else
384                                 frame->srr0 += 4;
385                         break;
386
387                 case EXC_DEBUG: /* Single stepping */
388                         mtspr(SPR_DBSR, mfspr(SPR_DBSR));
389                         frame->srr1 &= ~PSL_DE;
390                         frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
391                         sig = SIGTRAP;
392                         ucode = TRAP_TRACE;
393                         break;
394
395                 case EXC_PGM:
396                         /* Identify the trap reason */
397                         if (frame_is_trap_inst(frame)) {
398 #ifdef KDTRACE_HOOKS
399                                 inst = fuword32((const void *)frame->srr0);
400                                 if (inst == 0x0FFFDDDD &&
401                                     dtrace_pid_probe_ptr != NULL) {
402                                         (*dtrace_pid_probe_ptr)(frame);
403                                         break;
404                                 }
405 #endif
406                                 sig = SIGTRAP;
407                                 ucode = TRAP_BRKPT;
408                         } else {
409                                 sig = ppc_instr_emulate(frame, td);
410                                 if (sig == SIGILL) {
411                                         if (frame->srr1 & EXC_PGM_PRIV)
412                                                 ucode = ILL_PRVOPC;
413                                         else if (frame->srr1 & EXC_PGM_ILLEGAL)
414                                                 ucode = ILL_ILLOPC;
415                                 } else if (sig == SIGFPE)
416                                         ucode = FPE_FLTINV;     /* Punt for now, invalid operation. */
417                         }
418                         break;
419
420                 case EXC_MCHK:
421                         sig = cpu_machine_check(td, frame, &ucode);
422                         printtrap(frame->exc, frame, 0, (frame->srr1 & PSL_PR));
423                         break;
424
425 #if defined(__powerpc64__) && defined(AIM)
426                 case EXC_SOFT_PATCH:
427                         /*
428                          * Point to the instruction that generated the exception to execute it again,
429                          * and normalize the register values.
430                          */
431                         frame->srr0 -= 4;
432                         normalize_inputs();
433                         break;
434 #endif
435
436                 default:
437                         trap_fatal(frame);
438                 }
439         } else {
440                 /* Kernel Mode Traps */
441
442                 KASSERT(cold || td->td_ucred != NULL,
443                     ("kernel trap doesn't have ucred"));
444                 switch (type) {
445                 case EXC_PGM:
446 #ifdef KDTRACE_HOOKS
447                         if (frame_is_trap_inst(frame)) {
448                                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
449                                         if (dtrace_invop_jump_addr != NULL) {
450                                                 dtrace_invop_jump_addr(frame);
451                                                 return;
452                                         }
453                                 }
454                         }
455 #endif
456 #ifdef KDB
457                         if (db_trap_glue(frame))
458                                 return;
459 #endif
460                         break;
461 #if defined(__powerpc64__) && defined(AIM)
462                 case EXC_DSE:
463                         /* DSE on radix mmu is automatically fatal. */
464                         if (radix_mmu)
465                                 break;
466                         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 &&
467                             (frame->dar & SEGMENT_MASK) == USER_ADDR) {
468                                 __asm __volatile ("slbmte %0, %1" ::
469                                         "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
470                                         "r"(USER_SLB_SLBE));
471                                 return;
472                         }
473                         break;
474 #endif
475                 case EXC_DSI:
476                         if (trap_pfault(frame, false, NULL, NULL))
477                                 return;
478                         break;
479                 case EXC_MCHK:
480                         if (handle_onfault(frame))
481                                 return;
482                         break;
483                 default:
484                         break;
485                 }
486                 trap_fatal(frame);
487         }
488
489         if (sig != 0) {
490                 if (p->p_sysent->sv_transtrap != NULL)
491                         sig = (p->p_sysent->sv_transtrap)(sig, type);
492                 ksiginfo_init_trap(&ksi);
493                 ksi.ksi_signo = sig;
494                 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
495                 ksi.ksi_addr = (void *)addr;
496                 ksi.ksi_trapno = type;
497                 if (uprintf_signal) {
498                         uprintf("pid %d comm %s: signal %d code %d type %d "
499                                 "addr 0x%lx r1 0x%lx srr0 0x%lx srr1 0x%lx\n",
500                                 p->p_pid, p->p_comm, sig, ucode, type,
501                                 (u_long)addr, (u_long)frame->fixreg[1],
502                                 (u_long)frame->srr0, (u_long)frame->srr1);
503                 }
504
505                 trapsignal(td, &ksi);
506         }
507
508         userret(td, frame);
509 }
510
511 static void
512 trap_fatal(struct trapframe *frame)
513 {
514 #ifdef KDB
515         bool handled;
516 #endif
517
518         printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
519 #ifdef KDB
520         if (debugger_on_trap) {
521                 kdb_why = KDB_WHY_TRAP;
522                 handled = kdb_trap(frame->exc, 0, frame);
523                 kdb_why = KDB_WHY_UNSET;
524                 if (handled)
525                         return;
526         }
527 #endif
528         panic("%s trap", trapname(frame->exc));
529 }
530
531 static void
532 cpu_printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
533 {
534 #ifdef AIM
535         uint16_t ver;
536
537         switch (vector) {
538         case EXC_MCHK:
539                 ver = mfpvr() >> 16;
540                 if (MPC745X_P(ver))
541                         printf("    msssr0         = 0x%b\n",
542                             (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
543         case EXC_DSE:
544         case EXC_DSI:
545         case EXC_DTMISS:
546                 printf("   dsisr           = 0x%lx\n",
547                     (u_long)frame->cpu.aim.dsisr);
548                 break;
549         }
550 #elif defined(BOOKE)
551         vm_paddr_t pa;
552
553         switch (vector) {
554         case EXC_MCHK:
555                 pa = mfspr(SPR_MCARU);
556                 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
557                 printf("   mcsr            = 0x%b\n",
558                     (int)mfspr(SPR_MCSR), MCSR_BITMASK);
559                 printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
560         }
561         printf("   esr             = 0x%b\n",
562             (int)frame->cpu.booke.esr, ESR_BITMASK);
563 #endif
564 }
565
566 static void
567 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
568 {
569
570         printf("\n");
571         printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
572             user ? "user" : "kernel");
573         printf("\n");
574         printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
575         switch (vector) {
576         case EXC_DSE:
577         case EXC_DSI:
578         case EXC_DTMISS:
579         case EXC_ALI:
580         case EXC_MCHK:
581                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
582                 break;
583         case EXC_ISE:
584         case EXC_ISI:
585         case EXC_ITMISS:
586                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
587                 break;
588         }
589         cpu_printtrap(vector, frame, isfatal, user);
590         printf("   srr0            = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
591             frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
592         printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
593         printf("   current msr     = 0x%" PRIxPTR "\n", mfmsr());
594         printf("   lr              = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
595             frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
596         printf("   frame           = %p\n", frame);
597         printf("   curthread       = %p\n", curthread);
598         if (curthread != NULL)
599                 printf("          pid = %d, comm = %s\n",
600                     curthread->td_proc->p_pid, curthread->td_name);
601         printf("\n");
602 }
603
604 /*
605  * Handles a fatal fault when we have onfault state to recover.  Returns
606  * non-zero if there was onfault recovery state available.
607  */
608 static int
609 handle_onfault(struct trapframe *frame)
610 {
611         struct          thread *td;
612         jmp_buf         *fb;
613
614         td = curthread;
615 #if defined(__powerpc64__) || defined(BOOKE)
616         uintptr_t dispatch = (uintptr_t)td->td_pcb->pcb_onfault;
617
618         if (dispatch == 0)
619                 return (0);
620         /* Short-circuit radix and Book-E paths. */
621         switch (dispatch) {
622                 case COPYFAULT:
623                         frame->srr0 = (uintptr_t)copy_fault;
624                         return (1);
625                 case FUSUFAULT:
626                         frame->srr0 = (uintptr_t)fusufault;
627                         return (1);
628                 default:
629                         break;
630         }
631 #endif
632         fb = td->td_pcb->pcb_onfault;
633         if (fb != NULL) {
634                 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
635                 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
636                 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
637                 frame->fixreg[3] = 1;
638                 frame->cr = (*fb)->_jb[FAULTBUF_CR];
639                 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
640                     18 * sizeof(register_t));
641                 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
642                 return (1);
643         }
644         return (0);
645 }
646
647 int
648 cpu_fetch_syscall_args(struct thread *td)
649 {
650         struct proc *p;
651         struct trapframe *frame;
652         struct syscall_args *sa;
653         caddr_t params;
654         size_t argsz;
655         int error, n, narg, i;
656
657         p = td->td_proc;
658         frame = td->td_frame;
659         sa = &td->td_sa;
660
661         sa->code = frame->fixreg[0];
662         params = (caddr_t)(frame->fixreg + FIRSTARG);
663         n = NARGREG;
664
665         if (sa->code == SYS_syscall) {
666                 /*
667                  * code is first argument,
668                  * followed by actual args.
669                  */
670                 sa->code = *(register_t *) params;
671                 params += sizeof(register_t);
672                 n -= 1;
673         } else if (sa->code == SYS___syscall) {
674                 /*
675                  * Like syscall, but code is a quad,
676                  * so as to maintain quad alignment
677                  * for the rest of the args.
678                  */
679                 if (SV_PROC_FLAG(p, SV_ILP32)) {
680                         params += sizeof(register_t);
681                         sa->code = *(register_t *) params;
682                         params += sizeof(register_t);
683                         n -= 2;
684                 } else {
685                         sa->code = *(register_t *) params;
686                         params += sizeof(register_t);
687                         n -= 1;
688                 }
689         }
690
691         if (sa->code >= p->p_sysent->sv_size)
692                 sa->callp = &p->p_sysent->sv_table[0];
693         else
694                 sa->callp = &p->p_sysent->sv_table[sa->code];
695
696         narg = sa->callp->sy_narg;
697
698         if (SV_PROC_FLAG(p, SV_ILP32)) {
699                 argsz = sizeof(uint32_t);
700
701                 for (i = 0; i < n; i++)
702                         sa->args[i] = ((u_register_t *)(params))[i] &
703                             0xffffffff;
704         } else {
705                 argsz = sizeof(uint64_t);
706
707                 for (i = 0; i < n; i++)
708                         sa->args[i] = ((u_register_t *)(params))[i];
709         }
710
711         if (narg > n)
712                 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
713                                (narg - n) * argsz);
714         else
715                 error = 0;
716
717 #ifdef __powerpc64__
718         if (SV_PROC_FLAG(p, SV_ILP32) && narg > n) {
719                 /* Expand the size of arguments copied from the stack */
720
721                 for (i = narg; i >= n; i--)
722                         sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
723         }
724 #endif
725
726         if (error == 0) {
727                 td->td_retval[0] = 0;
728                 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
729         }
730         return (error);
731 }
732
733 #include "../../kern/subr_syscall.c"
734
735 void
736 syscall(struct trapframe *frame)
737 {
738         struct thread *td;
739
740         td = curthread;
741         td->td_frame = frame;
742
743 #if defined(__powerpc64__) && defined(AIM)
744         /*
745          * Speculatively restore last user SLB segment, which we know is
746          * invalid already, since we are likely to do copyin()/copyout().
747          */
748         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0)
749                 __asm __volatile ("slbmte %0, %1; isync" ::
750                     "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
751 #endif
752
753         syscallenter(td);
754         syscallret(td);
755 }
756
757 static bool
758 trap_pfault(struct trapframe *frame, bool user, int *signo, int *ucode)
759 {
760         vm_offset_t     eva;
761         struct          thread *td;
762         struct          proc *p;
763         vm_map_t        map;
764         vm_prot_t       ftype;
765         int             rv, is_user;
766
767         td = curthread;
768         p = td->td_proc;
769         if (frame->exc == EXC_ISI) {
770                 eva = frame->srr0;
771                 ftype = VM_PROT_EXECUTE;
772                 if (frame->srr1 & SRR1_ISI_PFAULT)
773                         ftype |= VM_PROT_READ;
774         } else {
775                 eva = frame->dar;
776 #ifdef BOOKE
777                 if (frame->cpu.booke.esr & ESR_ST)
778 #else
779                 if (frame->cpu.aim.dsisr & DSISR_STORE)
780 #endif
781                         ftype = VM_PROT_WRITE;
782                 else
783                         ftype = VM_PROT_READ;
784         }
785 #if defined(__powerpc64__) && defined(AIM)
786         if (radix_mmu && pmap_nofault(&p->p_vmspace->vm_pmap, eva, ftype) == 0)
787                 return (true);
788 #endif
789
790         if (__predict_false((td->td_pflags & TDP_NOFAULTING) == 0)) {
791                 /*
792                  * If we get a page fault while in a critical section, then
793                  * it is most likely a fatal kernel page fault.  The kernel
794                  * is already going to panic trying to get a sleep lock to
795                  * do the VM lookup, so just consider it a fatal trap so the
796                  * kernel can print out a useful trap message and even get
797                  * to the debugger.
798                  *
799                  * If we get a page fault while holding a non-sleepable
800                  * lock, then it is most likely a fatal kernel page fault.
801                  * If WITNESS is enabled, then it's going to whine about
802                  * bogus LORs with various VM locks, so just skip to the
803                  * fatal trap handling directly.
804                  */
805                 if (td->td_critnest != 0 ||
806                         WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL,
807                                 "Kernel page fault") != 0) {
808                         trap_fatal(frame);
809                         return (false);
810                 }
811         }
812         if (user) {
813                 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace  NULL"));
814                 map = &p->p_vmspace->vm_map;
815         } else {
816                 rv = pmap_decode_kernel_ptr(eva, &is_user, &eva);
817                 if (rv != 0)
818                         return (false);
819
820                 if (is_user)
821                         map = &p->p_vmspace->vm_map;
822                 else
823                         map = kernel_map;
824         }
825
826         /* Fault in the page. */
827         rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode);
828         /*
829          * XXXDTRACE: add dtrace_doubletrap_func here?
830          */
831
832         if (rv == KERN_SUCCESS)
833                 return (true);
834
835         if (!user && handle_onfault(frame))
836                 return (true);
837
838         return (false);
839 }
840
841 /*
842  * For now, this only deals with the particular unaligned access case
843  * that gcc tends to generate.  Eventually it should handle all of the
844  * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
845  */
846
847 static int
848 fix_unaligned(struct thread *td, struct trapframe *frame)
849 {
850         struct thread   *fputhread;
851 #ifdef BOOKE
852         uint32_t        inst;
853 #endif
854         int             indicator, reg;
855         double          *fpr;
856
857 #ifdef __SPE__
858         indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
859         if (indicator & ESR_SPE) {
860                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
861                         return (-1);
862                 reg = EXC_ALI_INST_RST(inst);
863                 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
864                 fputhread = PCPU_GET(vecthread);
865
866                 /* Juggle the SPE to ensure that we've initialized
867                  * the registers, and that their current state is in
868                  * the PCB.
869                  */
870                 if (fputhread != td) {
871                         if (fputhread)
872                                 save_vec(fputhread);
873                         enable_vec(td);
874                 }
875                 save_vec(td);
876
877                 if (!(indicator & ESR_ST)) {
878                         if (copyin((void *)frame->dar, fpr,
879                             sizeof(double)) != 0)
880                                 return (-1);
881                         frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
882                         enable_vec(td);
883                 } else {
884                         td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
885                         if (copyout(fpr, (void *)frame->dar,
886                             sizeof(double)) != 0)
887                                 return (-1);
888                 }
889                 return (0);
890         }
891 #else
892 #ifdef BOOKE
893         indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
894 #else
895         indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
896 #endif
897
898         switch (indicator) {
899         case EXC_ALI_LFD:
900         case EXC_ALI_STFD:
901 #ifdef BOOKE
902                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
903                         return (-1);
904                 reg = EXC_ALI_INST_RST(inst);
905 #else
906                 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
907 #endif
908                 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
909                 fputhread = PCPU_GET(fputhread);
910
911                 /* Juggle the FPU to ensure that we've initialized
912                  * the FPRs, and that their current state is in
913                  * the PCB.
914                  */
915                 if (fputhread != td) {
916                         if (fputhread)
917                                 save_fpu(fputhread);
918                         enable_fpu(td);
919                 }
920                 save_fpu(td);
921
922                 if (indicator == EXC_ALI_LFD) {
923                         if (copyin((void *)frame->dar, fpr,
924                             sizeof(double)) != 0)
925                                 return (-1);
926                         enable_fpu(td);
927                 } else {
928                         if (copyout(fpr, (void *)frame->dar,
929                             sizeof(double)) != 0)
930                                 return (-1);
931                 }
932                 return (0);
933                 break;
934         }
935 #endif
936
937         return (-1);
938 }
939
940 #if defined(__powerpc64__) && defined(AIM)
941 #define MSKNSHL(x, m, n) "(((" #x ") & " #m ") << " #n ")"
942 #define MSKNSHR(x, m, n) "(((" #x ") & " #m ") >> " #n ")"
943
944 /* xvcpsgndp instruction, built in opcode format.
945  * This can be changed to use mnemonic after a toolchain update.
946  */
947 #define XVCPSGNDP(xt, xa, xb) \
948         __asm __volatile(".long (" \
949                 MSKNSHL(60, 0x3f, 26) " | " \
950                 MSKNSHL(xt, 0x1f, 21) " | " \
951                 MSKNSHL(xa, 0x1f, 16) " | " \
952                 MSKNSHL(xb, 0x1f, 11) " | " \
953                 MSKNSHL(240, 0xff, 3) " | " \
954                 MSKNSHR(xa,  0x20, 3) " | " \
955                 MSKNSHR(xa,  0x20, 4) " | " \
956                 MSKNSHR(xa,  0x20, 5) ")")
957
958 /* Macros to normalize 1 or 10 VSX registers */
959 #define NORM(x) XVCPSGNDP(x, x, x)
960 #define NORM10(x) \
961         NORM(x ## 0); NORM(x ## 1); NORM(x ## 2); NORM(x ## 3); NORM(x ## 4); \
962         NORM(x ## 5); NORM(x ## 6); NORM(x ## 7); NORM(x ## 8); NORM(x ## 9)
963
964 static void
965 normalize_inputs(void)
966 {
967         unsigned long msr;
968
969         /* enable VSX */
970         msr = mfmsr();
971         mtmsr(msr | PSL_VSX);
972
973         NORM(0);   NORM(1);   NORM(2);   NORM(3);   NORM(4);
974         NORM(5);   NORM(6);   NORM(7);   NORM(8);   NORM(9);
975         NORM10(1); NORM10(2); NORM10(3); NORM10(4); NORM10(5);
976         NORM(60);  NORM(61);  NORM(62);  NORM(63);
977
978         /* restore MSR */
979         mtmsr(msr);
980 }
981 #endif
982
983 #ifdef KDB
984 int
985 db_trap_glue(struct trapframe *frame)
986 {
987
988         if (!(frame->srr1 & PSL_PR)
989             && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
990                 || frame_is_trap_inst(frame)
991                 || frame->exc == EXC_BPT
992                 || frame->exc == EXC_DEBUG
993                 || frame->exc == EXC_DSI)) {
994                 int type = frame->exc;
995
996                 /* Ignore DTrace traps. */
997                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
998                         return (0);
999                 if (frame_is_trap_inst(frame)) {
1000                         type = T_BREAKPOINT;
1001                 }
1002                 return (kdb_trap(type, 0, frame));
1003         }
1004
1005         return (0);
1006 }
1007 #endif