sys/powerpc/powerpc/trap.c

   1 /*-
   2  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   3  * Copyright (C) 1995, 1996 TooLs GmbH.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. All advertising materials mentioning features or use of this software
  15  *    must display the following acknowledgement:
  16  *      This product includes software developed by TooLs GmbH.
  17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
  32  */
  33
  34 #include <sys/cdefs.h>
  35 __FBSDID("$FreeBSD$");
  36
  37 #include <sys/param.h>
  38 #include <sys/kdb.h>
  39 #include <sys/proc.h>
  40 #include <sys/ktr.h>
  41 #include <sys/lock.h>
  42 #include <sys/mutex.h>
  43 #include <sys/pioctl.h>
  44 #include <sys/ptrace.h>
  45 #include <sys/reboot.h>
  46 #include <sys/syscall.h>
  47 #include <sys/sysent.h>
  48 #include <sys/systm.h>
  49 #include <sys/kernel.h>
  50 #include <sys/uio.h>
  51 #include <sys/signalvar.h>
  52 #include <sys/vmmeter.h>
  53
  54 #include <security/audit/audit.h>
  55
  56 #include <vm/vm.h>
  57 #include <vm/pmap.h>
  58 #include <vm/vm_extern.h>
  59 #include <vm/vm_param.h>
  60 #include <vm/vm_kern.h>
  61 #include <vm/vm_map.h>
  62 #include <vm/vm_page.h>
  63
  64 #include <machine/_inttypes.h>
  65 #include <machine/altivec.h>
  66 #include <machine/cpu.h>
  67 #include <machine/db_machdep.h>
  68 #include <machine/fpu.h>
  69 #include <machine/frame.h>
  70 #include <machine/pcb.h>
  71 #include <machine/psl.h>
  72 #include <machine/slb.h>
  73 #include <machine/spr.h>
  74 #include <machine/sr.h>
  75 #include <machine/trap.h>
  76
  77 /* Below matches setjmp.S */
  78 #define FAULTBUF_LR     21
  79 #define FAULTBUF_R1     1
  80 #define FAULTBUF_R2     2
  81 #define FAULTBUF_CR     22
  82 #define FAULTBUF_R14    3
  83
  84 #define MOREARGS(sp)    ((caddr_t)((uintptr_t)(sp) + \
  85     sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
  86
  87 static void     trap_fatal(struct trapframe *frame);
  88 static void     printtrap(u_int vector, struct trapframe *frame, int isfatal,
  89                     int user);
  90 static int      trap_pfault(struct trapframe *frame, int user);
  91 static int      fix_unaligned(struct thread *td, struct trapframe *frame);
  92 static int      handle_onfault(struct trapframe *frame);
  93 static void     syscall(struct trapframe *frame);
  94
  95 #if defined(__powerpc64__) && defined(AIM)
  96 static void     normalize_inputs(void);
  97 #endif
  98
  99 extern vm_offset_t __startkernel;
 100
 101 #ifdef KDB
 102 int db_trap_glue(struct trapframe *);           /* Called from trap_subr.S */
 103 #endif
 104
 105 struct powerpc_exception {
 106         u_int   vector;
 107         char    *name;
 108 };
 109
 110 #ifdef KDTRACE_HOOKS
 111 #include <sys/dtrace_bsd.h>
 112
 113 int (*dtrace_invop_jump_addr)(struct trapframe *);
 114 #endif
 115
 116 static struct powerpc_exception powerpc_exceptions[] = {
 117         { EXC_CRIT,     "critical input" },
 118         { EXC_RST,      "system reset" },
 119         { EXC_MCHK,     "machine check" },
 120         { EXC_DSI,      "data storage interrupt" },
 121         { EXC_DSE,      "data segment exception" },
 122         { EXC_ISI,      "instruction storage interrupt" },
 123         { EXC_ISE,      "instruction segment exception" },
 124         { EXC_EXI,      "external interrupt" },
 125         { EXC_ALI,      "alignment" },
 126         { EXC_PGM,      "program" },
 127         { EXC_HEA,      "hypervisor emulation assistance" },
 128         { EXC_FPU,      "floating-point unavailable" },
 129         { EXC_APU,      "auxiliary proc unavailable" },
 130         { EXC_DECR,     "decrementer" },
 131         { EXC_FIT,      "fixed-interval timer" },
 132         { EXC_WDOG,     "watchdog timer" },
 133         { EXC_SC,       "system call" },
 134         { EXC_TRC,      "trace" },
 135         { EXC_FPA,      "floating-point assist" },
 136         { EXC_DEBUG,    "debug" },
 137         { EXC_PERF,     "performance monitoring" },
 138         { EXC_VEC,      "altivec unavailable" },
 139         { EXC_VSX,      "vsx unavailable" },
 140         { EXC_FAC,      "facility unavailable" },
 141         { EXC_ITMISS,   "instruction tlb miss" },
 142         { EXC_DLMISS,   "data load tlb miss" },
 143         { EXC_DSMISS,   "data store tlb miss" },
 144         { EXC_BPT,      "instruction breakpoint" },
 145         { EXC_SMI,      "system management" },
 146         { EXC_VECAST_G4,        "altivec assist" },
 147         { EXC_THRM,     "thermal management" },
 148         { EXC_RUNMODETRC,       "run mode/trace" },
 149         { EXC_SOFT_PATCH, "soft patch exception" },
 150         { EXC_LAST,     NULL }
 151 };
 152
 153 #define ESR_BITMASK                                                     \
 154     "\20"                                                               \
 155     "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP"               \
 156     "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE"             \
 157     "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23"          \
 158     "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
 159 #define MCSR_BITMASK                                                    \
 160     "\20"                                                               \
 161     "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7"      \
 162     "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF"             \
 163     "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23"            \
 164     "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
 165 #define MSSSR_BITMASK                                                   \
 166     "\20"                                                               \
 167     "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7"                  \
 168     "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG"      \
 169     "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23"        \
 170     "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
 171
 172
 173 static const char *
 174 trapname(u_int vector)
 175 {
 176         struct  powerpc_exception *pe;
 177
 178         for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
 179                 if (pe->vector == vector)
 180                         return (pe->name);
 181         }
 182
 183         return ("unknown");
 184 }
 185
 186 static inline bool
 187 frame_is_trap_inst(struct trapframe *frame)
 188 {
 189 #ifdef AIM
 190         return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
 191 #else
 192         return ((frame->cpu.booke.esr & ESR_PTR) != 0);
 193 #endif
 194 }
 195
 196 void
 197 trap(struct trapframe *frame)
 198 {
 199         struct thread   *td;
 200         struct proc     *p;
 201 #ifdef KDTRACE_HOOKS
 202         uint32_t inst;
 203 #endif
 204         int             sig, type, user;
 205         u_int           ucode;
 206         ksiginfo_t      ksi;
 207         register_t      fscr;
 208
 209         VM_CNT_INC(v_trap);
 210
 211 #ifdef KDB
 212         if (kdb_active) {
 213                 kdb_reenter();
 214                 return;
 215         }
 216 #endif
 217
 218         td = curthread;
 219         p = td->td_proc;
 220
 221         type = ucode = frame->exc;
 222         sig = 0;
 223         user = frame->srr1 & PSL_PR;
 224
 225         CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
 226             trapname(type), user ? "user" : "kernel");
 227
 228 #ifdef KDTRACE_HOOKS
 229         /*
 230          * A trap can occur while DTrace executes a probe. Before
 231          * executing the probe, DTrace blocks re-scheduling and sets
 232          * a flag in its per-cpu flags to indicate that it doesn't
 233          * want to fault. On returning from the probe, the no-fault
 234          * flag is cleared and finally re-scheduling is enabled.
 235          *
 236          * If the DTrace kernel module has registered a trap handler,
 237          * call it and if it returns non-zero, assume that it has
 238          * handled the trap and modified the trap frame so that this
 239          * function can return normally.
 240          */
 241         if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
 242                 return;
 243 #endif
 244
 245         if (user) {
 246                 td->td_pticks = 0;
 247                 td->td_frame = frame;
 248                 if (td->td_cowgen != p->p_cowgen)
 249                         thread_cow_update(td);
 250
 251                 /* User Mode Traps */
 252                 switch (type) {
 253                 case EXC_RUNMODETRC:
 254                 case EXC_TRC:
 255                         frame->srr1 &= ~PSL_SE;
 256                         sig = SIGTRAP;
 257                         ucode = TRAP_TRACE;
 258                         break;
 259
 260 #if defined(__powerpc64__) && defined(AIM)
 261                 case EXC_ISE:
 262                 case EXC_DSE:
 263                         if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
 264                             (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
 265                                 sig = SIGSEGV;
 266                                 ucode = SEGV_MAPERR;
 267                         }
 268                         break;
 269 #endif
 270                 case EXC_DSI:
 271                 case EXC_ISI:
 272                         sig = trap_pfault(frame, 1);
 273                         if (sig == SIGSEGV)
 274                                 ucode = SEGV_MAPERR;
 275                         break;
 276
 277                 case EXC_SC:
 278                         syscall(frame);
 279                         break;
 280
 281                 case EXC_FPU:
 282                         KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
 283                             ("FPU already enabled for thread"));
 284                         enable_fpu(td);
 285                         break;
 286
 287                 case EXC_VEC:
 288                         KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
 289                             ("Altivec already enabled for thread"));
 290                         enable_vec(td);
 291                         break;
 292
 293                 case EXC_VSX:
 294                         KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
 295                             ("VSX already enabled for thread"));
 296                         if (!(td->td_pcb->pcb_flags & PCB_VEC))
 297                                 enable_vec(td);
 298                         if (td->td_pcb->pcb_flags & PCB_FPU)
 299                                 save_fpu(td);
 300                         td->td_pcb->pcb_flags |= PCB_VSX;
 301                         enable_fpu(td);
 302                         break;
 303
 304                 case EXC_FAC:
 305                         fscr = mfspr(SPR_FSCR);
 306                         switch (fscr & FSCR_IC_MASK) {
 307                         case FSCR_IC_HTM:
 308                                 CTR0(KTR_TRAP,
 309                                     "Hardware Transactional Memory subsystem disabled");
 310                                 sig = SIGILL;
 311                                 ucode = ILL_ILLOPC;
 312                                 break;
 313                         case FSCR_IC_DSCR:
 314                                 td->td_pcb->pcb_flags |= PCB_CFSCR | PCB_CDSCR;
 315                                 fscr |= FSCR_DSCR;
 316                                 mtspr(SPR_DSCR, 0);
 317                                 break;
 318                         case FSCR_IC_EBB:
 319                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 320                                 fscr |= FSCR_EBB;
 321                                 mtspr(SPR_EBBHR, 0);
 322                                 mtspr(SPR_EBBRR, 0);
 323                                 mtspr(SPR_BESCR, 0);
 324                                 break;
 325                         case FSCR_IC_TAR:
 326                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 327                                 fscr |= FSCR_TAR;
 328                                 mtspr(SPR_TAR, 0);
 329                                 break;
 330                         case FSCR_IC_LM:
 331                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 332                                 fscr |= FSCR_LM;
 333                                 mtspr(SPR_LMRR, 0);
 334                                 mtspr(SPR_LMSER, 0);
 335                                 break;
 336                         default:
 337                                 sig = SIGILL;
 338                                 ucode = ILL_ILLOPC;
 339                         }
 340                         mtspr(SPR_FSCR, fscr & ~FSCR_IC_MASK);
 341                         break;
 342                 case EXC_HEA:
 343                         sig = SIGILL;
 344                         ucode = ILL_ILLOPC;
 345                         break;
 346
 347                 case EXC_VECAST_E:
 348                 case EXC_VECAST_G4:
 349                 case EXC_VECAST_G5:
 350                         /*
 351                          * We get a VPU assist exception for IEEE mode
 352                          * vector operations on denormalized floats.
 353                          * Emulating this is a giant pain, so for now,
 354                          * just switch off IEEE mode and treat them as
 355                          * zero.
 356                          */
 357
 358                         save_vec(td);
 359                         td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
 360                         enable_vec(td);
 361                         break;
 362
 363                 case EXC_ALI:
 364                         if (fix_unaligned(td, frame) != 0) {
 365                                 sig = SIGBUS;
 366                                 ucode = BUS_ADRALN;
 367                         }
 368                         else
 369                                 frame->srr0 += 4;
 370                         break;
 371
 372                 case EXC_DEBUG: /* Single stepping */
 373                         mtspr(SPR_DBSR, mfspr(SPR_DBSR));
 374                         frame->srr1 &= ~PSL_DE;
 375                         frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
 376                         sig = SIGTRAP;
 377                         ucode = TRAP_TRACE;
 378                         break;
 379
 380                 case EXC_PGM:
 381                         /* Identify the trap reason */
 382                         if (frame_is_trap_inst(frame)) {
 383 #ifdef KDTRACE_HOOKS
 384                                 inst = fuword32((const void *)frame->srr0);
 385                                 if (inst == 0x0FFFDDDD &&
 386                                     dtrace_pid_probe_ptr != NULL) {
 387                                         (*dtrace_pid_probe_ptr)(frame);
 388                                         break;
 389                                 }
 390 #endif
 391                                 sig = SIGTRAP;
 392                                 ucode = TRAP_BRKPT;
 393                         } else {
 394                                 sig = ppc_instr_emulate(frame, td);
 395                                 if (sig == SIGILL) {
 396                                         if (frame->srr1 & EXC_PGM_PRIV)
 397                                                 ucode = ILL_PRVOPC;
 398                                         else if (frame->srr1 & EXC_PGM_ILLEGAL)
 399                                                 ucode = ILL_ILLOPC;
 400                                 } else if (sig == SIGFPE)
 401                                         ucode = FPE_FLTINV;     /* Punt for now, invalid operation. */
 402                         }
 403                         break;
 404
 405                 case EXC_MCHK:
 406                         /*
 407                          * Note that this may not be recoverable for the user
 408                          * process, depending on the type of machine check,
 409                          * but it at least prevents the kernel from dying.
 410                          */
 411                         sig = SIGBUS;
 412                         ucode = BUS_OBJERR;
 413                         break;
 414
 415 #if defined(__powerpc64__) && defined(AIM)
 416                 case EXC_SOFT_PATCH:
 417                         /*
 418                          * Point to the instruction that generated the exception to execute it again,
 419                          * and normalize the register values.
 420                          */
 421                         frame->srr0 -= 4;
 422                         normalize_inputs();
 423                         break;
 424 #endif
 425
 426                 default:
 427                         trap_fatal(frame);
 428                 }
 429         } else {
 430                 /* Kernel Mode Traps */
 431
 432                 KASSERT(cold || td->td_ucred != NULL,
 433                     ("kernel trap doesn't have ucred"));
 434                 switch (type) {
 435                 case EXC_PGM:
 436 #ifdef KDTRACE_HOOKS
 437                         if (frame_is_trap_inst(frame)) {
 438                                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
 439                                         if (dtrace_invop_jump_addr != NULL) {
 440                                                 dtrace_invop_jump_addr(frame);
 441                                                 return;
 442                                         }
 443                                 }
 444                         }
 445 #endif
 446 #ifdef KDB
 447                         if (db_trap_glue(frame))
 448                                 return;
 449 #endif
 450                         break;
 451 #if defined(__powerpc64__) && defined(AIM)
 452                 case EXC_DSE:
 453                         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 &&
 454                             (frame->dar & SEGMENT_MASK) == USER_ADDR) {
 455                                 __asm __volatile ("slbmte %0, %1" ::
 456                                         "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
 457                                         "r"(USER_SLB_SLBE));
 458                                 return;
 459                         }
 460                         break;
 461 #endif
 462                 case EXC_DSI:
 463                         if (trap_pfault(frame, 0) == 0)
 464                                 return;
 465                         break;
 466                 case EXC_MCHK:
 467                         if (handle_onfault(frame))
 468                                 return;
 469                         break;
 470                 default:
 471                         break;
 472                 }
 473                 trap_fatal(frame);
 474         }
 475
 476         if (sig != 0) {
 477                 if (p->p_sysent->sv_transtrap != NULL)
 478                         sig = (p->p_sysent->sv_transtrap)(sig, type);
 479                 ksiginfo_init_trap(&ksi);
 480                 ksi.ksi_signo = sig;
 481                 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
 482                 ksi.ksi_addr = (void *)frame->srr0;
 483                 ksi.ksi_trapno = type;
 484                 trapsignal(td, &ksi);
 485         }
 486
 487         userret(td, frame);
 488 }
 489
 490 static void
 491 trap_fatal(struct trapframe *frame)
 492 {
 493 #ifdef KDB
 494         bool handled;
 495 #endif
 496
 497         printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
 498 #ifdef KDB
 499         if (debugger_on_trap) {
 500                 kdb_why = KDB_WHY_TRAP;
 501                 handled = kdb_trap(frame->exc, 0, frame);
 502                 kdb_why = KDB_WHY_UNSET;
 503                 if (handled)
 504                         return;
 505         }
 506 #endif
 507         panic("%s trap", trapname(frame->exc));
 508 }
 509
 510 static void
 511 cpu_printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 512 {
 513 #ifdef AIM
 514         uint16_t ver;
 515
 516         switch (vector) {
 517         case EXC_DSE:
 518         case EXC_DSI:
 519         case EXC_DTMISS:
 520                 printf("   dsisr           = 0x%lx\n",
 521                     (u_long)frame->cpu.aim.dsisr);
 522                 break;
 523         case EXC_MCHK:
 524                 ver = mfpvr() >> 16;
 525                 if (MPC745X_P(ver))
 526                         printf("    msssr0         = 0x%b\n",
 527                             (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
 528                 break;
 529         }
 530 #elif defined(BOOKE)
 531         vm_paddr_t pa;
 532
 533         switch (vector) {
 534         case EXC_MCHK:
 535                 pa = mfspr(SPR_MCARU);
 536                 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
 537                 printf("   mcsr            = 0x%b\n",
 538                     (int)mfspr(SPR_MCSR), MCSR_BITMASK);
 539                 printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
 540         }
 541         printf("   esr             = 0x%b\n",
 542             (int)frame->cpu.booke.esr, ESR_BITMASK);
 543 #endif
 544 }
 545
 546 static void
 547 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 548 {
 549
 550         printf("\n");
 551         printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
 552             user ? "user" : "kernel");
 553         printf("\n");
 554         printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
 555         switch (vector) {
 556         case EXC_DSE:
 557         case EXC_DSI:
 558         case EXC_DTMISS:
 559         case EXC_ALI:
 560                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
 561                 break;
 562         case EXC_ISE:
 563         case EXC_ISI:
 564         case EXC_ITMISS:
 565                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
 566                 break;
 567         case EXC_MCHK:
 568                 break;
 569         }
 570         cpu_printtrap(vector, frame, isfatal, user);
 571         printf("   srr0            = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
 572             frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
 573         printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
 574         printf("   current msr     = 0x%" PRIxPTR "\n", mfmsr());
 575         printf("   lr              = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
 576             frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
 577         printf("   frame           = %p\n", frame);
 578         printf("   curthread       = %p\n", curthread);
 579         if (curthread != NULL)
 580                 printf("          pid = %d, comm = %s\n",
 581                     curthread->td_proc->p_pid, curthread->td_name);
 582         printf("\n");
 583 }
 584
 585 /*
 586  * Handles a fatal fault when we have onfault state to recover.  Returns
 587  * non-zero if there was onfault recovery state available.
 588  */
 589 static int
 590 handle_onfault(struct trapframe *frame)
 591 {
 592         struct          thread *td;
 593         jmp_buf         *fb;
 594
 595         td = curthread;
 596         fb = td->td_pcb->pcb_onfault;
 597         if (fb != NULL) {
 598                 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
 599                 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
 600                 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
 601                 frame->fixreg[3] = 1;
 602                 frame->cr = (*fb)->_jb[FAULTBUF_CR];
 603                 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
 604                     18 * sizeof(register_t));
 605                 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
 606                 return (1);
 607         }
 608         return (0);
 609 }
 610
 611 int
 612 cpu_fetch_syscall_args(struct thread *td)
 613 {
 614         struct proc *p;
 615         struct trapframe *frame;
 616         struct syscall_args *sa;
 617         caddr_t params;
 618         size_t argsz;
 619         int error, n, i;
 620
 621         p = td->td_proc;
 622         frame = td->td_frame;
 623         sa = &td->td_sa;
 624
 625         sa->code = frame->fixreg[0];
 626         params = (caddr_t)(frame->fixreg + FIRSTARG);
 627         n = NARGREG;
 628
 629         if (sa->code == SYS_syscall) {
 630                 /*
 631                  * code is first argument,
 632                  * followed by actual args.
 633                  */
 634                 sa->code = *(register_t *) params;
 635                 params += sizeof(register_t);
 636                 n -= 1;
 637         } else if (sa->code == SYS___syscall) {
 638                 /*
 639                  * Like syscall, but code is a quad,
 640                  * so as to maintain quad alignment
 641                  * for the rest of the args.
 642                  */
 643                 if (SV_PROC_FLAG(p, SV_ILP32)) {
 644                         params += sizeof(register_t);
 645                         sa->code = *(register_t *) params;
 646                         params += sizeof(register_t);
 647                         n -= 2;
 648                 } else {
 649                         sa->code = *(register_t *) params;
 650                         params += sizeof(register_t);
 651                         n -= 1;
 652                 }
 653         }
 654
 655         if (sa->code >= p->p_sysent->sv_size)
 656                 sa->callp = &p->p_sysent->sv_table[0];
 657         else
 658                 sa->callp = &p->p_sysent->sv_table[sa->code];
 659
 660         sa->narg = sa->callp->sy_narg;
 661
 662         if (SV_PROC_FLAG(p, SV_ILP32)) {
 663                 argsz = sizeof(uint32_t);
 664
 665                 for (i = 0; i < n; i++)
 666                         sa->args[i] = ((u_register_t *)(params))[i] &
 667                             0xffffffff;
 668         } else {
 669                 argsz = sizeof(uint64_t);
 670
 671                 for (i = 0; i < n; i++)
 672                         sa->args[i] = ((u_register_t *)(params))[i];
 673         }
 674
 675         if (sa->narg > n)
 676                 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
 677                                (sa->narg - n) * argsz);
 678         else
 679                 error = 0;
 680
 681 #ifdef __powerpc64__
 682         if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
 683                 /* Expand the size of arguments copied from the stack */
 684
 685                 for (i = sa->narg; i >= n; i--)
 686                         sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
 687         }
 688 #endif
 689
 690         if (error == 0) {
 691                 td->td_retval[0] = 0;
 692                 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
 693         }
 694         return (error);
 695 }
 696
 697 #include "../../kern/subr_syscall.c"
 698
 699 void
 700 syscall(struct trapframe *frame)
 701 {
 702         struct thread *td;
 703
 704         td = curthread;
 705         td->td_frame = frame;
 706
 707 #if defined(__powerpc64__) && defined(AIM)
 708         /*
 709          * Speculatively restore last user SLB segment, which we know is
 710          * invalid already, since we are likely to do copyin()/copyout().
 711          */
 712         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0)
 713                 __asm __volatile ("slbmte %0, %1; isync" ::
 714                     "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
 715 #endif
 716
 717         syscallenter(td);
 718         syscallret(td);
 719 }
 720
 721 static int
 722 trap_pfault(struct trapframe *frame, int user)
 723 {
 724         vm_offset_t     eva, va;
 725         struct          thread *td;
 726         struct          proc *p;
 727         vm_map_t        map;
 728         vm_prot_t       ftype;
 729         int             rv, is_user;
 730
 731         td = curthread;
 732         p = td->td_proc;
 733         if (frame->exc == EXC_ISI) {
 734                 eva = frame->srr0;
 735                 ftype = VM_PROT_EXECUTE;
 736                 if (frame->srr1 & SRR1_ISI_PFAULT)
 737                         ftype |= VM_PROT_READ;
 738         } else {
 739                 eva = frame->dar;
 740 #ifdef BOOKE
 741                 if (frame->cpu.booke.esr & ESR_ST)
 742 #else
 743                 if (frame->cpu.aim.dsisr & DSISR_STORE)
 744 #endif
 745                         ftype = VM_PROT_WRITE;
 746                 else
 747                         ftype = VM_PROT_READ;
 748         }
 749
 750         if (user) {
 751                 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace  NULL"));
 752                 map = &p->p_vmspace->vm_map;
 753         } else {
 754                 rv = pmap_decode_kernel_ptr(eva, &is_user, &eva);
 755                 if (rv != 0)
 756                         return (SIGSEGV);
 757
 758                 if (is_user)
 759                         map = &p->p_vmspace->vm_map;
 760                 else
 761                         map = kernel_map;
 762         }
 763         va = trunc_page(eva);
 764
 765         /* Fault in the page. */
 766         rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
 767         /*
 768          * XXXDTRACE: add dtrace_doubletrap_func here?
 769          */
 770
 771         if (rv == KERN_SUCCESS)
 772                 return (0);
 773
 774         if (!user && handle_onfault(frame))
 775                 return (0);
 776
 777         return (SIGSEGV);
 778 }
 779
 780 /*
 781  * For now, this only deals with the particular unaligned access case
 782  * that gcc tends to generate.  Eventually it should handle all of the
 783  * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
 784  */
 785
 786 static int
 787 fix_unaligned(struct thread *td, struct trapframe *frame)
 788 {
 789         struct thread   *fputhread;
 790 #ifdef BOOKE
 791         uint32_t        inst;
 792 #endif
 793         int             indicator, reg;
 794         double          *fpr;
 795
 796 #ifdef __SPE__
 797         indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
 798         if (indicator & ESR_SPE) {
 799                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 800                         return (-1);
 801                 reg = EXC_ALI_INST_RST(inst);
 802                 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
 803                 fputhread = PCPU_GET(vecthread);
 804
 805                 /* Juggle the SPE to ensure that we've initialized
 806                  * the registers, and that their current state is in
 807                  * the PCB.
 808                  */
 809                 if (fputhread != td) {
 810                         if (fputhread)
 811                                 save_vec(fputhread);
 812                         enable_vec(td);
 813                 }
 814                 save_vec(td);
 815
 816                 if (!(indicator & ESR_ST)) {
 817                         if (copyin((void *)frame->dar, fpr,
 818                             sizeof(double)) != 0)
 819                                 return (-1);
 820                         frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
 821                         enable_vec(td);
 822                 } else {
 823                         td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
 824                         if (copyout(fpr, (void *)frame->dar,
 825                             sizeof(double)) != 0)
 826                                 return (-1);
 827                 }
 828                 return (0);
 829         }
 830 #else
 831 #ifdef BOOKE
 832         indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
 833 #else
 834         indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
 835 #endif
 836
 837         switch (indicator) {
 838         case EXC_ALI_LFD:
 839         case EXC_ALI_STFD:
 840 #ifdef BOOKE
 841                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 842                         return (-1);
 843                 reg = EXC_ALI_INST_RST(inst);
 844 #else
 845                 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
 846 #endif
 847                 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
 848                 fputhread = PCPU_GET(fputhread);
 849
 850                 /* Juggle the FPU to ensure that we've initialized
 851                  * the FPRs, and that their current state is in
 852                  * the PCB.
 853                  */
 854                 if (fputhread != td) {
 855                         if (fputhread)
 856                                 save_fpu(fputhread);
 857                         enable_fpu(td);
 858                 }
 859                 save_fpu(td);
 860
 861                 if (indicator == EXC_ALI_LFD) {
 862                         if (copyin((void *)frame->dar, fpr,
 863                             sizeof(double)) != 0)
 864                                 return (-1);
 865                         enable_fpu(td);
 866                 } else {
 867                         if (copyout(fpr, (void *)frame->dar,
 868                             sizeof(double)) != 0)
 869                                 return (-1);
 870                 }
 871                 return (0);
 872                 break;
 873         }
 874 #endif
 875
 876         return (-1);
 877 }
 878
 879 #if defined(__powerpc64__) && defined(AIM)
 880 #define MSKNSHL(x, m, n) "(((" #x ") & " #m ") << " #n ")"
 881 #define MSKNSHR(x, m, n) "(((" #x ") & " #m ") >> " #n ")"
 882
 883 /* xvcpsgndp instruction, built in opcode format.
 884  * This can be changed to use mnemonic after a toolchain update.
 885  */
 886 #define XVCPSGNDP(xt, xa, xb) \
 887         __asm __volatile(".long (" \
 888                 MSKNSHL(60, 0x3f, 26) " | " \
 889                 MSKNSHL(xt, 0x1f, 21) " | " \
 890                 MSKNSHL(xa, 0x1f, 16) " | " \
 891                 MSKNSHL(xb, 0x1f, 11) " | " \
 892                 MSKNSHL(240, 0xff, 3) " | " \
 893                 MSKNSHR(xa,  0x20, 3) " | " \
 894                 MSKNSHR(xa,  0x20, 4) " | " \
 895                 MSKNSHR(xa,  0x20, 5) ")")
 896
 897 /* Macros to normalize 1 or 10 VSX registers */
 898 #define NORM(x) XVCPSGNDP(x, x, x)
 899 #define NORM10(x) \
 900         NORM(x ## 0); NORM(x ## 1); NORM(x ## 2); NORM(x ## 3); NORM(x ## 4); \
 901         NORM(x ## 5); NORM(x ## 6); NORM(x ## 7); NORM(x ## 8); NORM(x ## 9)
 902
 903 static void
 904 normalize_inputs(void)
 905 {
 906         unsigned long msr;
 907
 908         /* enable VSX */
 909         msr = mfmsr();
 910         mtmsr(msr | PSL_VSX);
 911
 912         NORM(0);   NORM(1);   NORM(2);   NORM(3);   NORM(4);
 913         NORM(5);   NORM(6);   NORM(7);   NORM(8);   NORM(9);
 914         NORM10(1); NORM10(2); NORM10(3); NORM10(4); NORM10(5);
 915         NORM(60);  NORM(61);  NORM(62);  NORM(63);
 916
 917         /* restore MSR */
 918         mtmsr(msr);
 919 }
 920 #endif
 921
 922 #ifdef KDB
 923 int
 924 db_trap_glue(struct trapframe *frame)
 925 {
 926
 927         if (!(frame->srr1 & PSL_PR)
 928             && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
 929                 || frame_is_trap_inst(frame)
 930                 || frame->exc == EXC_BPT
 931                 || frame->exc == EXC_DEBUG
 932                 || frame->exc == EXC_DSI)) {
 933                 int type = frame->exc;
 934
 935                 /* Ignore DTrace traps. */
 936                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
 937                         return (0);
 938                 if (frame_is_trap_inst(frame)) {
 939                         type = T_BREAKPOINT;
 940                 }
 941                 return (kdb_trap(type, 0, frame));
 942         }
 943
 944         return (0);
 945 }
 946 #endif