sys/powerpc/powerpc/trap.c

   1 /*-
   2  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   3  * Copyright (C) 1995, 1996 TooLs GmbH.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. All advertising materials mentioning features or use of this software
  15  *    must display the following acknowledgement:
  16  *      This product includes software developed by TooLs GmbH.
  17  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $
  32  */
  33
  34 #include <sys/cdefs.h>
  35 __FBSDID("$FreeBSD$");
  36
  37 #include <sys/param.h>
  38 #include <sys/kdb.h>
  39 #include <sys/proc.h>
  40 #include <sys/ktr.h>
  41 #include <sys/lock.h>
  42 #include <sys/mutex.h>
  43 #include <sys/ptrace.h>
  44 #include <sys/reboot.h>
  45 #include <sys/syscall.h>
  46 #include <sys/sysent.h>
  47 #include <sys/systm.h>
  48 #include <sys/kernel.h>
  49 #include <sys/uio.h>
  50 #include <sys/signalvar.h>
  51 #include <sys/vmmeter.h>
  52
  53 #include <security/audit/audit.h>
  54
  55 #include <vm/vm.h>
  56 #include <vm/pmap.h>
  57 #include <vm/vm_extern.h>
  58 #include <vm/vm_param.h>
  59 #include <vm/vm_kern.h>
  60 #include <vm/vm_map.h>
  61 #include <vm/vm_page.h>
  62
  63 #include <machine/_inttypes.h>
  64 #include <machine/altivec.h>
  65 #include <machine/cpu.h>
  66 #include <machine/db_machdep.h>
  67 #include <machine/fpu.h>
  68 #include <machine/frame.h>
  69 #include <machine/pcb.h>
  70 #include <machine/psl.h>
  71 #include <machine/slb.h>
  72 #include <machine/spr.h>
  73 #include <machine/sr.h>
  74 #include <machine/trap.h>
  75
  76 /* Below matches setjmp.S */
  77 #define FAULTBUF_LR     21
  78 #define FAULTBUF_R1     1
  79 #define FAULTBUF_R2     2
  80 #define FAULTBUF_CR     22
  81 #define FAULTBUF_R14    3
  82
  83 #define MOREARGS(sp)    ((caddr_t)((uintptr_t)(sp) + \
  84     sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
  85
  86 static void     trap_fatal(struct trapframe *frame);
  87 static void     printtrap(u_int vector, struct trapframe *frame, int isfatal,
  88                     int user);
  89 static bool     trap_pfault(struct trapframe *frame, bool user, int *signo,
  90                     int *ucode);
  91 static int      fix_unaligned(struct thread *td, struct trapframe *frame);
  92 static int      handle_onfault(struct trapframe *frame);
  93 static void     syscall(struct trapframe *frame);
  94
  95 #if defined(__powerpc64__) && defined(AIM)
  96 static void     normalize_inputs(void);
  97 #endif
  98
  99 extern vm_offset_t __startkernel;
 100
 101 #ifdef KDB
 102 int db_trap_glue(struct trapframe *);           /* Called from trap_subr.S */
 103 #endif
 104
 105 struct powerpc_exception {
 106         u_int   vector;
 107         char    *name;
 108 };
 109
 110 #ifdef KDTRACE_HOOKS
 111 #include <sys/dtrace_bsd.h>
 112
 113 int (*dtrace_invop_jump_addr)(struct trapframe *);
 114 #endif
 115
 116 static struct powerpc_exception powerpc_exceptions[] = {
 117         { EXC_CRIT,     "critical input" },
 118         { EXC_RST,      "system reset" },
 119         { EXC_MCHK,     "machine check" },
 120         { EXC_DSI,      "data storage interrupt" },
 121         { EXC_DSE,      "data segment exception" },
 122         { EXC_ISI,      "instruction storage interrupt" },
 123         { EXC_ISE,      "instruction segment exception" },
 124         { EXC_EXI,      "external interrupt" },
 125         { EXC_ALI,      "alignment" },
 126         { EXC_PGM,      "program" },
 127         { EXC_HEA,      "hypervisor emulation assistance" },
 128         { EXC_FPU,      "floating-point unavailable" },
 129         { EXC_APU,      "auxiliary proc unavailable" },
 130         { EXC_DECR,     "decrementer" },
 131         { EXC_FIT,      "fixed-interval timer" },
 132         { EXC_WDOG,     "watchdog timer" },
 133         { EXC_SC,       "system call" },
 134         { EXC_TRC,      "trace" },
 135         { EXC_FPA,      "floating-point assist" },
 136         { EXC_DEBUG,    "debug" },
 137         { EXC_PERF,     "performance monitoring" },
 138         { EXC_VEC,      "altivec unavailable" },
 139         { EXC_VSX,      "vsx unavailable" },
 140         { EXC_FAC,      "facility unavailable" },
 141         { EXC_ITMISS,   "instruction tlb miss" },
 142         { EXC_DLMISS,   "data load tlb miss" },
 143         { EXC_DSMISS,   "data store tlb miss" },
 144         { EXC_BPT,      "instruction breakpoint" },
 145         { EXC_SMI,      "system management" },
 146         { EXC_VECAST_G4,        "altivec assist" },
 147         { EXC_THRM,     "thermal management" },
 148         { EXC_RUNMODETRC,       "run mode/trace" },
 149         { EXC_SOFT_PATCH, "soft patch exception" },
 150         { EXC_LAST,     NULL }
 151 };
 152
 153 #define ESR_BITMASK                                                     \
 154     "\20"                                                               \
 155     "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP"               \
 156     "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE"             \
 157     "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23"          \
 158     "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
 159 #define MCSR_BITMASK                                                    \
 160     "\20"                                                               \
 161     "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7"      \
 162     "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF"             \
 163     "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23"            \
 164     "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
 165 #define MSSSR_BITMASK                                                   \
 166     "\20"                                                               \
 167     "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7"                  \
 168     "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG"      \
 169     "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23"        \
 170     "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
 171
 172
 173 static const char *
 174 trapname(u_int vector)
 175 {
 176         struct  powerpc_exception *pe;
 177
 178         for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) {
 179                 if (pe->vector == vector)
 180                         return (pe->name);
 181         }
 182
 183         return ("unknown");
 184 }
 185
 186 static inline bool
 187 frame_is_trap_inst(struct trapframe *frame)
 188 {
 189 #ifdef AIM
 190         return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
 191 #else
 192         return ((frame->cpu.booke.esr & ESR_PTR) != 0);
 193 #endif
 194 }
 195
 196 void
 197 trap(struct trapframe *frame)
 198 {
 199         struct thread   *td;
 200         struct proc     *p;
 201 #ifdef KDTRACE_HOOKS
 202         uint32_t inst;
 203 #endif
 204         int             sig, type, user;
 205         u_int           ucode;
 206         ksiginfo_t      ksi;
 207         register_t      fscr;
 208
 209         VM_CNT_INC(v_trap);
 210
 211 #ifdef KDB
 212         if (kdb_active) {
 213                 kdb_reenter();
 214                 return;
 215         }
 216 #endif
 217
 218         td = curthread;
 219         p = td->td_proc;
 220
 221         type = ucode = frame->exc;
 222         sig = 0;
 223         user = frame->srr1 & PSL_PR;
 224
 225         CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name,
 226             trapname(type), user ? "user" : "kernel");
 227
 228 #ifdef KDTRACE_HOOKS
 229         /*
 230          * A trap can occur while DTrace executes a probe. Before
 231          * executing the probe, DTrace blocks re-scheduling and sets
 232          * a flag in its per-cpu flags to indicate that it doesn't
 233          * want to fault. On returning from the probe, the no-fault
 234          * flag is cleared and finally re-scheduling is enabled.
 235          *
 236          * If the DTrace kernel module has registered a trap handler,
 237          * call it and if it returns non-zero, assume that it has
 238          * handled the trap and modified the trap frame so that this
 239          * function can return normally.
 240          */
 241         if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0)
 242                 return;
 243 #endif
 244
 245         if (user) {
 246                 td->td_pticks = 0;
 247                 td->td_frame = frame;
 248                 if (td->td_cowgen != p->p_cowgen)
 249                         thread_cow_update(td);
 250
 251                 /* User Mode Traps */
 252                 switch (type) {
 253                 case EXC_RUNMODETRC:
 254                 case EXC_TRC:
 255                         frame->srr1 &= ~PSL_SE;
 256                         sig = SIGTRAP;
 257                         ucode = TRAP_TRACE;
 258                         break;
 259
 260 #if defined(__powerpc64__) && defined(AIM)
 261                 case EXC_ISE:
 262                 case EXC_DSE:
 263                         /* DSE/ISE are automatically fatal with radix pmap. */
 264                         if (radix_mmu ||
 265                             handle_user_slb_spill(&p->p_vmspace->vm_pmap,
 266                             (type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
 267                                 sig = SIGSEGV;
 268                                 ucode = SEGV_MAPERR;
 269                         }
 270                         break;
 271 #endif
 272                 case EXC_DSI:
 273                 case EXC_ISI:
 274                         if (trap_pfault(frame, true, &sig, &ucode))
 275                                 sig = 0;
 276                         break;
 277
 278                 case EXC_SC:
 279                         syscall(frame);
 280                         break;
 281
 282                 case EXC_FPU:
 283                         KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU,
 284                             ("FPU already enabled for thread"));
 285                         enable_fpu(td);
 286                         break;
 287
 288                 case EXC_VEC:
 289                         KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC,
 290                             ("Altivec already enabled for thread"));
 291                         enable_vec(td);
 292                         break;
 293
 294                 case EXC_VSX:
 295                         KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX,
 296                             ("VSX already enabled for thread"));
 297                         if (!(td->td_pcb->pcb_flags & PCB_VEC))
 298                                 enable_vec(td);
 299                         if (td->td_pcb->pcb_flags & PCB_FPU)
 300                                 save_fpu(td);
 301                         td->td_pcb->pcb_flags |= PCB_VSX;
 302                         enable_fpu(td);
 303                         break;
 304
 305                 case EXC_FAC:
 306                         fscr = mfspr(SPR_FSCR);
 307                         switch (fscr & FSCR_IC_MASK) {
 308                         case FSCR_IC_HTM:
 309                                 CTR0(KTR_TRAP,
 310                                     "Hardware Transactional Memory subsystem disabled");
 311                                 sig = SIGILL;
 312                                 ucode = ILL_ILLOPC;
 313                                 break;
 314                         case FSCR_IC_DSCR:
 315                                 td->td_pcb->pcb_flags |= PCB_CFSCR | PCB_CDSCR;
 316                                 fscr |= FSCR_DSCR;
 317                                 mtspr(SPR_DSCR, 0);
 318                                 break;
 319                         case FSCR_IC_EBB:
 320                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 321                                 fscr |= FSCR_EBB;
 322                                 mtspr(SPR_EBBHR, 0);
 323                                 mtspr(SPR_EBBRR, 0);
 324                                 mtspr(SPR_BESCR, 0);
 325                                 break;
 326                         case FSCR_IC_TAR:
 327                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 328                                 fscr |= FSCR_TAR;
 329                                 mtspr(SPR_TAR, 0);
 330                                 break;
 331                         case FSCR_IC_LM:
 332                                 td->td_pcb->pcb_flags |= PCB_CFSCR;
 333                                 fscr |= FSCR_LM;
 334                                 mtspr(SPR_LMRR, 0);
 335                                 mtspr(SPR_LMSER, 0);
 336                                 break;
 337                         default:
 338                                 sig = SIGILL;
 339                                 ucode = ILL_ILLOPC;
 340                         }
 341                         mtspr(SPR_FSCR, fscr & ~FSCR_IC_MASK);
 342                         break;
 343                 case EXC_HEA:
 344                         sig = SIGILL;
 345                         ucode = ILL_ILLOPC;
 346                         break;
 347
 348                 case EXC_VECAST_E:
 349                 case EXC_VECAST_G4:
 350                 case EXC_VECAST_G5:
 351                         /*
 352                          * We get a VPU assist exception for IEEE mode
 353                          * vector operations on denormalized floats.
 354                          * Emulating this is a giant pain, so for now,
 355                          * just switch off IEEE mode and treat them as
 356                          * zero.
 357                          */
 358
 359                         save_vec(td);
 360                         td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ;
 361                         enable_vec(td);
 362                         break;
 363
 364                 case EXC_ALI:
 365                         if (fix_unaligned(td, frame) != 0) {
 366                                 sig = SIGBUS;
 367                                 ucode = BUS_ADRALN;
 368                         }
 369                         else
 370                                 frame->srr0 += 4;
 371                         break;
 372
 373                 case EXC_DEBUG: /* Single stepping */
 374                         mtspr(SPR_DBSR, mfspr(SPR_DBSR));
 375                         frame->srr1 &= ~PSL_DE;
 376                         frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
 377                         sig = SIGTRAP;
 378                         ucode = TRAP_TRACE;
 379                         break;
 380
 381                 case EXC_PGM:
 382                         /* Identify the trap reason */
 383                         if (frame_is_trap_inst(frame)) {
 384 #ifdef KDTRACE_HOOKS
 385                                 inst = fuword32((const void *)frame->srr0);
 386                                 if (inst == 0x0FFFDDDD &&
 387                                     dtrace_pid_probe_ptr != NULL) {
 388                                         (*dtrace_pid_probe_ptr)(frame);
 389                                         break;
 390                                 }
 391 #endif
 392                                 sig = SIGTRAP;
 393                                 ucode = TRAP_BRKPT;
 394                         } else {
 395                                 sig = ppc_instr_emulate(frame, td);
 396                                 if (sig == SIGILL) {
 397                                         if (frame->srr1 & EXC_PGM_PRIV)
 398                                                 ucode = ILL_PRVOPC;
 399                                         else if (frame->srr1 & EXC_PGM_ILLEGAL)
 400                                                 ucode = ILL_ILLOPC;
 401                                 } else if (sig == SIGFPE)
 402                                         ucode = FPE_FLTINV;     /* Punt for now, invalid operation. */
 403                         }
 404                         break;
 405
 406                 case EXC_MCHK:
 407                         sig = cpu_machine_check(td, frame, &ucode);
 408                         printtrap(frame->exc, frame, 0, (frame->srr1 & PSL_PR));
 409                         break;
 410
 411 #if defined(__powerpc64__) && defined(AIM)
 412                 case EXC_SOFT_PATCH:
 413                         /*
 414                          * Point to the instruction that generated the exception to execute it again,
 415                          * and normalize the register values.
 416                          */
 417                         frame->srr0 -= 4;
 418                         normalize_inputs();
 419                         break;
 420 #endif
 421
 422                 default:
 423                         trap_fatal(frame);
 424                 }
 425         } else {
 426                 /* Kernel Mode Traps */
 427
 428                 KASSERT(cold || td->td_ucred != NULL,
 429                     ("kernel trap doesn't have ucred"));
 430                 switch (type) {
 431                 case EXC_PGM:
 432 #ifdef KDTRACE_HOOKS
 433                         if (frame_is_trap_inst(frame)) {
 434                                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
 435                                         if (dtrace_invop_jump_addr != NULL) {
 436                                                 dtrace_invop_jump_addr(frame);
 437                                                 return;
 438                                         }
 439                                 }
 440                         }
 441 #endif
 442 #ifdef KDB
 443                         if (db_trap_glue(frame))
 444                                 return;
 445 #endif
 446                         break;
 447 #if defined(__powerpc64__) && defined(AIM)
 448                 case EXC_DSE:
 449                         /* DSE on radix mmu is automatically fatal. */
 450                         if (radix_mmu)
 451                                 break;
 452                         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 &&
 453                             (frame->dar & SEGMENT_MASK) == USER_ADDR) {
 454                                 __asm __volatile ("slbmte %0, %1" ::
 455                                         "r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
 456                                         "r"(USER_SLB_SLBE));
 457                                 return;
 458                         }
 459                         break;
 460 #endif
 461                 case EXC_DSI:
 462                         if (trap_pfault(frame, false, NULL, NULL))
 463                                 return;
 464                         break;
 465                 case EXC_MCHK:
 466                         if (handle_onfault(frame))
 467                                 return;
 468                         break;
 469                 default:
 470                         break;
 471                 }
 472                 trap_fatal(frame);
 473         }
 474
 475         if (sig != 0) {
 476                 if (p->p_sysent->sv_transtrap != NULL)
 477                         sig = (p->p_sysent->sv_transtrap)(sig, type);
 478                 ksiginfo_init_trap(&ksi);
 479                 ksi.ksi_signo = sig;
 480                 ksi.ksi_code = (int) ucode; /* XXX, not POSIX */
 481                 ksi.ksi_addr = (void *)frame->srr0;
 482                 ksi.ksi_trapno = type;
 483                 trapsignal(td, &ksi);
 484         }
 485
 486         userret(td, frame);
 487 }
 488
 489 static void
 490 trap_fatal(struct trapframe *frame)
 491 {
 492 #ifdef KDB
 493         bool handled;
 494 #endif
 495
 496         printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR));
 497 #ifdef KDB
 498         if (debugger_on_trap) {
 499                 kdb_why = KDB_WHY_TRAP;
 500                 handled = kdb_trap(frame->exc, 0, frame);
 501                 kdb_why = KDB_WHY_UNSET;
 502                 if (handled)
 503                         return;
 504         }
 505 #endif
 506         panic("%s trap", trapname(frame->exc));
 507 }
 508
 509 static void
 510 cpu_printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 511 {
 512 #ifdef AIM
 513         uint16_t ver;
 514
 515         switch (vector) {
 516         case EXC_MCHK:
 517                 ver = mfpvr() >> 16;
 518                 if (MPC745X_P(ver))
 519                         printf("    msssr0         = 0x%b\n",
 520                             (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
 521         case EXC_DSE:
 522         case EXC_DSI:
 523         case EXC_DTMISS:
 524                 printf("   dsisr           = 0x%lx\n",
 525                     (u_long)frame->cpu.aim.dsisr);
 526                 break;
 527         }
 528 #elif defined(BOOKE)
 529         vm_paddr_t pa;
 530
 531         switch (vector) {
 532         case EXC_MCHK:
 533                 pa = mfspr(SPR_MCARU);
 534                 pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
 535                 printf("   mcsr            = 0x%b\n",
 536                     (int)mfspr(SPR_MCSR), MCSR_BITMASK);
 537                 printf("   mcar            = 0x%jx\n", (uintmax_t)pa);
 538         }
 539         printf("   esr             = 0x%b\n",
 540             (int)frame->cpu.booke.esr, ESR_BITMASK);
 541 #endif
 542 }
 543
 544 static void
 545 printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
 546 {
 547
 548         printf("\n");
 549         printf("%s %s trap:\n", isfatal ? "fatal" : "handled",
 550             user ? "user" : "kernel");
 551         printf("\n");
 552         printf("   exception       = 0x%x (%s)\n", vector, trapname(vector));
 553         switch (vector) {
 554         case EXC_DSE:
 555         case EXC_DSI:
 556         case EXC_DTMISS:
 557         case EXC_ALI:
 558         case EXC_MCHK:
 559                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->dar);
 560                 break;
 561         case EXC_ISE:
 562         case EXC_ISI:
 563         case EXC_ITMISS:
 564                 printf("   virtual address = 0x%" PRIxPTR "\n", frame->srr0);
 565                 break;
 566         }
 567         cpu_printtrap(vector, frame, isfatal, user);
 568         printf("   srr0            = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
 569             frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
 570         printf("   srr1            = 0x%lx\n", (u_long)frame->srr1);
 571         printf("   current msr     = 0x%" PRIxPTR "\n", mfmsr());
 572         printf("   lr              = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
 573             frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
 574         printf("   frame           = %p\n", frame);
 575         printf("   curthread       = %p\n", curthread);
 576         if (curthread != NULL)
 577                 printf("          pid = %d, comm = %s\n",
 578                     curthread->td_proc->p_pid, curthread->td_name);
 579         printf("\n");
 580 }
 581
 582 /*
 583  * Handles a fatal fault when we have onfault state to recover.  Returns
 584  * non-zero if there was onfault recovery state available.
 585  */
 586 static int
 587 handle_onfault(struct trapframe *frame)
 588 {
 589         struct          thread *td;
 590         jmp_buf         *fb;
 591
 592         td = curthread;
 593         fb = td->td_pcb->pcb_onfault;
 594         if (fb != NULL) {
 595                 frame->srr0 = (*fb)->_jb[FAULTBUF_LR];
 596                 frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1];
 597                 frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2];
 598                 frame->fixreg[3] = 1;
 599                 frame->cr = (*fb)->_jb[FAULTBUF_CR];
 600                 bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14],
 601                     18 * sizeof(register_t));
 602                 td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */
 603                 return (1);
 604         }
 605         return (0);
 606 }
 607
 608 int
 609 cpu_fetch_syscall_args(struct thread *td)
 610 {
 611         struct proc *p;
 612         struct trapframe *frame;
 613         struct syscall_args *sa;
 614         caddr_t params;
 615         size_t argsz;
 616         int error, n, i;
 617
 618         p = td->td_proc;
 619         frame = td->td_frame;
 620         sa = &td->td_sa;
 621
 622         sa->code = frame->fixreg[0];
 623         params = (caddr_t)(frame->fixreg + FIRSTARG);
 624         n = NARGREG;
 625
 626         if (sa->code == SYS_syscall) {
 627                 /*
 628                  * code is first argument,
 629                  * followed by actual args.
 630                  */
 631                 sa->code = *(register_t *) params;
 632                 params += sizeof(register_t);
 633                 n -= 1;
 634         } else if (sa->code == SYS___syscall) {
 635                 /*
 636                  * Like syscall, but code is a quad,
 637                  * so as to maintain quad alignment
 638                  * for the rest of the args.
 639                  */
 640                 if (SV_PROC_FLAG(p, SV_ILP32)) {
 641                         params += sizeof(register_t);
 642                         sa->code = *(register_t *) params;
 643                         params += sizeof(register_t);
 644                         n -= 2;
 645                 } else {
 646                         sa->code = *(register_t *) params;
 647                         params += sizeof(register_t);
 648                         n -= 1;
 649                 }
 650         }
 651
 652         if (sa->code >= p->p_sysent->sv_size)
 653                 sa->callp = &p->p_sysent->sv_table[0];
 654         else
 655                 sa->callp = &p->p_sysent->sv_table[sa->code];
 656
 657         sa->narg = sa->callp->sy_narg;
 658
 659         if (SV_PROC_FLAG(p, SV_ILP32)) {
 660                 argsz = sizeof(uint32_t);
 661
 662                 for (i = 0; i < n; i++)
 663                         sa->args[i] = ((u_register_t *)(params))[i] &
 664                             0xffffffff;
 665         } else {
 666                 argsz = sizeof(uint64_t);
 667
 668                 for (i = 0; i < n; i++)
 669                         sa->args[i] = ((u_register_t *)(params))[i];
 670         }
 671
 672         if (sa->narg > n)
 673                 error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n,
 674                                (sa->narg - n) * argsz);
 675         else
 676                 error = 0;
 677
 678 #ifdef __powerpc64__
 679         if (SV_PROC_FLAG(p, SV_ILP32) && sa->narg > n) {
 680                 /* Expand the size of arguments copied from the stack */
 681
 682                 for (i = sa->narg; i >= n; i--)
 683                         sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n];
 684         }
 685 #endif
 686
 687         if (error == 0) {
 688                 td->td_retval[0] = 0;
 689                 td->td_retval[1] = frame->fixreg[FIRSTARG + 1];
 690         }
 691         return (error);
 692 }
 693
 694 #include "../../kern/subr_syscall.c"
 695
 696 void
 697 syscall(struct trapframe *frame)
 698 {
 699         struct thread *td;
 700
 701         td = curthread;
 702         td->td_frame = frame;
 703
 704 #if defined(__powerpc64__) && defined(AIM)
 705         /*
 706          * Speculatively restore last user SLB segment, which we know is
 707          * invalid already, since we are likely to do copyin()/copyout().
 708          */
 709         if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0)
 710                 __asm __volatile ("slbmte %0, %1; isync" ::
 711                     "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
 712 #endif
 713
 714         syscallenter(td);
 715         syscallret(td);
 716 }
 717
 718 static bool
 719 trap_pfault(struct trapframe *frame, bool user, int *signo, int *ucode)
 720 {
 721         vm_offset_t     eva;
 722         struct          thread *td;
 723         struct          proc *p;
 724         vm_map_t        map;
 725         vm_prot_t       ftype;
 726         int             rv, is_user;
 727
 728         td = curthread;
 729         p = td->td_proc;
 730         if (frame->exc == EXC_ISI) {
 731                 eva = frame->srr0;
 732                 ftype = VM_PROT_EXECUTE;
 733                 if (frame->srr1 & SRR1_ISI_PFAULT)
 734                         ftype |= VM_PROT_READ;
 735         } else {
 736                 eva = frame->dar;
 737 #ifdef BOOKE
 738                 if (frame->cpu.booke.esr & ESR_ST)
 739 #else
 740                 if (frame->cpu.aim.dsisr & DSISR_STORE)
 741 #endif
 742                         ftype = VM_PROT_WRITE;
 743                 else
 744                         ftype = VM_PROT_READ;
 745         }
 746 #if defined(__powerpc64__) && defined(AIM)
 747         if (radix_mmu && pmap_nofault(&p->p_vmspace->vm_pmap, eva, ftype) == 0)
 748                 return (true);
 749 #endif
 750
 751         if (__predict_false((td->td_pflags & TDP_NOFAULTING) == 0)) {
 752                 /*
 753                  * If we get a page fault while in a critical section, then
 754                  * it is most likely a fatal kernel page fault.  The kernel
 755                  * is already going to panic trying to get a sleep lock to
 756                  * do the VM lookup, so just consider it a fatal trap so the
 757                  * kernel can print out a useful trap message and even get
 758                  * to the debugger.
 759                  *
 760                  * If we get a page fault while holding a non-sleepable
 761                  * lock, then it is most likely a fatal kernel page fault.
 762                  * If WITNESS is enabled, then it's going to whine about
 763                  * bogus LORs with various VM locks, so just skip to the
 764                  * fatal trap handling directly.
 765                  */
 766                 if (td->td_critnest != 0 ||
 767                         WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL,
 768                                 "Kernel page fault") != 0) {
 769                         trap_fatal(frame);
 770                         return (false);
 771                 }
 772         }
 773         if (user) {
 774                 KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace  NULL"));
 775                 map = &p->p_vmspace->vm_map;
 776         } else {
 777                 rv = pmap_decode_kernel_ptr(eva, &is_user, &eva);
 778                 if (rv != 0)
 779                         return (false);
 780
 781                 if (is_user)
 782                         map = &p->p_vmspace->vm_map;
 783                 else
 784                         map = kernel_map;
 785         }
 786
 787         /* Fault in the page. */
 788         rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode);
 789         /*
 790          * XXXDTRACE: add dtrace_doubletrap_func here?
 791          */
 792
 793         if (rv == KERN_SUCCESS)
 794                 return (true);
 795
 796         if (!user && handle_onfault(frame))
 797                 return (true);
 798
 799         return (false);
 800 }
 801
 802 /*
 803  * For now, this only deals with the particular unaligned access case
 804  * that gcc tends to generate.  Eventually it should handle all of the
 805  * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
 806  */
 807
 808 static int
 809 fix_unaligned(struct thread *td, struct trapframe *frame)
 810 {
 811         struct thread   *fputhread;
 812 #ifdef BOOKE
 813         uint32_t        inst;
 814 #endif
 815         int             indicator, reg;
 816         double          *fpr;
 817
 818 #ifdef __SPE__
 819         indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
 820         if (indicator & ESR_SPE) {
 821                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 822                         return (-1);
 823                 reg = EXC_ALI_INST_RST(inst);
 824                 fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
 825                 fputhread = PCPU_GET(vecthread);
 826
 827                 /* Juggle the SPE to ensure that we've initialized
 828                  * the registers, and that their current state is in
 829                  * the PCB.
 830                  */
 831                 if (fputhread != td) {
 832                         if (fputhread)
 833                                 save_vec(fputhread);
 834                         enable_vec(td);
 835                 }
 836                 save_vec(td);
 837
 838                 if (!(indicator & ESR_ST)) {
 839                         if (copyin((void *)frame->dar, fpr,
 840                             sizeof(double)) != 0)
 841                                 return (-1);
 842                         frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
 843                         enable_vec(td);
 844                 } else {
 845                         td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
 846                         if (copyout(fpr, (void *)frame->dar,
 847                             sizeof(double)) != 0)
 848                                 return (-1);
 849                 }
 850                 return (0);
 851         }
 852 #else
 853 #ifdef BOOKE
 854         indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
 855 #else
 856         indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
 857 #endif
 858
 859         switch (indicator) {
 860         case EXC_ALI_LFD:
 861         case EXC_ALI_STFD:
 862 #ifdef BOOKE
 863                 if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 864                         return (-1);
 865                 reg = EXC_ALI_INST_RST(inst);
 866 #else
 867                 reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
 868 #endif
 869                 fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
 870                 fputhread = PCPU_GET(fputhread);
 871
 872                 /* Juggle the FPU to ensure that we've initialized
 873                  * the FPRs, and that their current state is in
 874                  * the PCB.
 875                  */
 876                 if (fputhread != td) {
 877                         if (fputhread)
 878                                 save_fpu(fputhread);
 879                         enable_fpu(td);
 880                 }
 881                 save_fpu(td);
 882
 883                 if (indicator == EXC_ALI_LFD) {
 884                         if (copyin((void *)frame->dar, fpr,
 885                             sizeof(double)) != 0)
 886                                 return (-1);
 887                         enable_fpu(td);
 888                 } else {
 889                         if (copyout(fpr, (void *)frame->dar,
 890                             sizeof(double)) != 0)
 891                                 return (-1);
 892                 }
 893                 return (0);
 894                 break;
 895         }
 896 #endif
 897
 898         return (-1);
 899 }
 900
 901 #if defined(__powerpc64__) && defined(AIM)
 902 #define MSKNSHL(x, m, n) "(((" #x ") & " #m ") << " #n ")"
 903 #define MSKNSHR(x, m, n) "(((" #x ") & " #m ") >> " #n ")"
 904
 905 /* xvcpsgndp instruction, built in opcode format.
 906  * This can be changed to use mnemonic after a toolchain update.
 907  */
 908 #define XVCPSGNDP(xt, xa, xb) \
 909         __asm __volatile(".long (" \
 910                 MSKNSHL(60, 0x3f, 26) " | " \
 911                 MSKNSHL(xt, 0x1f, 21) " | " \
 912                 MSKNSHL(xa, 0x1f, 16) " | " \
 913                 MSKNSHL(xb, 0x1f, 11) " | " \
 914                 MSKNSHL(240, 0xff, 3) " | " \
 915                 MSKNSHR(xa,  0x20, 3) " | " \
 916                 MSKNSHR(xa,  0x20, 4) " | " \
 917                 MSKNSHR(xa,  0x20, 5) ")")
 918
 919 /* Macros to normalize 1 or 10 VSX registers */
 920 #define NORM(x) XVCPSGNDP(x, x, x)
 921 #define NORM10(x) \
 922         NORM(x ## 0); NORM(x ## 1); NORM(x ## 2); NORM(x ## 3); NORM(x ## 4); \
 923         NORM(x ## 5); NORM(x ## 6); NORM(x ## 7); NORM(x ## 8); NORM(x ## 9)
 924
 925 static void
 926 normalize_inputs(void)
 927 {
 928         unsigned long msr;
 929
 930         /* enable VSX */
 931         msr = mfmsr();
 932         mtmsr(msr | PSL_VSX);
 933
 934         NORM(0);   NORM(1);   NORM(2);   NORM(3);   NORM(4);
 935         NORM(5);   NORM(6);   NORM(7);   NORM(8);   NORM(9);
 936         NORM10(1); NORM10(2); NORM10(3); NORM10(4); NORM10(5);
 937         NORM(60);  NORM(61);  NORM(62);  NORM(63);
 938
 939         /* restore MSR */
 940         mtmsr(msr);
 941 }
 942 #endif
 943
 944 #ifdef KDB
 945 int
 946 db_trap_glue(struct trapframe *frame)
 947 {
 948
 949         if (!(frame->srr1 & PSL_PR)
 950             && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
 951                 || frame_is_trap_inst(frame)
 952                 || frame->exc == EXC_BPT
 953                 || frame->exc == EXC_DEBUG
 954                 || frame->exc == EXC_DSI)) {
 955                 int type = frame->exc;
 956
 957                 /* Ignore DTrace traps. */
 958                 if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
 959                         return (0);
 960                 if (frame_is_trap_inst(frame)) {
 961                         type = T_BREAKPOINT;
 962                 }
 963                 return (kdb_trap(type, 0, frame));
 964         }
 965
 966         return (0);
 967 }
 968 #endif