2 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
5 * Portions of this software were developed by SRI International and the
6 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
7 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
9 * Portions of this software were developed by the University of Cambridge
10 * Computer Laboratory as part of the CTSRD Project, with support from the
11 * UK Higher Education Innovation Fund (HEIF).
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 #include <sys/syscall.h>
40 #include <machine/asm.h>
41 #include <machine/param.h>
42 #include <machine/trap.h>
43 #include <machine/riscvreg.h>
44 #include <machine/pte.h>
47 .set kernbase, KERNBASE
61 /* Pick a hart to run the boot process. */
64 amoadd.w t0, t1, 0(t0)
67 * We must jump to mpentry in the non-BSP case because the offset is
68 * too large to fit in a 12-bit branch immediate.
77 /* Get the kernel's load address */
80 /* Add L1 entry for kernel */
82 lla s2, pagetable_l2 /* Link to next level PN */
83 srli s2, s2, PAGE_SHIFT
86 srli a5, a5, L1_SHIFT /* >> L1_SHIFT */
87 andi a5, a5, 0x1ff /* & 0x1ff */
89 slli t5, s2, PTE_PPN0_S /* (s2 << PTE_PPN0_S) */
92 /* Store L1 PTE entry to position */
98 /* Level 2 superpages (512 x 2MiB) */
100 srli t4, s9, 21 /* Div physmem base by 2 MiB */
101 li t2, 512 /* Build 512 entries */
105 li t0, (PTE_KERN | PTE_X)
106 slli t2, t4, PTE_PPN1_S /* << PTE_PPN1_S */
108 sd t5, (s1) /* Store PTE entry to position */
109 addi s1, s1, PTE_SIZE
114 /* Create an L1 page for early devmap */
116 lla s2, pagetable_l2_devmap /* Link to next level PN */
117 srli s2, s2, PAGE_SHIFT
119 li a5, (VM_MAX_KERNEL_ADDRESS - L2_SIZE)
120 srli a5, a5, L1_SHIFT /* >> L1_SHIFT */
121 andi a5, a5, 0x1ff /* & 0x1ff */
123 slli t5, s2, PTE_PPN0_S /* (s2 << PTE_PPN0_S) */
126 /* Store single level1 PTE entry to position */
132 /* Create an L2 page superpage for DTB */
133 lla s1, pagetable_l2_devmap
135 srli s2, s2, PAGE_SHIFT
138 slli t2, s2, PTE_PPN0_S /* << PTE_PPN0_S */
141 /* Store PTE entry to position */
148 /* Page tables END */
150 /* Setup supervisor trap vector */
157 /* Set page tables base register */
159 srli s2, s2, PAGE_SHIFT
160 li t0, SATP_MODE_SV39
168 /* Setup supervisor trap vector */
169 la t0, cpu_exception_handler
172 /* Ensure sscratch is zero */
176 /* Set the global pointer */
179 la gp, __global_pointer$
182 /* Initialize stack pointer */
185 addi sp, sp, -PCB_SIZE
188 la s0, _C_LABEL(__bss_start)
189 la s1, _C_LABEL(_end)
196 /* Store boot hart id. */
201 /* Fill riscv_bootparams */
205 sd t0, 0(sp) /* kern_l1pt */
206 sd s9, 8(sp) /* kern_phys */
209 sd t0, 16(sp) /* kern_stack */
211 li t0, (VM_MAX_KERNEL_ADDRESS - 2 * L2_SIZE)
212 sd t0, 24(sp) /* dtbp_virt */
213 sd a1, 32(sp) /* dtbp_phys */
216 call _C_LABEL(initriscv) /* Off we go */
217 call _C_LABEL(mi_startup)
220 * Get the physical address the kernel is loaded to. Returned in s9.
223 lla t0, virt_map /* physical address of virt_map */
224 ld t1, 0(t0) /* virtual address of virt_map */
225 sub t1, t1, t0 /* calculate phys->virt delta */
227 sub s9, t2, t1 /* s9 = physmem base */
232 .space (PAGE_SIZE * KSTACK_PAGES)
243 /* sigreturn failed, exit */
249 /* This may be copied to the stack, keep it 16-byte aligned */
257 .quad esigcode - sigcode
275 .quad pagetable_l2 /* XXX: Keep page tables VA */
285 * mpentry(unsigned long)
287 * Called by a core when it is being brought online.
291 * Calculate the offset to __riscv_boot_ap
292 * for the current core, cpuid is in a0.
296 /* Get the pointer */
297 lla t0, __riscv_boot_ap
301 /* Wait the kernel to be ready */
305 /* Setup stack pointer */
309 /* Get the kernel's load address */
312 /* Setup supervisor trap vector */
319 /* Set page tables base register */
321 srli s2, s2, PAGE_SHIFT
322 li t0, SATP_MODE_SV39
329 /* Setup supervisor trap vector */
330 la t0, cpu_exception_handler
333 /* Ensure sscratch is zero */
337 /* Set the global pointer */
340 la gp, __global_pointer$