2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/proc.h>
133 #include <sys/rwlock.h>
135 #include <sys/vmem.h>
136 #include <sys/vmmeter.h>
137 #include <sys/sched.h>
138 #include <sys/sysctl.h>
142 #include <vm/vm_param.h>
143 #include <vm/vm_kern.h>
144 #include <vm/vm_page.h>
145 #include <vm/vm_map.h>
146 #include <vm/vm_object.h>
147 #include <vm/vm_extern.h>
148 #include <vm/vm_pageout.h>
149 #include <vm/vm_pager.h>
150 #include <vm/vm_phys.h>
151 #include <vm/vm_radix.h>
152 #include <vm/vm_reserv.h>
155 #include <machine/machdep.h>
156 #include <machine/md_var.h>
157 #include <machine/pcb.h>
158 #include <machine/sbi.h>
160 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
161 #define NUL2E (Ln_ENTRIES * NUL1E)
163 #if !defined(DIAGNOSTIC)
164 #ifdef __GNUC_GNU_INLINE__
165 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
167 #define PMAP_INLINE extern inline
174 #define PV_STAT(x) do { x ; } while (0)
176 #define PV_STAT(x) do { } while (0)
179 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
180 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
182 #define NPV_LIST_LOCKS MAXCPU
184 #define PHYS_TO_PV_LIST_LOCK(pa) \
185 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
187 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
188 struct rwlock **_lockp = (lockp); \
189 struct rwlock *_new_lock; \
191 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
192 if (_new_lock != *_lockp) { \
193 if (*_lockp != NULL) \
194 rw_wunlock(*_lockp); \
195 *_lockp = _new_lock; \
200 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
201 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
203 #define RELEASE_PV_LIST_LOCK(lockp) do { \
204 struct rwlock **_lockp = (lockp); \
206 if (*_lockp != NULL) { \
207 rw_wunlock(*_lockp); \
212 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
213 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
215 /* The list of all the user pmaps */
216 LIST_HEAD(pmaplist, pmap);
217 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
219 struct pmap kernel_pmap_store;
221 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
222 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
223 vm_offset_t kernel_vm_end = 0;
225 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
226 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
227 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
229 /* This code assumes all L1 DMAP entries will be used */
230 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
231 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
233 static struct rwlock_padalign pvh_global_lock;
234 static struct mtx_padalign allpmaps_lock;
236 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
237 "VM/pmap parameters");
239 static int superpages_enabled = 1;
240 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
241 CTLFLAG_RDTUN, &superpages_enabled, 0,
242 "Enable support for transparent superpages");
244 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
245 "2MB page mapping counters");
247 static u_long pmap_l2_demotions;
248 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
249 &pmap_l2_demotions, 0,
250 "2MB page demotions");
252 static u_long pmap_l2_mappings;
253 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
254 &pmap_l2_mappings, 0,
255 "2MB page mappings");
257 static u_long pmap_l2_p_failures;
258 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
259 &pmap_l2_p_failures, 0,
260 "2MB page promotion failures");
262 static u_long pmap_l2_promotions;
263 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
264 &pmap_l2_promotions, 0,
265 "2MB page promotions");
268 * Data for the pv entry allocation mechanism
270 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
271 static struct mtx pv_chunks_mutex;
272 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
273 static struct md_page *pv_table;
274 static struct md_page pv_dummy;
277 * Internal flags for pmap_enter()'s helper functions.
279 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
280 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
282 static void free_pv_chunk(struct pv_chunk *pc);
283 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
284 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
285 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
286 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
287 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
289 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
290 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
291 vm_offset_t va, struct rwlock **lockp);
292 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
293 u_int flags, vm_page_t m, struct rwlock **lockp);
294 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
295 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
296 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
297 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
298 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
299 vm_page_t m, struct rwlock **lockp);
301 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
302 struct rwlock **lockp);
304 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
305 struct spglist *free);
306 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
308 #define pmap_clear(pte) pmap_store(pte, 0)
309 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
310 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
311 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
312 #define pmap_load(pte) atomic_load_64(pte)
313 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
314 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
316 /********************/
317 /* Inline functions */
318 /********************/
321 pagecopy(void *s, void *d)
324 memcpy(d, s, PAGE_SIZE);
334 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
335 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
336 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
338 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
340 static __inline pd_entry_t *
341 pmap_l1(pmap_t pmap, vm_offset_t va)
344 return (&pmap->pm_l1[pmap_l1_index(va)]);
347 static __inline pd_entry_t *
348 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
353 phys = PTE_TO_PHYS(pmap_load(l1));
354 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
356 return (&l2[pmap_l2_index(va)]);
359 static __inline pd_entry_t *
360 pmap_l2(pmap_t pmap, vm_offset_t va)
364 l1 = pmap_l1(pmap, va);
365 if ((pmap_load(l1) & PTE_V) == 0)
367 if ((pmap_load(l1) & PTE_RX) != 0)
370 return (pmap_l1_to_l2(l1, va));
373 static __inline pt_entry_t *
374 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
379 phys = PTE_TO_PHYS(pmap_load(l2));
380 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
382 return (&l3[pmap_l3_index(va)]);
385 static __inline pt_entry_t *
386 pmap_l3(pmap_t pmap, vm_offset_t va)
390 l2 = pmap_l2(pmap, va);
393 if ((pmap_load(l2) & PTE_V) == 0)
395 if ((pmap_load(l2) & PTE_RX) != 0)
398 return (pmap_l2_to_l3(l2, va));
402 pmap_resident_count_inc(pmap_t pmap, int count)
405 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
406 pmap->pm_stats.resident_count += count;
410 pmap_resident_count_dec(pmap_t pmap, int count)
413 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
414 KASSERT(pmap->pm_stats.resident_count >= count,
415 ("pmap %p resident count underflow %ld %d", pmap,
416 pmap->pm_stats.resident_count, count));
417 pmap->pm_stats.resident_count -= count;
421 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
424 struct pmap *user_pmap;
427 /* Distribute new kernel L1 entry to all the user pmaps */
428 if (pmap != kernel_pmap)
431 mtx_lock(&allpmaps_lock);
432 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
433 l1 = &user_pmap->pm_l1[l1index];
434 pmap_store(l1, entry);
436 mtx_unlock(&allpmaps_lock);
440 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
446 l1 = (pd_entry_t *)l1pt;
447 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
449 /* Check locore has used a table L1 map */
450 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
451 ("Invalid bootstrap L1 table"));
453 /* Find the address of the L2 table */
454 l2 = (pt_entry_t *)init_pt_va;
455 *l2_slot = pmap_l2_index(va);
461 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
463 u_int l1_slot, l2_slot;
467 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
469 /* Check locore has used L2 superpages */
470 KASSERT((l2[l2_slot] & PTE_RX) != 0,
471 ("Invalid bootstrap L2 table"));
473 /* L2 is superpages */
474 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
475 ret += (va & L2_OFFSET);
481 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
490 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
491 va = DMAP_MIN_ADDRESS;
492 l1 = (pd_entry_t *)kern_l1;
493 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
495 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
496 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
497 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
500 pn = (pa / PAGE_SIZE);
502 entry |= (pn << PTE_PPN0_S);
503 pmap_store(&l1[l1_slot], entry);
506 /* Set the upper limit of the DMAP region */
514 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
523 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
525 l2 = pmap_l2(kernel_pmap, va);
526 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
527 l2_slot = pmap_l2_index(va);
530 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
531 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
533 pa = pmap_early_vtophys(l1pt, l3pt);
534 pn = (pa / PAGE_SIZE);
536 entry |= (pn << PTE_PPN0_S);
537 pmap_store(&l2[l2_slot], entry);
542 /* Clean the L2 page table */
543 memset((void *)l3_start, 0, l3pt - l3_start);
549 * Bootstrap the system enough to run with virtual memory.
552 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
554 u_int l1_slot, l2_slot, avail_slot, map_slot;
555 vm_offset_t freemempos;
556 vm_offset_t dpcpu, msgbufpv;
557 vm_paddr_t end, max_pa, min_pa, pa, start;
560 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
561 printf("%lx\n", l1pt);
562 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
564 /* Set this early so we can use the pagetable walking functions */
565 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
566 PMAP_LOCK_INIT(kernel_pmap);
568 rw_init(&pvh_global_lock, "pmap pv global");
570 CPU_FILL(&kernel_pmap->pm_active);
572 /* Assume the address we were loaded to is a valid physical address. */
573 min_pa = max_pa = kernstart;
576 * Find the minimum physical address. physmap is sorted,
577 * but may contain empty ranges.
579 for (i = 0; i < physmap_idx * 2; i += 2) {
580 if (physmap[i] == physmap[i + 1])
582 if (physmap[i] <= min_pa)
584 if (physmap[i + 1] > max_pa)
585 max_pa = physmap[i + 1];
587 printf("physmap_idx %lx\n", physmap_idx);
588 printf("min_pa %lx\n", min_pa);
589 printf("max_pa %lx\n", max_pa);
591 /* Create a direct map region early so we can use it for pa -> va */
592 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
595 * Read the page table to find out what is already mapped.
596 * This assumes we have mapped a block of memory from KERNBASE
597 * using a single L1 entry.
599 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
601 /* Sanity check the index, KERNBASE should be the first VA */
602 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
604 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
606 /* Create the l3 tables for the early devmap */
607 freemempos = pmap_bootstrap_l3(l1pt,
608 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
612 #define alloc_pages(var, np) \
613 (var) = freemempos; \
614 freemempos += (np * PAGE_SIZE); \
615 memset((char *)(var), 0, ((np) * PAGE_SIZE));
617 /* Allocate dynamic per-cpu area. */
618 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
619 dpcpu_init((void *)dpcpu, 0);
621 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
622 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
623 msgbufp = (void *)msgbufpv;
625 virtual_avail = roundup2(freemempos, L2_SIZE);
626 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
627 kernel_vm_end = virtual_avail;
629 pa = pmap_early_vtophys(l1pt, freemempos);
631 /* Initialize phys_avail and dump_avail. */
632 for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
634 start = physmap[map_slot];
635 end = physmap[map_slot + 1];
639 dump_avail[map_slot] = start;
640 dump_avail[map_slot + 1] = end;
642 if (start >= kernstart && end <= pa)
645 if (start < kernstart && end > kernstart)
647 else if (start < pa && end > pa)
649 phys_avail[avail_slot] = start;
650 phys_avail[avail_slot + 1] = end;
651 physmem += (end - start) >> PAGE_SHIFT;
654 if (end != physmap[map_slot + 1] && end > pa) {
655 phys_avail[avail_slot] = pa;
656 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
657 physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
661 phys_avail[avail_slot] = 0;
662 phys_avail[avail_slot + 1] = 0;
665 * Maxmem isn't the "maximum memory", it's one larger than the
666 * highest page of the physical address space. It should be
667 * called something like "Maxphyspage".
669 Maxmem = atop(phys_avail[avail_slot - 1]);
673 * Initialize a vm_page's machine-dependent fields.
676 pmap_page_init(vm_page_t m)
679 TAILQ_INIT(&m->md.pv_list);
680 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
684 * Initialize the pmap module.
685 * Called by vm_init, to initialize any structures that the pmap
686 * system needs to map virtual memory.
695 * Initialize the pv chunk and pmap list mutexes.
697 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
698 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
701 * Initialize the pool of pv list locks.
703 for (i = 0; i < NPV_LIST_LOCKS; i++)
704 rw_init(&pv_list_locks[i], "pmap pv list");
707 * Calculate the size of the pv head table for superpages.
709 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
712 * Allocate memory for the pv head table for superpages.
714 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
716 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
717 for (i = 0; i < pv_npg; i++)
718 TAILQ_INIT(&pv_table[i].pv_list);
719 TAILQ_INIT(&pv_dummy.pv_list);
721 if (superpages_enabled)
722 pagesizes[1] = L2_SIZE;
727 * For SMP, these functions have to use IPIs for coherence.
729 * In general, the calling thread uses a plain fence to order the
730 * writes to the page tables before invoking an SBI callback to invoke
731 * sfence_vma() on remote CPUs.
734 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
739 mask = pmap->pm_active;
740 CPU_CLR(PCPU_GET(cpuid), &mask);
742 if (!CPU_EMPTY(&mask) && smp_started)
743 sbi_remote_sfence_vma(mask.__bits, va, 1);
749 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
754 mask = pmap->pm_active;
755 CPU_CLR(PCPU_GET(cpuid), &mask);
757 if (!CPU_EMPTY(&mask) && smp_started)
758 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
761 * Might consider a loop of sfence_vma_page() for a small
762 * number of pages in the future.
769 pmap_invalidate_all(pmap_t pmap)
774 mask = pmap->pm_active;
775 CPU_CLR(PCPU_GET(cpuid), &mask);
778 * XXX: The SBI doc doesn't detail how to specify x0 as the
779 * address to perform a global fence. BBL currently treats
780 * all sfence_vma requests as global however.
783 if (!CPU_EMPTY(&mask) && smp_started)
784 sbi_remote_sfence_vma(mask.__bits, 0, 0);
790 * Normal, non-SMP, invalidation functions.
791 * We inline these within pmap.c for speed.
794 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
801 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
805 * Might consider a loop of sfence_vma_page() for a small
806 * number of pages in the future.
812 pmap_invalidate_all(pmap_t pmap)
820 * Routine: pmap_extract
822 * Extract the physical page address associated
823 * with the given map/virtual_address pair.
826 pmap_extract(pmap_t pmap, vm_offset_t va)
835 * Start with the l2 tabel. We are unable to allocate
836 * pages in the l1 table.
838 l2p = pmap_l2(pmap, va);
841 if ((l2 & PTE_RX) == 0) {
842 l3p = pmap_l2_to_l3(l2p, va);
845 pa = PTE_TO_PHYS(l3);
846 pa |= (va & L3_OFFSET);
849 /* L2 is superpages */
850 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
851 pa |= (va & L2_OFFSET);
859 * Routine: pmap_extract_and_hold
861 * Atomically extract and hold the physical page
862 * with the given pmap and virtual address pair
863 * if that mapping permits the given protection.
866 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
877 l3p = pmap_l3(pmap, va);
878 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
879 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
880 phys = PTE_TO_PHYS(l3);
881 if (vm_page_pa_tryrelock(pmap, phys, &pa))
883 m = PHYS_TO_VM_PAGE(phys);
893 pmap_kextract(vm_offset_t va)
899 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
900 pa = DMAP_TO_PHYS(va);
902 l2 = pmap_l2(kernel_pmap, va);
904 panic("pmap_kextract: No l2");
905 if ((pmap_load(l2) & PTE_RX) != 0) {
907 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
908 pa |= (va & L2_OFFSET);
912 l3 = pmap_l2_to_l3(l2, va);
914 panic("pmap_kextract: No l3...");
915 pa = PTE_TO_PHYS(pmap_load(l3));
916 pa |= (va & PAGE_MASK);
921 /***************************************************
922 * Low level mapping routines.....
923 ***************************************************/
926 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
933 KASSERT((pa & L3_OFFSET) == 0,
934 ("pmap_kenter_device: Invalid physical address"));
935 KASSERT((sva & L3_OFFSET) == 0,
936 ("pmap_kenter_device: Invalid virtual address"));
937 KASSERT((size & PAGE_MASK) == 0,
938 ("pmap_kenter_device: Mapping is not page-sized"));
942 l3 = pmap_l3(kernel_pmap, va);
943 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
945 pn = (pa / PAGE_SIZE);
947 entry |= (pn << PTE_PPN0_S);
948 pmap_store(l3, entry);
954 pmap_invalidate_range(kernel_pmap, sva, va);
958 * Remove a page from the kernel pagetables.
959 * Note: not SMP coherent.
962 pmap_kremove(vm_offset_t va)
966 l3 = pmap_l3(kernel_pmap, va);
967 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
974 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
979 KASSERT((sva & L3_OFFSET) == 0,
980 ("pmap_kremove_device: Invalid virtual address"));
981 KASSERT((size & PAGE_MASK) == 0,
982 ("pmap_kremove_device: Mapping is not page-sized"));
986 l3 = pmap_l3(kernel_pmap, va);
987 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
994 pmap_invalidate_range(kernel_pmap, sva, va);
998 * Used to map a range of physical addresses into kernel
999 * virtual address space.
1001 * The value passed in '*virt' is a suggested virtual address for
1002 * the mapping. Architectures which can support a direct-mapped
1003 * physical to virtual region can return the appropriate address
1004 * within that region, leaving '*virt' unchanged. Other
1005 * architectures should map the pages starting at '*virt' and
1006 * update '*virt' with the first usable address after the mapped
1010 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1013 return PHYS_TO_DMAP(start);
1018 * Add a list of wired pages to the kva
1019 * this routine is only used for temporary
1020 * kernel mappings that do not need to have
1021 * page modification or references recorded.
1022 * Note that old mappings are simply written
1023 * over. The page *must* be wired.
1024 * Note: SMP coherent. Uses a ranged shootdown IPI.
1027 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1037 for (i = 0; i < count; i++) {
1039 pa = VM_PAGE_TO_PHYS(m);
1040 pn = (pa / PAGE_SIZE);
1041 l3 = pmap_l3(kernel_pmap, va);
1044 entry |= (pn << PTE_PPN0_S);
1045 pmap_store(l3, entry);
1049 pmap_invalidate_range(kernel_pmap, sva, va);
1053 * This routine tears out page mappings from the
1054 * kernel -- it is meant only for temporary mappings.
1055 * Note: SMP coherent. Uses a ranged shootdown IPI.
1058 pmap_qremove(vm_offset_t sva, int count)
1063 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1065 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1066 l3 = pmap_l3(kernel_pmap, va);
1067 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1070 pmap_invalidate_range(kernel_pmap, sva, va);
1074 pmap_ps_enabled(pmap_t pmap __unused)
1077 return (superpages_enabled);
1080 /***************************************************
1081 * Page table page management routines.....
1082 ***************************************************/
1084 * Schedule the specified unused page table page to be freed. Specifically,
1085 * add the page to the specified list of pages that will be released to the
1086 * physical memory manager after the TLB has been updated.
1088 static __inline void
1089 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1090 boolean_t set_PG_ZERO)
1094 m->flags |= PG_ZERO;
1096 m->flags &= ~PG_ZERO;
1097 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1101 * Inserts the specified page table page into the specified pmap's collection
1102 * of idle page table pages. Each of a pmap's page table pages is responsible
1103 * for mapping a distinct range of virtual addresses. The pmap's collection is
1104 * ordered by this virtual address range.
1107 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3)
1110 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1111 return (vm_radix_insert(&pmap->pm_root, ml3));
1115 * Removes the page table page mapping the specified virtual address from the
1116 * specified pmap's collection of idle page table pages, and returns it.
1117 * Otherwise, returns NULL if there is no page table page corresponding to the
1118 * specified virtual address.
1120 static __inline vm_page_t
1121 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1124 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1125 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1129 * Decrements a page table page's wire count, which is used to record the
1130 * number of valid page table entries within the page. If the wire count
1131 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1132 * page table page was unmapped and FALSE otherwise.
1134 static inline boolean_t
1135 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1139 if (m->wire_count == 0) {
1140 _pmap_unwire_ptp(pmap, va, m, free);
1148 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1152 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1153 if (m->pindex >= NUL1E) {
1155 l1 = pmap_l1(pmap, va);
1157 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1160 l2 = pmap_l2(pmap, va);
1163 pmap_resident_count_dec(pmap, 1);
1164 if (m->pindex < NUL1E) {
1168 l1 = pmap_l1(pmap, va);
1169 phys = PTE_TO_PHYS(pmap_load(l1));
1170 pdpg = PHYS_TO_VM_PAGE(phys);
1171 pmap_unwire_ptp(pmap, va, pdpg, free);
1173 pmap_invalidate_page(pmap, va);
1178 * Put page on a list so that it is released after
1179 * *ALL* TLB shootdown is done
1181 pmap_add_delayed_free_list(m, free, TRUE);
1185 * After removing a page table entry, this routine is used to
1186 * conditionally free the page, and manage the hold/wire counts.
1189 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1190 struct spglist *free)
1194 if (va >= VM_MAXUSER_ADDRESS)
1196 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1197 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1198 return (pmap_unwire_ptp(pmap, va, mpte, free));
1202 pmap_pinit0(pmap_t pmap)
1205 PMAP_LOCK_INIT(pmap);
1206 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1207 pmap->pm_l1 = kernel_pmap->pm_l1;
1208 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1209 CPU_ZERO(&pmap->pm_active);
1210 pmap_activate_boot(pmap);
1214 pmap_pinit(pmap_t pmap)
1220 * allocate the l1 page
1222 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1223 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1226 l1phys = VM_PAGE_TO_PHYS(l1pt);
1227 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1228 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1230 if ((l1pt->flags & PG_ZERO) == 0)
1231 pagezero(pmap->pm_l1);
1233 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1235 CPU_ZERO(&pmap->pm_active);
1237 /* Install kernel pagetables */
1238 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1240 /* Add to the list of all user pmaps */
1241 mtx_lock(&allpmaps_lock);
1242 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1243 mtx_unlock(&allpmaps_lock);
1245 vm_radix_init(&pmap->pm_root);
1251 * This routine is called if the desired page table page does not exist.
1253 * If page table page allocation fails, this routine may sleep before
1254 * returning NULL. It sleeps only if a lock pointer was given.
1256 * Note: If a page allocation fails at page table level two or three,
1257 * one or two pages may be held during the wait, only to be released
1258 * afterwards. This conservative approach is easily argued to avoid
1262 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1264 vm_page_t m, /*pdppg, */pdpg;
1269 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1272 * Allocate a page table page.
1274 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1275 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1276 if (lockp != NULL) {
1277 RELEASE_PV_LIST_LOCK(lockp);
1279 rw_runlock(&pvh_global_lock);
1281 rw_rlock(&pvh_global_lock);
1286 * Indicate the need to retry. While waiting, the page table
1287 * page may have been allocated.
1292 if ((m->flags & PG_ZERO) == 0)
1296 * Map the pagetable page into the process address space, if
1297 * it isn't already there.
1300 if (ptepindex >= NUL1E) {
1302 vm_pindex_t l1index;
1304 l1index = ptepindex - NUL1E;
1305 l1 = &pmap->pm_l1[l1index];
1307 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1309 entry |= (pn << PTE_PPN0_S);
1310 pmap_store(l1, entry);
1311 pmap_distribute_l1(pmap, l1index, entry);
1313 vm_pindex_t l1index;
1314 pd_entry_t *l1, *l2;
1316 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1317 l1 = &pmap->pm_l1[l1index];
1318 if (pmap_load(l1) == 0) {
1319 /* recurse for allocating page dir */
1320 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1322 vm_page_unwire_noq(m);
1323 vm_page_free_zero(m);
1327 phys = PTE_TO_PHYS(pmap_load(l1));
1328 pdpg = PHYS_TO_VM_PAGE(phys);
1332 phys = PTE_TO_PHYS(pmap_load(l1));
1333 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1334 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1336 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1338 entry |= (pn << PTE_PPN0_S);
1339 pmap_store(l2, entry);
1342 pmap_resident_count_inc(pmap, 1);
1348 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1352 vm_pindex_t l2pindex;
1355 l1 = pmap_l1(pmap, va);
1356 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1357 /* Add a reference to the L2 page. */
1358 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1361 /* Allocate a L2 page. */
1362 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1363 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1364 if (l2pg == NULL && lockp != NULL)
1371 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1373 vm_pindex_t ptepindex;
1379 * Calculate pagetable page index
1381 ptepindex = pmap_l2_pindex(va);
1384 * Get the page directory entry
1386 l2 = pmap_l2(pmap, va);
1389 * If the page table page is mapped, we just increment the
1390 * hold count, and activate it.
1392 if (l2 != NULL && pmap_load(l2) != 0) {
1393 phys = PTE_TO_PHYS(pmap_load(l2));
1394 m = PHYS_TO_VM_PAGE(phys);
1398 * Here if the pte page isn't mapped, or if it has been
1401 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1402 if (m == NULL && lockp != NULL)
1409 /***************************************************
1410 * Pmap allocation/deallocation routines.
1411 ***************************************************/
1414 * Release any resources held by the given physical map.
1415 * Called when a pmap initialized by pmap_pinit is being released.
1416 * Should only be called if the map contains no valid mappings.
1419 pmap_release(pmap_t pmap)
1423 KASSERT(pmap->pm_stats.resident_count == 0,
1424 ("pmap_release: pmap resident count %ld != 0",
1425 pmap->pm_stats.resident_count));
1426 KASSERT(CPU_EMPTY(&pmap->pm_active),
1427 ("releasing active pmap %p", pmap));
1429 mtx_lock(&allpmaps_lock);
1430 LIST_REMOVE(pmap, pm_list);
1431 mtx_unlock(&allpmaps_lock);
1433 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1434 vm_page_unwire_noq(m);
1440 kvm_size(SYSCTL_HANDLER_ARGS)
1442 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1444 return sysctl_handle_long(oidp, &ksize, 0, req);
1446 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1447 0, 0, kvm_size, "LU", "Size of KVM");
1450 kvm_free(SYSCTL_HANDLER_ARGS)
1452 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1454 return sysctl_handle_long(oidp, &kfree, 0, req);
1456 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1457 0, 0, kvm_free, "LU", "Amount of KVM free");
1461 * grow the number of kernel page table entries, if needed
1464 pmap_growkernel(vm_offset_t addr)
1468 pd_entry_t *l1, *l2;
1472 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1474 addr = roundup2(addr, L2_SIZE);
1475 if (addr - 1 >= vm_map_max(kernel_map))
1476 addr = vm_map_max(kernel_map);
1477 while (kernel_vm_end < addr) {
1478 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1479 if (pmap_load(l1) == 0) {
1480 /* We need a new PDP entry */
1481 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1482 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1483 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1485 panic("pmap_growkernel: no memory to grow kernel");
1486 if ((nkpg->flags & PG_ZERO) == 0)
1487 pmap_zero_page(nkpg);
1488 paddr = VM_PAGE_TO_PHYS(nkpg);
1490 pn = (paddr / PAGE_SIZE);
1492 entry |= (pn << PTE_PPN0_S);
1493 pmap_store(l1, entry);
1494 pmap_distribute_l1(kernel_pmap,
1495 pmap_l1_index(kernel_vm_end), entry);
1496 continue; /* try again */
1498 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1499 if ((pmap_load(l2) & PTE_V) != 0 &&
1500 (pmap_load(l2) & PTE_RWX) == 0) {
1501 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1502 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1503 kernel_vm_end = vm_map_max(kernel_map);
1509 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1510 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1513 panic("pmap_growkernel: no memory to grow kernel");
1514 if ((nkpg->flags & PG_ZERO) == 0) {
1515 pmap_zero_page(nkpg);
1517 paddr = VM_PAGE_TO_PHYS(nkpg);
1519 pn = (paddr / PAGE_SIZE);
1521 entry |= (pn << PTE_PPN0_S);
1522 pmap_store(l2, entry);
1524 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1526 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1527 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1528 kernel_vm_end = vm_map_max(kernel_map);
1535 /***************************************************
1536 * page management routines.
1537 ***************************************************/
1539 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1540 CTASSERT(_NPCM == 3);
1541 CTASSERT(_NPCPV == 168);
1543 static __inline struct pv_chunk *
1544 pv_to_chunk(pv_entry_t pv)
1547 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1550 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1552 #define PC_FREE0 0xfffffffffffffffful
1553 #define PC_FREE1 0xfffffffffffffffful
1554 #define PC_FREE2 0x000000fffffffffful
1556 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1560 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1562 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1563 "Current number of pv entry chunks");
1564 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1565 "Current number of pv entry chunks allocated");
1566 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1567 "Current number of pv entry chunks frees");
1568 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1569 "Number of times tried to get a chunk page but failed.");
1571 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1572 static int pv_entry_spare;
1574 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1575 "Current number of pv entry frees");
1576 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1577 "Current number of pv entry allocs");
1578 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1579 "Current number of pv entries");
1580 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1581 "Current number of spare pv entries");
1586 * We are in a serious low memory condition. Resort to
1587 * drastic measures to free some pages so we can allocate
1588 * another pv entry chunk.
1590 * Returns NULL if PV entries were reclaimed from the specified pmap.
1592 * We do not, however, unmap 2mpages because subsequent accesses will
1593 * allocate per-page pv entries until repromotion occurs, thereby
1594 * exacerbating the shortage of free pv entries.
1597 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1600 panic("RISCVTODO: reclaim_pv_chunk");
1604 * free the pv_entry back to the free list
1607 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1609 struct pv_chunk *pc;
1610 int idx, field, bit;
1612 rw_assert(&pvh_global_lock, RA_LOCKED);
1613 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1614 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1615 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1616 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1617 pc = pv_to_chunk(pv);
1618 idx = pv - &pc->pc_pventry[0];
1621 pc->pc_map[field] |= 1ul << bit;
1622 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1623 pc->pc_map[2] != PC_FREE2) {
1624 /* 98% of the time, pc is already at the head of the list. */
1625 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1626 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1627 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1631 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1636 free_pv_chunk(struct pv_chunk *pc)
1640 mtx_lock(&pv_chunks_mutex);
1641 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1642 mtx_unlock(&pv_chunks_mutex);
1643 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1644 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1645 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1646 /* entire chunk is free, return it */
1647 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1648 dump_drop_page(m->phys_addr);
1649 vm_page_unwire(m, PQ_NONE);
1654 * Returns a new PV entry, allocating a new PV chunk from the system when
1655 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1656 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1659 * The given PV list lock may be released.
1662 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1666 struct pv_chunk *pc;
1669 rw_assert(&pvh_global_lock, RA_LOCKED);
1670 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1671 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1673 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1675 for (field = 0; field < _NPCM; field++) {
1676 if (pc->pc_map[field]) {
1677 bit = ffsl(pc->pc_map[field]) - 1;
1681 if (field < _NPCM) {
1682 pv = &pc->pc_pventry[field * 64 + bit];
1683 pc->pc_map[field] &= ~(1ul << bit);
1684 /* If this was the last item, move it to tail */
1685 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1686 pc->pc_map[2] == 0) {
1687 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1688 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1691 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1692 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1696 /* No free items, allocate another chunk */
1697 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1700 if (lockp == NULL) {
1701 PV_STAT(pc_chunk_tryfail++);
1704 m = reclaim_pv_chunk(pmap, lockp);
1708 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1709 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1710 dump_add_page(m->phys_addr);
1711 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1713 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1714 pc->pc_map[1] = PC_FREE1;
1715 pc->pc_map[2] = PC_FREE2;
1716 mtx_lock(&pv_chunks_mutex);
1717 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1718 mtx_unlock(&pv_chunks_mutex);
1719 pv = &pc->pc_pventry[0];
1720 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1721 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1722 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1727 * Ensure that the number of spare PV entries in the specified pmap meets or
1728 * exceeds the given count, "needed".
1730 * The given PV list lock may be released.
1733 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1735 struct pch new_tail;
1736 struct pv_chunk *pc;
1741 rw_assert(&pvh_global_lock, RA_LOCKED);
1742 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1743 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1746 * Newly allocated PV chunks must be stored in a private list until
1747 * the required number of PV chunks have been allocated. Otherwise,
1748 * reclaim_pv_chunk() could recycle one of these chunks. In
1749 * contrast, these chunks must be added to the pmap upon allocation.
1751 TAILQ_INIT(&new_tail);
1754 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1755 bit_count((bitstr_t *)pc->pc_map, 0,
1756 sizeof(pc->pc_map) * NBBY, &free);
1760 if (avail >= needed)
1763 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1764 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1767 m = reclaim_pv_chunk(pmap, lockp);
1774 dump_add_page(m->phys_addr);
1776 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1778 pc->pc_map[0] = PC_FREE0;
1779 pc->pc_map[1] = PC_FREE1;
1780 pc->pc_map[2] = PC_FREE2;
1781 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1782 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1785 * The reclaim might have freed a chunk from the current pmap.
1786 * If that chunk contained available entries, we need to
1787 * re-count the number of available entries.
1792 if (!TAILQ_EMPTY(&new_tail)) {
1793 mtx_lock(&pv_chunks_mutex);
1794 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1795 mtx_unlock(&pv_chunks_mutex);
1800 * First find and then remove the pv entry for the specified pmap and virtual
1801 * address from the specified pv list. Returns the pv entry if found and NULL
1802 * otherwise. This operation can be performed on pv lists for either 4KB or
1803 * 2MB page mappings.
1805 static __inline pv_entry_t
1806 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1810 rw_assert(&pvh_global_lock, RA_LOCKED);
1811 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1812 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1813 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1822 * First find and then destroy the pv entry for the specified pmap and virtual
1823 * address. This operation can be performed on pv lists for either 4KB or 2MB
1827 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1831 pv = pmap_pvh_remove(pvh, pmap, va);
1833 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1834 free_pv_entry(pmap, pv);
1838 * Conditionally create the PV entry for a 4KB page mapping if the required
1839 * memory can be allocated without resorting to reclamation.
1842 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1843 struct rwlock **lockp)
1847 rw_assert(&pvh_global_lock, RA_LOCKED);
1848 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1849 /* Pass NULL instead of the lock pointer to disable reclamation. */
1850 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1852 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1853 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1861 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1862 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1863 * entries for each of the 4KB page mappings.
1865 static void __unused
1866 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1867 struct rwlock **lockp)
1869 struct md_page *pvh;
1870 struct pv_chunk *pc;
1873 vm_offset_t va_last;
1876 rw_assert(&pvh_global_lock, RA_LOCKED);
1877 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1878 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1881 * Transfer the 2mpage's pv entry for this mapping to the first
1882 * page's pv list. Once this transfer begins, the pv list lock
1883 * must not be released until the last pv entry is reinstantiated.
1885 pvh = pa_to_pvh(pa);
1887 pv = pmap_pvh_remove(pvh, pmap, va);
1888 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1889 m = PHYS_TO_VM_PAGE(pa);
1890 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1892 /* Instantiate the remaining 511 pv entries. */
1893 va_last = va + L2_SIZE - PAGE_SIZE;
1895 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1896 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1897 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1898 for (field = 0; field < _NPCM; field++) {
1899 while (pc->pc_map[field] != 0) {
1900 bit = ffsl(pc->pc_map[field]) - 1;
1901 pc->pc_map[field] &= ~(1ul << bit);
1902 pv = &pc->pc_pventry[field * 64 + bit];
1906 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1907 ("pmap_pv_demote_l2: page %p is not managed", m));
1908 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1914 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1915 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1918 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1919 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1920 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1925 #if VM_NRESERVLEVEL > 0
1927 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1928 struct rwlock **lockp)
1930 struct md_page *pvh;
1933 vm_offset_t va_last;
1935 rw_assert(&pvh_global_lock, RA_LOCKED);
1936 KASSERT((va & L2_OFFSET) == 0,
1937 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1939 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1941 m = PHYS_TO_VM_PAGE(pa);
1942 pv = pmap_pvh_remove(&m->md, pmap, va);
1943 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1944 pvh = pa_to_pvh(pa);
1945 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1948 va_last = va + L2_SIZE - PAGE_SIZE;
1952 pmap_pvh_free(&m->md, pmap, va);
1953 } while (va < va_last);
1955 #endif /* VM_NRESERVLEVEL > 0 */
1958 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1959 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1960 * false if the PV entry cannot be allocated without resorting to reclamation.
1963 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1964 struct rwlock **lockp)
1966 struct md_page *pvh;
1970 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1971 /* Pass NULL instead of the lock pointer to disable reclamation. */
1972 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1973 NULL : lockp)) == NULL)
1976 pa = PTE_TO_PHYS(l2e);
1977 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1978 pvh = pa_to_pvh(pa);
1979 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1985 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1987 pt_entry_t newl2, oldl2;
1991 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1992 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1993 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1995 ml3 = pmap_remove_pt_page(pmap, va);
1997 panic("pmap_remove_kernel_l2: Missing pt page");
1999 ml3pa = VM_PAGE_TO_PHYS(ml3);
2000 newl2 = ml3pa | PTE_V;
2003 * Initialize the page table page.
2005 pagezero((void *)PHYS_TO_DMAP(ml3pa));
2008 * Demote the mapping.
2010 oldl2 = pmap_load_store(l2, newl2);
2011 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2012 __func__, l2, oldl2));
2016 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2019 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2020 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2022 struct md_page *pvh;
2024 vm_offset_t eva, va;
2027 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2028 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2029 oldl2 = pmap_load_clear(l2);
2030 KASSERT((oldl2 & PTE_RWX) != 0,
2031 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2034 * The sfence.vma documentation states that it is sufficient to specify
2035 * a single address within a superpage mapping. However, since we do
2036 * not perform any invalidation upon promotion, TLBs may still be
2037 * caching 4KB mappings within the superpage, so we must invalidate the
2040 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2041 if ((oldl2 & PTE_SW_WIRED) != 0)
2042 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2043 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2044 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2045 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2046 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2047 pmap_pvh_free(pvh, pmap, sva);
2048 eva = sva + L2_SIZE;
2049 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2050 va < eva; va += PAGE_SIZE, m++) {
2051 if ((oldl2 & PTE_D) != 0)
2053 if ((oldl2 & PTE_A) != 0)
2054 vm_page_aflag_set(m, PGA_REFERENCED);
2055 if (TAILQ_EMPTY(&m->md.pv_list) &&
2056 TAILQ_EMPTY(&pvh->pv_list))
2057 vm_page_aflag_clear(m, PGA_WRITEABLE);
2060 if (pmap == kernel_pmap) {
2061 pmap_remove_kernel_l2(pmap, l2, sva);
2063 ml3 = pmap_remove_pt_page(pmap, sva);
2065 pmap_resident_count_dec(pmap, 1);
2066 KASSERT(ml3->wire_count == Ln_ENTRIES,
2067 ("pmap_remove_l2: l3 page wire count error"));
2068 ml3->wire_count = 1;
2069 vm_page_unwire_noq(ml3);
2070 pmap_add_delayed_free_list(ml3, free, FALSE);
2073 return (pmap_unuse_pt(pmap, sva, l1e, free));
2077 * pmap_remove_l3: do the things to unmap a page in a process
2080 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2081 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2087 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2088 old_l3 = pmap_load_clear(l3);
2089 pmap_invalidate_page(pmap, va);
2090 if (old_l3 & PTE_SW_WIRED)
2091 pmap->pm_stats.wired_count -= 1;
2092 pmap_resident_count_dec(pmap, 1);
2093 if (old_l3 & PTE_SW_MANAGED) {
2094 phys = PTE_TO_PHYS(old_l3);
2095 m = PHYS_TO_VM_PAGE(phys);
2096 if ((old_l3 & PTE_D) != 0)
2099 vm_page_aflag_set(m, PGA_REFERENCED);
2100 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2101 pmap_pvh_free(&m->md, pmap, va);
2104 return (pmap_unuse_pt(pmap, va, l2e, free));
2108 * Remove the given range of addresses from the specified map.
2110 * It is assumed that the start and end are properly
2111 * rounded to the page size.
2114 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2116 struct spglist free;
2117 struct rwlock *lock;
2118 vm_offset_t va, va_next;
2119 pd_entry_t *l1, *l2, l2e;
2123 * Perform an unsynchronized read. This is, however, safe.
2125 if (pmap->pm_stats.resident_count == 0)
2130 rw_rlock(&pvh_global_lock);
2134 for (; sva < eva; sva = va_next) {
2135 if (pmap->pm_stats.resident_count == 0)
2138 l1 = pmap_l1(pmap, sva);
2139 if (pmap_load(l1) == 0) {
2140 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2147 * Calculate index for next page table.
2149 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2153 l2 = pmap_l1_to_l2(l1, sva);
2156 if ((l2e = pmap_load(l2)) == 0)
2158 if ((l2e & PTE_RWX) != 0) {
2159 if (sva + L2_SIZE == va_next && eva >= va_next) {
2160 (void)pmap_remove_l2(pmap, l2, sva,
2161 pmap_load(l1), &free, &lock);
2163 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2166 * The large page mapping was destroyed.
2170 l2e = pmap_load(l2);
2174 * Limit our scan to either the end of the va represented
2175 * by the current page table page, or to the end of the
2176 * range being removed.
2182 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2184 if (pmap_load(l3) == 0) {
2185 if (va != va_next) {
2186 pmap_invalidate_range(pmap, va, sva);
2193 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2199 pmap_invalidate_range(pmap, va, sva);
2203 rw_runlock(&pvh_global_lock);
2205 vm_page_free_pages_toq(&free, false);
2209 * Routine: pmap_remove_all
2211 * Removes this physical page from
2212 * all physical maps in which it resides.
2213 * Reflects back modify bits to the pager.
2216 * Original versions of this routine were very
2217 * inefficient because they iteratively called
2218 * pmap_remove (slow...)
2222 pmap_remove_all(vm_page_t m)
2224 struct spglist free;
2225 struct md_page *pvh;
2227 pt_entry_t *l3, l3e;
2228 pd_entry_t *l2, l2e;
2232 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2233 ("pmap_remove_all: page %p is not managed", m));
2235 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2236 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2238 rw_wlock(&pvh_global_lock);
2239 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2243 l2 = pmap_l2(pmap, va);
2244 (void)pmap_demote_l2(pmap, l2, va);
2247 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2250 pmap_resident_count_dec(pmap, 1);
2251 l2 = pmap_l2(pmap, pv->pv_va);
2252 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2253 l2e = pmap_load(l2);
2255 KASSERT((l2e & PTE_RX) == 0,
2256 ("pmap_remove_all: found a superpage in %p's pv list", m));
2258 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2259 l3e = pmap_load_clear(l3);
2260 pmap_invalidate_page(pmap, pv->pv_va);
2261 if (l3e & PTE_SW_WIRED)
2262 pmap->pm_stats.wired_count--;
2263 if ((l3e & PTE_A) != 0)
2264 vm_page_aflag_set(m, PGA_REFERENCED);
2267 * Update the vm_page_t clean and reference bits.
2269 if ((l3e & PTE_D) != 0)
2271 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2272 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2274 free_pv_entry(pmap, pv);
2277 vm_page_aflag_clear(m, PGA_WRITEABLE);
2278 rw_wunlock(&pvh_global_lock);
2279 vm_page_free_pages_toq(&free, false);
2283 * Set the physical protection on the
2284 * specified range of this map as requested.
2287 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2289 pd_entry_t *l1, *l2, l2e;
2290 pt_entry_t *l3, l3e, mask;
2293 vm_offset_t va, va_next;
2294 bool anychanged, pv_lists_locked;
2296 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2297 pmap_remove(pmap, sva, eva);
2301 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2302 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2306 pv_lists_locked = false;
2308 if ((prot & VM_PROT_WRITE) == 0)
2309 mask |= PTE_W | PTE_D;
2310 if ((prot & VM_PROT_EXECUTE) == 0)
2314 for (; sva < eva; sva = va_next) {
2315 l1 = pmap_l1(pmap, sva);
2316 if (pmap_load(l1) == 0) {
2317 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2323 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2327 l2 = pmap_l1_to_l2(l1, sva);
2328 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2330 if ((l2e & PTE_RWX) != 0) {
2331 if (sva + L2_SIZE == va_next && eva >= va_next) {
2333 if ((l2e & (PTE_SW_MANAGED | PTE_D)) ==
2334 (PTE_SW_MANAGED | PTE_D)) {
2335 pa = PTE_TO_PHYS(l2e);
2336 for (va = sva, m = PHYS_TO_VM_PAGE(pa);
2337 va < va_next; m++, va += PAGE_SIZE)
2340 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2344 if (!pv_lists_locked) {
2345 pv_lists_locked = true;
2346 if (!rw_try_rlock(&pvh_global_lock)) {
2348 pmap_invalidate_all(
2351 rw_rlock(&pvh_global_lock);
2355 if (!pmap_demote_l2(pmap, l2, sva)) {
2357 * The large page mapping was destroyed.
2367 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2369 l3e = pmap_load(l3);
2371 if ((l3e & PTE_V) == 0)
2373 if ((prot & VM_PROT_WRITE) == 0 &&
2374 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2375 (PTE_SW_MANAGED | PTE_D)) {
2376 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2379 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2385 pmap_invalidate_all(pmap);
2386 if (pv_lists_locked)
2387 rw_runlock(&pvh_global_lock);
2392 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2394 pd_entry_t *l2, l2e;
2395 pt_entry_t bits, *pte, oldpte;
2400 l2 = pmap_l2(pmap, va);
2401 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2403 if ((l2e & PTE_RWX) == 0) {
2404 pte = pmap_l2_to_l3(l2, va);
2405 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2412 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2413 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2414 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2415 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2419 if (ftype == VM_PROT_WRITE)
2423 * Spurious faults can occur if the implementation caches invalid
2424 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2425 * race with each other.
2427 if ((oldpte & bits) != bits)
2428 pmap_store_bits(pte, bits);
2437 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2439 struct rwlock *lock;
2443 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2450 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2451 * mapping is invalidated.
2454 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2455 struct rwlock **lockp)
2457 struct spglist free;
2459 pd_entry_t newl2, oldl2;
2460 pt_entry_t *firstl3, newl3;
2464 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2466 oldl2 = pmap_load(l2);
2467 KASSERT((oldl2 & PTE_RWX) != 0,
2468 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2469 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2471 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2472 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2473 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2476 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2477 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2478 vm_page_free_pages_toq(&free, true);
2479 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2480 "failure for va %#lx in pmap %p", va, pmap);
2483 if (va < VM_MAXUSER_ADDRESS)
2484 pmap_resident_count_inc(pmap, 1);
2486 mptepa = VM_PAGE_TO_PHYS(mpte);
2487 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2488 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2489 KASSERT((oldl2 & PTE_A) != 0,
2490 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2491 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2492 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2496 * If the page table page is new, initialize it.
2498 if (mpte->wire_count == 1) {
2499 mpte->wire_count = Ln_ENTRIES;
2500 for (i = 0; i < Ln_ENTRIES; i++)
2501 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2503 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2504 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2508 * If the mapping has changed attributes, update the page table
2511 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2512 for (i = 0; i < Ln_ENTRIES; i++)
2513 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2516 * The spare PV entries must be reserved prior to demoting the
2517 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2518 * state of the L2 entry and the PV lists will be inconsistent, which
2519 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2520 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2521 * expected PV entry for the 2MB page mapping that is being demoted.
2523 if ((oldl2 & PTE_SW_MANAGED) != 0)
2524 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2527 * Demote the mapping.
2529 pmap_store(l2, newl2);
2532 * Demote the PV entry.
2534 if ((oldl2 & PTE_SW_MANAGED) != 0)
2535 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2537 atomic_add_long(&pmap_l2_demotions, 1);
2538 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2543 #if VM_NRESERVLEVEL > 0
2545 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2546 struct rwlock **lockp)
2548 pt_entry_t *firstl3, *l3;
2552 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2555 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2556 ("pmap_promote_l2: invalid l2 entry %p", l2));
2558 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2559 pa = PTE_TO_PHYS(pmap_load(firstl3));
2560 if ((pa & L2_OFFSET) != 0) {
2561 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2563 atomic_add_long(&pmap_l2_p_failures, 1);
2568 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2569 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2571 "pmap_promote_l2: failure for va %#lx pmap %p",
2573 atomic_add_long(&pmap_l2_p_failures, 1);
2576 if ((pmap_load(l3) & PTE_PROMOTE) !=
2577 (pmap_load(firstl3) & PTE_PROMOTE)) {
2579 "pmap_promote_l2: failure for va %#lx pmap %p",
2581 atomic_add_long(&pmap_l2_p_failures, 1);
2587 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2588 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2589 ("pmap_promote_l2: page table page's pindex is wrong"));
2590 if (pmap_insert_pt_page(pmap, ml3)) {
2591 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2593 atomic_add_long(&pmap_l2_p_failures, 1);
2597 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2598 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2601 pmap_store(l2, pmap_load(firstl3));
2603 atomic_add_long(&pmap_l2_promotions, 1);
2604 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2610 * Insert the given physical page (p) at
2611 * the specified virtual address (v) in the
2612 * target physical map with the protection requested.
2614 * If specified, the page will be wired down, meaning
2615 * that the related pte can not be reclaimed.
2617 * NB: This is the only routine which MAY NOT lazy-evaluate
2618 * or lose information. That is, this routine must actually
2619 * insert this page into the given map NOW.
2622 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2623 u_int flags, int8_t psind)
2625 struct rwlock *lock;
2626 pd_entry_t *l1, *l2, l2e;
2627 pt_entry_t new_l3, orig_l3;
2630 vm_paddr_t opa, pa, l2_pa, l3_pa;
2631 vm_page_t mpte, om, l2_m, l3_m;
2633 pn_t l2_pn, l3_pn, pn;
2637 va = trunc_page(va);
2638 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2639 VM_OBJECT_ASSERT_LOCKED(m->object);
2640 pa = VM_PAGE_TO_PHYS(m);
2641 pn = (pa / PAGE_SIZE);
2643 new_l3 = PTE_V | PTE_R | PTE_A;
2644 if (prot & VM_PROT_EXECUTE)
2646 if (flags & VM_PROT_WRITE)
2648 if (prot & VM_PROT_WRITE)
2650 if (va < VM_MAX_USER_ADDRESS)
2653 new_l3 |= (pn << PTE_PPN0_S);
2654 if ((flags & PMAP_ENTER_WIRED) != 0)
2655 new_l3 |= PTE_SW_WIRED;
2658 * Set modified bit gratuitously for writeable mappings if
2659 * the page is unmanaged. We do not want to take a fault
2660 * to do the dirty bit accounting for these mappings.
2662 if ((m->oflags & VPO_UNMANAGED) != 0) {
2663 if (prot & VM_PROT_WRITE)
2666 new_l3 |= PTE_SW_MANAGED;
2668 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2672 rw_rlock(&pvh_global_lock);
2675 /* Assert the required virtual and physical alignment. */
2676 KASSERT((va & L2_OFFSET) == 0,
2677 ("pmap_enter: va %#lx unaligned", va));
2678 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2679 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2683 l2 = pmap_l2(pmap, va);
2684 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2685 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2687 l3 = pmap_l2_to_l3(l2, va);
2688 if (va < VM_MAXUSER_ADDRESS) {
2689 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2692 } else if (va < VM_MAXUSER_ADDRESS) {
2693 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2694 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2695 if (mpte == NULL && nosleep) {
2696 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2699 rw_runlock(&pvh_global_lock);
2701 return (KERN_RESOURCE_SHORTAGE);
2703 l3 = pmap_l3(pmap, va);
2705 l3 = pmap_l3(pmap, va);
2706 /* TODO: This is not optimal, but should mostly work */
2709 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2710 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2713 panic("pmap_enter: l2 pte_m == NULL");
2714 if ((l2_m->flags & PG_ZERO) == 0)
2715 pmap_zero_page(l2_m);
2717 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2718 l2_pn = (l2_pa / PAGE_SIZE);
2720 l1 = pmap_l1(pmap, va);
2722 entry |= (l2_pn << PTE_PPN0_S);
2723 pmap_store(l1, entry);
2724 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2725 l2 = pmap_l1_to_l2(l1, va);
2728 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2729 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2731 panic("pmap_enter: l3 pte_m == NULL");
2732 if ((l3_m->flags & PG_ZERO) == 0)
2733 pmap_zero_page(l3_m);
2735 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2736 l3_pn = (l3_pa / PAGE_SIZE);
2738 entry |= (l3_pn << PTE_PPN0_S);
2739 pmap_store(l2, entry);
2740 l3 = pmap_l2_to_l3(l2, va);
2742 pmap_invalidate_page(pmap, va);
2745 orig_l3 = pmap_load(l3);
2746 opa = PTE_TO_PHYS(orig_l3);
2750 * Is the specified virtual address already mapped?
2752 if ((orig_l3 & PTE_V) != 0) {
2754 * Wiring change, just update stats. We don't worry about
2755 * wiring PT pages as they remain resident as long as there
2756 * are valid mappings in them. Hence, if a user page is wired,
2757 * the PT page will be also.
2759 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2760 (orig_l3 & PTE_SW_WIRED) == 0)
2761 pmap->pm_stats.wired_count++;
2762 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2763 (orig_l3 & PTE_SW_WIRED) != 0)
2764 pmap->pm_stats.wired_count--;
2767 * Remove the extra PT page reference.
2771 KASSERT(mpte->wire_count > 0,
2772 ("pmap_enter: missing reference to page table page,"
2777 * Has the physical page changed?
2781 * No, might be a protection or wiring change.
2783 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2784 (new_l3 & PTE_W) != 0)
2785 vm_page_aflag_set(m, PGA_WRITEABLE);
2790 * The physical page has changed. Temporarily invalidate
2791 * the mapping. This ensures that all threads sharing the
2792 * pmap keep a consistent view of the mapping, which is
2793 * necessary for the correct handling of COW faults. It
2794 * also permits reuse of the old mapping's PV entry,
2795 * avoiding an allocation.
2797 * For consistency, handle unmanaged mappings the same way.
2799 orig_l3 = pmap_load_clear(l3);
2800 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2801 ("pmap_enter: unexpected pa update for %#lx", va));
2802 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2803 om = PHYS_TO_VM_PAGE(opa);
2806 * The pmap lock is sufficient to synchronize with
2807 * concurrent calls to pmap_page_test_mappings() and
2808 * pmap_ts_referenced().
2810 if ((orig_l3 & PTE_D) != 0)
2812 if ((orig_l3 & PTE_A) != 0)
2813 vm_page_aflag_set(om, PGA_REFERENCED);
2814 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2815 pv = pmap_pvh_remove(&om->md, pmap, va);
2817 ("pmap_enter: no PV entry for %#lx", va));
2818 if ((new_l3 & PTE_SW_MANAGED) == 0)
2819 free_pv_entry(pmap, pv);
2820 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2821 TAILQ_EMPTY(&om->md.pv_list))
2822 vm_page_aflag_clear(om, PGA_WRITEABLE);
2824 pmap_invalidate_page(pmap, va);
2828 * Increment the counters.
2830 if ((new_l3 & PTE_SW_WIRED) != 0)
2831 pmap->pm_stats.wired_count++;
2832 pmap_resident_count_inc(pmap, 1);
2835 * Enter on the PV list if part of our managed memory.
2837 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2839 pv = get_pv_entry(pmap, &lock);
2842 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2843 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2845 if ((new_l3 & PTE_W) != 0)
2846 vm_page_aflag_set(m, PGA_WRITEABLE);
2851 * Sync the i-cache on all harts before updating the PTE
2852 * if the new PTE is executable.
2854 if (prot & VM_PROT_EXECUTE)
2855 pmap_sync_icache(pmap, va, PAGE_SIZE);
2858 * Update the L3 entry.
2861 orig_l3 = pmap_load_store(l3, new_l3);
2862 pmap_invalidate_page(pmap, va);
2863 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2864 ("pmap_enter: invalid update"));
2865 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2866 (PTE_D | PTE_SW_MANAGED))
2869 pmap_store(l3, new_l3);
2872 #if VM_NRESERVLEVEL > 0
2873 if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2874 pmap_ps_enabled(pmap) &&
2875 (m->flags & PG_FICTITIOUS) == 0 &&
2876 vm_reserv_level_iffullpop(m) == 0)
2877 pmap_promote_l2(pmap, l2, va, &lock);
2884 rw_runlock(&pvh_global_lock);
2890 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2891 * if successful. Returns false if (1) a page table page cannot be allocated
2892 * without sleeping, (2) a mapping already exists at the specified virtual
2893 * address, or (3) a PV entry cannot be allocated without reclaiming another
2897 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2898 struct rwlock **lockp)
2903 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2905 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2906 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2907 if ((m->oflags & VPO_UNMANAGED) == 0)
2908 new_l2 |= PTE_SW_MANAGED;
2909 if ((prot & VM_PROT_EXECUTE) != 0)
2911 if (va < VM_MAXUSER_ADDRESS)
2913 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2914 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2919 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2920 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2921 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2922 * a mapping already exists at the specified virtual address. Returns
2923 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2924 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2925 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2927 * The parameter "m" is only used when creating a managed, writeable mapping.
2930 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2931 vm_page_t m, struct rwlock **lockp)
2933 struct spglist free;
2934 pd_entry_t *l2, *l3, oldl2;
2938 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2940 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2941 NULL : lockp)) == NULL) {
2942 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2944 return (KERN_RESOURCE_SHORTAGE);
2947 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2948 l2 = &l2[pmap_l2_index(va)];
2949 if ((oldl2 = pmap_load(l2)) != 0) {
2950 KASSERT(l2pg->wire_count > 1,
2951 ("pmap_enter_l2: l2pg's wire count is too low"));
2952 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2955 "pmap_enter_l2: failure for va %#lx in pmap %p",
2957 return (KERN_FAILURE);
2960 if ((oldl2 & PTE_RWX) != 0)
2961 (void)pmap_remove_l2(pmap, l2, va,
2962 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2964 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2965 l3 = pmap_l2_to_l3(l2, sva);
2966 if ((pmap_load(l3) & PTE_V) != 0 &&
2967 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2971 vm_page_free_pages_toq(&free, true);
2972 if (va >= VM_MAXUSER_ADDRESS) {
2973 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2974 if (pmap_insert_pt_page(pmap, mt)) {
2976 * XXX Currently, this can't happen bacuse
2977 * we do not perform pmap_enter(psind == 1)
2978 * on the kernel pmap.
2980 panic("pmap_enter_l2: trie insert failed");
2983 KASSERT(pmap_load(l2) == 0,
2984 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2987 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2989 * Abort this mapping if its PV entry could not be created.
2991 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2993 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2995 * Although "va" is not mapped, paging-structure
2996 * caches could nonetheless have entries that
2997 * refer to the freed page table pages.
2998 * Invalidate those entries.
3000 pmap_invalidate_page(pmap, va);
3001 vm_page_free_pages_toq(&free, true);
3004 "pmap_enter_l2: failure for va %#lx in pmap %p",
3006 return (KERN_RESOURCE_SHORTAGE);
3008 if ((new_l2 & PTE_W) != 0)
3009 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3010 vm_page_aflag_set(mt, PGA_WRITEABLE);
3014 * Increment counters.
3016 if ((new_l2 & PTE_SW_WIRED) != 0)
3017 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3018 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3021 * Map the superpage.
3023 pmap_store(l2, new_l2);
3025 atomic_add_long(&pmap_l2_mappings, 1);
3026 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3029 return (KERN_SUCCESS);
3033 * Maps a sequence of resident pages belonging to the same object.
3034 * The sequence begins with the given page m_start. This page is
3035 * mapped at the given virtual address start. Each subsequent page is
3036 * mapped at a virtual address that is offset from start by the same
3037 * amount as the page is offset from m_start within the object. The
3038 * last page in the sequence is the page with the largest offset from
3039 * m_start that can be mapped at a virtual address less than the given
3040 * virtual address end. Not every virtual page between start and end
3041 * is mapped; only those for which a resident page exists with the
3042 * corresponding offset from m_start are mapped.
3045 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3046 vm_page_t m_start, vm_prot_t prot)
3048 struct rwlock *lock;
3051 vm_pindex_t diff, psize;
3053 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3055 psize = atop(end - start);
3059 rw_rlock(&pvh_global_lock);
3061 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3062 va = start + ptoa(diff);
3063 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3064 m->psind == 1 && pmap_ps_enabled(pmap) &&
3065 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3066 m = &m[L2_SIZE / PAGE_SIZE - 1];
3068 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3070 m = TAILQ_NEXT(m, listq);
3074 rw_runlock(&pvh_global_lock);
3079 * this code makes some *MAJOR* assumptions:
3080 * 1. Current pmap & pmap exists.
3083 * 4. No page table pages.
3084 * but is *MUCH* faster than pmap_enter...
3088 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3090 struct rwlock *lock;
3093 rw_rlock(&pvh_global_lock);
3095 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3098 rw_runlock(&pvh_global_lock);
3103 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3104 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3106 struct spglist free;
3109 pt_entry_t *l3, newl3;
3111 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3112 (m->oflags & VPO_UNMANAGED) != 0,
3113 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3114 rw_assert(&pvh_global_lock, RA_LOCKED);
3115 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3117 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3119 * In the case that a page table page is not
3120 * resident, we are creating it here.
3122 if (va < VM_MAXUSER_ADDRESS) {
3123 vm_pindex_t l2pindex;
3126 * Calculate pagetable page index
3128 l2pindex = pmap_l2_pindex(va);
3129 if (mpte && (mpte->pindex == l2pindex)) {
3135 l2 = pmap_l2(pmap, va);
3138 * If the page table page is mapped, we just increment
3139 * the hold count, and activate it. Otherwise, we
3140 * attempt to allocate a page table page. If this
3141 * attempt fails, we don't retry. Instead, we give up.
3143 if (l2 != NULL && pmap_load(l2) != 0) {
3144 phys = PTE_TO_PHYS(pmap_load(l2));
3145 mpte = PHYS_TO_VM_PAGE(phys);
3149 * Pass NULL instead of the PV list lock
3150 * pointer, because we don't intend to sleep.
3152 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3157 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3158 l3 = &l3[pmap_l3_index(va)];
3161 l3 = pmap_l3(kernel_pmap, va);
3164 panic("pmap_enter_quick_locked: No l3");
3165 if (pmap_load(l3) != 0) {
3174 * Enter on the PV list if part of our managed memory.
3176 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3177 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3180 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3181 pmap_invalidate_page(pmap, va);
3182 vm_page_free_pages_toq(&free, false);
3190 * Increment counters
3192 pmap_resident_count_inc(pmap, 1);
3194 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3196 if ((prot & VM_PROT_EXECUTE) != 0)
3198 if ((m->oflags & VPO_UNMANAGED) == 0)
3199 newl3 |= PTE_SW_MANAGED;
3200 if (va < VM_MAX_USER_ADDRESS)
3204 * Sync the i-cache on all harts before updating the PTE
3205 * if the new PTE is executable.
3207 if (prot & VM_PROT_EXECUTE)
3208 pmap_sync_icache(pmap, va, PAGE_SIZE);
3210 pmap_store(l3, newl3);
3212 pmap_invalidate_page(pmap, va);
3217 * This code maps large physical mmap regions into the
3218 * processor address space. Note that some shortcuts
3219 * are taken, but the code works.
3222 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3223 vm_pindex_t pindex, vm_size_t size)
3226 VM_OBJECT_ASSERT_WLOCKED(object);
3227 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3228 ("pmap_object_init_pt: non-device object"));
3232 * Clear the wired attribute from the mappings for the specified range of
3233 * addresses in the given pmap. Every valid mapping within that range
3234 * must have the wired attribute set. In contrast, invalid mappings
3235 * cannot have the wired attribute set, so they are ignored.
3237 * The wired attribute of the page table entry is not a hardware feature,
3238 * so there is no need to invalidate any TLB entries.
3241 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3243 vm_offset_t va_next;
3244 pd_entry_t *l1, *l2, l2e;
3245 pt_entry_t *l3, l3e;
3246 bool pv_lists_locked;
3248 pv_lists_locked = false;
3251 for (; sva < eva; sva = va_next) {
3252 l1 = pmap_l1(pmap, sva);
3253 if (pmap_load(l1) == 0) {
3254 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3260 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3264 l2 = pmap_l1_to_l2(l1, sva);
3265 if ((l2e = pmap_load(l2)) == 0)
3267 if ((l2e & PTE_RWX) != 0) {
3268 if (sva + L2_SIZE == va_next && eva >= va_next) {
3269 if ((l2e & PTE_SW_WIRED) == 0)
3270 panic("pmap_unwire: l2 %#jx is missing "
3271 "PTE_SW_WIRED", (uintmax_t)l2e);
3272 pmap_clear_bits(l2, PTE_SW_WIRED);
3275 if (!pv_lists_locked) {
3276 pv_lists_locked = true;
3277 if (!rw_try_rlock(&pvh_global_lock)) {
3279 rw_rlock(&pvh_global_lock);
3284 if (!pmap_demote_l2(pmap, l2, sva))
3285 panic("pmap_unwire: demotion failed");
3291 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3293 if ((l3e = pmap_load(l3)) == 0)
3295 if ((l3e & PTE_SW_WIRED) == 0)
3296 panic("pmap_unwire: l3 %#jx is missing "
3297 "PTE_SW_WIRED", (uintmax_t)l3e);
3300 * PG_W must be cleared atomically. Although the pmap
3301 * lock synchronizes access to PG_W, another processor
3302 * could be setting PG_M and/or PG_A concurrently.
3304 pmap_clear_bits(l3, PTE_SW_WIRED);
3305 pmap->pm_stats.wired_count--;
3308 if (pv_lists_locked)
3309 rw_runlock(&pvh_global_lock);
3314 * Copy the range specified by src_addr/len
3315 * from the source map to the range dst_addr/len
3316 * in the destination map.
3318 * This routine is only advisory and need not do anything.
3322 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3323 vm_offset_t src_addr)
3329 * pmap_zero_page zeros the specified hardware page by mapping
3330 * the page into KVM and using bzero to clear its contents.
3333 pmap_zero_page(vm_page_t m)
3335 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3337 pagezero((void *)va);
3341 * pmap_zero_page_area zeros the specified hardware page by mapping
3342 * the page into KVM and using bzero to clear its contents.
3344 * off and size may not cover an area beyond a single hardware page.
3347 pmap_zero_page_area(vm_page_t m, int off, int size)
3349 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3351 if (off == 0 && size == PAGE_SIZE)
3352 pagezero((void *)va);
3354 bzero((char *)va + off, size);
3358 * pmap_copy_page copies the specified (machine independent)
3359 * page by mapping the page into virtual memory and using
3360 * bcopy to copy the page, one machine dependent page at a
3364 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3366 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3367 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3369 pagecopy((void *)src, (void *)dst);
3372 int unmapped_buf_allowed = 1;
3375 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3376 vm_offset_t b_offset, int xfersize)
3380 vm_paddr_t p_a, p_b;
3381 vm_offset_t a_pg_offset, b_pg_offset;
3384 while (xfersize > 0) {
3385 a_pg_offset = a_offset & PAGE_MASK;
3386 m_a = ma[a_offset >> PAGE_SHIFT];
3387 p_a = m_a->phys_addr;
3388 b_pg_offset = b_offset & PAGE_MASK;
3389 m_b = mb[b_offset >> PAGE_SHIFT];
3390 p_b = m_b->phys_addr;
3391 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3392 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3393 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3394 panic("!DMAP a %lx", p_a);
3396 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3398 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3399 panic("!DMAP b %lx", p_b);
3401 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3403 bcopy(a_cp, b_cp, cnt);
3411 pmap_quick_enter_page(vm_page_t m)
3414 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3418 pmap_quick_remove_page(vm_offset_t addr)
3423 * Returns true if the pmap's pv is one of the first
3424 * 16 pvs linked to from this page. This count may
3425 * be changed upwards or downwards in the future; it
3426 * is only necessary that true be returned for a small
3427 * subset of pmaps for proper page aging.
3430 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3432 struct md_page *pvh;
3433 struct rwlock *lock;
3438 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3439 ("pmap_page_exists_quick: page %p is not managed", m));
3441 rw_rlock(&pvh_global_lock);
3442 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3444 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3445 if (PV_PMAP(pv) == pmap) {
3453 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3454 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3455 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3456 if (PV_PMAP(pv) == pmap) {
3466 rw_runlock(&pvh_global_lock);
3471 * pmap_page_wired_mappings:
3473 * Return the number of managed mappings to the given physical page
3477 pmap_page_wired_mappings(vm_page_t m)
3479 struct md_page *pvh;
3480 struct rwlock *lock;
3485 int count, md_gen, pvh_gen;
3487 if ((m->oflags & VPO_UNMANAGED) != 0)
3489 rw_rlock(&pvh_global_lock);
3490 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3494 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3496 if (!PMAP_TRYLOCK(pmap)) {
3497 md_gen = m->md.pv_gen;
3501 if (md_gen != m->md.pv_gen) {
3506 l3 = pmap_l3(pmap, pv->pv_va);
3507 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3511 if ((m->flags & PG_FICTITIOUS) == 0) {
3512 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3513 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3515 if (!PMAP_TRYLOCK(pmap)) {
3516 md_gen = m->md.pv_gen;
3517 pvh_gen = pvh->pv_gen;
3521 if (md_gen != m->md.pv_gen ||
3522 pvh_gen != pvh->pv_gen) {
3527 l2 = pmap_l2(pmap, pv->pv_va);
3528 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3534 rw_runlock(&pvh_global_lock);
3539 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3540 struct spglist *free, bool superpage)
3542 struct md_page *pvh;
3546 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3547 pvh = pa_to_pvh(m->phys_addr);
3548 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3550 if (TAILQ_EMPTY(&pvh->pv_list)) {
3551 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3552 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3553 (mt->aflags & PGA_WRITEABLE) != 0)
3554 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3556 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3558 pmap_resident_count_dec(pmap, 1);
3559 KASSERT(mpte->wire_count == Ln_ENTRIES,
3560 ("pmap_remove_pages: pte page wire count error"));
3561 mpte->wire_count = 0;
3562 pmap_add_delayed_free_list(mpte, free, FALSE);
3565 pmap_resident_count_dec(pmap, 1);
3566 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3568 if (TAILQ_EMPTY(&m->md.pv_list) &&
3569 (m->aflags & PGA_WRITEABLE) != 0) {
3570 pvh = pa_to_pvh(m->phys_addr);
3571 if (TAILQ_EMPTY(&pvh->pv_list))
3572 vm_page_aflag_clear(m, PGA_WRITEABLE);
3578 * Destroy all managed, non-wired mappings in the given user-space
3579 * pmap. This pmap cannot be active on any processor besides the
3582 * This function cannot be applied to the kernel pmap. Moreover, it
3583 * is not intended for general use. It is only to be used during
3584 * process termination. Consequently, it can be implemented in ways
3585 * that make it faster than pmap_remove(). First, it can more quickly
3586 * destroy mappings by iterating over the pmap's collection of PV
3587 * entries, rather than searching the page table. Second, it doesn't
3588 * have to test and clear the page table entries atomically, because
3589 * no processor is currently accessing the user address space. In
3590 * particular, a page table entry's dirty bit won't change state once
3591 * this function starts.
3594 pmap_remove_pages(pmap_t pmap)
3596 struct spglist free;
3598 pt_entry_t *pte, tpte;
3601 struct pv_chunk *pc, *npc;
3602 struct rwlock *lock;
3604 uint64_t inuse, bitmask;
3605 int allfree, field, freed, idx;
3611 rw_rlock(&pvh_global_lock);
3613 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3616 for (field = 0; field < _NPCM; field++) {
3617 inuse = ~pc->pc_map[field] & pc_freemask[field];
3618 while (inuse != 0) {
3619 bit = ffsl(inuse) - 1;
3620 bitmask = 1UL << bit;
3621 idx = field * 64 + bit;
3622 pv = &pc->pc_pventry[idx];
3625 pte = pmap_l1(pmap, pv->pv_va);
3626 ptepde = pmap_load(pte);
3627 pte = pmap_l1_to_l2(pte, pv->pv_va);
3628 tpte = pmap_load(pte);
3629 if ((tpte & PTE_RWX) != 0) {
3633 pte = pmap_l2_to_l3(pte, pv->pv_va);
3634 tpte = pmap_load(pte);
3639 * We cannot remove wired pages from a
3640 * process' mapping at this time.
3642 if (tpte & PTE_SW_WIRED) {
3647 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3648 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3649 m < &vm_page_array[vm_page_array_size],
3650 ("pmap_remove_pages: bad pte %#jx",
3656 * Update the vm_page_t clean/reference bits.
3658 if ((tpte & (PTE_D | PTE_W)) ==
3662 mt < &m[Ln_ENTRIES]; mt++)
3668 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3671 pc->pc_map[field] |= bitmask;
3673 pmap_remove_pages_pv(pmap, m, pv, &free,
3675 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3679 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3680 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3681 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3683 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3689 pmap_invalidate_all(pmap);
3690 rw_runlock(&pvh_global_lock);
3692 vm_page_free_pages_toq(&free, false);
3696 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3698 struct md_page *pvh;
3699 struct rwlock *lock;
3701 pt_entry_t *l3, mask;
3704 int md_gen, pvh_gen;
3714 rw_rlock(&pvh_global_lock);
3715 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3718 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3720 if (!PMAP_TRYLOCK(pmap)) {
3721 md_gen = m->md.pv_gen;
3725 if (md_gen != m->md.pv_gen) {
3730 l3 = pmap_l3(pmap, pv->pv_va);
3731 rv = (pmap_load(l3) & mask) == mask;
3736 if ((m->flags & PG_FICTITIOUS) == 0) {
3737 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3738 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3740 if (!PMAP_TRYLOCK(pmap)) {
3741 md_gen = m->md.pv_gen;
3742 pvh_gen = pvh->pv_gen;
3746 if (md_gen != m->md.pv_gen ||
3747 pvh_gen != pvh->pv_gen) {
3752 l2 = pmap_l2(pmap, pv->pv_va);
3753 rv = (pmap_load(l2) & mask) == mask;
3761 rw_runlock(&pvh_global_lock);
3768 * Return whether or not the specified physical page was modified
3769 * in any physical maps.
3772 pmap_is_modified(vm_page_t m)
3775 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3776 ("pmap_is_modified: page %p is not managed", m));
3779 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3780 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
3781 * is clear, no PTEs can have PG_M set.
3783 VM_OBJECT_ASSERT_WLOCKED(m->object);
3784 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3786 return (pmap_page_test_mappings(m, FALSE, TRUE));
3790 * pmap_is_prefaultable:
3792 * Return whether or not the specified virtual address is eligible
3796 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3803 l3 = pmap_l3(pmap, addr);
3804 if (l3 != NULL && pmap_load(l3) != 0) {
3812 * pmap_is_referenced:
3814 * Return whether or not the specified physical page was referenced
3815 * in any physical maps.
3818 pmap_is_referenced(vm_page_t m)
3821 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3822 ("pmap_is_referenced: page %p is not managed", m));
3823 return (pmap_page_test_mappings(m, TRUE, FALSE));
3827 * Clear the write and modified bits in each of the given page's mappings.
3830 pmap_remove_write(vm_page_t m)
3832 struct md_page *pvh;
3833 struct rwlock *lock;
3836 pt_entry_t *l3, oldl3, newl3;
3837 pv_entry_t next_pv, pv;
3839 int md_gen, pvh_gen;
3841 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3842 ("pmap_remove_write: page %p is not managed", m));
3845 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3846 * set by another thread while the object is locked. Thus,
3847 * if PGA_WRITEABLE is clear, no page table entries need updating.
3849 VM_OBJECT_ASSERT_WLOCKED(m->object);
3850 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3852 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3853 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3854 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3855 rw_rlock(&pvh_global_lock);
3858 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3860 if (!PMAP_TRYLOCK(pmap)) {
3861 pvh_gen = pvh->pv_gen;
3865 if (pvh_gen != pvh->pv_gen) {
3872 l2 = pmap_l2(pmap, va);
3873 if ((pmap_load(l2) & PTE_W) != 0)
3874 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3875 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3876 ("inconsistent pv lock %p %p for page %p",
3877 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3880 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3882 if (!PMAP_TRYLOCK(pmap)) {
3883 pvh_gen = pvh->pv_gen;
3884 md_gen = m->md.pv_gen;
3888 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3894 l3 = pmap_l3(pmap, pv->pv_va);
3895 oldl3 = pmap_load(l3);
3897 if ((oldl3 & PTE_W) != 0) {
3898 newl3 = oldl3 & ~(PTE_D | PTE_W);
3899 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3901 if ((oldl3 & PTE_D) != 0)
3903 pmap_invalidate_page(pmap, pv->pv_va);
3908 vm_page_aflag_clear(m, PGA_WRITEABLE);
3909 rw_runlock(&pvh_global_lock);
3913 * pmap_ts_referenced:
3915 * Return a count of reference bits for a page, clearing those bits.
3916 * It is not necessary for every reference bit to be cleared, but it
3917 * is necessary that 0 only be returned when there are truly no
3918 * reference bits set.
3920 * As an optimization, update the page's dirty field if a modified bit is
3921 * found while counting reference bits. This opportunistic update can be
3922 * performed at low cost and can eliminate the need for some future calls
3923 * to pmap_is_modified(). However, since this function stops after
3924 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3925 * dirty pages. Those dirty pages will only be detected by a future call
3926 * to pmap_is_modified().
3929 pmap_ts_referenced(vm_page_t m)
3931 struct spglist free;
3932 struct md_page *pvh;
3933 struct rwlock *lock;
3936 pd_entry_t *l2, l2e;
3937 pt_entry_t *l3, l3e;
3940 int md_gen, pvh_gen, ret;
3942 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3943 ("pmap_ts_referenced: page %p is not managed", m));
3946 pa = VM_PAGE_TO_PHYS(m);
3947 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3949 lock = PHYS_TO_PV_LIST_LOCK(pa);
3950 rw_rlock(&pvh_global_lock);
3953 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3954 goto small_mappings;
3958 if (!PMAP_TRYLOCK(pmap)) {
3959 pvh_gen = pvh->pv_gen;
3963 if (pvh_gen != pvh->pv_gen) {
3969 l2 = pmap_l2(pmap, va);
3970 l2e = pmap_load(l2);
3971 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3973 * Although l2e is mapping a 2MB page, because
3974 * this function is called at a 4KB page granularity,
3975 * we only update the 4KB page under test.
3979 if ((l2e & PTE_A) != 0) {
3981 * Since this reference bit is shared by 512 4KB
3982 * pages, it should not be cleared every time it is
3983 * tested. Apply a simple "hash" function on the
3984 * physical page number, the virtual superpage number,
3985 * and the pmap address to select one 4KB page out of
3986 * the 512 on which testing the reference bit will
3987 * result in clearing that reference bit. This
3988 * function is designed to avoid the selection of the
3989 * same 4KB page for every 2MB page mapping.
3991 * On demotion, a mapping that hasn't been referenced
3992 * is simply destroyed. To avoid the possibility of a
3993 * subsequent page fault on a demoted wired mapping,
3994 * always leave its reference bit set. Moreover,
3995 * since the superpage is wired, the current state of
3996 * its reference bit won't affect page replacement.
3998 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
3999 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4000 (l2e & PTE_SW_WIRED) == 0) {
4001 pmap_clear_bits(l2, PTE_A);
4002 pmap_invalidate_page(pmap, va);
4007 /* Rotate the PV list if it has more than one entry. */
4008 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4009 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4010 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4013 if (ret >= PMAP_TS_REFERENCED_MAX)
4015 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4017 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4022 if (!PMAP_TRYLOCK(pmap)) {
4023 pvh_gen = pvh->pv_gen;
4024 md_gen = m->md.pv_gen;
4028 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4033 l2 = pmap_l2(pmap, pv->pv_va);
4035 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4036 ("pmap_ts_referenced: found an invalid l2 table"));
4038 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4039 l3e = pmap_load(l3);
4040 if ((l3e & PTE_D) != 0)
4042 if ((l3e & PTE_A) != 0) {
4043 if ((l3e & PTE_SW_WIRED) == 0) {
4045 * Wired pages cannot be paged out so
4046 * doing accessed bit emulation for
4047 * them is wasted effort. We do the
4048 * hard work for unwired pages only.
4050 pmap_clear_bits(l3, PTE_A);
4051 pmap_invalidate_page(pmap, pv->pv_va);
4056 /* Rotate the PV list if it has more than one entry. */
4057 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4058 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4059 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4062 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && ret <
4063 PMAP_TS_REFERENCED_MAX);
4066 rw_runlock(&pvh_global_lock);
4067 vm_page_free_pages_toq(&free, false);
4072 * Apply the given advice to the specified range of addresses within the
4073 * given pmap. Depending on the advice, clear the referenced and/or
4074 * modified flags in each mapping and set the mapped page's dirty field.
4077 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4082 * Clear the modify bits on the specified physical page.
4085 pmap_clear_modify(vm_page_t m)
4087 struct md_page *pvh;
4088 struct rwlock *lock;
4090 pv_entry_t next_pv, pv;
4091 pd_entry_t *l2, oldl2;
4092 pt_entry_t *l3, oldl3;
4094 int md_gen, pvh_gen;
4096 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4097 ("pmap_clear_modify: page %p is not managed", m));
4098 VM_OBJECT_ASSERT_WLOCKED(m->object);
4099 KASSERT(!vm_page_xbusied(m),
4100 ("pmap_clear_modify: page %p is exclusive busied", m));
4103 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4104 * If the object containing the page is locked and the page is not
4105 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4107 if ((m->aflags & PGA_WRITEABLE) == 0)
4109 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4110 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4111 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4112 rw_rlock(&pvh_global_lock);
4115 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4117 if (!PMAP_TRYLOCK(pmap)) {
4118 pvh_gen = pvh->pv_gen;
4122 if (pvh_gen != pvh->pv_gen) {
4128 l2 = pmap_l2(pmap, va);
4129 oldl2 = pmap_load(l2);
4130 if ((oldl2 & PTE_W) != 0) {
4131 if (pmap_demote_l2_locked(pmap, l2, va, &lock)) {
4132 if ((oldl2 & PTE_SW_WIRED) == 0) {
4134 * Write protect the mapping to a
4135 * single page so that a subsequent
4136 * write access may repromote.
4138 va += VM_PAGE_TO_PHYS(m) -
4140 l3 = pmap_l2_to_l3(l2, va);
4141 oldl3 = pmap_load(l3);
4142 if ((oldl3 & PTE_V) != 0) {
4143 while (!atomic_fcmpset_long(l3,
4144 &oldl3, oldl3 & ~(PTE_D |
4148 pmap_invalidate_page(pmap, va);
4155 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4157 if (!PMAP_TRYLOCK(pmap)) {
4158 md_gen = m->md.pv_gen;
4159 pvh_gen = pvh->pv_gen;
4163 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4168 l2 = pmap_l2(pmap, pv->pv_va);
4169 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4170 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4172 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4173 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4174 pmap_clear_bits(l3, PTE_D);
4175 pmap_invalidate_page(pmap, pv->pv_va);
4180 rw_runlock(&pvh_global_lock);
4184 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4187 return ((void *)PHYS_TO_DMAP(pa));
4191 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4196 * Sets the memory attribute for the specified page.
4199 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4202 m->md.pv_memattr = ma;
4205 * RISCVTODO: Implement the below (from the amd64 pmap)
4206 * If "m" is a normal page, update its direct mapping. This update
4207 * can be relied upon to perform any cache operations that are
4208 * required for data coherence.
4210 if ((m->flags & PG_FICTITIOUS) == 0 &&
4211 PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
4212 panic("RISCVTODO: pmap_page_set_memattr");
4216 * perform the pmap work for mincore
4219 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4221 pt_entry_t *l2, *l3, tpte;
4231 l2 = pmap_l2(pmap, addr);
4232 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4233 if ((tpte & PTE_RWX) != 0) {
4234 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4235 val = MINCORE_INCORE | MINCORE_SUPER;
4237 l3 = pmap_l2_to_l3(l2, addr);
4238 tpte = pmap_load(l3);
4239 if ((tpte & PTE_V) == 0)
4241 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4242 val = MINCORE_INCORE;
4245 if ((tpte & PTE_D) != 0)
4246 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4247 if ((tpte & PTE_A) != 0)
4248 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4249 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4253 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4254 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4255 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4256 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4259 PA_UNLOCK_COND(*locked_pa);
4265 pmap_activate_sw(struct thread *td)
4267 pmap_t oldpmap, pmap;
4270 oldpmap = PCPU_GET(curpmap);
4271 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4272 if (pmap == oldpmap)
4274 load_satp(pmap->pm_satp);
4276 cpu = PCPU_GET(cpuid);
4278 CPU_SET_ATOMIC(cpu, &pmap->pm_active);
4279 CPU_CLR_ATOMIC(cpu, &oldpmap->pm_active);
4281 CPU_SET(cpu, &pmap->pm_active);
4282 CPU_CLR(cpu, &oldpmap->pm_active);
4284 PCPU_SET(curpmap, pmap);
4290 pmap_activate(struct thread *td)
4294 pmap_activate_sw(td);
4299 pmap_activate_boot(pmap_t pmap)
4303 cpu = PCPU_GET(cpuid);
4305 CPU_SET_ATOMIC(cpu, &pmap->pm_active);
4307 CPU_SET(cpu, &pmap->pm_active);
4309 PCPU_SET(curpmap, pmap);
4313 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4318 * From the RISC-V User-Level ISA V2.2:
4320 * "To make a store to instruction memory visible to all
4321 * RISC-V harts, the writing hart has to execute a data FENCE
4322 * before requesting that all remote RISC-V harts execute a
4327 CPU_CLR(PCPU_GET(cpuid), &mask);
4329 if (!CPU_EMPTY(&mask) && smp_started)
4330 sbi_remote_fence_i(mask.__bits);
4335 * Increase the starting virtual address of the given mapping if a
4336 * different alignment might result in more superpage mappings.
4339 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4340 vm_offset_t *addr, vm_size_t size)
4342 vm_offset_t superpage_offset;
4346 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4347 offset += ptoa(object->pg_color);
4348 superpage_offset = offset & L2_OFFSET;
4349 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4350 (*addr & L2_OFFSET) == superpage_offset)
4352 if ((*addr & L2_OFFSET) < superpage_offset)
4353 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4355 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4359 * Get the kernel virtual address of a set of physical pages. If there are
4360 * physical addresses not covered by the DMAP perform a transient mapping
4361 * that will be removed when calling pmap_unmap_io_transient.
4363 * \param page The pages the caller wishes to obtain the virtual
4364 * address on the kernel memory map.
4365 * \param vaddr On return contains the kernel virtual memory address
4366 * of the pages passed in the page parameter.
4367 * \param count Number of pages passed in.
4368 * \param can_fault TRUE if the thread using the mapped pages can take
4369 * page faults, FALSE otherwise.
4371 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4372 * finished or FALSE otherwise.
4376 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4377 boolean_t can_fault)
4380 boolean_t needs_mapping;
4384 * Allocate any KVA space that we need, this is done in a separate
4385 * loop to prevent calling vmem_alloc while pinned.
4387 needs_mapping = FALSE;
4388 for (i = 0; i < count; i++) {
4389 paddr = VM_PAGE_TO_PHYS(page[i]);
4390 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4391 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4392 M_BESTFIT | M_WAITOK, &vaddr[i]);
4393 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4394 needs_mapping = TRUE;
4396 vaddr[i] = PHYS_TO_DMAP(paddr);
4400 /* Exit early if everything is covered by the DMAP */
4406 for (i = 0; i < count; i++) {
4407 paddr = VM_PAGE_TO_PHYS(page[i]);
4408 if (paddr >= DMAP_MAX_PHYSADDR) {
4410 "pmap_map_io_transient: TODO: Map out of DMAP data");
4414 return (needs_mapping);
4418 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4419 boolean_t can_fault)
4426 for (i = 0; i < count; i++) {
4427 paddr = VM_PAGE_TO_PHYS(page[i]);
4428 if (paddr >= DMAP_MAX_PHYSADDR) {
4429 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4435 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4438 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4442 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4445 pd_entry_t *l1p, *l2p;
4447 /* Get l1 directory entry. */
4448 l1p = pmap_l1(pmap, va);
4451 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4454 if ((pmap_load(l1p) & PTE_RX) != 0) {
4460 /* Get l2 directory entry. */
4461 l2p = pmap_l1_to_l2(l1p, va);
4464 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4467 if ((pmap_load(l2p) & PTE_RX) != 0) {
4472 /* Get l3 page table entry. */
4473 *l3 = pmap_l2_to_l3(l2p, va);