2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
122 #include <sys/systm.h>
123 #include <sys/kernel.h>
125 #include <sys/lock.h>
126 #include <sys/malloc.h>
127 #include <sys/mman.h>
128 #include <sys/msgbuf.h>
129 #include <sys/mutex.h>
130 #include <sys/proc.h>
131 #include <sys/rwlock.h>
133 #include <sys/vmem.h>
134 #include <sys/vmmeter.h>
135 #include <sys/sched.h>
136 #include <sys/sysctl.h>
140 #include <vm/vm_param.h>
141 #include <vm/vm_kern.h>
142 #include <vm/vm_page.h>
143 #include <vm/vm_map.h>
144 #include <vm/vm_object.h>
145 #include <vm/vm_extern.h>
146 #include <vm/vm_pageout.h>
147 #include <vm/vm_pager.h>
148 #include <vm/vm_radix.h>
149 #include <vm/vm_reserv.h>
152 #include <machine/machdep.h>
153 #include <machine/md_var.h>
154 #include <machine/pcb.h>
156 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
157 #define NUPDE (NPDEPG * NPDEPG)
158 #define NUSERPGTBLS (NUPDE + NPDEPG)
160 #if !defined(DIAGNOSTIC)
161 #ifdef __GNUC_GNU_INLINE__
162 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
164 #define PMAP_INLINE extern inline
171 #define PV_STAT(x) do { x ; } while (0)
173 #define PV_STAT(x) do { } while (0)
176 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
178 #define NPV_LIST_LOCKS MAXCPU
180 #define PHYS_TO_PV_LIST_LOCK(pa) \
181 (&pv_list_locks[pa_index(pa) % NPV_LIST_LOCKS])
183 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
184 struct rwlock **_lockp = (lockp); \
185 struct rwlock *_new_lock; \
187 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
188 if (_new_lock != *_lockp) { \
189 if (*_lockp != NULL) \
190 rw_wunlock(*_lockp); \
191 *_lockp = _new_lock; \
196 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
197 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
199 #define RELEASE_PV_LIST_LOCK(lockp) do { \
200 struct rwlock **_lockp = (lockp); \
202 if (*_lockp != NULL) { \
203 rw_wunlock(*_lockp); \
208 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
209 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
211 /* The list of all the user pmaps */
212 LIST_HEAD(pmaplist, pmap);
213 static struct pmaplist allpmaps;
215 static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
217 struct pmap kernel_pmap_store;
219 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
220 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
221 vm_offset_t kernel_vm_end = 0;
223 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
224 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
225 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
227 /* This code assumes all L1 DMAP entries will be used */
228 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
229 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
231 static struct rwlock_padalign pvh_global_lock;
234 * Data for the pv entry allocation mechanism
236 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
237 static struct mtx pv_chunks_mutex;
238 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
240 static void free_pv_chunk(struct pv_chunk *pc);
241 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
242 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
243 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
244 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
245 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
247 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
248 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
249 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
250 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
251 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
252 vm_page_t m, struct rwlock **lockp);
254 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
255 struct rwlock **lockp);
257 static void _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
258 struct spglist *free);
259 static int pmap_unuse_l3(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
262 * These load the old table data and store the new value.
263 * They need to be atomic as the System MMU may write to the table at
264 * the same time as the CPU.
266 #define pmap_load_store(table, entry) atomic_swap_64(table, entry)
267 #define pmap_set(table, mask) atomic_set_64(table, mask)
268 #define pmap_load_clear(table) atomic_swap_64(table, 0)
269 #define pmap_load(table) (*table)
271 /********************/
272 /* Inline functions */
273 /********************/
276 pagecopy(void *s, void *d)
279 memcpy(d, s, PAGE_SIZE);
289 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
290 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
291 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
293 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
295 static __inline pd_entry_t *
296 pmap_l1(pmap_t pmap, vm_offset_t va)
299 return (&pmap->pm_l1[pmap_l1_index(va)]);
302 static __inline pd_entry_t *
303 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
308 phys = PTE_TO_PHYS(pmap_load(l1));
309 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
311 return (&l2[pmap_l2_index(va)]);
314 static __inline pd_entry_t *
315 pmap_l2(pmap_t pmap, vm_offset_t va)
319 l1 = pmap_l1(pmap, va);
322 if ((pmap_load(l1) & PTE_V) == 0)
324 if ((pmap_load(l1) & PTE_RX) != 0)
327 return (pmap_l1_to_l2(l1, va));
330 static __inline pt_entry_t *
331 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
336 phys = PTE_TO_PHYS(pmap_load(l2));
337 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
339 return (&l3[pmap_l3_index(va)]);
342 static __inline pt_entry_t *
343 pmap_l3(pmap_t pmap, vm_offset_t va)
347 l2 = pmap_l2(pmap, va);
350 if ((pmap_load(l2) & PTE_V) == 0)
352 if ((pmap_load(l2) & PTE_RX) != 0)
355 return (pmap_l2_to_l3(l2, va));
360 pmap_is_write(pt_entry_t entry)
363 return (entry & PTE_W);
367 pmap_is_current(pmap_t pmap)
370 return ((pmap == pmap_kernel()) ||
371 (pmap == curthread->td_proc->p_vmspace->vm_map.pmap));
375 pmap_l3_valid(pt_entry_t l3)
382 pmap_l3_valid_cacheable(pt_entry_t l3)
390 #define PTE_SYNC(pte) cpu_dcache_wb_range((vm_offset_t)pte, sizeof(*pte))
393 pmap_page_accessed(pt_entry_t pte)
396 return (pte & PTE_A);
399 /* Checks if the page is dirty. */
401 pmap_page_dirty(pt_entry_t pte)
404 return (pte & PTE_D);
408 pmap_resident_count_inc(pmap_t pmap, int count)
411 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
412 pmap->pm_stats.resident_count += count;
416 pmap_resident_count_dec(pmap_t pmap, int count)
419 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
420 KASSERT(pmap->pm_stats.resident_count >= count,
421 ("pmap %p resident count underflow %ld %d", pmap,
422 pmap->pm_stats.resident_count, count));
423 pmap->pm_stats.resident_count -= count;
427 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
430 struct pmap *user_pmap;
433 /* Distribute new kernel L1 entry to all the user pmaps */
434 if (pmap != kernel_pmap)
437 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
438 l1 = &user_pmap->pm_l1[l1index];
440 pmap_load_store(l1, entry);
447 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
453 l1 = (pd_entry_t *)l1pt;
454 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
456 /* Check locore has used a table L1 map */
457 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
458 ("Invalid bootstrap L1 table"));
460 /* Find the address of the L2 table */
461 l2 = (pt_entry_t *)init_pt_va;
462 *l2_slot = pmap_l2_index(va);
468 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
470 u_int l1_slot, l2_slot;
474 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
476 /* Check locore has used L2 superpages */
477 KASSERT((l2[l2_slot] & PTE_RX) != 0,
478 ("Invalid bootstrap L2 table"));
480 /* L2 is superpages */
481 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
482 ret += (va & L2_OFFSET);
488 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
497 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
498 va = DMAP_MIN_ADDRESS;
499 l1 = (pd_entry_t *)kern_l1;
500 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
502 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
503 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
504 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
507 pn = (pa / PAGE_SIZE);
508 entry = (PTE_V | PTE_RWX);
509 entry |= (pn << PTE_PPN0_S);
510 pmap_load_store(&l1[l1_slot], entry);
513 /* Set the upper limit of the DMAP region */
517 cpu_dcache_wb_range((vm_offset_t)l1, PAGE_SIZE);
522 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
524 vm_offset_t l2pt, l3pt;
531 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
533 l2 = pmap_l2(kernel_pmap, va);
534 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
535 l2pt = (vm_offset_t)l2;
536 l2_slot = pmap_l2_index(va);
539 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
540 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
542 pa = pmap_early_vtophys(l1pt, l3pt);
543 pn = (pa / PAGE_SIZE);
545 entry |= (pn << PTE_PPN0_S);
546 pmap_load_store(&l2[l2_slot], entry);
551 /* Clean the L2 page table */
552 memset((void *)l3_start, 0, l3pt - l3_start);
553 cpu_dcache_wb_range(l3_start, l3pt - l3_start);
555 cpu_dcache_wb_range((vm_offset_t)l2, PAGE_SIZE);
561 * Bootstrap the system enough to run with virtual memory.
564 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
566 u_int l1_slot, l2_slot, avail_slot, map_slot, used_map_slot;
569 vm_offset_t va, freemempos;
570 vm_offset_t dpcpu, msgbufpv;
571 vm_paddr_t pa, min_pa, max_pa;
574 kern_delta = KERNBASE - kernstart;
577 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
578 printf("%lx\n", l1pt);
579 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
581 /* Set this early so we can use the pagetable walking functions */
582 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
583 PMAP_LOCK_INIT(kernel_pmap);
586 * Initialize the global pv list lock.
588 rw_init(&pvh_global_lock, "pmap pv global");
590 LIST_INIT(&allpmaps);
592 /* Assume the address we were loaded to is a valid physical address */
593 min_pa = max_pa = KERNBASE - kern_delta;
596 * Find the minimum physical address. physmap is sorted,
597 * but may contain empty ranges.
599 for (i = 0; i < (physmap_idx * 2); i += 2) {
600 if (physmap[i] == physmap[i + 1])
602 if (physmap[i] <= min_pa)
604 if (physmap[i + 1] > max_pa)
605 max_pa = physmap[i + 1];
607 printf("physmap_idx %lx\n", physmap_idx);
608 printf("min_pa %lx\n", min_pa);
609 printf("max_pa %lx\n", max_pa);
611 /* Create a direct map region early so we can use it for pa -> va */
612 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
615 pa = KERNBASE - kern_delta;
618 * Start to initialize phys_avail by copying from physmap
619 * up to the physical address KERNBASE points at.
621 map_slot = avail_slot = 0;
622 for (; map_slot < (physmap_idx * 2); map_slot += 2) {
623 if (physmap[map_slot] == physmap[map_slot + 1])
626 if (physmap[map_slot] <= pa &&
627 physmap[map_slot + 1] > pa)
630 phys_avail[avail_slot] = physmap[map_slot];
631 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
632 physmem += (phys_avail[avail_slot + 1] -
633 phys_avail[avail_slot]) >> PAGE_SHIFT;
637 /* Add the memory before the kernel */
638 if (physmap[avail_slot] < pa) {
639 phys_avail[avail_slot] = physmap[map_slot];
640 phys_avail[avail_slot + 1] = pa;
641 physmem += (phys_avail[avail_slot + 1] -
642 phys_avail[avail_slot]) >> PAGE_SHIFT;
645 used_map_slot = map_slot;
648 * Read the page table to find out what is already mapped.
649 * This assumes we have mapped a block of memory from KERNBASE
650 * using a single L1 entry.
652 l2 = pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
654 /* Sanity check the index, KERNBASE should be the first VA */
655 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
657 /* Find how many pages we have mapped */
658 for (; l2_slot < Ln_ENTRIES; l2_slot++) {
659 if ((l2[l2_slot] & PTE_V) == 0)
662 /* Check locore used L2 superpages */
663 KASSERT((l2[l2_slot] & PTE_RX) != 0,
664 ("Invalid bootstrap L2 table"));
670 va = roundup2(va, L2_SIZE);
672 freemempos = KERNBASE + kernlen;
673 freemempos = roundup2(freemempos, PAGE_SIZE);
675 /* Create the l3 tables for the early devmap */
676 freemempos = pmap_bootstrap_l3(l1pt,
677 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
681 #define alloc_pages(var, np) \
682 (var) = freemempos; \
683 freemempos += (np * PAGE_SIZE); \
684 memset((char *)(var), 0, ((np) * PAGE_SIZE));
686 /* Allocate dynamic per-cpu area. */
687 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
688 dpcpu_init((void *)dpcpu, 0);
690 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
691 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
692 msgbufp = (void *)msgbufpv;
694 virtual_avail = roundup2(freemempos, L2_SIZE);
695 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
696 kernel_vm_end = virtual_avail;
698 pa = pmap_early_vtophys(l1pt, freemempos);
700 /* Finish initialising physmap */
701 map_slot = used_map_slot;
702 for (; avail_slot < (PHYS_AVAIL_SIZE - 2) &&
703 map_slot < (physmap_idx * 2); map_slot += 2) {
704 if (physmap[map_slot] == physmap[map_slot + 1]) {
708 /* Have we used the current range? */
709 if (physmap[map_slot + 1] <= pa) {
713 /* Do we need to split the entry? */
714 if (physmap[map_slot] < pa) {
715 phys_avail[avail_slot] = pa;
716 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
718 phys_avail[avail_slot] = physmap[map_slot];
719 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
721 physmem += (phys_avail[avail_slot + 1] -
722 phys_avail[avail_slot]) >> PAGE_SHIFT;
726 phys_avail[avail_slot] = 0;
727 phys_avail[avail_slot + 1] = 0;
730 * Maxmem isn't the "maximum memory", it's one larger than the
731 * highest page of the physical address space. It should be
732 * called something like "Maxphyspage".
734 Maxmem = atop(phys_avail[avail_slot - 1]);
740 * Initialize a vm_page's machine-dependent fields.
743 pmap_page_init(vm_page_t m)
746 TAILQ_INIT(&m->md.pv_list);
747 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
751 * Initialize the pmap module.
752 * Called by vm_init, to initialize any structures that the pmap
753 * system needs to map virtual memory.
761 * Initialize the pv chunk list mutex.
763 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
766 * Initialize the pool of pv list locks.
768 for (i = 0; i < NPV_LIST_LOCKS; i++)
769 rw_init(&pv_list_locks[i], "pmap pv list");
773 * Normal, non-SMP, invalidation functions.
774 * We inline these within pmap.c for speed.
777 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
783 __asm __volatile("sfence.vma %0" :: "r" (va) : "memory");
788 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
794 __asm __volatile("sfence.vma");
799 pmap_invalidate_all(pmap_t pmap)
805 __asm __volatile("sfence.vma");
810 * Routine: pmap_extract
812 * Extract the physical page address associated
813 * with the given map/virtual_address pair.
816 pmap_extract(pmap_t pmap, vm_offset_t va)
825 * Start with the l2 tabel. We are unable to allocate
826 * pages in the l1 table.
828 l2p = pmap_l2(pmap, va);
831 if ((l2 & PTE_RX) == 0) {
832 l3p = pmap_l2_to_l3(l2p, va);
835 pa = PTE_TO_PHYS(l3);
836 pa |= (va & L3_OFFSET);
839 /* L2 is superpages */
840 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
841 pa |= (va & L2_OFFSET);
849 * Routine: pmap_extract_and_hold
851 * Atomically extract and hold the physical page
852 * with the given pmap and virtual address pair
853 * if that mapping permits the given protection.
856 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
867 l3p = pmap_l3(pmap, va);
868 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
869 if ((pmap_is_write(l3)) || ((prot & VM_PROT_WRITE) == 0)) {
870 phys = PTE_TO_PHYS(l3);
871 if (vm_page_pa_tryrelock(pmap, phys, &pa))
873 m = PHYS_TO_VM_PAGE(phys);
883 pmap_kextract(vm_offset_t va)
889 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
890 pa = DMAP_TO_PHYS(va);
892 l2 = pmap_l2(kernel_pmap, va);
894 panic("pmap_kextract: No l2");
895 if ((pmap_load(l2) & PTE_RX) != 0) {
897 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
898 pa |= (va & L2_OFFSET);
902 l3 = pmap_l2_to_l3(l2, va);
904 panic("pmap_kextract: No l3...");
905 pa = PTE_TO_PHYS(pmap_load(l3));
906 pa |= (va & PAGE_MASK);
911 /***************************************************
912 * Low level mapping routines.....
913 ***************************************************/
916 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
923 KASSERT((pa & L3_OFFSET) == 0,
924 ("pmap_kenter_device: Invalid physical address"));
925 KASSERT((sva & L3_OFFSET) == 0,
926 ("pmap_kenter_device: Invalid virtual address"));
927 KASSERT((size & PAGE_MASK) == 0,
928 ("pmap_kenter_device: Mapping is not page-sized"));
932 l3 = pmap_l3(kernel_pmap, va);
933 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
935 pn = (pa / PAGE_SIZE);
936 entry = (PTE_V | PTE_RWX);
937 entry |= (pn << PTE_PPN0_S);
938 pmap_load_store(l3, entry);
946 pmap_invalidate_range(kernel_pmap, sva, va);
950 * Remove a page from the kernel pagetables.
951 * Note: not SMP coherent.
954 pmap_kremove(vm_offset_t va)
958 l3 = pmap_l3(kernel_pmap, va);
959 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
961 if (pmap_l3_valid_cacheable(pmap_load(l3)))
962 cpu_dcache_wb_range(va, L3_SIZE);
965 pmap_invalidate_page(kernel_pmap, va);
969 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
974 KASSERT((sva & L3_OFFSET) == 0,
975 ("pmap_kremove_device: Invalid virtual address"));
976 KASSERT((size & PAGE_MASK) == 0,
977 ("pmap_kremove_device: Mapping is not page-sized"));
981 l3 = pmap_l3(kernel_pmap, va);
982 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
989 pmap_invalidate_range(kernel_pmap, sva, va);
993 * Used to map a range of physical addresses into kernel
994 * virtual address space.
996 * The value passed in '*virt' is a suggested virtual address for
997 * the mapping. Architectures which can support a direct-mapped
998 * physical to virtual region can return the appropriate address
999 * within that region, leaving '*virt' unchanged. Other
1000 * architectures should map the pages starting at '*virt' and
1001 * update '*virt' with the first usable address after the mapped
1005 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1008 return PHYS_TO_DMAP(start);
1013 * Add a list of wired pages to the kva
1014 * this routine is only used for temporary
1015 * kernel mappings that do not need to have
1016 * page modification or references recorded.
1017 * Note that old mappings are simply written
1018 * over. The page *must* be wired.
1019 * Note: SMP coherent. Uses a ranged shootdown IPI.
1022 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1032 for (i = 0; i < count; i++) {
1034 pa = VM_PAGE_TO_PHYS(m);
1035 pn = (pa / PAGE_SIZE);
1036 l3 = pmap_l3(kernel_pmap, va);
1038 entry = (PTE_V | PTE_RWX);
1039 entry |= (pn << PTE_PPN0_S);
1040 pmap_load_store(l3, entry);
1045 pmap_invalidate_range(kernel_pmap, sva, va);
1049 * This routine tears out page mappings from the
1050 * kernel -- it is meant only for temporary mappings.
1051 * Note: SMP coherent. Uses a ranged shootdown IPI.
1054 pmap_qremove(vm_offset_t sva, int count)
1059 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1062 while (count-- > 0) {
1063 l3 = pmap_l3(kernel_pmap, va);
1064 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1066 if (pmap_l3_valid_cacheable(pmap_load(l3)))
1067 cpu_dcache_wb_range(va, L3_SIZE);
1068 pmap_load_clear(l3);
1073 pmap_invalidate_range(kernel_pmap, sva, va);
1076 /***************************************************
1077 * Page table page management routines.....
1078 ***************************************************/
1080 * Schedule the specified unused page table page to be freed. Specifically,
1081 * add the page to the specified list of pages that will be released to the
1082 * physical memory manager after the TLB has been updated.
1084 static __inline void
1085 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1086 boolean_t set_PG_ZERO)
1090 m->flags |= PG_ZERO;
1092 m->flags &= ~PG_ZERO;
1093 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1097 * Decrements a page table page's wire count, which is used to record the
1098 * number of valid page table entries within the page. If the wire count
1099 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1100 * page table page was unmapped and FALSE otherwise.
1102 static inline boolean_t
1103 pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1107 if (m->wire_count == 0) {
1108 _pmap_unwire_l3(pmap, va, m, free);
1116 _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1120 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1122 * unmap the page table page
1124 if (m->pindex >= NUPDE) {
1127 l1 = pmap_l1(pmap, va);
1128 pmap_load_clear(l1);
1129 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1134 l2 = pmap_l2(pmap, va);
1135 pmap_load_clear(l2);
1138 pmap_resident_count_dec(pmap, 1);
1139 if (m->pindex < NUPDE) {
1141 /* We just released a PT, unhold the matching PD */
1144 l1 = pmap_l1(pmap, va);
1145 phys = PTE_TO_PHYS(pmap_load(l1));
1146 pdpg = PHYS_TO_VM_PAGE(phys);
1147 pmap_unwire_l3(pmap, va, pdpg, free);
1149 pmap_invalidate_page(pmap, va);
1154 * Put page on a list so that it is released after
1155 * *ALL* TLB shootdown is done
1157 pmap_add_delayed_free_list(m, free, TRUE);
1161 * After removing an l3 entry, this routine is used to
1162 * conditionally free the page, and manage the hold/wire counts.
1165 pmap_unuse_l3(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1166 struct spglist *free)
1171 if (va >= VM_MAXUSER_ADDRESS)
1173 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1175 phys = PTE_TO_PHYS(ptepde);
1177 mpte = PHYS_TO_VM_PAGE(phys);
1178 return (pmap_unwire_l3(pmap, va, mpte, free));
1182 pmap_pinit0(pmap_t pmap)
1185 PMAP_LOCK_INIT(pmap);
1186 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1187 pmap->pm_l1 = kernel_pmap->pm_l1;
1191 pmap_pinit(pmap_t pmap)
1197 * allocate the l1 page
1199 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1200 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1203 l1phys = VM_PAGE_TO_PHYS(l1pt);
1204 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1206 if ((l1pt->flags & PG_ZERO) == 0)
1207 pagezero(pmap->pm_l1);
1209 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1211 /* Install kernel pagetables */
1212 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1214 /* Add to the list of all user pmaps */
1215 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1221 * This routine is called if the desired page table page does not exist.
1223 * If page table page allocation fails, this routine may sleep before
1224 * returning NULL. It sleeps only if a lock pointer was given.
1226 * Note: If a page allocation fails at page table level two or three,
1227 * one or two pages may be held during the wait, only to be released
1228 * afterwards. This conservative approach is easily argued to avoid
1232 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1234 vm_page_t m, /*pdppg, */pdpg;
1239 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1242 * Allocate a page table page.
1244 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1245 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1246 if (lockp != NULL) {
1247 RELEASE_PV_LIST_LOCK(lockp);
1249 rw_runlock(&pvh_global_lock);
1251 rw_rlock(&pvh_global_lock);
1256 * Indicate the need to retry. While waiting, the page table
1257 * page may have been allocated.
1262 if ((m->flags & PG_ZERO) == 0)
1266 * Map the pagetable page into the process address space, if
1267 * it isn't already there.
1270 if (ptepindex >= NUPDE) {
1272 vm_pindex_t l1index;
1274 l1index = ptepindex - NUPDE;
1275 l1 = &pmap->pm_l1[l1index];
1277 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1279 entry |= (pn << PTE_PPN0_S);
1280 pmap_load_store(l1, entry);
1281 pmap_distribute_l1(pmap, l1index, entry);
1286 vm_pindex_t l1index;
1287 pd_entry_t *l1, *l2;
1289 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1290 l1 = &pmap->pm_l1[l1index];
1291 if (pmap_load(l1) == 0) {
1292 /* recurse for allocating page dir */
1293 if (_pmap_alloc_l3(pmap, NUPDE + l1index,
1295 vm_page_unwire_noq(m);
1296 vm_page_free_zero(m);
1300 phys = PTE_TO_PHYS(pmap_load(l1));
1301 pdpg = PHYS_TO_VM_PAGE(phys);
1305 phys = PTE_TO_PHYS(pmap_load(l1));
1306 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1307 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1309 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1311 entry |= (pn << PTE_PPN0_S);
1312 pmap_load_store(l2, entry);
1317 pmap_resident_count_inc(pmap, 1);
1323 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1325 vm_pindex_t ptepindex;
1331 * Calculate pagetable page index
1333 ptepindex = pmap_l2_pindex(va);
1336 * Get the page directory entry
1338 l2 = pmap_l2(pmap, va);
1341 * If the page table page is mapped, we just increment the
1342 * hold count, and activate it.
1344 if (l2 != NULL && pmap_load(l2) != 0) {
1345 phys = PTE_TO_PHYS(pmap_load(l2));
1346 m = PHYS_TO_VM_PAGE(phys);
1350 * Here if the pte page isn't mapped, or if it has been
1353 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1354 if (m == NULL && lockp != NULL)
1361 /***************************************************
1362 * Pmap allocation/deallocation routines.
1363 ***************************************************/
1366 * Release any resources held by the given physical map.
1367 * Called when a pmap initialized by pmap_pinit is being released.
1368 * Should only be called if the map contains no valid mappings.
1371 pmap_release(pmap_t pmap)
1375 KASSERT(pmap->pm_stats.resident_count == 0,
1376 ("pmap_release: pmap resident count %ld != 0",
1377 pmap->pm_stats.resident_count));
1379 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1380 vm_page_unwire_noq(m);
1381 vm_page_free_zero(m);
1383 /* Remove pmap from the allpmaps list */
1384 LIST_REMOVE(pmap, pm_list);
1386 /* Remove kernel pagetables */
1387 bzero(pmap->pm_l1, PAGE_SIZE);
1392 kvm_size(SYSCTL_HANDLER_ARGS)
1394 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1396 return sysctl_handle_long(oidp, &ksize, 0, req);
1398 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1399 0, 0, kvm_size, "LU", "Size of KVM");
1402 kvm_free(SYSCTL_HANDLER_ARGS)
1404 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1406 return sysctl_handle_long(oidp, &kfree, 0, req);
1408 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1409 0, 0, kvm_free, "LU", "Amount of KVM free");
1413 * grow the number of kernel page table entries, if needed
1416 pmap_growkernel(vm_offset_t addr)
1420 pd_entry_t *l1, *l2;
1424 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1426 addr = roundup2(addr, L2_SIZE);
1427 if (addr - 1 >= vm_map_max(kernel_map))
1428 addr = vm_map_max(kernel_map);
1429 while (kernel_vm_end < addr) {
1430 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1431 if (pmap_load(l1) == 0) {
1432 /* We need a new PDP entry */
1433 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1434 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1435 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1437 panic("pmap_growkernel: no memory to grow kernel");
1438 if ((nkpg->flags & PG_ZERO) == 0)
1439 pmap_zero_page(nkpg);
1440 paddr = VM_PAGE_TO_PHYS(nkpg);
1442 pn = (paddr / PAGE_SIZE);
1444 entry |= (pn << PTE_PPN0_S);
1445 pmap_load_store(l1, entry);
1446 pmap_distribute_l1(kernel_pmap,
1447 pmap_l1_index(kernel_vm_end), entry);
1450 continue; /* try again */
1452 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1453 if ((pmap_load(l2) & PTE_A) != 0) {
1454 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1455 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1456 kernel_vm_end = vm_map_max(kernel_map);
1462 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1463 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1466 panic("pmap_growkernel: no memory to grow kernel");
1467 if ((nkpg->flags & PG_ZERO) == 0) {
1468 pmap_zero_page(nkpg);
1470 paddr = VM_PAGE_TO_PHYS(nkpg);
1472 pn = (paddr / PAGE_SIZE);
1474 entry |= (pn << PTE_PPN0_S);
1475 pmap_load_store(l2, entry);
1478 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1480 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1481 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1482 kernel_vm_end = vm_map_max(kernel_map);
1489 /***************************************************
1490 * page management routines.
1491 ***************************************************/
1493 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1494 CTASSERT(_NPCM == 3);
1495 CTASSERT(_NPCPV == 168);
1497 static __inline struct pv_chunk *
1498 pv_to_chunk(pv_entry_t pv)
1501 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1504 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1506 #define PC_FREE0 0xfffffffffffffffful
1507 #define PC_FREE1 0xfffffffffffffffful
1508 #define PC_FREE2 0x000000fffffffffful
1510 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1514 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1516 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1517 "Current number of pv entry chunks");
1518 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1519 "Current number of pv entry chunks allocated");
1520 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1521 "Current number of pv entry chunks frees");
1522 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1523 "Number of times tried to get a chunk page but failed.");
1525 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1526 static int pv_entry_spare;
1528 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1529 "Current number of pv entry frees");
1530 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1531 "Current number of pv entry allocs");
1532 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1533 "Current number of pv entries");
1534 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1535 "Current number of spare pv entries");
1540 * We are in a serious low memory condition. Resort to
1541 * drastic measures to free some pages so we can allocate
1542 * another pv entry chunk.
1544 * Returns NULL if PV entries were reclaimed from the specified pmap.
1546 * We do not, however, unmap 2mpages because subsequent accesses will
1547 * allocate per-page pv entries until repromotion occurs, thereby
1548 * exacerbating the shortage of free pv entries.
1551 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1554 panic("RISCVTODO: reclaim_pv_chunk");
1558 * free the pv_entry back to the free list
1561 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1563 struct pv_chunk *pc;
1564 int idx, field, bit;
1566 rw_assert(&pvh_global_lock, RA_LOCKED);
1567 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1568 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1569 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1570 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1571 pc = pv_to_chunk(pv);
1572 idx = pv - &pc->pc_pventry[0];
1575 pc->pc_map[field] |= 1ul << bit;
1576 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1577 pc->pc_map[2] != PC_FREE2) {
1578 /* 98% of the time, pc is already at the head of the list. */
1579 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1580 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1581 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1585 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1590 free_pv_chunk(struct pv_chunk *pc)
1594 mtx_lock(&pv_chunks_mutex);
1595 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1596 mtx_unlock(&pv_chunks_mutex);
1597 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1598 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1599 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1600 /* entire chunk is free, return it */
1601 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1602 #if 0 /* TODO: For minidump */
1603 dump_drop_page(m->phys_addr);
1605 vm_page_unwire(m, PQ_NONE);
1610 * Returns a new PV entry, allocating a new PV chunk from the system when
1611 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1612 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1615 * The given PV list lock may be released.
1618 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1622 struct pv_chunk *pc;
1625 rw_assert(&pvh_global_lock, RA_LOCKED);
1626 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1627 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1629 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1631 for (field = 0; field < _NPCM; field++) {
1632 if (pc->pc_map[field]) {
1633 bit = ffsl(pc->pc_map[field]) - 1;
1637 if (field < _NPCM) {
1638 pv = &pc->pc_pventry[field * 64 + bit];
1639 pc->pc_map[field] &= ~(1ul << bit);
1640 /* If this was the last item, move it to tail */
1641 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1642 pc->pc_map[2] == 0) {
1643 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1644 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1647 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1648 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1652 /* No free items, allocate another chunk */
1653 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1656 if (lockp == NULL) {
1657 PV_STAT(pc_chunk_tryfail++);
1660 m = reclaim_pv_chunk(pmap, lockp);
1664 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1665 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1666 #if 0 /* TODO: This is for minidump */
1667 dump_add_page(m->phys_addr);
1669 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1671 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1672 pc->pc_map[1] = PC_FREE1;
1673 pc->pc_map[2] = PC_FREE2;
1674 mtx_lock(&pv_chunks_mutex);
1675 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1676 mtx_unlock(&pv_chunks_mutex);
1677 pv = &pc->pc_pventry[0];
1678 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1679 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1680 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1685 * First find and then remove the pv entry for the specified pmap and virtual
1686 * address from the specified pv list. Returns the pv entry if found and NULL
1687 * otherwise. This operation can be performed on pv lists for either 4KB or
1688 * 2MB page mappings.
1690 static __inline pv_entry_t
1691 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1695 rw_assert(&pvh_global_lock, RA_LOCKED);
1696 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1697 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1698 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1707 * First find and then destroy the pv entry for the specified pmap and virtual
1708 * address. This operation can be performed on pv lists for either 4KB or 2MB
1712 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1716 pv = pmap_pvh_remove(pvh, pmap, va);
1718 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
1719 free_pv_entry(pmap, pv);
1723 * Conditionally create the PV entry for a 4KB page mapping if the required
1724 * memory can be allocated without resorting to reclamation.
1727 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1728 struct rwlock **lockp)
1732 rw_assert(&pvh_global_lock, RA_LOCKED);
1733 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1734 /* Pass NULL instead of the lock pointer to disable reclamation. */
1735 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1737 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1738 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1746 * pmap_remove_l3: do the things to unmap a page in a process
1749 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
1750 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
1756 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1757 if (pmap_is_current(pmap) && pmap_l3_valid_cacheable(pmap_load(l3)))
1758 cpu_dcache_wb_range(va, L3_SIZE);
1759 old_l3 = pmap_load_clear(l3);
1761 pmap_invalidate_page(pmap, va);
1762 if (old_l3 & PTE_SW_WIRED)
1763 pmap->pm_stats.wired_count -= 1;
1764 pmap_resident_count_dec(pmap, 1);
1765 if (old_l3 & PTE_SW_MANAGED) {
1766 phys = PTE_TO_PHYS(old_l3);
1767 m = PHYS_TO_VM_PAGE(phys);
1768 if (pmap_page_dirty(old_l3))
1771 vm_page_aflag_set(m, PGA_REFERENCED);
1772 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1773 pmap_pvh_free(&m->md, pmap, va);
1776 return (pmap_unuse_l3(pmap, va, l2e, free));
1780 * Remove the given range of addresses from the specified map.
1782 * It is assumed that the start and end are properly
1783 * rounded to the page size.
1786 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1788 struct rwlock *lock;
1789 vm_offset_t va, va_next;
1790 pd_entry_t *l1, *l2;
1791 pt_entry_t l3_pte, *l3;
1792 struct spglist free;
1795 * Perform an unsynchronized read. This is, however, safe.
1797 if (pmap->pm_stats.resident_count == 0)
1802 rw_rlock(&pvh_global_lock);
1806 for (; sva < eva; sva = va_next) {
1807 if (pmap->pm_stats.resident_count == 0)
1810 l1 = pmap_l1(pmap, sva);
1811 if (pmap_load(l1) == 0) {
1812 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1819 * Calculate index for next page table.
1821 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1825 l2 = pmap_l1_to_l2(l1, sva);
1829 l3_pte = pmap_load(l2);
1832 * Weed out invalid mappings.
1836 if ((pmap_load(l2) & PTE_RX) != 0)
1840 * Limit our scan to either the end of the va represented
1841 * by the current page table page, or to the end of the
1842 * range being removed.
1848 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1851 panic("l3 == NULL");
1852 if (pmap_load(l3) == 0) {
1853 if (va != va_next) {
1854 pmap_invalidate_range(pmap, va, sva);
1861 if (pmap_remove_l3(pmap, l3, sva, l3_pte, &free,
1868 pmap_invalidate_range(pmap, va, sva);
1872 rw_runlock(&pvh_global_lock);
1874 vm_page_free_pages_toq(&free, false);
1878 * Routine: pmap_remove_all
1880 * Removes this physical page from
1881 * all physical maps in which it resides.
1882 * Reflects back modify bits to the pager.
1885 * Original versions of this routine were very
1886 * inefficient because they iteratively called
1887 * pmap_remove (slow...)
1891 pmap_remove_all(vm_page_t m)
1895 pt_entry_t *l3, tl3;
1896 pd_entry_t *l2, tl2;
1897 struct spglist free;
1899 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1900 ("pmap_remove_all: page %p is not managed", m));
1902 rw_wlock(&pvh_global_lock);
1903 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1906 pmap_resident_count_dec(pmap, 1);
1907 l2 = pmap_l2(pmap, pv->pv_va);
1908 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
1909 tl2 = pmap_load(l2);
1911 KASSERT((tl2 & PTE_RX) == 0,
1912 ("pmap_remove_all: found a table when expecting "
1913 "a block in %p's pv list", m));
1915 l3 = pmap_l2_to_l3(l2, pv->pv_va);
1916 if (pmap_is_current(pmap) &&
1917 pmap_l3_valid_cacheable(pmap_load(l3)))
1918 cpu_dcache_wb_range(pv->pv_va, L3_SIZE);
1919 tl3 = pmap_load_clear(l3);
1921 pmap_invalidate_page(pmap, pv->pv_va);
1922 if (tl3 & PTE_SW_WIRED)
1923 pmap->pm_stats.wired_count--;
1924 if ((tl3 & PTE_A) != 0)
1925 vm_page_aflag_set(m, PGA_REFERENCED);
1928 * Update the vm_page_t clean and reference bits.
1930 if (pmap_page_dirty(tl3))
1932 pmap_unuse_l3(pmap, pv->pv_va, pmap_load(l2), &free);
1933 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
1935 free_pv_entry(pmap, pv);
1938 vm_page_aflag_clear(m, PGA_WRITEABLE);
1939 rw_wunlock(&pvh_global_lock);
1940 vm_page_free_pages_toq(&free, false);
1944 * Set the physical protection on the
1945 * specified range of this map as requested.
1948 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1950 vm_offset_t va, va_next;
1951 pd_entry_t *l1, *l2;
1952 pt_entry_t *l3p, l3;
1955 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1956 pmap_remove(pmap, sva, eva);
1960 if ((prot & VM_PROT_WRITE) == VM_PROT_WRITE)
1964 for (; sva < eva; sva = va_next) {
1966 l1 = pmap_l1(pmap, sva);
1967 if (pmap_load(l1) == 0) {
1968 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1974 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1978 l2 = pmap_l1_to_l2(l1, sva);
1981 if (pmap_load(l2) == 0)
1983 if ((pmap_load(l2) & PTE_RX) != 0)
1990 for (l3p = pmap_l2_to_l3(l2, sva); sva != va_next; l3p++,
1992 l3 = pmap_load(l3p);
1993 if (pmap_l3_valid(l3)) {
1994 entry = pmap_load(l3p);
1996 pmap_load_store(l3p, entry);
1998 /* XXX: Use pmap_invalidate_range */
1999 pmap_invalidate_page(pmap, sva);
2007 * Insert the given physical page (p) at
2008 * the specified virtual address (v) in the
2009 * target physical map with the protection requested.
2011 * If specified, the page will be wired down, meaning
2012 * that the related pte can not be reclaimed.
2014 * NB: This is the only routine which MAY NOT lazy-evaluate
2015 * or lose information. That is, this routine must actually
2016 * insert this page into the given map NOW.
2019 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2020 u_int flags, int8_t psind __unused)
2022 struct rwlock *lock;
2023 pd_entry_t *l1, *l2;
2024 pt_entry_t new_l3, orig_l3;
2027 vm_paddr_t opa, pa, l2_pa, l3_pa;
2028 vm_page_t mpte, om, l2_m, l3_m;
2035 va = trunc_page(va);
2036 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2037 VM_OBJECT_ASSERT_LOCKED(m->object);
2038 pa = VM_PAGE_TO_PHYS(m);
2039 pn = (pa / PAGE_SIZE);
2041 new_l3 = PTE_V | PTE_R | PTE_X;
2042 if (prot & VM_PROT_WRITE)
2044 if ((va >> 63) == 0)
2047 new_l3 |= (pn << PTE_PPN0_S);
2048 if ((flags & PMAP_ENTER_WIRED) != 0)
2049 new_l3 |= PTE_SW_WIRED;
2050 if ((m->oflags & VPO_UNMANAGED) == 0)
2051 new_l3 |= PTE_SW_MANAGED;
2053 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2058 rw_rlock(&pvh_global_lock);
2061 if (va < VM_MAXUSER_ADDRESS) {
2062 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2063 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2064 if (mpte == NULL && nosleep) {
2065 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2068 rw_runlock(&pvh_global_lock);
2070 return (KERN_RESOURCE_SHORTAGE);
2072 l3 = pmap_l3(pmap, va);
2074 l3 = pmap_l3(pmap, va);
2075 /* TODO: This is not optimal, but should mostly work */
2077 l2 = pmap_l2(pmap, va);
2079 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2080 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2083 panic("pmap_enter: l2 pte_m == NULL");
2084 if ((l2_m->flags & PG_ZERO) == 0)
2085 pmap_zero_page(l2_m);
2087 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2088 l2_pn = (l2_pa / PAGE_SIZE);
2090 l1 = pmap_l1(pmap, va);
2092 entry |= (l2_pn << PTE_PPN0_S);
2093 pmap_load_store(l1, entry);
2094 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2097 l2 = pmap_l1_to_l2(l1, va);
2101 ("No l2 table after allocating one"));
2103 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2104 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2106 panic("pmap_enter: l3 pte_m == NULL");
2107 if ((l3_m->flags & PG_ZERO) == 0)
2108 pmap_zero_page(l3_m);
2110 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2111 l3_pn = (l3_pa / PAGE_SIZE);
2113 entry |= (l3_pn << PTE_PPN0_S);
2114 pmap_load_store(l2, entry);
2116 l3 = pmap_l2_to_l3(l2, va);
2118 pmap_invalidate_page(pmap, va);
2121 orig_l3 = pmap_load(l3);
2122 opa = PTE_TO_PHYS(orig_l3);
2126 * Is the specified virtual address already mapped?
2128 if (pmap_l3_valid(orig_l3)) {
2130 * Wiring change, just update stats. We don't worry about
2131 * wiring PT pages as they remain resident as long as there
2132 * are valid mappings in them. Hence, if a user page is wired,
2133 * the PT page will be also.
2135 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2136 (orig_l3 & PTE_SW_WIRED) == 0)
2137 pmap->pm_stats.wired_count++;
2138 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2139 (orig_l3 & PTE_SW_WIRED) != 0)
2140 pmap->pm_stats.wired_count--;
2143 * Remove the extra PT page reference.
2147 KASSERT(mpte->wire_count > 0,
2148 ("pmap_enter: missing reference to page table page,"
2153 * Has the physical page changed?
2157 * No, might be a protection or wiring change.
2159 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2160 if (pmap_is_write(new_l3))
2161 vm_page_aflag_set(m, PGA_WRITEABLE);
2166 /* Flush the cache, there might be uncommitted data in it */
2167 if (pmap_is_current(pmap) && pmap_l3_valid_cacheable(orig_l3))
2168 cpu_dcache_wb_range(va, L3_SIZE);
2171 * The physical page has changed. Temporarily invalidate
2172 * the mapping. This ensures that all threads sharing the
2173 * pmap keep a consistent view of the mapping, which is
2174 * necessary for the correct handling of COW faults. It
2175 * also permits reuse of the old mapping's PV entry,
2176 * avoiding an allocation.
2178 * For consistency, handle unmanaged mappings the same way.
2180 orig_l3 = pmap_load_clear(l3);
2181 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2182 ("pmap_enter: unexpected pa update for %#lx", va));
2183 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2184 om = PHYS_TO_VM_PAGE(opa);
2187 * The pmap lock is sufficient to synchronize with
2188 * concurrent calls to pmap_page_test_mappings() and
2189 * pmap_ts_referenced().
2191 if (pmap_page_dirty(orig_l3))
2193 if ((orig_l3 & PTE_A) != 0)
2194 vm_page_aflag_set(om, PGA_REFERENCED);
2195 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2196 pv = pmap_pvh_remove(&om->md, pmap, va);
2197 if ((new_l3 & PTE_SW_MANAGED) == 0)
2198 free_pv_entry(pmap, pv);
2199 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2200 TAILQ_EMPTY(&om->md.pv_list))
2201 vm_page_aflag_clear(om, PGA_WRITEABLE);
2203 pmap_invalidate_page(pmap, va);
2207 * Increment the counters.
2209 if ((new_l3 & PTE_SW_WIRED) != 0)
2210 pmap->pm_stats.wired_count++;
2211 pmap_resident_count_inc(pmap, 1);
2214 * Enter on the PV list if part of our managed memory.
2216 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2218 pv = get_pv_entry(pmap, &lock);
2221 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2222 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2224 if (pmap_is_write(new_l3))
2225 vm_page_aflag_set(m, PGA_WRITEABLE);
2229 * Update the L3 entry.
2233 orig_l3 = pmap_load_store(l3, new_l3);
2235 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2236 ("pmap_enter: invalid update"));
2237 if (pmap_page_dirty(orig_l3) &&
2238 (orig_l3 & PTE_SW_MANAGED) != 0)
2241 pmap_load_store(l3, new_l3);
2244 pmap_invalidate_page(pmap, va);
2245 if ((pmap != pmap_kernel()) && (pmap == &curproc->p_vmspace->vm_pmap))
2246 cpu_icache_sync_range(va, PAGE_SIZE);
2250 rw_runlock(&pvh_global_lock);
2252 return (KERN_SUCCESS);
2256 * Maps a sequence of resident pages belonging to the same object.
2257 * The sequence begins with the given page m_start. This page is
2258 * mapped at the given virtual address start. Each subsequent page is
2259 * mapped at a virtual address that is offset from start by the same
2260 * amount as the page is offset from m_start within the object. The
2261 * last page in the sequence is the page with the largest offset from
2262 * m_start that can be mapped at a virtual address less than the given
2263 * virtual address end. Not every virtual page between start and end
2264 * is mapped; only those for which a resident page exists with the
2265 * corresponding offset from m_start are mapped.
2268 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2269 vm_page_t m_start, vm_prot_t prot)
2271 struct rwlock *lock;
2274 vm_pindex_t diff, psize;
2276 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2278 psize = atop(end - start);
2282 rw_rlock(&pvh_global_lock);
2284 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2285 va = start + ptoa(diff);
2286 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte, &lock);
2287 m = TAILQ_NEXT(m, listq);
2291 rw_runlock(&pvh_global_lock);
2296 * this code makes some *MAJOR* assumptions:
2297 * 1. Current pmap & pmap exists.
2300 * 4. No page table pages.
2301 * but is *MUCH* faster than pmap_enter...
2305 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2307 struct rwlock *lock;
2310 rw_rlock(&pvh_global_lock);
2312 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
2315 rw_runlock(&pvh_global_lock);
2320 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2321 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
2323 struct spglist free;
2331 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2332 (m->oflags & VPO_UNMANAGED) != 0,
2333 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2334 rw_assert(&pvh_global_lock, RA_LOCKED);
2335 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2337 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
2339 * In the case that a page table page is not
2340 * resident, we are creating it here.
2342 if (va < VM_MAXUSER_ADDRESS) {
2343 vm_pindex_t l2pindex;
2346 * Calculate pagetable page index
2348 l2pindex = pmap_l2_pindex(va);
2349 if (mpte && (mpte->pindex == l2pindex)) {
2355 l2 = pmap_l2(pmap, va);
2358 * If the page table page is mapped, we just increment
2359 * the hold count, and activate it. Otherwise, we
2360 * attempt to allocate a page table page. If this
2361 * attempt fails, we don't retry. Instead, we give up.
2363 if (l2 != NULL && pmap_load(l2) != 0) {
2364 phys = PTE_TO_PHYS(pmap_load(l2));
2365 mpte = PHYS_TO_VM_PAGE(phys);
2369 * Pass NULL instead of the PV list lock
2370 * pointer, because we don't intend to sleep.
2372 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
2377 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
2378 l3 = &l3[pmap_l3_index(va)];
2381 l3 = pmap_l3(kernel_pmap, va);
2384 panic("pmap_enter_quick_locked: No l3");
2385 if (pmap_load(l3) != 0) {
2394 * Enter on the PV list if part of our managed memory.
2396 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2397 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
2400 if (pmap_unwire_l3(pmap, va, mpte, &free)) {
2401 pmap_invalidate_page(pmap, va);
2402 vm_page_free_pages_toq(&free, false);
2410 * Increment counters
2412 pmap_resident_count_inc(pmap, 1);
2414 pa = VM_PAGE_TO_PHYS(m);
2415 pn = (pa / PAGE_SIZE);
2417 /* RISCVTODO: check permissions */
2418 entry = (PTE_V | PTE_RWX);
2419 entry |= (pn << PTE_PPN0_S);
2422 * Now validate mapping with RO protection
2424 if ((m->oflags & VPO_UNMANAGED) == 0)
2425 entry |= PTE_SW_MANAGED;
2426 pmap_load_store(l3, entry);
2429 pmap_invalidate_page(pmap, va);
2434 * This code maps large physical mmap regions into the
2435 * processor address space. Note that some shortcuts
2436 * are taken, but the code works.
2439 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2440 vm_pindex_t pindex, vm_size_t size)
2443 VM_OBJECT_ASSERT_WLOCKED(object);
2444 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2445 ("pmap_object_init_pt: non-device object"));
2449 * Clear the wired attribute from the mappings for the specified range of
2450 * addresses in the given pmap. Every valid mapping within that range
2451 * must have the wired attribute set. In contrast, invalid mappings
2452 * cannot have the wired attribute set, so they are ignored.
2454 * The wired attribute of the page table entry is not a hardware feature,
2455 * so there is no need to invalidate any TLB entries.
2458 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2460 vm_offset_t va_next;
2461 pd_entry_t *l1, *l2;
2463 boolean_t pv_lists_locked;
2465 pv_lists_locked = FALSE;
2467 for (; sva < eva; sva = va_next) {
2468 l1 = pmap_l1(pmap, sva);
2469 if (pmap_load(l1) == 0) {
2470 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2476 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2480 l2 = pmap_l1_to_l2(l1, sva);
2481 if (pmap_load(l2) == 0)
2486 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2488 if (pmap_load(l3) == 0)
2490 if ((pmap_load(l3) & PTE_SW_WIRED) == 0)
2491 panic("pmap_unwire: l3 %#jx is missing "
2492 "PTE_SW_WIRED", (uintmax_t)*l3);
2495 * PG_W must be cleared atomically. Although the pmap
2496 * lock synchronizes access to PG_W, another processor
2497 * could be setting PG_M and/or PG_A concurrently.
2499 atomic_clear_long(l3, PTE_SW_WIRED);
2500 pmap->pm_stats.wired_count--;
2503 if (pv_lists_locked)
2504 rw_runlock(&pvh_global_lock);
2509 * Copy the range specified by src_addr/len
2510 * from the source map to the range dst_addr/len
2511 * in the destination map.
2513 * This routine is only advisory and need not do anything.
2517 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2518 vm_offset_t src_addr)
2524 * pmap_zero_page zeros the specified hardware page by mapping
2525 * the page into KVM and using bzero to clear its contents.
2528 pmap_zero_page(vm_page_t m)
2530 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2532 pagezero((void *)va);
2536 * pmap_zero_page_area zeros the specified hardware page by mapping
2537 * the page into KVM and using bzero to clear its contents.
2539 * off and size may not cover an area beyond a single hardware page.
2542 pmap_zero_page_area(vm_page_t m, int off, int size)
2544 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2546 if (off == 0 && size == PAGE_SIZE)
2547 pagezero((void *)va);
2549 bzero((char *)va + off, size);
2553 * pmap_copy_page copies the specified (machine independent)
2554 * page by mapping the page into virtual memory and using
2555 * bcopy to copy the page, one machine dependent page at a
2559 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2561 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2562 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2564 pagecopy((void *)src, (void *)dst);
2567 int unmapped_buf_allowed = 1;
2570 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2571 vm_offset_t b_offset, int xfersize)
2575 vm_paddr_t p_a, p_b;
2576 vm_offset_t a_pg_offset, b_pg_offset;
2579 while (xfersize > 0) {
2580 a_pg_offset = a_offset & PAGE_MASK;
2581 m_a = ma[a_offset >> PAGE_SHIFT];
2582 p_a = m_a->phys_addr;
2583 b_pg_offset = b_offset & PAGE_MASK;
2584 m_b = mb[b_offset >> PAGE_SHIFT];
2585 p_b = m_b->phys_addr;
2586 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2587 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2588 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
2589 panic("!DMAP a %lx", p_a);
2591 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
2593 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
2594 panic("!DMAP b %lx", p_b);
2596 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
2598 bcopy(a_cp, b_cp, cnt);
2606 pmap_quick_enter_page(vm_page_t m)
2609 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
2613 pmap_quick_remove_page(vm_offset_t addr)
2618 * Returns true if the pmap's pv is one of the first
2619 * 16 pvs linked to from this page. This count may
2620 * be changed upwards or downwards in the future; it
2621 * is only necessary that true be returned for a small
2622 * subset of pmaps for proper page aging.
2625 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2627 struct rwlock *lock;
2632 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2633 ("pmap_page_exists_quick: page %p is not managed", m));
2635 rw_rlock(&pvh_global_lock);
2636 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2638 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2639 if (PV_PMAP(pv) == pmap) {
2648 rw_runlock(&pvh_global_lock);
2653 * pmap_page_wired_mappings:
2655 * Return the number of managed mappings to the given physical page
2659 pmap_page_wired_mappings(vm_page_t m)
2661 struct rwlock *lock;
2667 if ((m->oflags & VPO_UNMANAGED) != 0)
2669 rw_rlock(&pvh_global_lock);
2670 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2674 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2676 if (!PMAP_TRYLOCK(pmap)) {
2677 md_gen = m->md.pv_gen;
2681 if (md_gen != m->md.pv_gen) {
2686 l3 = pmap_l3(pmap, pv->pv_va);
2687 if (l3 != NULL && (pmap_load(l3) & PTE_SW_WIRED) != 0)
2692 rw_runlock(&pvh_global_lock);
2697 * Destroy all managed, non-wired mappings in the given user-space
2698 * pmap. This pmap cannot be active on any processor besides the
2701 * This function cannot be applied to the kernel pmap. Moreover, it
2702 * is not intended for general use. It is only to be used during
2703 * process termination. Consequently, it can be implemented in ways
2704 * that make it faster than pmap_remove(). First, it can more quickly
2705 * destroy mappings by iterating over the pmap's collection of PV
2706 * entries, rather than searching the page table. Second, it doesn't
2707 * have to test and clear the page table entries atomically, because
2708 * no processor is currently accessing the user address space. In
2709 * particular, a page table entry's dirty bit won't change state once
2710 * this function starts.
2713 pmap_remove_pages(pmap_t pmap)
2715 pd_entry_t ptepde, *l2;
2716 pt_entry_t *l3, tl3;
2717 struct spglist free;
2720 struct pv_chunk *pc, *npc;
2721 struct rwlock *lock;
2723 uint64_t inuse, bitmask;
2724 int allfree, field, freed, idx;
2730 rw_rlock(&pvh_global_lock);
2732 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2735 for (field = 0; field < _NPCM; field++) {
2736 inuse = ~pc->pc_map[field] & pc_freemask[field];
2737 while (inuse != 0) {
2738 bit = ffsl(inuse) - 1;
2739 bitmask = 1UL << bit;
2740 idx = field * 64 + bit;
2741 pv = &pc->pc_pventry[idx];
2744 l2 = pmap_l2(pmap, pv->pv_va);
2745 ptepde = pmap_load(l2);
2746 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2747 tl3 = pmap_load(l3);
2750 * We cannot remove wired pages from a process' mapping at this time
2752 if (tl3 & PTE_SW_WIRED) {
2757 pa = PTE_TO_PHYS(tl3);
2758 m = PHYS_TO_VM_PAGE(pa);
2759 KASSERT(m->phys_addr == pa,
2760 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2761 m, (uintmax_t)m->phys_addr,
2764 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
2765 m < &vm_page_array[vm_page_array_size],
2766 ("pmap_remove_pages: bad l3 %#jx",
2769 if (pmap_is_current(pmap) &&
2770 pmap_l3_valid_cacheable(pmap_load(l3)))
2771 cpu_dcache_wb_range(pv->pv_va, L3_SIZE);
2772 pmap_load_clear(l3);
2774 pmap_invalidate_page(pmap, pv->pv_va);
2777 * Update the vm_page_t clean/reference bits.
2779 if (pmap_page_dirty(tl3))
2782 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
2785 pc->pc_map[field] |= bitmask;
2787 pmap_resident_count_dec(pmap, 1);
2788 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2791 pmap_unuse_l3(pmap, pv->pv_va, ptepde, &free);
2795 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
2796 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
2797 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
2799 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2803 pmap_invalidate_all(pmap);
2806 rw_runlock(&pvh_global_lock);
2808 vm_page_free_pages_toq(&free, false);
2812 * This is used to check if a page has been accessed or modified. As we
2813 * don't have a bit to see if it has been modified we have to assume it
2814 * has been if the page is read/write.
2817 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
2819 struct rwlock *lock;
2821 pt_entry_t *l3, mask, value;
2827 rw_rlock(&pvh_global_lock);
2828 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2831 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2833 if (!PMAP_TRYLOCK(pmap)) {
2834 md_gen = m->md.pv_gen;
2838 if (md_gen != m->md.pv_gen) {
2843 l3 = pmap_l3(pmap, pv->pv_va);
2857 mask |= ATTR_AP_RW_BIT;
2858 value |= ATTR_AP(ATTR_AP_RW);
2861 mask |= ATTR_AF | ATTR_DESCR_MASK;
2862 value |= ATTR_AF | L3_PAGE;
2866 rv = (pmap_load(l3) & mask) == value;
2873 rw_runlock(&pvh_global_lock);
2880 * Return whether or not the specified physical page was modified
2881 * in any physical maps.
2884 pmap_is_modified(vm_page_t m)
2887 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2888 ("pmap_is_modified: page %p is not managed", m));
2891 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2892 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2893 * is clear, no PTEs can have PG_M set.
2895 VM_OBJECT_ASSERT_WLOCKED(m->object);
2896 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2898 return (pmap_page_test_mappings(m, FALSE, TRUE));
2902 * pmap_is_prefaultable:
2904 * Return whether or not the specified virtual address is eligible
2908 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2915 l3 = pmap_l3(pmap, addr);
2916 if (l3 != NULL && pmap_load(l3) != 0) {
2924 * pmap_is_referenced:
2926 * Return whether or not the specified physical page was referenced
2927 * in any physical maps.
2930 pmap_is_referenced(vm_page_t m)
2933 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2934 ("pmap_is_referenced: page %p is not managed", m));
2935 return (pmap_page_test_mappings(m, TRUE, FALSE));
2939 * Clear the write and modified bits in each of the given page's mappings.
2942 pmap_remove_write(vm_page_t m)
2945 struct rwlock *lock;
2947 pt_entry_t *l3, oldl3;
2951 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2952 ("pmap_remove_write: page %p is not managed", m));
2955 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2956 * set by another thread while the object is locked. Thus,
2957 * if PGA_WRITEABLE is clear, no page table entries need updating.
2959 VM_OBJECT_ASSERT_WLOCKED(m->object);
2960 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2962 rw_rlock(&pvh_global_lock);
2963 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2966 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2968 if (!PMAP_TRYLOCK(pmap)) {
2969 md_gen = m->md.pv_gen;
2973 if (md_gen != m->md.pv_gen) {
2979 l3 = pmap_l3(pmap, pv->pv_va);
2981 oldl3 = pmap_load(l3);
2983 if (pmap_is_write(oldl3)) {
2984 newl3 = oldl3 & ~(PTE_W);
2985 if (!atomic_cmpset_long(l3, oldl3, newl3))
2987 /* TODO: use pmap_page_dirty(oldl3) ? */
2988 if ((oldl3 & PTE_A) != 0)
2990 pmap_invalidate_page(pmap, pv->pv_va);
2995 vm_page_aflag_clear(m, PGA_WRITEABLE);
2996 rw_runlock(&pvh_global_lock);
2999 static __inline boolean_t
3000 safe_to_clear_referenced(pmap_t pmap, pt_entry_t pte)
3007 * pmap_ts_referenced:
3009 * Return a count of reference bits for a page, clearing those bits.
3010 * It is not necessary for every reference bit to be cleared, but it
3011 * is necessary that 0 only be returned when there are truly no
3012 * reference bits set.
3014 * As an optimization, update the page's dirty field if a modified bit is
3015 * found while counting reference bits. This opportunistic update can be
3016 * performed at low cost and can eliminate the need for some future calls
3017 * to pmap_is_modified(). However, since this function stops after
3018 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3019 * dirty pages. Those dirty pages will only be detected by a future call
3020 * to pmap_is_modified().
3023 pmap_ts_referenced(vm_page_t m)
3027 struct rwlock *lock;
3029 pt_entry_t *l3, old_l3;
3031 int cleared, md_gen, not_cleared;
3032 struct spglist free;
3034 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3035 ("pmap_ts_referenced: page %p is not managed", m));
3038 pa = VM_PAGE_TO_PHYS(m);
3039 lock = PHYS_TO_PV_LIST_LOCK(pa);
3040 rw_rlock(&pvh_global_lock);
3044 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
3051 if (!PMAP_TRYLOCK(pmap)) {
3052 md_gen = m->md.pv_gen;
3056 if (md_gen != m->md.pv_gen) {
3061 l2 = pmap_l2(pmap, pv->pv_va);
3063 KASSERT((pmap_load(l2) & PTE_RX) == 0,
3064 ("pmap_ts_referenced: found an invalid l2 table"));
3066 l3 = pmap_l2_to_l3(l2, pv->pv_va);
3067 old_l3 = pmap_load(l3);
3068 if (pmap_page_dirty(old_l3))
3070 if ((old_l3 & PTE_A) != 0) {
3071 if (safe_to_clear_referenced(pmap, old_l3)) {
3073 * TODO: We don't handle the access flag
3074 * at all. We need to be able to set it in
3075 * the exception handler.
3077 panic("RISCVTODO: safe_to_clear_referenced\n");
3078 } else if ((old_l3 & PTE_SW_WIRED) == 0) {
3080 * Wired pages cannot be paged out so
3081 * doing accessed bit emulation for
3082 * them is wasted effort. We do the
3083 * hard work for unwired pages only.
3085 pmap_remove_l3(pmap, l3, pv->pv_va,
3086 pmap_load(l2), &free, &lock);
3087 pmap_invalidate_page(pmap, pv->pv_va);
3092 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3093 ("inconsistent pv lock %p %p for page %p",
3094 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3099 /* Rotate the PV list if it has more than one entry. */
3100 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3101 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3102 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3105 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
3106 not_cleared < PMAP_TS_REFERENCED_MAX);
3109 rw_runlock(&pvh_global_lock);
3110 vm_page_free_pages_toq(&free, false);
3111 return (cleared + not_cleared);
3115 * Apply the given advice to the specified range of addresses within the
3116 * given pmap. Depending on the advice, clear the referenced and/or
3117 * modified flags in each mapping and set the mapped page's dirty field.
3120 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3125 * Clear the modify bits on the specified physical page.
3128 pmap_clear_modify(vm_page_t m)
3131 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3132 ("pmap_clear_modify: page %p is not managed", m));
3133 VM_OBJECT_ASSERT_WLOCKED(m->object);
3134 KASSERT(!vm_page_xbusied(m),
3135 ("pmap_clear_modify: page %p is exclusive busied", m));
3138 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
3139 * If the object containing the page is locked and the page is not
3140 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
3142 if ((m->aflags & PGA_WRITEABLE) == 0)
3145 /* RISCVTODO: We lack support for tracking if a page is modified */
3149 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3152 return ((void *)PHYS_TO_DMAP(pa));
3156 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
3161 * Sets the memory attribute for the specified page.
3164 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3167 m->md.pv_memattr = ma;
3170 * RISCVTODO: Implement the below (from the amd64 pmap)
3171 * If "m" is a normal page, update its direct mapping. This update
3172 * can be relied upon to perform any cache operations that are
3173 * required for data coherence.
3175 if ((m->flags & PG_FICTITIOUS) == 0 &&
3176 PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
3177 panic("RISCVTODO: pmap_page_set_memattr");
3181 * perform the pmap work for mincore
3184 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3186 pt_entry_t *l2, *l3, tpte;
3196 l2 = pmap_l2(pmap, addr);
3197 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
3198 if ((tpte & (PTE_R | PTE_W | PTE_X)) != 0) {
3199 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
3200 val = MINCORE_INCORE | MINCORE_SUPER;
3202 l3 = pmap_l2_to_l3(l2, addr);
3203 tpte = pmap_load(l3);
3204 if ((tpte & PTE_V) == 0)
3206 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
3207 val = MINCORE_INCORE;
3210 if (pmap_page_dirty(tpte))
3211 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
3212 if (pmap_page_accessed(tpte))
3213 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
3214 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
3218 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
3219 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
3220 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
3221 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
3224 PA_UNLOCK_COND(*locked_pa);
3230 pmap_activate(struct thread *td)
3236 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3237 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
3239 reg = SATP_MODE_SV39;
3240 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
3241 __asm __volatile("csrw sptbr, %0" :: "r"(reg));
3243 pmap_invalidate_all(pmap);
3248 pmap_sync_icache_one(void *arg __unused)
3251 __asm __volatile("fence.i");
3255 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3259 * From the RISC-V User-Level ISA V2.2:
3261 * "To make a store to instruction memory visible to all
3262 * RISC-V harts, the writing hart has to execute a data FENCE
3263 * before requesting that all remote RISC-V harts execute a
3266 __asm __volatile("fence");
3267 smp_rendezvous(NULL, pmap_sync_icache_one, NULL, NULL);
3271 * Increase the starting virtual address of the given mapping if a
3272 * different alignment might result in more superpage mappings.
3275 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3276 vm_offset_t *addr, vm_size_t size)
3281 * Get the kernel virtual address of a set of physical pages. If there are
3282 * physical addresses not covered by the DMAP perform a transient mapping
3283 * that will be removed when calling pmap_unmap_io_transient.
3285 * \param page The pages the caller wishes to obtain the virtual
3286 * address on the kernel memory map.
3287 * \param vaddr On return contains the kernel virtual memory address
3288 * of the pages passed in the page parameter.
3289 * \param count Number of pages passed in.
3290 * \param can_fault TRUE if the thread using the mapped pages can take
3291 * page faults, FALSE otherwise.
3293 * \returns TRUE if the caller must call pmap_unmap_io_transient when
3294 * finished or FALSE otherwise.
3298 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3299 boolean_t can_fault)
3302 boolean_t needs_mapping;
3306 * Allocate any KVA space that we need, this is done in a separate
3307 * loop to prevent calling vmem_alloc while pinned.
3309 needs_mapping = FALSE;
3310 for (i = 0; i < count; i++) {
3311 paddr = VM_PAGE_TO_PHYS(page[i]);
3312 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
3313 error = vmem_alloc(kernel_arena, PAGE_SIZE,
3314 M_BESTFIT | M_WAITOK, &vaddr[i]);
3315 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
3316 needs_mapping = TRUE;
3318 vaddr[i] = PHYS_TO_DMAP(paddr);
3322 /* Exit early if everything is covered by the DMAP */
3328 for (i = 0; i < count; i++) {
3329 paddr = VM_PAGE_TO_PHYS(page[i]);
3330 if (paddr >= DMAP_MAX_PHYSADDR) {
3332 "pmap_map_io_transient: TODO: Map out of DMAP data");
3336 return (needs_mapping);
3340 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3341 boolean_t can_fault)
3348 for (i = 0; i < count; i++) {
3349 paddr = VM_PAGE_TO_PHYS(page[i]);
3350 if (paddr >= DMAP_MAX_PHYSADDR) {
3351 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
3357 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
3360 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);