2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/proc.h>
133 #include <sys/rwlock.h>
135 #include <sys/vmem.h>
136 #include <sys/vmmeter.h>
137 #include <sys/sched.h>
138 #include <sys/sysctl.h>
142 #include <vm/vm_param.h>
143 #include <vm/vm_kern.h>
144 #include <vm/vm_page.h>
145 #include <vm/vm_map.h>
146 #include <vm/vm_object.h>
147 #include <vm/vm_extern.h>
148 #include <vm/vm_pageout.h>
149 #include <vm/vm_pager.h>
150 #include <vm/vm_phys.h>
151 #include <vm/vm_radix.h>
152 #include <vm/vm_reserv.h>
155 #include <machine/machdep.h>
156 #include <machine/md_var.h>
157 #include <machine/pcb.h>
158 #include <machine/sbi.h>
160 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
161 #define NUL2E (Ln_ENTRIES * NUL1E)
163 #if !defined(DIAGNOSTIC)
164 #ifdef __GNUC_GNU_INLINE__
165 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
167 #define PMAP_INLINE extern inline
174 #define PV_STAT(x) do { x ; } while (0)
176 #define PV_STAT(x) do { } while (0)
179 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
180 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
182 #define NPV_LIST_LOCKS MAXCPU
184 #define PHYS_TO_PV_LIST_LOCK(pa) \
185 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
187 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
188 struct rwlock **_lockp = (lockp); \
189 struct rwlock *_new_lock; \
191 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
192 if (_new_lock != *_lockp) { \
193 if (*_lockp != NULL) \
194 rw_wunlock(*_lockp); \
195 *_lockp = _new_lock; \
200 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
201 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
203 #define RELEASE_PV_LIST_LOCK(lockp) do { \
204 struct rwlock **_lockp = (lockp); \
206 if (*_lockp != NULL) { \
207 rw_wunlock(*_lockp); \
212 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
213 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
215 /* The list of all the user pmaps */
216 LIST_HEAD(pmaplist, pmap);
217 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
219 struct pmap kernel_pmap_store;
221 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
222 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
223 vm_offset_t kernel_vm_end = 0;
225 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
226 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
227 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
229 /* This code assumes all L1 DMAP entries will be used */
230 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
231 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
233 static struct rwlock_padalign pvh_global_lock;
234 static struct mtx_padalign allpmaps_lock;
236 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
237 "VM/pmap parameters");
239 static int superpages_enabled = 1;
240 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
241 CTLFLAG_RDTUN, &superpages_enabled, 0,
242 "Enable support for transparent superpages");
244 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
245 "2MB page mapping counters");
247 static u_long pmap_l2_demotions;
248 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
249 &pmap_l2_demotions, 0,
250 "2MB page demotions");
252 static u_long pmap_l2_mappings;
253 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
254 &pmap_l2_mappings, 0,
255 "2MB page mappings");
257 static u_long pmap_l2_p_failures;
258 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
259 &pmap_l2_p_failures, 0,
260 "2MB page promotion failures");
262 static u_long pmap_l2_promotions;
263 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
264 &pmap_l2_promotions, 0,
265 "2MB page promotions");
268 * Data for the pv entry allocation mechanism
270 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
271 static struct mtx pv_chunks_mutex;
272 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
273 static struct md_page *pv_table;
274 static struct md_page pv_dummy;
276 extern cpuset_t all_harts;
279 * Internal flags for pmap_enter()'s helper functions.
281 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
282 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
284 static void free_pv_chunk(struct pv_chunk *pc);
285 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
286 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
287 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
288 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
289 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
291 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
292 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
293 vm_offset_t va, struct rwlock **lockp);
294 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
295 u_int flags, vm_page_t m, struct rwlock **lockp);
296 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
297 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
298 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
299 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
300 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
301 vm_page_t m, struct rwlock **lockp);
303 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
304 struct rwlock **lockp);
306 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
307 struct spglist *free);
308 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
310 #define pmap_clear(pte) pmap_store(pte, 0)
311 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
312 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
313 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
314 #define pmap_load(pte) atomic_load_64(pte)
315 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
316 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
318 /********************/
319 /* Inline functions */
320 /********************/
323 pagecopy(void *s, void *d)
326 memcpy(d, s, PAGE_SIZE);
336 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
337 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
338 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
340 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
342 static __inline pd_entry_t *
343 pmap_l1(pmap_t pmap, vm_offset_t va)
346 return (&pmap->pm_l1[pmap_l1_index(va)]);
349 static __inline pd_entry_t *
350 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
355 phys = PTE_TO_PHYS(pmap_load(l1));
356 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
358 return (&l2[pmap_l2_index(va)]);
361 static __inline pd_entry_t *
362 pmap_l2(pmap_t pmap, vm_offset_t va)
366 l1 = pmap_l1(pmap, va);
367 if ((pmap_load(l1) & PTE_V) == 0)
369 if ((pmap_load(l1) & PTE_RX) != 0)
372 return (pmap_l1_to_l2(l1, va));
375 static __inline pt_entry_t *
376 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
381 phys = PTE_TO_PHYS(pmap_load(l2));
382 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
384 return (&l3[pmap_l3_index(va)]);
387 static __inline pt_entry_t *
388 pmap_l3(pmap_t pmap, vm_offset_t va)
392 l2 = pmap_l2(pmap, va);
395 if ((pmap_load(l2) & PTE_V) == 0)
397 if ((pmap_load(l2) & PTE_RX) != 0)
400 return (pmap_l2_to_l3(l2, va));
404 pmap_resident_count_inc(pmap_t pmap, int count)
407 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
408 pmap->pm_stats.resident_count += count;
412 pmap_resident_count_dec(pmap_t pmap, int count)
415 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
416 KASSERT(pmap->pm_stats.resident_count >= count,
417 ("pmap %p resident count underflow %ld %d", pmap,
418 pmap->pm_stats.resident_count, count));
419 pmap->pm_stats.resident_count -= count;
423 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
426 struct pmap *user_pmap;
429 /* Distribute new kernel L1 entry to all the user pmaps */
430 if (pmap != kernel_pmap)
433 mtx_lock(&allpmaps_lock);
434 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
435 l1 = &user_pmap->pm_l1[l1index];
436 pmap_store(l1, entry);
438 mtx_unlock(&allpmaps_lock);
442 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
448 l1 = (pd_entry_t *)l1pt;
449 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
451 /* Check locore has used a table L1 map */
452 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
453 ("Invalid bootstrap L1 table"));
455 /* Find the address of the L2 table */
456 l2 = (pt_entry_t *)init_pt_va;
457 *l2_slot = pmap_l2_index(va);
463 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
465 u_int l1_slot, l2_slot;
469 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
471 /* Check locore has used L2 superpages */
472 KASSERT((l2[l2_slot] & PTE_RX) != 0,
473 ("Invalid bootstrap L2 table"));
475 /* L2 is superpages */
476 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
477 ret += (va & L2_OFFSET);
483 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
492 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
493 va = DMAP_MIN_ADDRESS;
494 l1 = (pd_entry_t *)kern_l1;
495 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
497 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
498 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
499 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
502 pn = (pa / PAGE_SIZE);
504 entry |= (pn << PTE_PPN0_S);
505 pmap_store(&l1[l1_slot], entry);
508 /* Set the upper limit of the DMAP region */
516 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
525 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
527 l2 = pmap_l2(kernel_pmap, va);
528 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
529 l2_slot = pmap_l2_index(va);
532 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
533 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
535 pa = pmap_early_vtophys(l1pt, l3pt);
536 pn = (pa / PAGE_SIZE);
538 entry |= (pn << PTE_PPN0_S);
539 pmap_store(&l2[l2_slot], entry);
544 /* Clean the L2 page table */
545 memset((void *)l3_start, 0, l3pt - l3_start);
551 * Bootstrap the system enough to run with virtual memory.
554 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
556 u_int l1_slot, l2_slot, avail_slot, map_slot;
557 vm_offset_t freemempos;
558 vm_offset_t dpcpu, msgbufpv;
559 vm_paddr_t end, max_pa, min_pa, pa, start;
562 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
563 printf("%lx\n", l1pt);
564 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
566 /* Set this early so we can use the pagetable walking functions */
567 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
568 PMAP_LOCK_INIT(kernel_pmap);
570 rw_init(&pvh_global_lock, "pmap pv global");
572 CPU_FILL(&kernel_pmap->pm_active);
574 /* Assume the address we were loaded to is a valid physical address. */
575 min_pa = max_pa = kernstart;
578 * Find the minimum physical address. physmap is sorted,
579 * but may contain empty ranges.
581 for (i = 0; i < physmap_idx * 2; i += 2) {
582 if (physmap[i] == physmap[i + 1])
584 if (physmap[i] <= min_pa)
586 if (physmap[i + 1] > max_pa)
587 max_pa = physmap[i + 1];
589 printf("physmap_idx %lx\n", physmap_idx);
590 printf("min_pa %lx\n", min_pa);
591 printf("max_pa %lx\n", max_pa);
593 /* Create a direct map region early so we can use it for pa -> va */
594 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
597 * Read the page table to find out what is already mapped.
598 * This assumes we have mapped a block of memory from KERNBASE
599 * using a single L1 entry.
601 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
603 /* Sanity check the index, KERNBASE should be the first VA */
604 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
606 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
608 /* Create the l3 tables for the early devmap */
609 freemempos = pmap_bootstrap_l3(l1pt,
610 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
614 #define alloc_pages(var, np) \
615 (var) = freemempos; \
616 freemempos += (np * PAGE_SIZE); \
617 memset((char *)(var), 0, ((np) * PAGE_SIZE));
619 /* Allocate dynamic per-cpu area. */
620 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
621 dpcpu_init((void *)dpcpu, 0);
623 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
624 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
625 msgbufp = (void *)msgbufpv;
627 virtual_avail = roundup2(freemempos, L2_SIZE);
628 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
629 kernel_vm_end = virtual_avail;
631 pa = pmap_early_vtophys(l1pt, freemempos);
633 /* Initialize phys_avail and dump_avail. */
634 for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
636 start = physmap[map_slot];
637 end = physmap[map_slot + 1];
641 dump_avail[map_slot] = start;
642 dump_avail[map_slot + 1] = end;
644 if (start >= kernstart && end <= pa)
647 if (start < kernstart && end > kernstart)
649 else if (start < pa && end > pa)
651 phys_avail[avail_slot] = start;
652 phys_avail[avail_slot + 1] = end;
653 physmem += (end - start) >> PAGE_SHIFT;
656 if (end != physmap[map_slot + 1] && end > pa) {
657 phys_avail[avail_slot] = pa;
658 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
659 physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
663 phys_avail[avail_slot] = 0;
664 phys_avail[avail_slot + 1] = 0;
667 * Maxmem isn't the "maximum memory", it's one larger than the
668 * highest page of the physical address space. It should be
669 * called something like "Maxphyspage".
671 Maxmem = atop(phys_avail[avail_slot - 1]);
675 * Initialize a vm_page's machine-dependent fields.
678 pmap_page_init(vm_page_t m)
681 TAILQ_INIT(&m->md.pv_list);
682 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
686 * Initialize the pmap module.
687 * Called by vm_init, to initialize any structures that the pmap
688 * system needs to map virtual memory.
697 * Initialize the pv chunk and pmap list mutexes.
699 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
700 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
703 * Initialize the pool of pv list locks.
705 for (i = 0; i < NPV_LIST_LOCKS; i++)
706 rw_init(&pv_list_locks[i], "pmap pv list");
709 * Calculate the size of the pv head table for superpages.
711 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
714 * Allocate memory for the pv head table for superpages.
716 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
718 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
719 for (i = 0; i < pv_npg; i++)
720 TAILQ_INIT(&pv_table[i].pv_list);
721 TAILQ_INIT(&pv_dummy.pv_list);
723 if (superpages_enabled)
724 pagesizes[1] = L2_SIZE;
729 * For SMP, these functions have to use IPIs for coherence.
731 * In general, the calling thread uses a plain fence to order the
732 * writes to the page tables before invoking an SBI callback to invoke
733 * sfence_vma() on remote CPUs.
736 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
741 mask = pmap->pm_active;
742 CPU_CLR(PCPU_GET(hart), &mask);
744 if (!CPU_EMPTY(&mask) && smp_started)
745 sbi_remote_sfence_vma(mask.__bits, va, 1);
751 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
756 mask = pmap->pm_active;
757 CPU_CLR(PCPU_GET(hart), &mask);
759 if (!CPU_EMPTY(&mask) && smp_started)
760 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
763 * Might consider a loop of sfence_vma_page() for a small
764 * number of pages in the future.
771 pmap_invalidate_all(pmap_t pmap)
776 mask = pmap->pm_active;
777 CPU_CLR(PCPU_GET(hart), &mask);
780 * XXX: The SBI doc doesn't detail how to specify x0 as the
781 * address to perform a global fence. BBL currently treats
782 * all sfence_vma requests as global however.
785 if (!CPU_EMPTY(&mask) && smp_started)
786 sbi_remote_sfence_vma(mask.__bits, 0, 0);
792 * Normal, non-SMP, invalidation functions.
793 * We inline these within pmap.c for speed.
796 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
803 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
807 * Might consider a loop of sfence_vma_page() for a small
808 * number of pages in the future.
814 pmap_invalidate_all(pmap_t pmap)
822 * Routine: pmap_extract
824 * Extract the physical page address associated
825 * with the given map/virtual_address pair.
828 pmap_extract(pmap_t pmap, vm_offset_t va)
837 * Start with the l2 tabel. We are unable to allocate
838 * pages in the l1 table.
840 l2p = pmap_l2(pmap, va);
843 if ((l2 & PTE_RX) == 0) {
844 l3p = pmap_l2_to_l3(l2p, va);
847 pa = PTE_TO_PHYS(l3);
848 pa |= (va & L3_OFFSET);
851 /* L2 is superpages */
852 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
853 pa |= (va & L2_OFFSET);
861 * Routine: pmap_extract_and_hold
863 * Atomically extract and hold the physical page
864 * with the given pmap and virtual address pair
865 * if that mapping permits the given protection.
868 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
879 l3p = pmap_l3(pmap, va);
880 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
881 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
882 phys = PTE_TO_PHYS(l3);
883 if (vm_page_pa_tryrelock(pmap, phys, &pa))
885 m = PHYS_TO_VM_PAGE(phys);
895 pmap_kextract(vm_offset_t va)
901 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
902 pa = DMAP_TO_PHYS(va);
904 l2 = pmap_l2(kernel_pmap, va);
906 panic("pmap_kextract: No l2");
907 if ((pmap_load(l2) & PTE_RX) != 0) {
909 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
910 pa |= (va & L2_OFFSET);
914 l3 = pmap_l2_to_l3(l2, va);
916 panic("pmap_kextract: No l3...");
917 pa = PTE_TO_PHYS(pmap_load(l3));
918 pa |= (va & PAGE_MASK);
923 /***************************************************
924 * Low level mapping routines.....
925 ***************************************************/
928 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
935 KASSERT((pa & L3_OFFSET) == 0,
936 ("pmap_kenter_device: Invalid physical address"));
937 KASSERT((sva & L3_OFFSET) == 0,
938 ("pmap_kenter_device: Invalid virtual address"));
939 KASSERT((size & PAGE_MASK) == 0,
940 ("pmap_kenter_device: Mapping is not page-sized"));
944 l3 = pmap_l3(kernel_pmap, va);
945 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
947 pn = (pa / PAGE_SIZE);
949 entry |= (pn << PTE_PPN0_S);
950 pmap_store(l3, entry);
956 pmap_invalidate_range(kernel_pmap, sva, va);
960 * Remove a page from the kernel pagetables.
961 * Note: not SMP coherent.
964 pmap_kremove(vm_offset_t va)
968 l3 = pmap_l3(kernel_pmap, va);
969 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
976 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
981 KASSERT((sva & L3_OFFSET) == 0,
982 ("pmap_kremove_device: Invalid virtual address"));
983 KASSERT((size & PAGE_MASK) == 0,
984 ("pmap_kremove_device: Mapping is not page-sized"));
988 l3 = pmap_l3(kernel_pmap, va);
989 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
996 pmap_invalidate_range(kernel_pmap, sva, va);
1000 * Used to map a range of physical addresses into kernel
1001 * virtual address space.
1003 * The value passed in '*virt' is a suggested virtual address for
1004 * the mapping. Architectures which can support a direct-mapped
1005 * physical to virtual region can return the appropriate address
1006 * within that region, leaving '*virt' unchanged. Other
1007 * architectures should map the pages starting at '*virt' and
1008 * update '*virt' with the first usable address after the mapped
1012 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1015 return PHYS_TO_DMAP(start);
1020 * Add a list of wired pages to the kva
1021 * this routine is only used for temporary
1022 * kernel mappings that do not need to have
1023 * page modification or references recorded.
1024 * Note that old mappings are simply written
1025 * over. The page *must* be wired.
1026 * Note: SMP coherent. Uses a ranged shootdown IPI.
1029 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1039 for (i = 0; i < count; i++) {
1041 pa = VM_PAGE_TO_PHYS(m);
1042 pn = (pa / PAGE_SIZE);
1043 l3 = pmap_l3(kernel_pmap, va);
1046 entry |= (pn << PTE_PPN0_S);
1047 pmap_store(l3, entry);
1051 pmap_invalidate_range(kernel_pmap, sva, va);
1055 * This routine tears out page mappings from the
1056 * kernel -- it is meant only for temporary mappings.
1057 * Note: SMP coherent. Uses a ranged shootdown IPI.
1060 pmap_qremove(vm_offset_t sva, int count)
1065 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1067 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1068 l3 = pmap_l3(kernel_pmap, va);
1069 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1072 pmap_invalidate_range(kernel_pmap, sva, va);
1076 pmap_ps_enabled(pmap_t pmap __unused)
1079 return (superpages_enabled);
1082 /***************************************************
1083 * Page table page management routines.....
1084 ***************************************************/
1086 * Schedule the specified unused page table page to be freed. Specifically,
1087 * add the page to the specified list of pages that will be released to the
1088 * physical memory manager after the TLB has been updated.
1090 static __inline void
1091 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1092 boolean_t set_PG_ZERO)
1096 m->flags |= PG_ZERO;
1098 m->flags &= ~PG_ZERO;
1099 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1103 * Inserts the specified page table page into the specified pmap's collection
1104 * of idle page table pages. Each of a pmap's page table pages is responsible
1105 * for mapping a distinct range of virtual addresses. The pmap's collection is
1106 * ordered by this virtual address range.
1109 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3)
1112 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1113 return (vm_radix_insert(&pmap->pm_root, ml3));
1117 * Removes the page table page mapping the specified virtual address from the
1118 * specified pmap's collection of idle page table pages, and returns it.
1119 * Otherwise, returns NULL if there is no page table page corresponding to the
1120 * specified virtual address.
1122 static __inline vm_page_t
1123 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1126 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1127 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1131 * Decrements a page table page's wire count, which is used to record the
1132 * number of valid page table entries within the page. If the wire count
1133 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1134 * page table page was unmapped and FALSE otherwise.
1136 static inline boolean_t
1137 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1141 if (m->wire_count == 0) {
1142 _pmap_unwire_ptp(pmap, va, m, free);
1150 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1154 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1155 if (m->pindex >= NUL1E) {
1157 l1 = pmap_l1(pmap, va);
1159 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1162 l2 = pmap_l2(pmap, va);
1165 pmap_resident_count_dec(pmap, 1);
1166 if (m->pindex < NUL1E) {
1170 l1 = pmap_l1(pmap, va);
1171 phys = PTE_TO_PHYS(pmap_load(l1));
1172 pdpg = PHYS_TO_VM_PAGE(phys);
1173 pmap_unwire_ptp(pmap, va, pdpg, free);
1175 pmap_invalidate_page(pmap, va);
1180 * Put page on a list so that it is released after
1181 * *ALL* TLB shootdown is done
1183 pmap_add_delayed_free_list(m, free, TRUE);
1187 * After removing a page table entry, this routine is used to
1188 * conditionally free the page, and manage the hold/wire counts.
1191 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1192 struct spglist *free)
1196 if (va >= VM_MAXUSER_ADDRESS)
1198 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1199 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1200 return (pmap_unwire_ptp(pmap, va, mpte, free));
1204 pmap_pinit0(pmap_t pmap)
1207 PMAP_LOCK_INIT(pmap);
1208 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1209 pmap->pm_l1 = kernel_pmap->pm_l1;
1210 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1211 CPU_ZERO(&pmap->pm_active);
1212 pmap_activate_boot(pmap);
1216 pmap_pinit(pmap_t pmap)
1222 * allocate the l1 page
1224 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1225 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1228 l1phys = VM_PAGE_TO_PHYS(l1pt);
1229 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1230 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1232 if ((l1pt->flags & PG_ZERO) == 0)
1233 pagezero(pmap->pm_l1);
1235 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1237 CPU_ZERO(&pmap->pm_active);
1239 /* Install kernel pagetables */
1240 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1242 /* Add to the list of all user pmaps */
1243 mtx_lock(&allpmaps_lock);
1244 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1245 mtx_unlock(&allpmaps_lock);
1247 vm_radix_init(&pmap->pm_root);
1253 * This routine is called if the desired page table page does not exist.
1255 * If page table page allocation fails, this routine may sleep before
1256 * returning NULL. It sleeps only if a lock pointer was given.
1258 * Note: If a page allocation fails at page table level two or three,
1259 * one or two pages may be held during the wait, only to be released
1260 * afterwards. This conservative approach is easily argued to avoid
1264 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1266 vm_page_t m, /*pdppg, */pdpg;
1271 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1274 * Allocate a page table page.
1276 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1277 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1278 if (lockp != NULL) {
1279 RELEASE_PV_LIST_LOCK(lockp);
1281 rw_runlock(&pvh_global_lock);
1283 rw_rlock(&pvh_global_lock);
1288 * Indicate the need to retry. While waiting, the page table
1289 * page may have been allocated.
1294 if ((m->flags & PG_ZERO) == 0)
1298 * Map the pagetable page into the process address space, if
1299 * it isn't already there.
1302 if (ptepindex >= NUL1E) {
1304 vm_pindex_t l1index;
1306 l1index = ptepindex - NUL1E;
1307 l1 = &pmap->pm_l1[l1index];
1309 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1311 entry |= (pn << PTE_PPN0_S);
1312 pmap_store(l1, entry);
1313 pmap_distribute_l1(pmap, l1index, entry);
1315 vm_pindex_t l1index;
1316 pd_entry_t *l1, *l2;
1318 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1319 l1 = &pmap->pm_l1[l1index];
1320 if (pmap_load(l1) == 0) {
1321 /* recurse for allocating page dir */
1322 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1324 vm_page_unwire_noq(m);
1325 vm_page_free_zero(m);
1329 phys = PTE_TO_PHYS(pmap_load(l1));
1330 pdpg = PHYS_TO_VM_PAGE(phys);
1334 phys = PTE_TO_PHYS(pmap_load(l1));
1335 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1336 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1338 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1340 entry |= (pn << PTE_PPN0_S);
1341 pmap_store(l2, entry);
1344 pmap_resident_count_inc(pmap, 1);
1350 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1354 vm_pindex_t l2pindex;
1357 l1 = pmap_l1(pmap, va);
1358 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1359 /* Add a reference to the L2 page. */
1360 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1363 /* Allocate a L2 page. */
1364 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1365 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1366 if (l2pg == NULL && lockp != NULL)
1373 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1375 vm_pindex_t ptepindex;
1381 * Calculate pagetable page index
1383 ptepindex = pmap_l2_pindex(va);
1386 * Get the page directory entry
1388 l2 = pmap_l2(pmap, va);
1391 * If the page table page is mapped, we just increment the
1392 * hold count, and activate it.
1394 if (l2 != NULL && pmap_load(l2) != 0) {
1395 phys = PTE_TO_PHYS(pmap_load(l2));
1396 m = PHYS_TO_VM_PAGE(phys);
1400 * Here if the pte page isn't mapped, or if it has been
1403 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1404 if (m == NULL && lockp != NULL)
1411 /***************************************************
1412 * Pmap allocation/deallocation routines.
1413 ***************************************************/
1416 * Release any resources held by the given physical map.
1417 * Called when a pmap initialized by pmap_pinit is being released.
1418 * Should only be called if the map contains no valid mappings.
1421 pmap_release(pmap_t pmap)
1425 KASSERT(pmap->pm_stats.resident_count == 0,
1426 ("pmap_release: pmap resident count %ld != 0",
1427 pmap->pm_stats.resident_count));
1428 KASSERT(CPU_EMPTY(&pmap->pm_active),
1429 ("releasing active pmap %p", pmap));
1431 mtx_lock(&allpmaps_lock);
1432 LIST_REMOVE(pmap, pm_list);
1433 mtx_unlock(&allpmaps_lock);
1435 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1436 vm_page_unwire_noq(m);
1442 kvm_size(SYSCTL_HANDLER_ARGS)
1444 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1446 return sysctl_handle_long(oidp, &ksize, 0, req);
1448 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1449 0, 0, kvm_size, "LU", "Size of KVM");
1452 kvm_free(SYSCTL_HANDLER_ARGS)
1454 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1456 return sysctl_handle_long(oidp, &kfree, 0, req);
1458 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1459 0, 0, kvm_free, "LU", "Amount of KVM free");
1463 * grow the number of kernel page table entries, if needed
1466 pmap_growkernel(vm_offset_t addr)
1470 pd_entry_t *l1, *l2;
1474 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1476 addr = roundup2(addr, L2_SIZE);
1477 if (addr - 1 >= vm_map_max(kernel_map))
1478 addr = vm_map_max(kernel_map);
1479 while (kernel_vm_end < addr) {
1480 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1481 if (pmap_load(l1) == 0) {
1482 /* We need a new PDP entry */
1483 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1484 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1485 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1487 panic("pmap_growkernel: no memory to grow kernel");
1488 if ((nkpg->flags & PG_ZERO) == 0)
1489 pmap_zero_page(nkpg);
1490 paddr = VM_PAGE_TO_PHYS(nkpg);
1492 pn = (paddr / PAGE_SIZE);
1494 entry |= (pn << PTE_PPN0_S);
1495 pmap_store(l1, entry);
1496 pmap_distribute_l1(kernel_pmap,
1497 pmap_l1_index(kernel_vm_end), entry);
1498 continue; /* try again */
1500 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1501 if ((pmap_load(l2) & PTE_V) != 0 &&
1502 (pmap_load(l2) & PTE_RWX) == 0) {
1503 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1504 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1505 kernel_vm_end = vm_map_max(kernel_map);
1511 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1512 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1515 panic("pmap_growkernel: no memory to grow kernel");
1516 if ((nkpg->flags & PG_ZERO) == 0) {
1517 pmap_zero_page(nkpg);
1519 paddr = VM_PAGE_TO_PHYS(nkpg);
1521 pn = (paddr / PAGE_SIZE);
1523 entry |= (pn << PTE_PPN0_S);
1524 pmap_store(l2, entry);
1526 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1528 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1529 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1530 kernel_vm_end = vm_map_max(kernel_map);
1537 /***************************************************
1538 * page management routines.
1539 ***************************************************/
1541 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1542 CTASSERT(_NPCM == 3);
1543 CTASSERT(_NPCPV == 168);
1545 static __inline struct pv_chunk *
1546 pv_to_chunk(pv_entry_t pv)
1549 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1552 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1554 #define PC_FREE0 0xfffffffffffffffful
1555 #define PC_FREE1 0xfffffffffffffffful
1556 #define PC_FREE2 0x000000fffffffffful
1558 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1562 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1564 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1565 "Current number of pv entry chunks");
1566 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1567 "Current number of pv entry chunks allocated");
1568 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1569 "Current number of pv entry chunks frees");
1570 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1571 "Number of times tried to get a chunk page but failed.");
1573 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1574 static int pv_entry_spare;
1576 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1577 "Current number of pv entry frees");
1578 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1579 "Current number of pv entry allocs");
1580 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1581 "Current number of pv entries");
1582 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1583 "Current number of spare pv entries");
1588 * We are in a serious low memory condition. Resort to
1589 * drastic measures to free some pages so we can allocate
1590 * another pv entry chunk.
1592 * Returns NULL if PV entries were reclaimed from the specified pmap.
1594 * We do not, however, unmap 2mpages because subsequent accesses will
1595 * allocate per-page pv entries until repromotion occurs, thereby
1596 * exacerbating the shortage of free pv entries.
1599 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1602 panic("RISCVTODO: reclaim_pv_chunk");
1606 * free the pv_entry back to the free list
1609 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1611 struct pv_chunk *pc;
1612 int idx, field, bit;
1614 rw_assert(&pvh_global_lock, RA_LOCKED);
1615 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1616 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1617 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1618 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1619 pc = pv_to_chunk(pv);
1620 idx = pv - &pc->pc_pventry[0];
1623 pc->pc_map[field] |= 1ul << bit;
1624 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1625 pc->pc_map[2] != PC_FREE2) {
1626 /* 98% of the time, pc is already at the head of the list. */
1627 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1628 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1629 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1633 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1638 free_pv_chunk(struct pv_chunk *pc)
1642 mtx_lock(&pv_chunks_mutex);
1643 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1644 mtx_unlock(&pv_chunks_mutex);
1645 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1646 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1647 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1648 /* entire chunk is free, return it */
1649 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1650 dump_drop_page(m->phys_addr);
1651 vm_page_unwire(m, PQ_NONE);
1656 * Returns a new PV entry, allocating a new PV chunk from the system when
1657 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1658 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1661 * The given PV list lock may be released.
1664 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1668 struct pv_chunk *pc;
1671 rw_assert(&pvh_global_lock, RA_LOCKED);
1672 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1673 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1675 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1677 for (field = 0; field < _NPCM; field++) {
1678 if (pc->pc_map[field]) {
1679 bit = ffsl(pc->pc_map[field]) - 1;
1683 if (field < _NPCM) {
1684 pv = &pc->pc_pventry[field * 64 + bit];
1685 pc->pc_map[field] &= ~(1ul << bit);
1686 /* If this was the last item, move it to tail */
1687 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1688 pc->pc_map[2] == 0) {
1689 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1690 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1693 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1694 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1698 /* No free items, allocate another chunk */
1699 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1702 if (lockp == NULL) {
1703 PV_STAT(pc_chunk_tryfail++);
1706 m = reclaim_pv_chunk(pmap, lockp);
1710 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1711 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1712 dump_add_page(m->phys_addr);
1713 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1715 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1716 pc->pc_map[1] = PC_FREE1;
1717 pc->pc_map[2] = PC_FREE2;
1718 mtx_lock(&pv_chunks_mutex);
1719 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1720 mtx_unlock(&pv_chunks_mutex);
1721 pv = &pc->pc_pventry[0];
1722 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1723 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1724 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1729 * Ensure that the number of spare PV entries in the specified pmap meets or
1730 * exceeds the given count, "needed".
1732 * The given PV list lock may be released.
1735 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1737 struct pch new_tail;
1738 struct pv_chunk *pc;
1743 rw_assert(&pvh_global_lock, RA_LOCKED);
1744 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1745 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1748 * Newly allocated PV chunks must be stored in a private list until
1749 * the required number of PV chunks have been allocated. Otherwise,
1750 * reclaim_pv_chunk() could recycle one of these chunks. In
1751 * contrast, these chunks must be added to the pmap upon allocation.
1753 TAILQ_INIT(&new_tail);
1756 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1757 bit_count((bitstr_t *)pc->pc_map, 0,
1758 sizeof(pc->pc_map) * NBBY, &free);
1762 if (avail >= needed)
1765 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1766 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1769 m = reclaim_pv_chunk(pmap, lockp);
1776 dump_add_page(m->phys_addr);
1778 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1780 pc->pc_map[0] = PC_FREE0;
1781 pc->pc_map[1] = PC_FREE1;
1782 pc->pc_map[2] = PC_FREE2;
1783 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1784 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1787 * The reclaim might have freed a chunk from the current pmap.
1788 * If that chunk contained available entries, we need to
1789 * re-count the number of available entries.
1794 if (!TAILQ_EMPTY(&new_tail)) {
1795 mtx_lock(&pv_chunks_mutex);
1796 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1797 mtx_unlock(&pv_chunks_mutex);
1802 * First find and then remove the pv entry for the specified pmap and virtual
1803 * address from the specified pv list. Returns the pv entry if found and NULL
1804 * otherwise. This operation can be performed on pv lists for either 4KB or
1805 * 2MB page mappings.
1807 static __inline pv_entry_t
1808 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1812 rw_assert(&pvh_global_lock, RA_LOCKED);
1813 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1814 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1815 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1824 * First find and then destroy the pv entry for the specified pmap and virtual
1825 * address. This operation can be performed on pv lists for either 4KB or 2MB
1829 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1833 pv = pmap_pvh_remove(pvh, pmap, va);
1835 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1836 free_pv_entry(pmap, pv);
1840 * Conditionally create the PV entry for a 4KB page mapping if the required
1841 * memory can be allocated without resorting to reclamation.
1844 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1845 struct rwlock **lockp)
1849 rw_assert(&pvh_global_lock, RA_LOCKED);
1850 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1851 /* Pass NULL instead of the lock pointer to disable reclamation. */
1852 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1854 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1855 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1863 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1864 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1865 * entries for each of the 4KB page mappings.
1867 static void __unused
1868 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1869 struct rwlock **lockp)
1871 struct md_page *pvh;
1872 struct pv_chunk *pc;
1875 vm_offset_t va_last;
1878 rw_assert(&pvh_global_lock, RA_LOCKED);
1879 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1880 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1883 * Transfer the 2mpage's pv entry for this mapping to the first
1884 * page's pv list. Once this transfer begins, the pv list lock
1885 * must not be released until the last pv entry is reinstantiated.
1887 pvh = pa_to_pvh(pa);
1889 pv = pmap_pvh_remove(pvh, pmap, va);
1890 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1891 m = PHYS_TO_VM_PAGE(pa);
1892 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1894 /* Instantiate the remaining 511 pv entries. */
1895 va_last = va + L2_SIZE - PAGE_SIZE;
1897 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1898 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1899 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1900 for (field = 0; field < _NPCM; field++) {
1901 while (pc->pc_map[field] != 0) {
1902 bit = ffsl(pc->pc_map[field]) - 1;
1903 pc->pc_map[field] &= ~(1ul << bit);
1904 pv = &pc->pc_pventry[field * 64 + bit];
1908 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1909 ("pmap_pv_demote_l2: page %p is not managed", m));
1910 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1916 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1917 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1920 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1921 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1922 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1927 #if VM_NRESERVLEVEL > 0
1929 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1930 struct rwlock **lockp)
1932 struct md_page *pvh;
1935 vm_offset_t va_last;
1937 rw_assert(&pvh_global_lock, RA_LOCKED);
1938 KASSERT((va & L2_OFFSET) == 0,
1939 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1941 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1943 m = PHYS_TO_VM_PAGE(pa);
1944 pv = pmap_pvh_remove(&m->md, pmap, va);
1945 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1946 pvh = pa_to_pvh(pa);
1947 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1950 va_last = va + L2_SIZE - PAGE_SIZE;
1954 pmap_pvh_free(&m->md, pmap, va);
1955 } while (va < va_last);
1957 #endif /* VM_NRESERVLEVEL > 0 */
1960 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1961 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1962 * false if the PV entry cannot be allocated without resorting to reclamation.
1965 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1966 struct rwlock **lockp)
1968 struct md_page *pvh;
1972 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1973 /* Pass NULL instead of the lock pointer to disable reclamation. */
1974 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1975 NULL : lockp)) == NULL)
1978 pa = PTE_TO_PHYS(l2e);
1979 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1980 pvh = pa_to_pvh(pa);
1981 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1987 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1989 pt_entry_t newl2, oldl2;
1993 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1994 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1995 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1997 ml3 = pmap_remove_pt_page(pmap, va);
1999 panic("pmap_remove_kernel_l2: Missing pt page");
2001 ml3pa = VM_PAGE_TO_PHYS(ml3);
2002 newl2 = ml3pa | PTE_V;
2005 * Initialize the page table page.
2007 pagezero((void *)PHYS_TO_DMAP(ml3pa));
2010 * Demote the mapping.
2012 oldl2 = pmap_load_store(l2, newl2);
2013 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2014 __func__, l2, oldl2));
2018 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2021 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2022 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2024 struct md_page *pvh;
2026 vm_offset_t eva, va;
2029 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2030 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2031 oldl2 = pmap_load_clear(l2);
2032 KASSERT((oldl2 & PTE_RWX) != 0,
2033 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2036 * The sfence.vma documentation states that it is sufficient to specify
2037 * a single address within a superpage mapping. However, since we do
2038 * not perform any invalidation upon promotion, TLBs may still be
2039 * caching 4KB mappings within the superpage, so we must invalidate the
2042 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2043 if ((oldl2 & PTE_SW_WIRED) != 0)
2044 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2045 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2046 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2047 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2048 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2049 pmap_pvh_free(pvh, pmap, sva);
2050 eva = sva + L2_SIZE;
2051 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2052 va < eva; va += PAGE_SIZE, m++) {
2053 if ((oldl2 & PTE_D) != 0)
2055 if ((oldl2 & PTE_A) != 0)
2056 vm_page_aflag_set(m, PGA_REFERENCED);
2057 if (TAILQ_EMPTY(&m->md.pv_list) &&
2058 TAILQ_EMPTY(&pvh->pv_list))
2059 vm_page_aflag_clear(m, PGA_WRITEABLE);
2062 if (pmap == kernel_pmap) {
2063 pmap_remove_kernel_l2(pmap, l2, sva);
2065 ml3 = pmap_remove_pt_page(pmap, sva);
2067 pmap_resident_count_dec(pmap, 1);
2068 KASSERT(ml3->wire_count == Ln_ENTRIES,
2069 ("pmap_remove_l2: l3 page wire count error"));
2070 ml3->wire_count = 1;
2071 vm_page_unwire_noq(ml3);
2072 pmap_add_delayed_free_list(ml3, free, FALSE);
2075 return (pmap_unuse_pt(pmap, sva, l1e, free));
2079 * pmap_remove_l3: do the things to unmap a page in a process
2082 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2083 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2089 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2090 old_l3 = pmap_load_clear(l3);
2091 pmap_invalidate_page(pmap, va);
2092 if (old_l3 & PTE_SW_WIRED)
2093 pmap->pm_stats.wired_count -= 1;
2094 pmap_resident_count_dec(pmap, 1);
2095 if (old_l3 & PTE_SW_MANAGED) {
2096 phys = PTE_TO_PHYS(old_l3);
2097 m = PHYS_TO_VM_PAGE(phys);
2098 if ((old_l3 & PTE_D) != 0)
2101 vm_page_aflag_set(m, PGA_REFERENCED);
2102 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2103 pmap_pvh_free(&m->md, pmap, va);
2106 return (pmap_unuse_pt(pmap, va, l2e, free));
2110 * Remove the given range of addresses from the specified map.
2112 * It is assumed that the start and end are properly
2113 * rounded to the page size.
2116 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2118 struct spglist free;
2119 struct rwlock *lock;
2120 vm_offset_t va, va_next;
2121 pd_entry_t *l1, *l2, l2e;
2125 * Perform an unsynchronized read. This is, however, safe.
2127 if (pmap->pm_stats.resident_count == 0)
2132 rw_rlock(&pvh_global_lock);
2136 for (; sva < eva; sva = va_next) {
2137 if (pmap->pm_stats.resident_count == 0)
2140 l1 = pmap_l1(pmap, sva);
2141 if (pmap_load(l1) == 0) {
2142 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2149 * Calculate index for next page table.
2151 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2155 l2 = pmap_l1_to_l2(l1, sva);
2158 if ((l2e = pmap_load(l2)) == 0)
2160 if ((l2e & PTE_RWX) != 0) {
2161 if (sva + L2_SIZE == va_next && eva >= va_next) {
2162 (void)pmap_remove_l2(pmap, l2, sva,
2163 pmap_load(l1), &free, &lock);
2165 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2168 * The large page mapping was destroyed.
2172 l2e = pmap_load(l2);
2176 * Limit our scan to either the end of the va represented
2177 * by the current page table page, or to the end of the
2178 * range being removed.
2184 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2186 if (pmap_load(l3) == 0) {
2187 if (va != va_next) {
2188 pmap_invalidate_range(pmap, va, sva);
2195 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2201 pmap_invalidate_range(pmap, va, sva);
2205 rw_runlock(&pvh_global_lock);
2207 vm_page_free_pages_toq(&free, false);
2211 * Routine: pmap_remove_all
2213 * Removes this physical page from
2214 * all physical maps in which it resides.
2215 * Reflects back modify bits to the pager.
2218 * Original versions of this routine were very
2219 * inefficient because they iteratively called
2220 * pmap_remove (slow...)
2224 pmap_remove_all(vm_page_t m)
2226 struct spglist free;
2227 struct md_page *pvh;
2229 pt_entry_t *l3, l3e;
2230 pd_entry_t *l2, l2e;
2234 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2235 ("pmap_remove_all: page %p is not managed", m));
2237 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2238 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2240 rw_wlock(&pvh_global_lock);
2241 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2245 l2 = pmap_l2(pmap, va);
2246 (void)pmap_demote_l2(pmap, l2, va);
2249 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2252 pmap_resident_count_dec(pmap, 1);
2253 l2 = pmap_l2(pmap, pv->pv_va);
2254 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2255 l2e = pmap_load(l2);
2257 KASSERT((l2e & PTE_RX) == 0,
2258 ("pmap_remove_all: found a superpage in %p's pv list", m));
2260 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2261 l3e = pmap_load_clear(l3);
2262 pmap_invalidate_page(pmap, pv->pv_va);
2263 if (l3e & PTE_SW_WIRED)
2264 pmap->pm_stats.wired_count--;
2265 if ((l3e & PTE_A) != 0)
2266 vm_page_aflag_set(m, PGA_REFERENCED);
2269 * Update the vm_page_t clean and reference bits.
2271 if ((l3e & PTE_D) != 0)
2273 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2274 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2276 free_pv_entry(pmap, pv);
2279 vm_page_aflag_clear(m, PGA_WRITEABLE);
2280 rw_wunlock(&pvh_global_lock);
2281 vm_page_free_pages_toq(&free, false);
2285 * Set the physical protection on the
2286 * specified range of this map as requested.
2289 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2291 pd_entry_t *l1, *l2, l2e;
2292 pt_entry_t *l3, l3e, mask;
2295 vm_offset_t va, va_next;
2296 bool anychanged, pv_lists_locked;
2298 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2299 pmap_remove(pmap, sva, eva);
2303 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2304 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2308 pv_lists_locked = false;
2310 if ((prot & VM_PROT_WRITE) == 0)
2311 mask |= PTE_W | PTE_D;
2312 if ((prot & VM_PROT_EXECUTE) == 0)
2316 for (; sva < eva; sva = va_next) {
2317 l1 = pmap_l1(pmap, sva);
2318 if (pmap_load(l1) == 0) {
2319 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2325 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2329 l2 = pmap_l1_to_l2(l1, sva);
2330 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2332 if ((l2e & PTE_RWX) != 0) {
2333 if (sva + L2_SIZE == va_next && eva >= va_next) {
2335 if ((l2e & (PTE_SW_MANAGED | PTE_D)) ==
2336 (PTE_SW_MANAGED | PTE_D)) {
2337 pa = PTE_TO_PHYS(l2e);
2338 for (va = sva, m = PHYS_TO_VM_PAGE(pa);
2339 va < va_next; m++, va += PAGE_SIZE)
2342 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2346 if (!pv_lists_locked) {
2347 pv_lists_locked = true;
2348 if (!rw_try_rlock(&pvh_global_lock)) {
2350 pmap_invalidate_all(
2353 rw_rlock(&pvh_global_lock);
2357 if (!pmap_demote_l2(pmap, l2, sva)) {
2359 * The large page mapping was destroyed.
2369 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2371 l3e = pmap_load(l3);
2373 if ((l3e & PTE_V) == 0)
2375 if ((prot & VM_PROT_WRITE) == 0 &&
2376 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2377 (PTE_SW_MANAGED | PTE_D)) {
2378 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2381 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2387 pmap_invalidate_all(pmap);
2388 if (pv_lists_locked)
2389 rw_runlock(&pvh_global_lock);
2394 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2396 pd_entry_t *l2, l2e;
2397 pt_entry_t bits, *pte, oldpte;
2402 l2 = pmap_l2(pmap, va);
2403 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2405 if ((l2e & PTE_RWX) == 0) {
2406 pte = pmap_l2_to_l3(l2, va);
2407 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2414 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2415 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2416 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2417 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2421 if (ftype == VM_PROT_WRITE)
2425 * Spurious faults can occur if the implementation caches invalid
2426 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2427 * race with each other.
2429 if ((oldpte & bits) != bits)
2430 pmap_store_bits(pte, bits);
2439 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2441 struct rwlock *lock;
2445 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2452 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2453 * mapping is invalidated.
2456 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2457 struct rwlock **lockp)
2459 struct spglist free;
2461 pd_entry_t newl2, oldl2;
2462 pt_entry_t *firstl3, newl3;
2466 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2468 oldl2 = pmap_load(l2);
2469 KASSERT((oldl2 & PTE_RWX) != 0,
2470 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2471 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2473 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2474 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2475 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2478 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2479 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2480 vm_page_free_pages_toq(&free, true);
2481 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2482 "failure for va %#lx in pmap %p", va, pmap);
2485 if (va < VM_MAXUSER_ADDRESS)
2486 pmap_resident_count_inc(pmap, 1);
2488 mptepa = VM_PAGE_TO_PHYS(mpte);
2489 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2490 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2491 KASSERT((oldl2 & PTE_A) != 0,
2492 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2493 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2494 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2498 * If the page table page is new, initialize it.
2500 if (mpte->wire_count == 1) {
2501 mpte->wire_count = Ln_ENTRIES;
2502 for (i = 0; i < Ln_ENTRIES; i++)
2503 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2505 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2506 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2510 * If the mapping has changed attributes, update the page table
2513 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2514 for (i = 0; i < Ln_ENTRIES; i++)
2515 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2518 * The spare PV entries must be reserved prior to demoting the
2519 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2520 * state of the L2 entry and the PV lists will be inconsistent, which
2521 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2522 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2523 * expected PV entry for the 2MB page mapping that is being demoted.
2525 if ((oldl2 & PTE_SW_MANAGED) != 0)
2526 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2529 * Demote the mapping.
2531 pmap_store(l2, newl2);
2534 * Demote the PV entry.
2536 if ((oldl2 & PTE_SW_MANAGED) != 0)
2537 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2539 atomic_add_long(&pmap_l2_demotions, 1);
2540 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2545 #if VM_NRESERVLEVEL > 0
2547 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2548 struct rwlock **lockp)
2550 pt_entry_t *firstl3, *l3;
2554 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2557 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2558 ("pmap_promote_l2: invalid l2 entry %p", l2));
2560 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2561 pa = PTE_TO_PHYS(pmap_load(firstl3));
2562 if ((pa & L2_OFFSET) != 0) {
2563 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2565 atomic_add_long(&pmap_l2_p_failures, 1);
2570 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2571 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2573 "pmap_promote_l2: failure for va %#lx pmap %p",
2575 atomic_add_long(&pmap_l2_p_failures, 1);
2578 if ((pmap_load(l3) & PTE_PROMOTE) !=
2579 (pmap_load(firstl3) & PTE_PROMOTE)) {
2581 "pmap_promote_l2: failure for va %#lx pmap %p",
2583 atomic_add_long(&pmap_l2_p_failures, 1);
2589 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2590 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2591 ("pmap_promote_l2: page table page's pindex is wrong"));
2592 if (pmap_insert_pt_page(pmap, ml3)) {
2593 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2595 atomic_add_long(&pmap_l2_p_failures, 1);
2599 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2600 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2603 pmap_store(l2, pmap_load(firstl3));
2605 atomic_add_long(&pmap_l2_promotions, 1);
2606 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2612 * Insert the given physical page (p) at
2613 * the specified virtual address (v) in the
2614 * target physical map with the protection requested.
2616 * If specified, the page will be wired down, meaning
2617 * that the related pte can not be reclaimed.
2619 * NB: This is the only routine which MAY NOT lazy-evaluate
2620 * or lose information. That is, this routine must actually
2621 * insert this page into the given map NOW.
2624 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2625 u_int flags, int8_t psind)
2627 struct rwlock *lock;
2628 pd_entry_t *l1, *l2, l2e;
2629 pt_entry_t new_l3, orig_l3;
2632 vm_paddr_t opa, pa, l2_pa, l3_pa;
2633 vm_page_t mpte, om, l2_m, l3_m;
2635 pn_t l2_pn, l3_pn, pn;
2639 va = trunc_page(va);
2640 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2641 VM_OBJECT_ASSERT_LOCKED(m->object);
2642 pa = VM_PAGE_TO_PHYS(m);
2643 pn = (pa / PAGE_SIZE);
2645 new_l3 = PTE_V | PTE_R | PTE_A;
2646 if (prot & VM_PROT_EXECUTE)
2648 if (flags & VM_PROT_WRITE)
2650 if (prot & VM_PROT_WRITE)
2652 if (va < VM_MAX_USER_ADDRESS)
2655 new_l3 |= (pn << PTE_PPN0_S);
2656 if ((flags & PMAP_ENTER_WIRED) != 0)
2657 new_l3 |= PTE_SW_WIRED;
2660 * Set modified bit gratuitously for writeable mappings if
2661 * the page is unmanaged. We do not want to take a fault
2662 * to do the dirty bit accounting for these mappings.
2664 if ((m->oflags & VPO_UNMANAGED) != 0) {
2665 if (prot & VM_PROT_WRITE)
2668 new_l3 |= PTE_SW_MANAGED;
2670 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2674 rw_rlock(&pvh_global_lock);
2677 /* Assert the required virtual and physical alignment. */
2678 KASSERT((va & L2_OFFSET) == 0,
2679 ("pmap_enter: va %#lx unaligned", va));
2680 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2681 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2685 l2 = pmap_l2(pmap, va);
2686 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2687 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2689 l3 = pmap_l2_to_l3(l2, va);
2690 if (va < VM_MAXUSER_ADDRESS) {
2691 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2694 } else if (va < VM_MAXUSER_ADDRESS) {
2695 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2696 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2697 if (mpte == NULL && nosleep) {
2698 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2701 rw_runlock(&pvh_global_lock);
2703 return (KERN_RESOURCE_SHORTAGE);
2705 l3 = pmap_l3(pmap, va);
2707 l3 = pmap_l3(pmap, va);
2708 /* TODO: This is not optimal, but should mostly work */
2711 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2712 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2715 panic("pmap_enter: l2 pte_m == NULL");
2716 if ((l2_m->flags & PG_ZERO) == 0)
2717 pmap_zero_page(l2_m);
2719 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2720 l2_pn = (l2_pa / PAGE_SIZE);
2722 l1 = pmap_l1(pmap, va);
2724 entry |= (l2_pn << PTE_PPN0_S);
2725 pmap_store(l1, entry);
2726 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2727 l2 = pmap_l1_to_l2(l1, va);
2730 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2731 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2733 panic("pmap_enter: l3 pte_m == NULL");
2734 if ((l3_m->flags & PG_ZERO) == 0)
2735 pmap_zero_page(l3_m);
2737 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2738 l3_pn = (l3_pa / PAGE_SIZE);
2740 entry |= (l3_pn << PTE_PPN0_S);
2741 pmap_store(l2, entry);
2742 l3 = pmap_l2_to_l3(l2, va);
2744 pmap_invalidate_page(pmap, va);
2747 orig_l3 = pmap_load(l3);
2748 opa = PTE_TO_PHYS(orig_l3);
2752 * Is the specified virtual address already mapped?
2754 if ((orig_l3 & PTE_V) != 0) {
2756 * Wiring change, just update stats. We don't worry about
2757 * wiring PT pages as they remain resident as long as there
2758 * are valid mappings in them. Hence, if a user page is wired,
2759 * the PT page will be also.
2761 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2762 (orig_l3 & PTE_SW_WIRED) == 0)
2763 pmap->pm_stats.wired_count++;
2764 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2765 (orig_l3 & PTE_SW_WIRED) != 0)
2766 pmap->pm_stats.wired_count--;
2769 * Remove the extra PT page reference.
2773 KASSERT(mpte->wire_count > 0,
2774 ("pmap_enter: missing reference to page table page,"
2779 * Has the physical page changed?
2783 * No, might be a protection or wiring change.
2785 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2786 (new_l3 & PTE_W) != 0)
2787 vm_page_aflag_set(m, PGA_WRITEABLE);
2792 * The physical page has changed. Temporarily invalidate
2793 * the mapping. This ensures that all threads sharing the
2794 * pmap keep a consistent view of the mapping, which is
2795 * necessary for the correct handling of COW faults. It
2796 * also permits reuse of the old mapping's PV entry,
2797 * avoiding an allocation.
2799 * For consistency, handle unmanaged mappings the same way.
2801 orig_l3 = pmap_load_clear(l3);
2802 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2803 ("pmap_enter: unexpected pa update for %#lx", va));
2804 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2805 om = PHYS_TO_VM_PAGE(opa);
2808 * The pmap lock is sufficient to synchronize with
2809 * concurrent calls to pmap_page_test_mappings() and
2810 * pmap_ts_referenced().
2812 if ((orig_l3 & PTE_D) != 0)
2814 if ((orig_l3 & PTE_A) != 0)
2815 vm_page_aflag_set(om, PGA_REFERENCED);
2816 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2817 pv = pmap_pvh_remove(&om->md, pmap, va);
2819 ("pmap_enter: no PV entry for %#lx", va));
2820 if ((new_l3 & PTE_SW_MANAGED) == 0)
2821 free_pv_entry(pmap, pv);
2822 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2823 TAILQ_EMPTY(&om->md.pv_list))
2824 vm_page_aflag_clear(om, PGA_WRITEABLE);
2826 pmap_invalidate_page(pmap, va);
2830 * Increment the counters.
2832 if ((new_l3 & PTE_SW_WIRED) != 0)
2833 pmap->pm_stats.wired_count++;
2834 pmap_resident_count_inc(pmap, 1);
2837 * Enter on the PV list if part of our managed memory.
2839 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2841 pv = get_pv_entry(pmap, &lock);
2844 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2845 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2847 if ((new_l3 & PTE_W) != 0)
2848 vm_page_aflag_set(m, PGA_WRITEABLE);
2853 * Sync the i-cache on all harts before updating the PTE
2854 * if the new PTE is executable.
2856 if (prot & VM_PROT_EXECUTE)
2857 pmap_sync_icache(pmap, va, PAGE_SIZE);
2860 * Update the L3 entry.
2863 orig_l3 = pmap_load_store(l3, new_l3);
2864 pmap_invalidate_page(pmap, va);
2865 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2866 ("pmap_enter: invalid update"));
2867 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2868 (PTE_D | PTE_SW_MANAGED))
2871 pmap_store(l3, new_l3);
2874 #if VM_NRESERVLEVEL > 0
2875 if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2876 pmap_ps_enabled(pmap) &&
2877 (m->flags & PG_FICTITIOUS) == 0 &&
2878 vm_reserv_level_iffullpop(m) == 0)
2879 pmap_promote_l2(pmap, l2, va, &lock);
2886 rw_runlock(&pvh_global_lock);
2892 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2893 * if successful. Returns false if (1) a page table page cannot be allocated
2894 * without sleeping, (2) a mapping already exists at the specified virtual
2895 * address, or (3) a PV entry cannot be allocated without reclaiming another
2899 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2900 struct rwlock **lockp)
2905 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2907 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2908 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2909 if ((m->oflags & VPO_UNMANAGED) == 0)
2910 new_l2 |= PTE_SW_MANAGED;
2911 if ((prot & VM_PROT_EXECUTE) != 0)
2913 if (va < VM_MAXUSER_ADDRESS)
2915 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2916 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2921 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2922 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2923 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2924 * a mapping already exists at the specified virtual address. Returns
2925 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2926 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2927 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2929 * The parameter "m" is only used when creating a managed, writeable mapping.
2932 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2933 vm_page_t m, struct rwlock **lockp)
2935 struct spglist free;
2936 pd_entry_t *l2, *l3, oldl2;
2940 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2942 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2943 NULL : lockp)) == NULL) {
2944 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2946 return (KERN_RESOURCE_SHORTAGE);
2949 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2950 l2 = &l2[pmap_l2_index(va)];
2951 if ((oldl2 = pmap_load(l2)) != 0) {
2952 KASSERT(l2pg->wire_count > 1,
2953 ("pmap_enter_l2: l2pg's wire count is too low"));
2954 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2957 "pmap_enter_l2: failure for va %#lx in pmap %p",
2959 return (KERN_FAILURE);
2962 if ((oldl2 & PTE_RWX) != 0)
2963 (void)pmap_remove_l2(pmap, l2, va,
2964 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2966 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2967 l3 = pmap_l2_to_l3(l2, sva);
2968 if ((pmap_load(l3) & PTE_V) != 0 &&
2969 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2973 vm_page_free_pages_toq(&free, true);
2974 if (va >= VM_MAXUSER_ADDRESS) {
2975 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2976 if (pmap_insert_pt_page(pmap, mt)) {
2978 * XXX Currently, this can't happen bacuse
2979 * we do not perform pmap_enter(psind == 1)
2980 * on the kernel pmap.
2982 panic("pmap_enter_l2: trie insert failed");
2985 KASSERT(pmap_load(l2) == 0,
2986 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2989 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2991 * Abort this mapping if its PV entry could not be created.
2993 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2995 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2997 * Although "va" is not mapped, paging-structure
2998 * caches could nonetheless have entries that
2999 * refer to the freed page table pages.
3000 * Invalidate those entries.
3002 pmap_invalidate_page(pmap, va);
3003 vm_page_free_pages_toq(&free, true);
3006 "pmap_enter_l2: failure for va %#lx in pmap %p",
3008 return (KERN_RESOURCE_SHORTAGE);
3010 if ((new_l2 & PTE_W) != 0)
3011 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3012 vm_page_aflag_set(mt, PGA_WRITEABLE);
3016 * Increment counters.
3018 if ((new_l2 & PTE_SW_WIRED) != 0)
3019 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3020 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3023 * Map the superpage.
3025 pmap_store(l2, new_l2);
3027 atomic_add_long(&pmap_l2_mappings, 1);
3028 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3031 return (KERN_SUCCESS);
3035 * Maps a sequence of resident pages belonging to the same object.
3036 * The sequence begins with the given page m_start. This page is
3037 * mapped at the given virtual address start. Each subsequent page is
3038 * mapped at a virtual address that is offset from start by the same
3039 * amount as the page is offset from m_start within the object. The
3040 * last page in the sequence is the page with the largest offset from
3041 * m_start that can be mapped at a virtual address less than the given
3042 * virtual address end. Not every virtual page between start and end
3043 * is mapped; only those for which a resident page exists with the
3044 * corresponding offset from m_start are mapped.
3047 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3048 vm_page_t m_start, vm_prot_t prot)
3050 struct rwlock *lock;
3053 vm_pindex_t diff, psize;
3055 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3057 psize = atop(end - start);
3061 rw_rlock(&pvh_global_lock);
3063 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3064 va = start + ptoa(diff);
3065 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3066 m->psind == 1 && pmap_ps_enabled(pmap) &&
3067 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3068 m = &m[L2_SIZE / PAGE_SIZE - 1];
3070 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3072 m = TAILQ_NEXT(m, listq);
3076 rw_runlock(&pvh_global_lock);
3081 * this code makes some *MAJOR* assumptions:
3082 * 1. Current pmap & pmap exists.
3085 * 4. No page table pages.
3086 * but is *MUCH* faster than pmap_enter...
3090 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3092 struct rwlock *lock;
3095 rw_rlock(&pvh_global_lock);
3097 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3100 rw_runlock(&pvh_global_lock);
3105 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3106 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3108 struct spglist free;
3111 pt_entry_t *l3, newl3;
3113 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3114 (m->oflags & VPO_UNMANAGED) != 0,
3115 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3116 rw_assert(&pvh_global_lock, RA_LOCKED);
3117 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3119 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3121 * In the case that a page table page is not
3122 * resident, we are creating it here.
3124 if (va < VM_MAXUSER_ADDRESS) {
3125 vm_pindex_t l2pindex;
3128 * Calculate pagetable page index
3130 l2pindex = pmap_l2_pindex(va);
3131 if (mpte && (mpte->pindex == l2pindex)) {
3137 l2 = pmap_l2(pmap, va);
3140 * If the page table page is mapped, we just increment
3141 * the hold count, and activate it. Otherwise, we
3142 * attempt to allocate a page table page. If this
3143 * attempt fails, we don't retry. Instead, we give up.
3145 if (l2 != NULL && pmap_load(l2) != 0) {
3146 phys = PTE_TO_PHYS(pmap_load(l2));
3147 mpte = PHYS_TO_VM_PAGE(phys);
3151 * Pass NULL instead of the PV list lock
3152 * pointer, because we don't intend to sleep.
3154 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3159 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3160 l3 = &l3[pmap_l3_index(va)];
3163 l3 = pmap_l3(kernel_pmap, va);
3166 panic("pmap_enter_quick_locked: No l3");
3167 if (pmap_load(l3) != 0) {
3176 * Enter on the PV list if part of our managed memory.
3178 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3179 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3182 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3183 pmap_invalidate_page(pmap, va);
3184 vm_page_free_pages_toq(&free, false);
3192 * Increment counters
3194 pmap_resident_count_inc(pmap, 1);
3196 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3198 if ((prot & VM_PROT_EXECUTE) != 0)
3200 if ((m->oflags & VPO_UNMANAGED) == 0)
3201 newl3 |= PTE_SW_MANAGED;
3202 if (va < VM_MAX_USER_ADDRESS)
3206 * Sync the i-cache on all harts before updating the PTE
3207 * if the new PTE is executable.
3209 if (prot & VM_PROT_EXECUTE)
3210 pmap_sync_icache(pmap, va, PAGE_SIZE);
3212 pmap_store(l3, newl3);
3214 pmap_invalidate_page(pmap, va);
3219 * This code maps large physical mmap regions into the
3220 * processor address space. Note that some shortcuts
3221 * are taken, but the code works.
3224 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3225 vm_pindex_t pindex, vm_size_t size)
3228 VM_OBJECT_ASSERT_WLOCKED(object);
3229 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3230 ("pmap_object_init_pt: non-device object"));
3234 * Clear the wired attribute from the mappings for the specified range of
3235 * addresses in the given pmap. Every valid mapping within that range
3236 * must have the wired attribute set. In contrast, invalid mappings
3237 * cannot have the wired attribute set, so they are ignored.
3239 * The wired attribute of the page table entry is not a hardware feature,
3240 * so there is no need to invalidate any TLB entries.
3243 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3245 vm_offset_t va_next;
3246 pd_entry_t *l1, *l2, l2e;
3247 pt_entry_t *l3, l3e;
3248 bool pv_lists_locked;
3250 pv_lists_locked = false;
3253 for (; sva < eva; sva = va_next) {
3254 l1 = pmap_l1(pmap, sva);
3255 if (pmap_load(l1) == 0) {
3256 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3262 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3266 l2 = pmap_l1_to_l2(l1, sva);
3267 if ((l2e = pmap_load(l2)) == 0)
3269 if ((l2e & PTE_RWX) != 0) {
3270 if (sva + L2_SIZE == va_next && eva >= va_next) {
3271 if ((l2e & PTE_SW_WIRED) == 0)
3272 panic("pmap_unwire: l2 %#jx is missing "
3273 "PTE_SW_WIRED", (uintmax_t)l2e);
3274 pmap_clear_bits(l2, PTE_SW_WIRED);
3277 if (!pv_lists_locked) {
3278 pv_lists_locked = true;
3279 if (!rw_try_rlock(&pvh_global_lock)) {
3281 rw_rlock(&pvh_global_lock);
3286 if (!pmap_demote_l2(pmap, l2, sva))
3287 panic("pmap_unwire: demotion failed");
3293 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3295 if ((l3e = pmap_load(l3)) == 0)
3297 if ((l3e & PTE_SW_WIRED) == 0)
3298 panic("pmap_unwire: l3 %#jx is missing "
3299 "PTE_SW_WIRED", (uintmax_t)l3e);
3302 * PG_W must be cleared atomically. Although the pmap
3303 * lock synchronizes access to PG_W, another processor
3304 * could be setting PG_M and/or PG_A concurrently.
3306 pmap_clear_bits(l3, PTE_SW_WIRED);
3307 pmap->pm_stats.wired_count--;
3310 if (pv_lists_locked)
3311 rw_runlock(&pvh_global_lock);
3316 * Copy the range specified by src_addr/len
3317 * from the source map to the range dst_addr/len
3318 * in the destination map.
3320 * This routine is only advisory and need not do anything.
3324 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3325 vm_offset_t src_addr)
3331 * pmap_zero_page zeros the specified hardware page by mapping
3332 * the page into KVM and using bzero to clear its contents.
3335 pmap_zero_page(vm_page_t m)
3337 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3339 pagezero((void *)va);
3343 * pmap_zero_page_area zeros the specified hardware page by mapping
3344 * the page into KVM and using bzero to clear its contents.
3346 * off and size may not cover an area beyond a single hardware page.
3349 pmap_zero_page_area(vm_page_t m, int off, int size)
3351 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3353 if (off == 0 && size == PAGE_SIZE)
3354 pagezero((void *)va);
3356 bzero((char *)va + off, size);
3360 * pmap_copy_page copies the specified (machine independent)
3361 * page by mapping the page into virtual memory and using
3362 * bcopy to copy the page, one machine dependent page at a
3366 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3368 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3369 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3371 pagecopy((void *)src, (void *)dst);
3374 int unmapped_buf_allowed = 1;
3377 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3378 vm_offset_t b_offset, int xfersize)
3382 vm_paddr_t p_a, p_b;
3383 vm_offset_t a_pg_offset, b_pg_offset;
3386 while (xfersize > 0) {
3387 a_pg_offset = a_offset & PAGE_MASK;
3388 m_a = ma[a_offset >> PAGE_SHIFT];
3389 p_a = m_a->phys_addr;
3390 b_pg_offset = b_offset & PAGE_MASK;
3391 m_b = mb[b_offset >> PAGE_SHIFT];
3392 p_b = m_b->phys_addr;
3393 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3394 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3395 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3396 panic("!DMAP a %lx", p_a);
3398 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3400 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3401 panic("!DMAP b %lx", p_b);
3403 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3405 bcopy(a_cp, b_cp, cnt);
3413 pmap_quick_enter_page(vm_page_t m)
3416 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3420 pmap_quick_remove_page(vm_offset_t addr)
3425 * Returns true if the pmap's pv is one of the first
3426 * 16 pvs linked to from this page. This count may
3427 * be changed upwards or downwards in the future; it
3428 * is only necessary that true be returned for a small
3429 * subset of pmaps for proper page aging.
3432 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3434 struct md_page *pvh;
3435 struct rwlock *lock;
3440 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3441 ("pmap_page_exists_quick: page %p is not managed", m));
3443 rw_rlock(&pvh_global_lock);
3444 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3446 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3447 if (PV_PMAP(pv) == pmap) {
3455 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3456 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3457 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3458 if (PV_PMAP(pv) == pmap) {
3468 rw_runlock(&pvh_global_lock);
3473 * pmap_page_wired_mappings:
3475 * Return the number of managed mappings to the given physical page
3479 pmap_page_wired_mappings(vm_page_t m)
3481 struct md_page *pvh;
3482 struct rwlock *lock;
3487 int count, md_gen, pvh_gen;
3489 if ((m->oflags & VPO_UNMANAGED) != 0)
3491 rw_rlock(&pvh_global_lock);
3492 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3496 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3498 if (!PMAP_TRYLOCK(pmap)) {
3499 md_gen = m->md.pv_gen;
3503 if (md_gen != m->md.pv_gen) {
3508 l3 = pmap_l3(pmap, pv->pv_va);
3509 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3513 if ((m->flags & PG_FICTITIOUS) == 0) {
3514 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3515 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3517 if (!PMAP_TRYLOCK(pmap)) {
3518 md_gen = m->md.pv_gen;
3519 pvh_gen = pvh->pv_gen;
3523 if (md_gen != m->md.pv_gen ||
3524 pvh_gen != pvh->pv_gen) {
3529 l2 = pmap_l2(pmap, pv->pv_va);
3530 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3536 rw_runlock(&pvh_global_lock);
3541 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3542 struct spglist *free, bool superpage)
3544 struct md_page *pvh;
3548 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3549 pvh = pa_to_pvh(m->phys_addr);
3550 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3552 if (TAILQ_EMPTY(&pvh->pv_list)) {
3553 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3554 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3555 (mt->aflags & PGA_WRITEABLE) != 0)
3556 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3558 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3560 pmap_resident_count_dec(pmap, 1);
3561 KASSERT(mpte->wire_count == Ln_ENTRIES,
3562 ("pmap_remove_pages: pte page wire count error"));
3563 mpte->wire_count = 0;
3564 pmap_add_delayed_free_list(mpte, free, FALSE);
3567 pmap_resident_count_dec(pmap, 1);
3568 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3570 if (TAILQ_EMPTY(&m->md.pv_list) &&
3571 (m->aflags & PGA_WRITEABLE) != 0) {
3572 pvh = pa_to_pvh(m->phys_addr);
3573 if (TAILQ_EMPTY(&pvh->pv_list))
3574 vm_page_aflag_clear(m, PGA_WRITEABLE);
3580 * Destroy all managed, non-wired mappings in the given user-space
3581 * pmap. This pmap cannot be active on any processor besides the
3584 * This function cannot be applied to the kernel pmap. Moreover, it
3585 * is not intended for general use. It is only to be used during
3586 * process termination. Consequently, it can be implemented in ways
3587 * that make it faster than pmap_remove(). First, it can more quickly
3588 * destroy mappings by iterating over the pmap's collection of PV
3589 * entries, rather than searching the page table. Second, it doesn't
3590 * have to test and clear the page table entries atomically, because
3591 * no processor is currently accessing the user address space. In
3592 * particular, a page table entry's dirty bit won't change state once
3593 * this function starts.
3596 pmap_remove_pages(pmap_t pmap)
3598 struct spglist free;
3600 pt_entry_t *pte, tpte;
3603 struct pv_chunk *pc, *npc;
3604 struct rwlock *lock;
3606 uint64_t inuse, bitmask;
3607 int allfree, field, freed, idx;
3613 rw_rlock(&pvh_global_lock);
3615 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3618 for (field = 0; field < _NPCM; field++) {
3619 inuse = ~pc->pc_map[field] & pc_freemask[field];
3620 while (inuse != 0) {
3621 bit = ffsl(inuse) - 1;
3622 bitmask = 1UL << bit;
3623 idx = field * 64 + bit;
3624 pv = &pc->pc_pventry[idx];
3627 pte = pmap_l1(pmap, pv->pv_va);
3628 ptepde = pmap_load(pte);
3629 pte = pmap_l1_to_l2(pte, pv->pv_va);
3630 tpte = pmap_load(pte);
3631 if ((tpte & PTE_RWX) != 0) {
3635 pte = pmap_l2_to_l3(pte, pv->pv_va);
3636 tpte = pmap_load(pte);
3641 * We cannot remove wired pages from a
3642 * process' mapping at this time.
3644 if (tpte & PTE_SW_WIRED) {
3649 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3650 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3651 m < &vm_page_array[vm_page_array_size],
3652 ("pmap_remove_pages: bad pte %#jx",
3658 * Update the vm_page_t clean/reference bits.
3660 if ((tpte & (PTE_D | PTE_W)) ==
3664 mt < &m[Ln_ENTRIES]; mt++)
3670 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3673 pc->pc_map[field] |= bitmask;
3675 pmap_remove_pages_pv(pmap, m, pv, &free,
3677 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3681 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3682 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3683 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3685 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3691 pmap_invalidate_all(pmap);
3692 rw_runlock(&pvh_global_lock);
3694 vm_page_free_pages_toq(&free, false);
3698 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3700 struct md_page *pvh;
3701 struct rwlock *lock;
3703 pt_entry_t *l3, mask;
3706 int md_gen, pvh_gen;
3716 rw_rlock(&pvh_global_lock);
3717 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3720 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3722 if (!PMAP_TRYLOCK(pmap)) {
3723 md_gen = m->md.pv_gen;
3727 if (md_gen != m->md.pv_gen) {
3732 l3 = pmap_l3(pmap, pv->pv_va);
3733 rv = (pmap_load(l3) & mask) == mask;
3738 if ((m->flags & PG_FICTITIOUS) == 0) {
3739 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3740 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3742 if (!PMAP_TRYLOCK(pmap)) {
3743 md_gen = m->md.pv_gen;
3744 pvh_gen = pvh->pv_gen;
3748 if (md_gen != m->md.pv_gen ||
3749 pvh_gen != pvh->pv_gen) {
3754 l2 = pmap_l2(pmap, pv->pv_va);
3755 rv = (pmap_load(l2) & mask) == mask;
3763 rw_runlock(&pvh_global_lock);
3770 * Return whether or not the specified physical page was modified
3771 * in any physical maps.
3774 pmap_is_modified(vm_page_t m)
3777 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3778 ("pmap_is_modified: page %p is not managed", m));
3781 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3782 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
3783 * is clear, no PTEs can have PG_M set.
3785 VM_OBJECT_ASSERT_WLOCKED(m->object);
3786 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3788 return (pmap_page_test_mappings(m, FALSE, TRUE));
3792 * pmap_is_prefaultable:
3794 * Return whether or not the specified virtual address is eligible
3798 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3805 l3 = pmap_l3(pmap, addr);
3806 if (l3 != NULL && pmap_load(l3) != 0) {
3814 * pmap_is_referenced:
3816 * Return whether or not the specified physical page was referenced
3817 * in any physical maps.
3820 pmap_is_referenced(vm_page_t m)
3823 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3824 ("pmap_is_referenced: page %p is not managed", m));
3825 return (pmap_page_test_mappings(m, TRUE, FALSE));
3829 * Clear the write and modified bits in each of the given page's mappings.
3832 pmap_remove_write(vm_page_t m)
3834 struct md_page *pvh;
3835 struct rwlock *lock;
3838 pt_entry_t *l3, oldl3, newl3;
3839 pv_entry_t next_pv, pv;
3841 int md_gen, pvh_gen;
3843 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3844 ("pmap_remove_write: page %p is not managed", m));
3847 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3848 * set by another thread while the object is locked. Thus,
3849 * if PGA_WRITEABLE is clear, no page table entries need updating.
3851 VM_OBJECT_ASSERT_WLOCKED(m->object);
3852 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3854 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3855 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3856 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3857 rw_rlock(&pvh_global_lock);
3860 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3862 if (!PMAP_TRYLOCK(pmap)) {
3863 pvh_gen = pvh->pv_gen;
3867 if (pvh_gen != pvh->pv_gen) {
3874 l2 = pmap_l2(pmap, va);
3875 if ((pmap_load(l2) & PTE_W) != 0)
3876 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3877 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3878 ("inconsistent pv lock %p %p for page %p",
3879 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3882 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3884 if (!PMAP_TRYLOCK(pmap)) {
3885 pvh_gen = pvh->pv_gen;
3886 md_gen = m->md.pv_gen;
3890 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3896 l3 = pmap_l3(pmap, pv->pv_va);
3897 oldl3 = pmap_load(l3);
3899 if ((oldl3 & PTE_W) != 0) {
3900 newl3 = oldl3 & ~(PTE_D | PTE_W);
3901 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3903 if ((oldl3 & PTE_D) != 0)
3905 pmap_invalidate_page(pmap, pv->pv_va);
3910 vm_page_aflag_clear(m, PGA_WRITEABLE);
3911 rw_runlock(&pvh_global_lock);
3915 * pmap_ts_referenced:
3917 * Return a count of reference bits for a page, clearing those bits.
3918 * It is not necessary for every reference bit to be cleared, but it
3919 * is necessary that 0 only be returned when there are truly no
3920 * reference bits set.
3922 * As an optimization, update the page's dirty field if a modified bit is
3923 * found while counting reference bits. This opportunistic update can be
3924 * performed at low cost and can eliminate the need for some future calls
3925 * to pmap_is_modified(). However, since this function stops after
3926 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3927 * dirty pages. Those dirty pages will only be detected by a future call
3928 * to pmap_is_modified().
3931 pmap_ts_referenced(vm_page_t m)
3933 struct spglist free;
3934 struct md_page *pvh;
3935 struct rwlock *lock;
3938 pd_entry_t *l2, l2e;
3939 pt_entry_t *l3, l3e;
3942 int md_gen, pvh_gen, ret;
3944 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3945 ("pmap_ts_referenced: page %p is not managed", m));
3948 pa = VM_PAGE_TO_PHYS(m);
3949 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3951 lock = PHYS_TO_PV_LIST_LOCK(pa);
3952 rw_rlock(&pvh_global_lock);
3955 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3956 goto small_mappings;
3960 if (!PMAP_TRYLOCK(pmap)) {
3961 pvh_gen = pvh->pv_gen;
3965 if (pvh_gen != pvh->pv_gen) {
3971 l2 = pmap_l2(pmap, va);
3972 l2e = pmap_load(l2);
3973 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3975 * Although l2e is mapping a 2MB page, because
3976 * this function is called at a 4KB page granularity,
3977 * we only update the 4KB page under test.
3981 if ((l2e & PTE_A) != 0) {
3983 * Since this reference bit is shared by 512 4KB
3984 * pages, it should not be cleared every time it is
3985 * tested. Apply a simple "hash" function on the
3986 * physical page number, the virtual superpage number,
3987 * and the pmap address to select one 4KB page out of
3988 * the 512 on which testing the reference bit will
3989 * result in clearing that reference bit. This
3990 * function is designed to avoid the selection of the
3991 * same 4KB page for every 2MB page mapping.
3993 * On demotion, a mapping that hasn't been referenced
3994 * is simply destroyed. To avoid the possibility of a
3995 * subsequent page fault on a demoted wired mapping,
3996 * always leave its reference bit set. Moreover,
3997 * since the superpage is wired, the current state of
3998 * its reference bit won't affect page replacement.
4000 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4001 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4002 (l2e & PTE_SW_WIRED) == 0) {
4003 pmap_clear_bits(l2, PTE_A);
4004 pmap_invalidate_page(pmap, va);
4009 /* Rotate the PV list if it has more than one entry. */
4010 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4011 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4012 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4015 if (ret >= PMAP_TS_REFERENCED_MAX)
4017 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4019 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4024 if (!PMAP_TRYLOCK(pmap)) {
4025 pvh_gen = pvh->pv_gen;
4026 md_gen = m->md.pv_gen;
4030 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4035 l2 = pmap_l2(pmap, pv->pv_va);
4037 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4038 ("pmap_ts_referenced: found an invalid l2 table"));
4040 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4041 l3e = pmap_load(l3);
4042 if ((l3e & PTE_D) != 0)
4044 if ((l3e & PTE_A) != 0) {
4045 if ((l3e & PTE_SW_WIRED) == 0) {
4047 * Wired pages cannot be paged out so
4048 * doing accessed bit emulation for
4049 * them is wasted effort. We do the
4050 * hard work for unwired pages only.
4052 pmap_clear_bits(l3, PTE_A);
4053 pmap_invalidate_page(pmap, pv->pv_va);
4058 /* Rotate the PV list if it has more than one entry. */
4059 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4060 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4061 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4064 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && ret <
4065 PMAP_TS_REFERENCED_MAX);
4068 rw_runlock(&pvh_global_lock);
4069 vm_page_free_pages_toq(&free, false);
4074 * Apply the given advice to the specified range of addresses within the
4075 * given pmap. Depending on the advice, clear the referenced and/or
4076 * modified flags in each mapping and set the mapped page's dirty field.
4079 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4084 * Clear the modify bits on the specified physical page.
4087 pmap_clear_modify(vm_page_t m)
4089 struct md_page *pvh;
4090 struct rwlock *lock;
4092 pv_entry_t next_pv, pv;
4093 pd_entry_t *l2, oldl2;
4094 pt_entry_t *l3, oldl3;
4096 int md_gen, pvh_gen;
4098 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4099 ("pmap_clear_modify: page %p is not managed", m));
4100 VM_OBJECT_ASSERT_WLOCKED(m->object);
4101 KASSERT(!vm_page_xbusied(m),
4102 ("pmap_clear_modify: page %p is exclusive busied", m));
4105 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4106 * If the object containing the page is locked and the page is not
4107 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4109 if ((m->aflags & PGA_WRITEABLE) == 0)
4111 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4112 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4113 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4114 rw_rlock(&pvh_global_lock);
4117 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4119 if (!PMAP_TRYLOCK(pmap)) {
4120 pvh_gen = pvh->pv_gen;
4124 if (pvh_gen != pvh->pv_gen) {
4130 l2 = pmap_l2(pmap, va);
4131 oldl2 = pmap_load(l2);
4132 if ((oldl2 & PTE_W) != 0) {
4133 if (pmap_demote_l2_locked(pmap, l2, va, &lock)) {
4134 if ((oldl2 & PTE_SW_WIRED) == 0) {
4136 * Write protect the mapping to a
4137 * single page so that a subsequent
4138 * write access may repromote.
4140 va += VM_PAGE_TO_PHYS(m) -
4142 l3 = pmap_l2_to_l3(l2, va);
4143 oldl3 = pmap_load(l3);
4144 if ((oldl3 & PTE_V) != 0) {
4145 while (!atomic_fcmpset_long(l3,
4146 &oldl3, oldl3 & ~(PTE_D |
4150 pmap_invalidate_page(pmap, va);
4157 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4159 if (!PMAP_TRYLOCK(pmap)) {
4160 md_gen = m->md.pv_gen;
4161 pvh_gen = pvh->pv_gen;
4165 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4170 l2 = pmap_l2(pmap, pv->pv_va);
4171 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4172 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4174 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4175 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4176 pmap_clear_bits(l3, PTE_D);
4177 pmap_invalidate_page(pmap, pv->pv_va);
4182 rw_runlock(&pvh_global_lock);
4186 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4189 return ((void *)PHYS_TO_DMAP(pa));
4193 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4198 * Sets the memory attribute for the specified page.
4201 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4204 m->md.pv_memattr = ma;
4208 * perform the pmap work for mincore
4211 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4213 pt_entry_t *l2, *l3, tpte;
4223 l2 = pmap_l2(pmap, addr);
4224 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4225 if ((tpte & PTE_RWX) != 0) {
4226 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4227 val = MINCORE_INCORE | MINCORE_SUPER;
4229 l3 = pmap_l2_to_l3(l2, addr);
4230 tpte = pmap_load(l3);
4231 if ((tpte & PTE_V) == 0)
4233 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4234 val = MINCORE_INCORE;
4237 if ((tpte & PTE_D) != 0)
4238 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4239 if ((tpte & PTE_A) != 0)
4240 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4241 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4245 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4246 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4247 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4248 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4251 PA_UNLOCK_COND(*locked_pa);
4257 pmap_activate_sw(struct thread *td)
4259 pmap_t oldpmap, pmap;
4262 oldpmap = PCPU_GET(curpmap);
4263 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4264 if (pmap == oldpmap)
4266 load_satp(pmap->pm_satp);
4268 hart = PCPU_GET(hart);
4270 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4271 CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4273 CPU_SET(hart, &pmap->pm_active);
4274 CPU_CLR(hart, &oldpmap->pm_active);
4276 PCPU_SET(curpmap, pmap);
4282 pmap_activate(struct thread *td)
4286 pmap_activate_sw(td);
4291 pmap_activate_boot(pmap_t pmap)
4295 hart = PCPU_GET(hart);
4297 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4299 CPU_SET(hart, &pmap->pm_active);
4301 PCPU_SET(curpmap, pmap);
4305 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4310 * From the RISC-V User-Level ISA V2.2:
4312 * "To make a store to instruction memory visible to all
4313 * RISC-V harts, the writing hart has to execute a data FENCE
4314 * before requesting that all remote RISC-V harts execute a
4319 CPU_CLR(PCPU_GET(hart), &mask);
4321 if (!CPU_EMPTY(&mask) && smp_started)
4322 sbi_remote_fence_i(mask.__bits);
4327 * Increase the starting virtual address of the given mapping if a
4328 * different alignment might result in more superpage mappings.
4331 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4332 vm_offset_t *addr, vm_size_t size)
4334 vm_offset_t superpage_offset;
4338 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4339 offset += ptoa(object->pg_color);
4340 superpage_offset = offset & L2_OFFSET;
4341 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4342 (*addr & L2_OFFSET) == superpage_offset)
4344 if ((*addr & L2_OFFSET) < superpage_offset)
4345 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4347 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4351 * Get the kernel virtual address of a set of physical pages. If there are
4352 * physical addresses not covered by the DMAP perform a transient mapping
4353 * that will be removed when calling pmap_unmap_io_transient.
4355 * \param page The pages the caller wishes to obtain the virtual
4356 * address on the kernel memory map.
4357 * \param vaddr On return contains the kernel virtual memory address
4358 * of the pages passed in the page parameter.
4359 * \param count Number of pages passed in.
4360 * \param can_fault TRUE if the thread using the mapped pages can take
4361 * page faults, FALSE otherwise.
4363 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4364 * finished or FALSE otherwise.
4368 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4369 boolean_t can_fault)
4372 boolean_t needs_mapping;
4376 * Allocate any KVA space that we need, this is done in a separate
4377 * loop to prevent calling vmem_alloc while pinned.
4379 needs_mapping = FALSE;
4380 for (i = 0; i < count; i++) {
4381 paddr = VM_PAGE_TO_PHYS(page[i]);
4382 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4383 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4384 M_BESTFIT | M_WAITOK, &vaddr[i]);
4385 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4386 needs_mapping = TRUE;
4388 vaddr[i] = PHYS_TO_DMAP(paddr);
4392 /* Exit early if everything is covered by the DMAP */
4398 for (i = 0; i < count; i++) {
4399 paddr = VM_PAGE_TO_PHYS(page[i]);
4400 if (paddr >= DMAP_MAX_PHYSADDR) {
4402 "pmap_map_io_transient: TODO: Map out of DMAP data");
4406 return (needs_mapping);
4410 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4411 boolean_t can_fault)
4418 for (i = 0; i < count; i++) {
4419 paddr = VM_PAGE_TO_PHYS(page[i]);
4420 if (paddr >= DMAP_MAX_PHYSADDR) {
4421 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4427 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4430 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4434 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4437 pd_entry_t *l1p, *l2p;
4439 /* Get l1 directory entry. */
4440 l1p = pmap_l1(pmap, va);
4443 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4446 if ((pmap_load(l1p) & PTE_RX) != 0) {
4452 /* Get l2 directory entry. */
4453 l2p = pmap_l1_to_l2(l1p, va);
4456 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4459 if ((pmap_load(l2p) & PTE_RX) != 0) {
4464 /* Get l3 page table entry. */
4465 *l3 = pmap_l2_to_l3(l2p, va);