2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
122 #include <sys/systm.h>
123 #include <sys/kernel.h>
125 #include <sys/lock.h>
126 #include <sys/malloc.h>
127 #include <sys/mman.h>
128 #include <sys/msgbuf.h>
129 #include <sys/mutex.h>
130 #include <sys/proc.h>
131 #include <sys/rwlock.h>
133 #include <sys/vmem.h>
134 #include <sys/vmmeter.h>
135 #include <sys/sched.h>
136 #include <sys/sysctl.h>
140 #include <vm/vm_param.h>
141 #include <vm/vm_kern.h>
142 #include <vm/vm_page.h>
143 #include <vm/vm_map.h>
144 #include <vm/vm_object.h>
145 #include <vm/vm_extern.h>
146 #include <vm/vm_pageout.h>
147 #include <vm/vm_pager.h>
148 #include <vm/vm_radix.h>
149 #include <vm/vm_reserv.h>
152 #include <machine/machdep.h>
153 #include <machine/md_var.h>
154 #include <machine/pcb.h>
155 #include <machine/sbi.h>
157 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
158 #define NUPDE (NPDEPG * NPDEPG)
159 #define NUSERPGTBLS (NUPDE + NPDEPG)
161 #if !defined(DIAGNOSTIC)
162 #ifdef __GNUC_GNU_INLINE__
163 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
165 #define PMAP_INLINE extern inline
172 #define PV_STAT(x) do { x ; } while (0)
174 #define PV_STAT(x) do { } while (0)
177 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
179 #define NPV_LIST_LOCKS MAXCPU
181 #define PHYS_TO_PV_LIST_LOCK(pa) \
182 (&pv_list_locks[pa_index(pa) % NPV_LIST_LOCKS])
184 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
185 struct rwlock **_lockp = (lockp); \
186 struct rwlock *_new_lock; \
188 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
189 if (_new_lock != *_lockp) { \
190 if (*_lockp != NULL) \
191 rw_wunlock(*_lockp); \
192 *_lockp = _new_lock; \
197 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
198 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
200 #define RELEASE_PV_LIST_LOCK(lockp) do { \
201 struct rwlock **_lockp = (lockp); \
203 if (*_lockp != NULL) { \
204 rw_wunlock(*_lockp); \
209 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
210 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
212 /* The list of all the user pmaps */
213 LIST_HEAD(pmaplist, pmap);
214 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
216 struct pmap kernel_pmap_store;
218 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
219 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
220 vm_offset_t kernel_vm_end = 0;
222 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
223 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
224 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
226 /* This code assumes all L1 DMAP entries will be used */
227 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
228 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
230 static struct rwlock_padalign pvh_global_lock;
231 static struct mtx_padalign allpmaps_lock;
234 * Data for the pv entry allocation mechanism
236 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
237 static struct mtx pv_chunks_mutex;
238 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
240 static void free_pv_chunk(struct pv_chunk *pc);
241 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
242 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
243 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
244 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
245 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
247 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
248 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
249 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
250 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
251 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
252 vm_page_t m, struct rwlock **lockp);
254 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
255 struct rwlock **lockp);
257 static void _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
258 struct spglist *free);
259 static int pmap_unuse_l3(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
261 #define pmap_clear(pte) pmap_store(pte, 0)
262 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
263 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
264 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
265 #define pmap_load(pte) atomic_load_64(pte)
266 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
267 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
269 /********************/
270 /* Inline functions */
271 /********************/
274 pagecopy(void *s, void *d)
277 memcpy(d, s, PAGE_SIZE);
287 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
288 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
289 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
291 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
293 static __inline pd_entry_t *
294 pmap_l1(pmap_t pmap, vm_offset_t va)
297 return (&pmap->pm_l1[pmap_l1_index(va)]);
300 static __inline pd_entry_t *
301 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
306 phys = PTE_TO_PHYS(pmap_load(l1));
307 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
309 return (&l2[pmap_l2_index(va)]);
312 static __inline pd_entry_t *
313 pmap_l2(pmap_t pmap, vm_offset_t va)
317 l1 = pmap_l1(pmap, va);
318 if ((pmap_load(l1) & PTE_V) == 0)
320 if ((pmap_load(l1) & PTE_RX) != 0)
323 return (pmap_l1_to_l2(l1, va));
326 static __inline pt_entry_t *
327 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
332 phys = PTE_TO_PHYS(pmap_load(l2));
333 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
335 return (&l3[pmap_l3_index(va)]);
338 static __inline pt_entry_t *
339 pmap_l3(pmap_t pmap, vm_offset_t va)
343 l2 = pmap_l2(pmap, va);
346 if ((pmap_load(l2) & PTE_V) == 0)
348 if ((pmap_load(l2) & PTE_RX) != 0)
351 return (pmap_l2_to_l3(l2, va));
355 pmap_resident_count_inc(pmap_t pmap, int count)
358 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
359 pmap->pm_stats.resident_count += count;
363 pmap_resident_count_dec(pmap_t pmap, int count)
366 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
367 KASSERT(pmap->pm_stats.resident_count >= count,
368 ("pmap %p resident count underflow %ld %d", pmap,
369 pmap->pm_stats.resident_count, count));
370 pmap->pm_stats.resident_count -= count;
374 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
377 struct pmap *user_pmap;
380 /* Distribute new kernel L1 entry to all the user pmaps */
381 if (pmap != kernel_pmap)
384 mtx_lock(&allpmaps_lock);
385 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
386 l1 = &user_pmap->pm_l1[l1index];
387 pmap_store(l1, entry);
389 mtx_unlock(&allpmaps_lock);
393 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
399 l1 = (pd_entry_t *)l1pt;
400 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
402 /* Check locore has used a table L1 map */
403 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
404 ("Invalid bootstrap L1 table"));
406 /* Find the address of the L2 table */
407 l2 = (pt_entry_t *)init_pt_va;
408 *l2_slot = pmap_l2_index(va);
414 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
416 u_int l1_slot, l2_slot;
420 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
422 /* Check locore has used L2 superpages */
423 KASSERT((l2[l2_slot] & PTE_RX) != 0,
424 ("Invalid bootstrap L2 table"));
426 /* L2 is superpages */
427 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
428 ret += (va & L2_OFFSET);
434 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
443 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
444 va = DMAP_MIN_ADDRESS;
445 l1 = (pd_entry_t *)kern_l1;
446 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
448 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
449 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
450 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
453 pn = (pa / PAGE_SIZE);
455 entry |= (pn << PTE_PPN0_S);
456 pmap_store(&l1[l1_slot], entry);
459 /* Set the upper limit of the DMAP region */
467 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
476 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
478 l2 = pmap_l2(kernel_pmap, va);
479 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
480 l2_slot = pmap_l2_index(va);
483 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
484 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
486 pa = pmap_early_vtophys(l1pt, l3pt);
487 pn = (pa / PAGE_SIZE);
489 entry |= (pn << PTE_PPN0_S);
490 pmap_store(&l2[l2_slot], entry);
495 /* Clean the L2 page table */
496 memset((void *)l3_start, 0, l3pt - l3_start);
502 * Bootstrap the system enough to run with virtual memory.
505 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
507 u_int l1_slot, l2_slot, avail_slot, map_slot;
508 vm_offset_t freemempos;
509 vm_offset_t dpcpu, msgbufpv;
510 vm_paddr_t end, max_pa, min_pa, pa, start;
513 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
514 printf("%lx\n", l1pt);
515 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
517 /* Set this early so we can use the pagetable walking functions */
518 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
519 PMAP_LOCK_INIT(kernel_pmap);
521 rw_init(&pvh_global_lock, "pmap pv global");
523 /* Assume the address we were loaded to is a valid physical address. */
524 min_pa = max_pa = kernstart;
527 * Find the minimum physical address. physmap is sorted,
528 * but may contain empty ranges.
530 for (i = 0; i < physmap_idx * 2; i += 2) {
531 if (physmap[i] == physmap[i + 1])
533 if (physmap[i] <= min_pa)
535 if (physmap[i + 1] > max_pa)
536 max_pa = physmap[i + 1];
538 printf("physmap_idx %lx\n", physmap_idx);
539 printf("min_pa %lx\n", min_pa);
540 printf("max_pa %lx\n", max_pa);
542 /* Create a direct map region early so we can use it for pa -> va */
543 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
546 * Read the page table to find out what is already mapped.
547 * This assumes we have mapped a block of memory from KERNBASE
548 * using a single L1 entry.
550 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
552 /* Sanity check the index, KERNBASE should be the first VA */
553 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
555 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
557 /* Create the l3 tables for the early devmap */
558 freemempos = pmap_bootstrap_l3(l1pt,
559 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
563 #define alloc_pages(var, np) \
564 (var) = freemempos; \
565 freemempos += (np * PAGE_SIZE); \
566 memset((char *)(var), 0, ((np) * PAGE_SIZE));
568 /* Allocate dynamic per-cpu area. */
569 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
570 dpcpu_init((void *)dpcpu, 0);
572 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
573 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
574 msgbufp = (void *)msgbufpv;
576 virtual_avail = roundup2(freemempos, L2_SIZE);
577 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
578 kernel_vm_end = virtual_avail;
580 pa = pmap_early_vtophys(l1pt, freemempos);
582 /* Initialize phys_avail. */
583 for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
585 start = physmap[map_slot];
586 end = physmap[map_slot + 1];
590 if (start >= kernstart && end <= pa)
593 if (start < kernstart && end > kernstart)
595 else if (start < pa && end > pa)
597 phys_avail[avail_slot] = start;
598 phys_avail[avail_slot + 1] = end;
599 physmem += (end - start) >> PAGE_SHIFT;
602 if (end != physmap[map_slot + 1] && end > pa) {
603 phys_avail[avail_slot] = pa;
604 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
605 physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
609 phys_avail[avail_slot] = 0;
610 phys_avail[avail_slot + 1] = 0;
613 * Maxmem isn't the "maximum memory", it's one larger than the
614 * highest page of the physical address space. It should be
615 * called something like "Maxphyspage".
617 Maxmem = atop(phys_avail[avail_slot - 1]);
621 * Initialize a vm_page's machine-dependent fields.
624 pmap_page_init(vm_page_t m)
627 TAILQ_INIT(&m->md.pv_list);
628 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
632 * Initialize the pmap module.
633 * Called by vm_init, to initialize any structures that the pmap
634 * system needs to map virtual memory.
642 * Initialize the pv chunk and pmap list mutexes.
644 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
645 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
648 * Initialize the pool of pv list locks.
650 for (i = 0; i < NPV_LIST_LOCKS; i++)
651 rw_init(&pv_list_locks[i], "pmap pv list");
656 * For SMP, these functions have to use IPIs for coherence.
658 * In general, the calling thread uses a plain fence to order the
659 * writes to the page tables before invoking an SBI callback to invoke
660 * sfence_vma() on remote CPUs.
662 * Since the riscv pmap does not yet have a pm_active field, IPIs are
663 * sent to all CPUs in the system.
666 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
672 CPU_CLR(PCPU_GET(cpuid), &mask);
674 sbi_remote_sfence_vma(mask.__bits, va, 1);
680 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
686 CPU_CLR(PCPU_GET(cpuid), &mask);
688 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
691 * Might consider a loop of sfence_vma_page() for a small
692 * number of pages in the future.
699 pmap_invalidate_all(pmap_t pmap)
705 CPU_CLR(PCPU_GET(cpuid), &mask);
709 * XXX: The SBI doc doesn't detail how to specify x0 as the
710 * address to perform a global fence. BBL currently treats
711 * all sfence_vma requests as global however.
713 sbi_remote_sfence_vma(mask.__bits, 0, 0);
719 * Normal, non-SMP, invalidation functions.
720 * We inline these within pmap.c for speed.
723 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
730 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
734 * Might consider a loop of sfence_vma_page() for a small
735 * number of pages in the future.
741 pmap_invalidate_all(pmap_t pmap)
749 * Routine: pmap_extract
751 * Extract the physical page address associated
752 * with the given map/virtual_address pair.
755 pmap_extract(pmap_t pmap, vm_offset_t va)
764 * Start with the l2 tabel. We are unable to allocate
765 * pages in the l1 table.
767 l2p = pmap_l2(pmap, va);
770 if ((l2 & PTE_RX) == 0) {
771 l3p = pmap_l2_to_l3(l2p, va);
774 pa = PTE_TO_PHYS(l3);
775 pa |= (va & L3_OFFSET);
778 /* L2 is superpages */
779 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
780 pa |= (va & L2_OFFSET);
788 * Routine: pmap_extract_and_hold
790 * Atomically extract and hold the physical page
791 * with the given pmap and virtual address pair
792 * if that mapping permits the given protection.
795 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
806 l3p = pmap_l3(pmap, va);
807 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
808 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
809 phys = PTE_TO_PHYS(l3);
810 if (vm_page_pa_tryrelock(pmap, phys, &pa))
812 m = PHYS_TO_VM_PAGE(phys);
822 pmap_kextract(vm_offset_t va)
828 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
829 pa = DMAP_TO_PHYS(va);
831 l2 = pmap_l2(kernel_pmap, va);
833 panic("pmap_kextract: No l2");
834 if ((pmap_load(l2) & PTE_RX) != 0) {
836 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
837 pa |= (va & L2_OFFSET);
841 l3 = pmap_l2_to_l3(l2, va);
843 panic("pmap_kextract: No l3...");
844 pa = PTE_TO_PHYS(pmap_load(l3));
845 pa |= (va & PAGE_MASK);
850 /***************************************************
851 * Low level mapping routines.....
852 ***************************************************/
855 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
862 KASSERT((pa & L3_OFFSET) == 0,
863 ("pmap_kenter_device: Invalid physical address"));
864 KASSERT((sva & L3_OFFSET) == 0,
865 ("pmap_kenter_device: Invalid virtual address"));
866 KASSERT((size & PAGE_MASK) == 0,
867 ("pmap_kenter_device: Mapping is not page-sized"));
871 l3 = pmap_l3(kernel_pmap, va);
872 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
874 pn = (pa / PAGE_SIZE);
876 entry |= (pn << PTE_PPN0_S);
877 pmap_store(l3, entry);
883 pmap_invalidate_range(kernel_pmap, sva, va);
887 * Remove a page from the kernel pagetables.
888 * Note: not SMP coherent.
891 pmap_kremove(vm_offset_t va)
895 l3 = pmap_l3(kernel_pmap, va);
896 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
903 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
908 KASSERT((sva & L3_OFFSET) == 0,
909 ("pmap_kremove_device: Invalid virtual address"));
910 KASSERT((size & PAGE_MASK) == 0,
911 ("pmap_kremove_device: Mapping is not page-sized"));
915 l3 = pmap_l3(kernel_pmap, va);
916 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
923 pmap_invalidate_range(kernel_pmap, sva, va);
927 * Used to map a range of physical addresses into kernel
928 * virtual address space.
930 * The value passed in '*virt' is a suggested virtual address for
931 * the mapping. Architectures which can support a direct-mapped
932 * physical to virtual region can return the appropriate address
933 * within that region, leaving '*virt' unchanged. Other
934 * architectures should map the pages starting at '*virt' and
935 * update '*virt' with the first usable address after the mapped
939 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
942 return PHYS_TO_DMAP(start);
947 * Add a list of wired pages to the kva
948 * this routine is only used for temporary
949 * kernel mappings that do not need to have
950 * page modification or references recorded.
951 * Note that old mappings are simply written
952 * over. The page *must* be wired.
953 * Note: SMP coherent. Uses a ranged shootdown IPI.
956 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
966 for (i = 0; i < count; i++) {
968 pa = VM_PAGE_TO_PHYS(m);
969 pn = (pa / PAGE_SIZE);
970 l3 = pmap_l3(kernel_pmap, va);
973 entry |= (pn << PTE_PPN0_S);
974 pmap_store(l3, entry);
978 pmap_invalidate_range(kernel_pmap, sva, va);
982 * This routine tears out page mappings from the
983 * kernel -- it is meant only for temporary mappings.
984 * Note: SMP coherent. Uses a ranged shootdown IPI.
987 pmap_qremove(vm_offset_t sva, int count)
992 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
994 for (va = sva; count-- > 0; va += PAGE_SIZE) {
995 l3 = pmap_l3(kernel_pmap, va);
996 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
999 pmap_invalidate_range(kernel_pmap, sva, va);
1002 /***************************************************
1003 * Page table page management routines.....
1004 ***************************************************/
1006 * Schedule the specified unused page table page to be freed. Specifically,
1007 * add the page to the specified list of pages that will be released to the
1008 * physical memory manager after the TLB has been updated.
1010 static __inline void
1011 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1012 boolean_t set_PG_ZERO)
1016 m->flags |= PG_ZERO;
1018 m->flags &= ~PG_ZERO;
1019 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1023 * Decrements a page table page's wire count, which is used to record the
1024 * number of valid page table entries within the page. If the wire count
1025 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1026 * page table page was unmapped and FALSE otherwise.
1028 static inline boolean_t
1029 pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1033 if (m->wire_count == 0) {
1034 _pmap_unwire_l3(pmap, va, m, free);
1042 _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1046 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1048 * unmap the page table page
1050 if (m->pindex >= NUPDE) {
1053 l1 = pmap_l1(pmap, va);
1055 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1059 l2 = pmap_l2(pmap, va);
1062 pmap_resident_count_dec(pmap, 1);
1063 if (m->pindex < NUPDE) {
1065 /* We just released a PT, unhold the matching PD */
1068 l1 = pmap_l1(pmap, va);
1069 phys = PTE_TO_PHYS(pmap_load(l1));
1070 pdpg = PHYS_TO_VM_PAGE(phys);
1071 pmap_unwire_l3(pmap, va, pdpg, free);
1073 pmap_invalidate_page(pmap, va);
1078 * Put page on a list so that it is released after
1079 * *ALL* TLB shootdown is done
1081 pmap_add_delayed_free_list(m, free, TRUE);
1085 * After removing an l3 entry, this routine is used to
1086 * conditionally free the page, and manage the hold/wire counts.
1089 pmap_unuse_l3(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1090 struct spglist *free)
1095 if (va >= VM_MAXUSER_ADDRESS)
1097 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1099 phys = PTE_TO_PHYS(ptepde);
1101 mpte = PHYS_TO_VM_PAGE(phys);
1102 return (pmap_unwire_l3(pmap, va, mpte, free));
1106 pmap_pinit0(pmap_t pmap)
1109 PMAP_LOCK_INIT(pmap);
1110 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1111 pmap->pm_l1 = kernel_pmap->pm_l1;
1115 pmap_pinit(pmap_t pmap)
1121 * allocate the l1 page
1123 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1124 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1127 l1phys = VM_PAGE_TO_PHYS(l1pt);
1128 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1130 if ((l1pt->flags & PG_ZERO) == 0)
1131 pagezero(pmap->pm_l1);
1133 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1135 /* Install kernel pagetables */
1136 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1138 /* Add to the list of all user pmaps */
1139 mtx_lock(&allpmaps_lock);
1140 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1141 mtx_unlock(&allpmaps_lock);
1147 * This routine is called if the desired page table page does not exist.
1149 * If page table page allocation fails, this routine may sleep before
1150 * returning NULL. It sleeps only if a lock pointer was given.
1152 * Note: If a page allocation fails at page table level two or three,
1153 * one or two pages may be held during the wait, only to be released
1154 * afterwards. This conservative approach is easily argued to avoid
1158 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1160 vm_page_t m, /*pdppg, */pdpg;
1165 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1168 * Allocate a page table page.
1170 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1171 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1172 if (lockp != NULL) {
1173 RELEASE_PV_LIST_LOCK(lockp);
1175 rw_runlock(&pvh_global_lock);
1177 rw_rlock(&pvh_global_lock);
1182 * Indicate the need to retry. While waiting, the page table
1183 * page may have been allocated.
1188 if ((m->flags & PG_ZERO) == 0)
1192 * Map the pagetable page into the process address space, if
1193 * it isn't already there.
1196 if (ptepindex >= NUPDE) {
1198 vm_pindex_t l1index;
1200 l1index = ptepindex - NUPDE;
1201 l1 = &pmap->pm_l1[l1index];
1203 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1205 entry |= (pn << PTE_PPN0_S);
1206 pmap_store(l1, entry);
1207 pmap_distribute_l1(pmap, l1index, entry);
1209 vm_pindex_t l1index;
1210 pd_entry_t *l1, *l2;
1212 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1213 l1 = &pmap->pm_l1[l1index];
1214 if (pmap_load(l1) == 0) {
1215 /* recurse for allocating page dir */
1216 if (_pmap_alloc_l3(pmap, NUPDE + l1index,
1218 vm_page_unwire_noq(m);
1219 vm_page_free_zero(m);
1223 phys = PTE_TO_PHYS(pmap_load(l1));
1224 pdpg = PHYS_TO_VM_PAGE(phys);
1228 phys = PTE_TO_PHYS(pmap_load(l1));
1229 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1230 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1232 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1234 entry |= (pn << PTE_PPN0_S);
1235 pmap_store(l2, entry);
1238 pmap_resident_count_inc(pmap, 1);
1244 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1246 vm_pindex_t ptepindex;
1252 * Calculate pagetable page index
1254 ptepindex = pmap_l2_pindex(va);
1257 * Get the page directory entry
1259 l2 = pmap_l2(pmap, va);
1262 * If the page table page is mapped, we just increment the
1263 * hold count, and activate it.
1265 if (l2 != NULL && pmap_load(l2) != 0) {
1266 phys = PTE_TO_PHYS(pmap_load(l2));
1267 m = PHYS_TO_VM_PAGE(phys);
1271 * Here if the pte page isn't mapped, or if it has been
1274 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1275 if (m == NULL && lockp != NULL)
1282 /***************************************************
1283 * Pmap allocation/deallocation routines.
1284 ***************************************************/
1287 * Release any resources held by the given physical map.
1288 * Called when a pmap initialized by pmap_pinit is being released.
1289 * Should only be called if the map contains no valid mappings.
1292 pmap_release(pmap_t pmap)
1296 KASSERT(pmap->pm_stats.resident_count == 0,
1297 ("pmap_release: pmap resident count %ld != 0",
1298 pmap->pm_stats.resident_count));
1300 mtx_lock(&allpmaps_lock);
1301 LIST_REMOVE(pmap, pm_list);
1302 mtx_unlock(&allpmaps_lock);
1304 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1305 vm_page_unwire_noq(m);
1311 kvm_size(SYSCTL_HANDLER_ARGS)
1313 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1315 return sysctl_handle_long(oidp, &ksize, 0, req);
1317 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1318 0, 0, kvm_size, "LU", "Size of KVM");
1321 kvm_free(SYSCTL_HANDLER_ARGS)
1323 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1325 return sysctl_handle_long(oidp, &kfree, 0, req);
1327 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1328 0, 0, kvm_free, "LU", "Amount of KVM free");
1332 * grow the number of kernel page table entries, if needed
1335 pmap_growkernel(vm_offset_t addr)
1339 pd_entry_t *l1, *l2;
1343 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1345 addr = roundup2(addr, L2_SIZE);
1346 if (addr - 1 >= vm_map_max(kernel_map))
1347 addr = vm_map_max(kernel_map);
1348 while (kernel_vm_end < addr) {
1349 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1350 if (pmap_load(l1) == 0) {
1351 /* We need a new PDP entry */
1352 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1353 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1354 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1356 panic("pmap_growkernel: no memory to grow kernel");
1357 if ((nkpg->flags & PG_ZERO) == 0)
1358 pmap_zero_page(nkpg);
1359 paddr = VM_PAGE_TO_PHYS(nkpg);
1361 pn = (paddr / PAGE_SIZE);
1363 entry |= (pn << PTE_PPN0_S);
1364 pmap_store(l1, entry);
1365 pmap_distribute_l1(kernel_pmap,
1366 pmap_l1_index(kernel_vm_end), entry);
1367 continue; /* try again */
1369 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1370 if ((pmap_load(l2) & PTE_V) != 0 &&
1371 (pmap_load(l2) & PTE_RWX) == 0) {
1372 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1373 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1374 kernel_vm_end = vm_map_max(kernel_map);
1380 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1381 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1384 panic("pmap_growkernel: no memory to grow kernel");
1385 if ((nkpg->flags & PG_ZERO) == 0) {
1386 pmap_zero_page(nkpg);
1388 paddr = VM_PAGE_TO_PHYS(nkpg);
1390 pn = (paddr / PAGE_SIZE);
1392 entry |= (pn << PTE_PPN0_S);
1393 pmap_store(l2, entry);
1395 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1397 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1398 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1399 kernel_vm_end = vm_map_max(kernel_map);
1406 /***************************************************
1407 * page management routines.
1408 ***************************************************/
1410 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1411 CTASSERT(_NPCM == 3);
1412 CTASSERT(_NPCPV == 168);
1414 static __inline struct pv_chunk *
1415 pv_to_chunk(pv_entry_t pv)
1418 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1421 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1423 #define PC_FREE0 0xfffffffffffffffful
1424 #define PC_FREE1 0xfffffffffffffffful
1425 #define PC_FREE2 0x000000fffffffffful
1427 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1431 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1433 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1434 "Current number of pv entry chunks");
1435 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1436 "Current number of pv entry chunks allocated");
1437 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1438 "Current number of pv entry chunks frees");
1439 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1440 "Number of times tried to get a chunk page but failed.");
1442 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1443 static int pv_entry_spare;
1445 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1446 "Current number of pv entry frees");
1447 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1448 "Current number of pv entry allocs");
1449 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1450 "Current number of pv entries");
1451 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1452 "Current number of spare pv entries");
1457 * We are in a serious low memory condition. Resort to
1458 * drastic measures to free some pages so we can allocate
1459 * another pv entry chunk.
1461 * Returns NULL if PV entries were reclaimed from the specified pmap.
1463 * We do not, however, unmap 2mpages because subsequent accesses will
1464 * allocate per-page pv entries until repromotion occurs, thereby
1465 * exacerbating the shortage of free pv entries.
1468 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1471 panic("RISCVTODO: reclaim_pv_chunk");
1475 * free the pv_entry back to the free list
1478 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1480 struct pv_chunk *pc;
1481 int idx, field, bit;
1483 rw_assert(&pvh_global_lock, RA_LOCKED);
1484 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1485 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1486 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1487 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1488 pc = pv_to_chunk(pv);
1489 idx = pv - &pc->pc_pventry[0];
1492 pc->pc_map[field] |= 1ul << bit;
1493 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1494 pc->pc_map[2] != PC_FREE2) {
1495 /* 98% of the time, pc is already at the head of the list. */
1496 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1497 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1498 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1502 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1507 free_pv_chunk(struct pv_chunk *pc)
1511 mtx_lock(&pv_chunks_mutex);
1512 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1513 mtx_unlock(&pv_chunks_mutex);
1514 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1515 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1516 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1517 /* entire chunk is free, return it */
1518 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1519 #if 0 /* TODO: For minidump */
1520 dump_drop_page(m->phys_addr);
1522 vm_page_unwire(m, PQ_NONE);
1527 * Returns a new PV entry, allocating a new PV chunk from the system when
1528 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1529 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1532 * The given PV list lock may be released.
1535 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1539 struct pv_chunk *pc;
1542 rw_assert(&pvh_global_lock, RA_LOCKED);
1543 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1544 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1546 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1548 for (field = 0; field < _NPCM; field++) {
1549 if (pc->pc_map[field]) {
1550 bit = ffsl(pc->pc_map[field]) - 1;
1554 if (field < _NPCM) {
1555 pv = &pc->pc_pventry[field * 64 + bit];
1556 pc->pc_map[field] &= ~(1ul << bit);
1557 /* If this was the last item, move it to tail */
1558 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1559 pc->pc_map[2] == 0) {
1560 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1561 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1564 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1565 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1569 /* No free items, allocate another chunk */
1570 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1573 if (lockp == NULL) {
1574 PV_STAT(pc_chunk_tryfail++);
1577 m = reclaim_pv_chunk(pmap, lockp);
1581 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1582 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1583 #if 0 /* TODO: This is for minidump */
1584 dump_add_page(m->phys_addr);
1586 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1588 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1589 pc->pc_map[1] = PC_FREE1;
1590 pc->pc_map[2] = PC_FREE2;
1591 mtx_lock(&pv_chunks_mutex);
1592 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1593 mtx_unlock(&pv_chunks_mutex);
1594 pv = &pc->pc_pventry[0];
1595 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1596 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1597 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1602 * First find and then remove the pv entry for the specified pmap and virtual
1603 * address from the specified pv list. Returns the pv entry if found and NULL
1604 * otherwise. This operation can be performed on pv lists for either 4KB or
1605 * 2MB page mappings.
1607 static __inline pv_entry_t
1608 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1612 rw_assert(&pvh_global_lock, RA_LOCKED);
1613 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1614 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1615 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1624 * First find and then destroy the pv entry for the specified pmap and virtual
1625 * address. This operation can be performed on pv lists for either 4KB or 2MB
1629 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1633 pv = pmap_pvh_remove(pvh, pmap, va);
1635 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
1636 free_pv_entry(pmap, pv);
1640 * Conditionally create the PV entry for a 4KB page mapping if the required
1641 * memory can be allocated without resorting to reclamation.
1644 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1645 struct rwlock **lockp)
1649 rw_assert(&pvh_global_lock, RA_LOCKED);
1650 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1651 /* Pass NULL instead of the lock pointer to disable reclamation. */
1652 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1654 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1655 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1663 * pmap_remove_l3: do the things to unmap a page in a process
1666 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
1667 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
1673 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1674 old_l3 = pmap_load_clear(l3);
1675 pmap_invalidate_page(pmap, va);
1676 if (old_l3 & PTE_SW_WIRED)
1677 pmap->pm_stats.wired_count -= 1;
1678 pmap_resident_count_dec(pmap, 1);
1679 if (old_l3 & PTE_SW_MANAGED) {
1680 phys = PTE_TO_PHYS(old_l3);
1681 m = PHYS_TO_VM_PAGE(phys);
1682 if ((old_l3 & PTE_D) != 0)
1685 vm_page_aflag_set(m, PGA_REFERENCED);
1686 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1687 pmap_pvh_free(&m->md, pmap, va);
1690 return (pmap_unuse_l3(pmap, va, l2e, free));
1694 * Remove the given range of addresses from the specified map.
1696 * It is assumed that the start and end are properly
1697 * rounded to the page size.
1700 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1702 struct rwlock *lock;
1703 vm_offset_t va, va_next;
1704 pd_entry_t *l1, *l2;
1705 pt_entry_t l3_pte, *l3;
1706 struct spglist free;
1709 * Perform an unsynchronized read. This is, however, safe.
1711 if (pmap->pm_stats.resident_count == 0)
1716 rw_rlock(&pvh_global_lock);
1720 for (; sva < eva; sva = va_next) {
1721 if (pmap->pm_stats.resident_count == 0)
1724 l1 = pmap_l1(pmap, sva);
1725 if (pmap_load(l1) == 0) {
1726 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1733 * Calculate index for next page table.
1735 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1739 l2 = pmap_l1_to_l2(l1, sva);
1743 l3_pte = pmap_load(l2);
1746 * Weed out invalid mappings.
1750 if ((pmap_load(l2) & PTE_RX) != 0)
1754 * Limit our scan to either the end of the va represented
1755 * by the current page table page, or to the end of the
1756 * range being removed.
1762 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1765 panic("l3 == NULL");
1766 if (pmap_load(l3) == 0) {
1767 if (va != va_next) {
1768 pmap_invalidate_range(pmap, va, sva);
1775 if (pmap_remove_l3(pmap, l3, sva, l3_pte, &free,
1782 pmap_invalidate_range(pmap, va, sva);
1786 rw_runlock(&pvh_global_lock);
1788 vm_page_free_pages_toq(&free, false);
1792 * Routine: pmap_remove_all
1794 * Removes this physical page from
1795 * all physical maps in which it resides.
1796 * Reflects back modify bits to the pager.
1799 * Original versions of this routine were very
1800 * inefficient because they iteratively called
1801 * pmap_remove (slow...)
1805 pmap_remove_all(vm_page_t m)
1809 pt_entry_t *l3, tl3;
1810 pd_entry_t *l2, tl2;
1811 struct spglist free;
1813 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1814 ("pmap_remove_all: page %p is not managed", m));
1816 rw_wlock(&pvh_global_lock);
1817 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1820 pmap_resident_count_dec(pmap, 1);
1821 l2 = pmap_l2(pmap, pv->pv_va);
1822 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
1823 tl2 = pmap_load(l2);
1825 KASSERT((tl2 & PTE_RX) == 0,
1826 ("pmap_remove_all: found a table when expecting "
1827 "a block in %p's pv list", m));
1829 l3 = pmap_l2_to_l3(l2, pv->pv_va);
1830 tl3 = pmap_load_clear(l3);
1831 pmap_invalidate_page(pmap, pv->pv_va);
1832 if (tl3 & PTE_SW_WIRED)
1833 pmap->pm_stats.wired_count--;
1834 if ((tl3 & PTE_A) != 0)
1835 vm_page_aflag_set(m, PGA_REFERENCED);
1838 * Update the vm_page_t clean and reference bits.
1840 if ((tl3 & PTE_D) != 0)
1842 pmap_unuse_l3(pmap, pv->pv_va, pmap_load(l2), &free);
1843 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
1845 free_pv_entry(pmap, pv);
1848 vm_page_aflag_clear(m, PGA_WRITEABLE);
1849 rw_wunlock(&pvh_global_lock);
1850 vm_page_free_pages_toq(&free, false);
1854 * Set the physical protection on the
1855 * specified range of this map as requested.
1858 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1860 pd_entry_t *l1, *l2;
1861 pt_entry_t *l3, l3e, mask;
1863 vm_offset_t va_next;
1865 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1866 pmap_remove(pmap, sva, eva);
1870 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
1871 (VM_PROT_WRITE | VM_PROT_EXECUTE))
1875 if ((prot & VM_PROT_WRITE) == 0)
1876 mask |= PTE_W | PTE_D;
1877 if ((prot & VM_PROT_EXECUTE) == 0)
1881 for (; sva < eva; sva = va_next) {
1882 l1 = pmap_l1(pmap, sva);
1883 if (pmap_load(l1) == 0) {
1884 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1890 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1894 l2 = pmap_l1_to_l2(l1, sva);
1895 if (l2 == NULL || pmap_load(l2) == 0)
1897 if ((pmap_load(l2) & PTE_RX) != 0)
1903 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1905 l3e = pmap_load(l3);
1907 if ((l3e & PTE_V) == 0)
1909 if ((prot & VM_PROT_WRITE) == 0 &&
1910 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
1911 (PTE_SW_MANAGED | PTE_D)) {
1912 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
1915 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
1917 /* XXX: Use pmap_invalidate_range */
1918 pmap_invalidate_page(pmap, sva);
1925 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1936 l3 = pmap_l3(pmap, va);
1940 orig_l3 = pmap_load(l3);
1941 if ((orig_l3 & PTE_V) == 0 ||
1942 ((prot & VM_PROT_WRITE) != 0 && (orig_l3 & PTE_W) == 0) ||
1943 ((prot & VM_PROT_READ) != 0 && (orig_l3 & PTE_R) == 0))
1946 new_l3 = orig_l3 | PTE_A;
1947 if ((prot & VM_PROT_WRITE) != 0)
1950 if (orig_l3 != new_l3) {
1951 pmap_store(l3, new_l3);
1952 pmap_invalidate_page(pmap, va);
1958 * XXX: This case should never happen since it means
1959 * the PTE shouldn't have resulted in a fault.
1969 * Insert the given physical page (p) at
1970 * the specified virtual address (v) in the
1971 * target physical map with the protection requested.
1973 * If specified, the page will be wired down, meaning
1974 * that the related pte can not be reclaimed.
1976 * NB: This is the only routine which MAY NOT lazy-evaluate
1977 * or lose information. That is, this routine must actually
1978 * insert this page into the given map NOW.
1981 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
1982 u_int flags, int8_t psind __unused)
1984 struct rwlock *lock;
1985 pd_entry_t *l1, *l2;
1986 pt_entry_t new_l3, orig_l3;
1989 vm_paddr_t opa, pa, l2_pa, l3_pa;
1990 vm_page_t mpte, om, l2_m, l3_m;
1997 va = trunc_page(va);
1998 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
1999 VM_OBJECT_ASSERT_LOCKED(m->object);
2000 pa = VM_PAGE_TO_PHYS(m);
2001 pn = (pa / PAGE_SIZE);
2003 new_l3 = PTE_V | PTE_R | PTE_X;
2004 if (prot & VM_PROT_WRITE)
2006 if ((va >> 63) == 0)
2009 new_l3 |= PTE_A | PTE_D;
2011 new_l3 |= (pn << PTE_PPN0_S);
2012 if ((flags & PMAP_ENTER_WIRED) != 0)
2013 new_l3 |= PTE_SW_WIRED;
2014 if ((m->oflags & VPO_UNMANAGED) == 0)
2015 new_l3 |= PTE_SW_MANAGED;
2017 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2022 rw_rlock(&pvh_global_lock);
2025 if (va < VM_MAXUSER_ADDRESS) {
2026 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2027 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2028 if (mpte == NULL && nosleep) {
2029 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2032 rw_runlock(&pvh_global_lock);
2034 return (KERN_RESOURCE_SHORTAGE);
2036 l3 = pmap_l3(pmap, va);
2038 l3 = pmap_l3(pmap, va);
2039 /* TODO: This is not optimal, but should mostly work */
2041 l2 = pmap_l2(pmap, va);
2043 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2044 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2047 panic("pmap_enter: l2 pte_m == NULL");
2048 if ((l2_m->flags & PG_ZERO) == 0)
2049 pmap_zero_page(l2_m);
2051 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2052 l2_pn = (l2_pa / PAGE_SIZE);
2054 l1 = pmap_l1(pmap, va);
2056 entry |= (l2_pn << PTE_PPN0_S);
2057 pmap_store(l1, entry);
2058 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2059 l2 = pmap_l1_to_l2(l1, va);
2063 ("No l2 table after allocating one"));
2065 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2066 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2068 panic("pmap_enter: l3 pte_m == NULL");
2069 if ((l3_m->flags & PG_ZERO) == 0)
2070 pmap_zero_page(l3_m);
2072 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2073 l3_pn = (l3_pa / PAGE_SIZE);
2075 entry |= (l3_pn << PTE_PPN0_S);
2076 pmap_store(l2, entry);
2077 l3 = pmap_l2_to_l3(l2, va);
2079 pmap_invalidate_page(pmap, va);
2082 orig_l3 = pmap_load(l3);
2083 opa = PTE_TO_PHYS(orig_l3);
2087 * Is the specified virtual address already mapped?
2089 if ((orig_l3 & PTE_V) != 0) {
2091 * Wiring change, just update stats. We don't worry about
2092 * wiring PT pages as they remain resident as long as there
2093 * are valid mappings in them. Hence, if a user page is wired,
2094 * the PT page will be also.
2096 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2097 (orig_l3 & PTE_SW_WIRED) == 0)
2098 pmap->pm_stats.wired_count++;
2099 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2100 (orig_l3 & PTE_SW_WIRED) != 0)
2101 pmap->pm_stats.wired_count--;
2104 * Remove the extra PT page reference.
2108 KASSERT(mpte->wire_count > 0,
2109 ("pmap_enter: missing reference to page table page,"
2114 * Has the physical page changed?
2118 * No, might be a protection or wiring change.
2120 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2121 (new_l3 & PTE_W) != 0)
2122 vm_page_aflag_set(m, PGA_WRITEABLE);
2127 * The physical page has changed. Temporarily invalidate
2128 * the mapping. This ensures that all threads sharing the
2129 * pmap keep a consistent view of the mapping, which is
2130 * necessary for the correct handling of COW faults. It
2131 * also permits reuse of the old mapping's PV entry,
2132 * avoiding an allocation.
2134 * For consistency, handle unmanaged mappings the same way.
2136 orig_l3 = pmap_load_clear(l3);
2137 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2138 ("pmap_enter: unexpected pa update for %#lx", va));
2139 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2140 om = PHYS_TO_VM_PAGE(opa);
2143 * The pmap lock is sufficient to synchronize with
2144 * concurrent calls to pmap_page_test_mappings() and
2145 * pmap_ts_referenced().
2147 if ((orig_l3 & PTE_D) != 0)
2149 if ((orig_l3 & PTE_A) != 0)
2150 vm_page_aflag_set(om, PGA_REFERENCED);
2151 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2152 pv = pmap_pvh_remove(&om->md, pmap, va);
2153 if ((new_l3 & PTE_SW_MANAGED) == 0)
2154 free_pv_entry(pmap, pv);
2155 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2156 TAILQ_EMPTY(&om->md.pv_list))
2157 vm_page_aflag_clear(om, PGA_WRITEABLE);
2159 pmap_invalidate_page(pmap, va);
2163 * Increment the counters.
2165 if ((new_l3 & PTE_SW_WIRED) != 0)
2166 pmap->pm_stats.wired_count++;
2167 pmap_resident_count_inc(pmap, 1);
2170 * Enter on the PV list if part of our managed memory.
2172 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2174 pv = get_pv_entry(pmap, &lock);
2177 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2178 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2180 if ((new_l3 & PTE_W) != 0)
2181 vm_page_aflag_set(m, PGA_WRITEABLE);
2186 * Sync the i-cache on all harts before updating the PTE
2187 * if the new PTE is executable.
2189 if (prot & VM_PROT_EXECUTE)
2190 pmap_sync_icache(pmap, va, PAGE_SIZE);
2193 * Update the L3 entry.
2196 orig_l3 = pmap_load_store(l3, new_l3);
2197 pmap_invalidate_page(pmap, va);
2198 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2199 ("pmap_enter: invalid update"));
2200 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2201 (PTE_D | PTE_SW_MANAGED))
2204 pmap_store(l3, new_l3);
2209 rw_runlock(&pvh_global_lock);
2211 return (KERN_SUCCESS);
2215 * Maps a sequence of resident pages belonging to the same object.
2216 * The sequence begins with the given page m_start. This page is
2217 * mapped at the given virtual address start. Each subsequent page is
2218 * mapped at a virtual address that is offset from start by the same
2219 * amount as the page is offset from m_start within the object. The
2220 * last page in the sequence is the page with the largest offset from
2221 * m_start that can be mapped at a virtual address less than the given
2222 * virtual address end. Not every virtual page between start and end
2223 * is mapped; only those for which a resident page exists with the
2224 * corresponding offset from m_start are mapped.
2227 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2228 vm_page_t m_start, vm_prot_t prot)
2230 struct rwlock *lock;
2233 vm_pindex_t diff, psize;
2235 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2237 psize = atop(end - start);
2241 rw_rlock(&pvh_global_lock);
2243 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2244 va = start + ptoa(diff);
2245 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte, &lock);
2246 m = TAILQ_NEXT(m, listq);
2250 rw_runlock(&pvh_global_lock);
2255 * this code makes some *MAJOR* assumptions:
2256 * 1. Current pmap & pmap exists.
2259 * 4. No page table pages.
2260 * but is *MUCH* faster than pmap_enter...
2264 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2266 struct rwlock *lock;
2269 rw_rlock(&pvh_global_lock);
2271 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
2274 rw_runlock(&pvh_global_lock);
2279 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2280 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
2282 struct spglist free;
2285 pt_entry_t *l3, newl3;
2287 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2288 (m->oflags & VPO_UNMANAGED) != 0,
2289 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2290 rw_assert(&pvh_global_lock, RA_LOCKED);
2291 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2293 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
2295 * In the case that a page table page is not
2296 * resident, we are creating it here.
2298 if (va < VM_MAXUSER_ADDRESS) {
2299 vm_pindex_t l2pindex;
2302 * Calculate pagetable page index
2304 l2pindex = pmap_l2_pindex(va);
2305 if (mpte && (mpte->pindex == l2pindex)) {
2311 l2 = pmap_l2(pmap, va);
2314 * If the page table page is mapped, we just increment
2315 * the hold count, and activate it. Otherwise, we
2316 * attempt to allocate a page table page. If this
2317 * attempt fails, we don't retry. Instead, we give up.
2319 if (l2 != NULL && pmap_load(l2) != 0) {
2320 phys = PTE_TO_PHYS(pmap_load(l2));
2321 mpte = PHYS_TO_VM_PAGE(phys);
2325 * Pass NULL instead of the PV list lock
2326 * pointer, because we don't intend to sleep.
2328 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
2333 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
2334 l3 = &l3[pmap_l3_index(va)];
2337 l3 = pmap_l3(kernel_pmap, va);
2340 panic("pmap_enter_quick_locked: No l3");
2341 if (pmap_load(l3) != 0) {
2350 * Enter on the PV list if part of our managed memory.
2352 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2353 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
2356 if (pmap_unwire_l3(pmap, va, mpte, &free)) {
2357 pmap_invalidate_page(pmap, va);
2358 vm_page_free_pages_toq(&free, false);
2366 * Increment counters
2368 pmap_resident_count_inc(pmap, 1);
2370 pa = VM_PAGE_TO_PHYS(m);
2371 pn = (pa / PAGE_SIZE);
2373 entry = (PTE_V | PTE_R | PTE_X);
2374 entry |= (pn << PTE_PPN0_S);
2377 * Now validate mapping with RO protection
2379 if ((m->oflags & VPO_UNMANAGED) == 0)
2380 entry |= PTE_SW_MANAGED;
2383 * Sync the i-cache on all harts before updating the PTE
2384 * if the new PTE is executable.
2386 if (prot & VM_PROT_EXECUTE)
2387 pmap_sync_icache(pmap, va, PAGE_SIZE);
2389 pmap_store(l3, entry);
2391 pmap_invalidate_page(pmap, va);
2396 * This code maps large physical mmap regions into the
2397 * processor address space. Note that some shortcuts
2398 * are taken, but the code works.
2401 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2402 vm_pindex_t pindex, vm_size_t size)
2405 VM_OBJECT_ASSERT_WLOCKED(object);
2406 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2407 ("pmap_object_init_pt: non-device object"));
2411 * Clear the wired attribute from the mappings for the specified range of
2412 * addresses in the given pmap. Every valid mapping within that range
2413 * must have the wired attribute set. In contrast, invalid mappings
2414 * cannot have the wired attribute set, so they are ignored.
2416 * The wired attribute of the page table entry is not a hardware feature,
2417 * so there is no need to invalidate any TLB entries.
2420 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2422 vm_offset_t va_next;
2423 pd_entry_t *l1, *l2;
2425 boolean_t pv_lists_locked;
2427 pv_lists_locked = FALSE;
2429 for (; sva < eva; sva = va_next) {
2430 l1 = pmap_l1(pmap, sva);
2431 if (pmap_load(l1) == 0) {
2432 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2438 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2442 l2 = pmap_l1_to_l2(l1, sva);
2443 if (pmap_load(l2) == 0)
2448 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2450 if (pmap_load(l3) == 0)
2452 if ((pmap_load(l3) & PTE_SW_WIRED) == 0)
2453 panic("pmap_unwire: l3 %#jx is missing "
2454 "PTE_SW_WIRED", (uintmax_t)*l3);
2457 * PG_W must be cleared atomically. Although the pmap
2458 * lock synchronizes access to PG_W, another processor
2459 * could be setting PG_M and/or PG_A concurrently.
2461 atomic_clear_long(l3, PTE_SW_WIRED);
2462 pmap->pm_stats.wired_count--;
2465 if (pv_lists_locked)
2466 rw_runlock(&pvh_global_lock);
2471 * Copy the range specified by src_addr/len
2472 * from the source map to the range dst_addr/len
2473 * in the destination map.
2475 * This routine is only advisory and need not do anything.
2479 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2480 vm_offset_t src_addr)
2486 * pmap_zero_page zeros the specified hardware page by mapping
2487 * the page into KVM and using bzero to clear its contents.
2490 pmap_zero_page(vm_page_t m)
2492 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2494 pagezero((void *)va);
2498 * pmap_zero_page_area zeros the specified hardware page by mapping
2499 * the page into KVM and using bzero to clear its contents.
2501 * off and size may not cover an area beyond a single hardware page.
2504 pmap_zero_page_area(vm_page_t m, int off, int size)
2506 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2508 if (off == 0 && size == PAGE_SIZE)
2509 pagezero((void *)va);
2511 bzero((char *)va + off, size);
2515 * pmap_copy_page copies the specified (machine independent)
2516 * page by mapping the page into virtual memory and using
2517 * bcopy to copy the page, one machine dependent page at a
2521 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2523 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2524 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2526 pagecopy((void *)src, (void *)dst);
2529 int unmapped_buf_allowed = 1;
2532 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2533 vm_offset_t b_offset, int xfersize)
2537 vm_paddr_t p_a, p_b;
2538 vm_offset_t a_pg_offset, b_pg_offset;
2541 while (xfersize > 0) {
2542 a_pg_offset = a_offset & PAGE_MASK;
2543 m_a = ma[a_offset >> PAGE_SHIFT];
2544 p_a = m_a->phys_addr;
2545 b_pg_offset = b_offset & PAGE_MASK;
2546 m_b = mb[b_offset >> PAGE_SHIFT];
2547 p_b = m_b->phys_addr;
2548 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2549 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2550 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
2551 panic("!DMAP a %lx", p_a);
2553 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
2555 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
2556 panic("!DMAP b %lx", p_b);
2558 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
2560 bcopy(a_cp, b_cp, cnt);
2568 pmap_quick_enter_page(vm_page_t m)
2571 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
2575 pmap_quick_remove_page(vm_offset_t addr)
2580 * Returns true if the pmap's pv is one of the first
2581 * 16 pvs linked to from this page. This count may
2582 * be changed upwards or downwards in the future; it
2583 * is only necessary that true be returned for a small
2584 * subset of pmaps for proper page aging.
2587 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2589 struct rwlock *lock;
2594 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2595 ("pmap_page_exists_quick: page %p is not managed", m));
2597 rw_rlock(&pvh_global_lock);
2598 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2600 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2601 if (PV_PMAP(pv) == pmap) {
2610 rw_runlock(&pvh_global_lock);
2615 * pmap_page_wired_mappings:
2617 * Return the number of managed mappings to the given physical page
2621 pmap_page_wired_mappings(vm_page_t m)
2623 struct rwlock *lock;
2629 if ((m->oflags & VPO_UNMANAGED) != 0)
2631 rw_rlock(&pvh_global_lock);
2632 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2636 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2638 if (!PMAP_TRYLOCK(pmap)) {
2639 md_gen = m->md.pv_gen;
2643 if (md_gen != m->md.pv_gen) {
2648 l3 = pmap_l3(pmap, pv->pv_va);
2649 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
2654 rw_runlock(&pvh_global_lock);
2659 * Destroy all managed, non-wired mappings in the given user-space
2660 * pmap. This pmap cannot be active on any processor besides the
2663 * This function cannot be applied to the kernel pmap. Moreover, it
2664 * is not intended for general use. It is only to be used during
2665 * process termination. Consequently, it can be implemented in ways
2666 * that make it faster than pmap_remove(). First, it can more quickly
2667 * destroy mappings by iterating over the pmap's collection of PV
2668 * entries, rather than searching the page table. Second, it doesn't
2669 * have to test and clear the page table entries atomically, because
2670 * no processor is currently accessing the user address space. In
2671 * particular, a page table entry's dirty bit won't change state once
2672 * this function starts.
2675 pmap_remove_pages(pmap_t pmap)
2677 pd_entry_t ptepde, *l2;
2678 pt_entry_t *l3, tl3;
2679 struct spglist free;
2682 struct pv_chunk *pc, *npc;
2683 struct rwlock *lock;
2685 uint64_t inuse, bitmask;
2686 int allfree, field, freed, idx;
2692 rw_rlock(&pvh_global_lock);
2694 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2697 for (field = 0; field < _NPCM; field++) {
2698 inuse = ~pc->pc_map[field] & pc_freemask[field];
2699 while (inuse != 0) {
2700 bit = ffsl(inuse) - 1;
2701 bitmask = 1UL << bit;
2702 idx = field * 64 + bit;
2703 pv = &pc->pc_pventry[idx];
2706 l2 = pmap_l2(pmap, pv->pv_va);
2707 ptepde = pmap_load(l2);
2708 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2709 tl3 = pmap_load(l3);
2712 * We cannot remove wired pages from a
2713 * process' mapping at this time.
2715 if (tl3 & PTE_SW_WIRED) {
2720 pa = PTE_TO_PHYS(tl3);
2721 m = PHYS_TO_VM_PAGE(pa);
2722 KASSERT(m->phys_addr == pa,
2723 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2724 m, (uintmax_t)m->phys_addr,
2727 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
2728 m < &vm_page_array[vm_page_array_size],
2729 ("pmap_remove_pages: bad l3 %#jx",
2735 * Update the vm_page_t clean/reference bits.
2737 if ((tl3 & PTE_D) != 0)
2740 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
2743 pc->pc_map[field] |= bitmask;
2745 pmap_resident_count_dec(pmap, 1);
2746 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2749 pmap_unuse_l3(pmap, pv->pv_va, ptepde, &free);
2753 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
2754 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
2755 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
2757 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2763 pmap_invalidate_all(pmap);
2764 rw_runlock(&pvh_global_lock);
2766 vm_page_free_pages_toq(&free, false);
2770 * This is used to check if a page has been accessed or modified. As we
2771 * don't have a bit to see if it has been modified we have to assume it
2772 * has been if the page is read/write.
2775 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
2777 struct rwlock *lock;
2779 pt_entry_t *l3, mask, value;
2785 rw_rlock(&pvh_global_lock);
2786 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2789 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2791 if (!PMAP_TRYLOCK(pmap)) {
2792 md_gen = m->md.pv_gen;
2796 if (md_gen != m->md.pv_gen) {
2801 l3 = pmap_l3(pmap, pv->pv_va);
2815 mask |= ATTR_AP_RW_BIT;
2816 value |= ATTR_AP(ATTR_AP_RW);
2819 mask |= ATTR_AF | ATTR_DESCR_MASK;
2820 value |= ATTR_AF | L3_PAGE;
2824 rv = (pmap_load(l3) & mask) == value;
2831 rw_runlock(&pvh_global_lock);
2838 * Return whether or not the specified physical page was modified
2839 * in any physical maps.
2842 pmap_is_modified(vm_page_t m)
2845 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2846 ("pmap_is_modified: page %p is not managed", m));
2849 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2850 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2851 * is clear, no PTEs can have PG_M set.
2853 VM_OBJECT_ASSERT_WLOCKED(m->object);
2854 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2856 return (pmap_page_test_mappings(m, FALSE, TRUE));
2860 * pmap_is_prefaultable:
2862 * Return whether or not the specified virtual address is eligible
2866 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2873 l3 = pmap_l3(pmap, addr);
2874 if (l3 != NULL && pmap_load(l3) != 0) {
2882 * pmap_is_referenced:
2884 * Return whether or not the specified physical page was referenced
2885 * in any physical maps.
2888 pmap_is_referenced(vm_page_t m)
2891 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2892 ("pmap_is_referenced: page %p is not managed", m));
2893 return (pmap_page_test_mappings(m, TRUE, FALSE));
2897 * Clear the write and modified bits in each of the given page's mappings.
2900 pmap_remove_write(vm_page_t m)
2903 struct rwlock *lock;
2905 pt_entry_t *l3, oldl3;
2909 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2910 ("pmap_remove_write: page %p is not managed", m));
2913 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2914 * set by another thread while the object is locked. Thus,
2915 * if PGA_WRITEABLE is clear, no page table entries need updating.
2917 VM_OBJECT_ASSERT_WLOCKED(m->object);
2918 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2920 rw_rlock(&pvh_global_lock);
2921 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2924 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2926 if (!PMAP_TRYLOCK(pmap)) {
2927 md_gen = m->md.pv_gen;
2931 if (md_gen != m->md.pv_gen) {
2937 l3 = pmap_l3(pmap, pv->pv_va);
2939 oldl3 = pmap_load(l3);
2941 if ((oldl3 & PTE_W) != 0) {
2942 newl3 = oldl3 & ~PTE_W;
2943 if (!atomic_cmpset_long(l3, oldl3, newl3))
2945 /* TODO: check for PTE_D? */
2946 if ((oldl3 & PTE_A) != 0)
2948 pmap_invalidate_page(pmap, pv->pv_va);
2953 vm_page_aflag_clear(m, PGA_WRITEABLE);
2954 rw_runlock(&pvh_global_lock);
2957 static __inline boolean_t
2958 safe_to_clear_referenced(pmap_t pmap, pt_entry_t pte)
2965 * pmap_ts_referenced:
2967 * Return a count of reference bits for a page, clearing those bits.
2968 * It is not necessary for every reference bit to be cleared, but it
2969 * is necessary that 0 only be returned when there are truly no
2970 * reference bits set.
2972 * As an optimization, update the page's dirty field if a modified bit is
2973 * found while counting reference bits. This opportunistic update can be
2974 * performed at low cost and can eliminate the need for some future calls
2975 * to pmap_is_modified(). However, since this function stops after
2976 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
2977 * dirty pages. Those dirty pages will only be detected by a future call
2978 * to pmap_is_modified().
2981 pmap_ts_referenced(vm_page_t m)
2985 struct rwlock *lock;
2987 pt_entry_t *l3, old_l3;
2989 int cleared, md_gen, not_cleared;
2990 struct spglist free;
2992 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2993 ("pmap_ts_referenced: page %p is not managed", m));
2996 pa = VM_PAGE_TO_PHYS(m);
2997 lock = PHYS_TO_PV_LIST_LOCK(pa);
2998 rw_rlock(&pvh_global_lock);
3002 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
3009 if (!PMAP_TRYLOCK(pmap)) {
3010 md_gen = m->md.pv_gen;
3014 if (md_gen != m->md.pv_gen) {
3019 l2 = pmap_l2(pmap, pv->pv_va);
3021 KASSERT((pmap_load(l2) & PTE_RX) == 0,
3022 ("pmap_ts_referenced: found an invalid l2 table"));
3024 l3 = pmap_l2_to_l3(l2, pv->pv_va);
3025 old_l3 = pmap_load(l3);
3026 if ((old_l3 & PTE_D) != 0)
3028 if ((old_l3 & PTE_A) != 0) {
3029 if (safe_to_clear_referenced(pmap, old_l3)) {
3031 * TODO: We don't handle the access flag
3032 * at all. We need to be able to set it in
3033 * the exception handler.
3035 panic("RISCVTODO: safe_to_clear_referenced\n");
3036 } else if ((old_l3 & PTE_SW_WIRED) == 0) {
3038 * Wired pages cannot be paged out so
3039 * doing accessed bit emulation for
3040 * them is wasted effort. We do the
3041 * hard work for unwired pages only.
3043 pmap_remove_l3(pmap, l3, pv->pv_va,
3044 pmap_load(l2), &free, &lock);
3045 pmap_invalidate_page(pmap, pv->pv_va);
3050 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3051 ("inconsistent pv lock %p %p for page %p",
3052 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3057 /* Rotate the PV list if it has more than one entry. */
3058 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3059 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3060 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3063 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
3064 not_cleared < PMAP_TS_REFERENCED_MAX);
3067 rw_runlock(&pvh_global_lock);
3068 vm_page_free_pages_toq(&free, false);
3069 return (cleared + not_cleared);
3073 * Apply the given advice to the specified range of addresses within the
3074 * given pmap. Depending on the advice, clear the referenced and/or
3075 * modified flags in each mapping and set the mapped page's dirty field.
3078 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3083 * Clear the modify bits on the specified physical page.
3086 pmap_clear_modify(vm_page_t m)
3089 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3090 ("pmap_clear_modify: page %p is not managed", m));
3091 VM_OBJECT_ASSERT_WLOCKED(m->object);
3092 KASSERT(!vm_page_xbusied(m),
3093 ("pmap_clear_modify: page %p is exclusive busied", m));
3096 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
3097 * If the object containing the page is locked and the page is not
3098 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
3100 if ((m->aflags & PGA_WRITEABLE) == 0)
3103 /* RISCVTODO: We lack support for tracking if a page is modified */
3107 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3110 return ((void *)PHYS_TO_DMAP(pa));
3114 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
3119 * Sets the memory attribute for the specified page.
3122 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3125 m->md.pv_memattr = ma;
3129 * perform the pmap work for mincore
3132 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3134 pt_entry_t *l2, *l3, tpte;
3144 l2 = pmap_l2(pmap, addr);
3145 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
3146 if ((tpte & (PTE_R | PTE_W | PTE_X)) != 0) {
3147 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
3148 val = MINCORE_INCORE | MINCORE_SUPER;
3150 l3 = pmap_l2_to_l3(l2, addr);
3151 tpte = pmap_load(l3);
3152 if ((tpte & PTE_V) == 0)
3154 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
3155 val = MINCORE_INCORE;
3158 if ((tpte & PTE_D) != 0)
3159 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
3160 if ((tpte & PTE_A) != 0)
3161 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
3162 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
3166 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
3167 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
3168 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
3169 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
3172 PA_UNLOCK_COND(*locked_pa);
3178 pmap_activate(struct thread *td)
3184 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3185 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
3187 reg = SATP_MODE_SV39;
3188 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
3191 pmap_invalidate_all(pmap);
3196 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3201 * From the RISC-V User-Level ISA V2.2:
3203 * "To make a store to instruction memory visible to all
3204 * RISC-V harts, the writing hart has to execute a data FENCE
3205 * before requesting that all remote RISC-V harts execute a
3210 CPU_CLR(PCPU_GET(cpuid), &mask);
3212 sbi_remote_fence_i(mask.__bits);
3217 * Increase the starting virtual address of the given mapping if a
3218 * different alignment might result in more superpage mappings.
3221 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3222 vm_offset_t *addr, vm_size_t size)
3227 * Get the kernel virtual address of a set of physical pages. If there are
3228 * physical addresses not covered by the DMAP perform a transient mapping
3229 * that will be removed when calling pmap_unmap_io_transient.
3231 * \param page The pages the caller wishes to obtain the virtual
3232 * address on the kernel memory map.
3233 * \param vaddr On return contains the kernel virtual memory address
3234 * of the pages passed in the page parameter.
3235 * \param count Number of pages passed in.
3236 * \param can_fault TRUE if the thread using the mapped pages can take
3237 * page faults, FALSE otherwise.
3239 * \returns TRUE if the caller must call pmap_unmap_io_transient when
3240 * finished or FALSE otherwise.
3244 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3245 boolean_t can_fault)
3248 boolean_t needs_mapping;
3252 * Allocate any KVA space that we need, this is done in a separate
3253 * loop to prevent calling vmem_alloc while pinned.
3255 needs_mapping = FALSE;
3256 for (i = 0; i < count; i++) {
3257 paddr = VM_PAGE_TO_PHYS(page[i]);
3258 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
3259 error = vmem_alloc(kernel_arena, PAGE_SIZE,
3260 M_BESTFIT | M_WAITOK, &vaddr[i]);
3261 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
3262 needs_mapping = TRUE;
3264 vaddr[i] = PHYS_TO_DMAP(paddr);
3268 /* Exit early if everything is covered by the DMAP */
3274 for (i = 0; i < count; i++) {
3275 paddr = VM_PAGE_TO_PHYS(page[i]);
3276 if (paddr >= DMAP_MAX_PHYSADDR) {
3278 "pmap_map_io_transient: TODO: Map out of DMAP data");
3282 return (needs_mapping);
3286 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3287 boolean_t can_fault)
3294 for (i = 0; i < count; i++) {
3295 paddr = VM_PAGE_TO_PHYS(page[i]);
3296 if (paddr >= DMAP_MAX_PHYSADDR) {
3297 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
3303 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
3306 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);