2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
122 #include <sys/systm.h>
123 #include <sys/kernel.h>
125 #include <sys/lock.h>
126 #include <sys/malloc.h>
127 #include <sys/mman.h>
128 #include <sys/msgbuf.h>
129 #include <sys/mutex.h>
130 #include <sys/proc.h>
131 #include <sys/rwlock.h>
133 #include <sys/vmem.h>
134 #include <sys/vmmeter.h>
135 #include <sys/sched.h>
136 #include <sys/sysctl.h>
140 #include <vm/vm_param.h>
141 #include <vm/vm_kern.h>
142 #include <vm/vm_page.h>
143 #include <vm/vm_map.h>
144 #include <vm/vm_object.h>
145 #include <vm/vm_extern.h>
146 #include <vm/vm_pageout.h>
147 #include <vm/vm_pager.h>
148 #include <vm/vm_radix.h>
149 #include <vm/vm_reserv.h>
152 #include <machine/machdep.h>
153 #include <machine/md_var.h>
154 #include <machine/pcb.h>
155 #include <machine/sbi.h>
157 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
158 #define NUPDE (NPDEPG * NPDEPG)
159 #define NUSERPGTBLS (NUPDE + NPDEPG)
161 #if !defined(DIAGNOSTIC)
162 #ifdef __GNUC_GNU_INLINE__
163 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
165 #define PMAP_INLINE extern inline
172 #define PV_STAT(x) do { x ; } while (0)
174 #define PV_STAT(x) do { } while (0)
177 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
179 #define NPV_LIST_LOCKS MAXCPU
181 #define PHYS_TO_PV_LIST_LOCK(pa) \
182 (&pv_list_locks[pa_index(pa) % NPV_LIST_LOCKS])
184 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
185 struct rwlock **_lockp = (lockp); \
186 struct rwlock *_new_lock; \
188 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
189 if (_new_lock != *_lockp) { \
190 if (*_lockp != NULL) \
191 rw_wunlock(*_lockp); \
192 *_lockp = _new_lock; \
197 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
198 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
200 #define RELEASE_PV_LIST_LOCK(lockp) do { \
201 struct rwlock **_lockp = (lockp); \
203 if (*_lockp != NULL) { \
204 rw_wunlock(*_lockp); \
209 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
210 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
212 /* The list of all the user pmaps */
213 LIST_HEAD(pmaplist, pmap);
214 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
216 struct pmap kernel_pmap_store;
218 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
219 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
220 vm_offset_t kernel_vm_end = 0;
222 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
223 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
224 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
226 /* This code assumes all L1 DMAP entries will be used */
227 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
228 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
230 static struct rwlock_padalign pvh_global_lock;
233 * Data for the pv entry allocation mechanism
235 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
236 static struct mtx pv_chunks_mutex;
237 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
239 static void free_pv_chunk(struct pv_chunk *pc);
240 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
241 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
242 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
243 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
244 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
246 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
247 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
248 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
249 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
250 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
251 vm_page_t m, struct rwlock **lockp);
253 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
254 struct rwlock **lockp);
256 static void _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
257 struct spglist *free);
258 static int pmap_unuse_l3(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
260 #define pmap_clear(pte) pmap_store(pte, 0)
261 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
262 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
263 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
264 #define pmap_load(pte) atomic_load_64(pte)
265 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
266 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
268 /********************/
269 /* Inline functions */
270 /********************/
273 pagecopy(void *s, void *d)
276 memcpy(d, s, PAGE_SIZE);
286 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
287 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
288 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
290 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
292 static __inline pd_entry_t *
293 pmap_l1(pmap_t pmap, vm_offset_t va)
296 return (&pmap->pm_l1[pmap_l1_index(va)]);
299 static __inline pd_entry_t *
300 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
305 phys = PTE_TO_PHYS(pmap_load(l1));
306 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
308 return (&l2[pmap_l2_index(va)]);
311 static __inline pd_entry_t *
312 pmap_l2(pmap_t pmap, vm_offset_t va)
316 l1 = pmap_l1(pmap, va);
317 if ((pmap_load(l1) & PTE_V) == 0)
319 if ((pmap_load(l1) & PTE_RX) != 0)
322 return (pmap_l1_to_l2(l1, va));
325 static __inline pt_entry_t *
326 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
331 phys = PTE_TO_PHYS(pmap_load(l2));
332 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
334 return (&l3[pmap_l3_index(va)]);
337 static __inline pt_entry_t *
338 pmap_l3(pmap_t pmap, vm_offset_t va)
342 l2 = pmap_l2(pmap, va);
345 if ((pmap_load(l2) & PTE_V) == 0)
347 if ((pmap_load(l2) & PTE_RX) != 0)
350 return (pmap_l2_to_l3(l2, va));
354 pmap_resident_count_inc(pmap_t pmap, int count)
357 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
358 pmap->pm_stats.resident_count += count;
362 pmap_resident_count_dec(pmap_t pmap, int count)
365 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
366 KASSERT(pmap->pm_stats.resident_count >= count,
367 ("pmap %p resident count underflow %ld %d", pmap,
368 pmap->pm_stats.resident_count, count));
369 pmap->pm_stats.resident_count -= count;
373 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
376 struct pmap *user_pmap;
379 /* Distribute new kernel L1 entry to all the user pmaps */
380 if (pmap != kernel_pmap)
383 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
384 l1 = &user_pmap->pm_l1[l1index];
385 pmap_store(l1, entry);
390 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
396 l1 = (pd_entry_t *)l1pt;
397 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
399 /* Check locore has used a table L1 map */
400 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
401 ("Invalid bootstrap L1 table"));
403 /* Find the address of the L2 table */
404 l2 = (pt_entry_t *)init_pt_va;
405 *l2_slot = pmap_l2_index(va);
411 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
413 u_int l1_slot, l2_slot;
417 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
419 /* Check locore has used L2 superpages */
420 KASSERT((l2[l2_slot] & PTE_RX) != 0,
421 ("Invalid bootstrap L2 table"));
423 /* L2 is superpages */
424 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
425 ret += (va & L2_OFFSET);
431 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
440 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
441 va = DMAP_MIN_ADDRESS;
442 l1 = (pd_entry_t *)kern_l1;
443 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
445 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
446 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
447 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
450 pn = (pa / PAGE_SIZE);
452 entry |= (pn << PTE_PPN0_S);
453 pmap_store(&l1[l1_slot], entry);
456 /* Set the upper limit of the DMAP region */
464 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
473 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
475 l2 = pmap_l2(kernel_pmap, va);
476 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
477 l2_slot = pmap_l2_index(va);
480 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
481 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
483 pa = pmap_early_vtophys(l1pt, l3pt);
484 pn = (pa / PAGE_SIZE);
486 entry |= (pn << PTE_PPN0_S);
487 pmap_store(&l2[l2_slot], entry);
492 /* Clean the L2 page table */
493 memset((void *)l3_start, 0, l3pt - l3_start);
499 * Bootstrap the system enough to run with virtual memory.
502 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
504 u_int l1_slot, l2_slot, avail_slot, map_slot;
505 vm_offset_t freemempos;
506 vm_offset_t dpcpu, msgbufpv;
507 vm_paddr_t end, max_pa, min_pa, pa, start;
510 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
511 printf("%lx\n", l1pt);
512 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
514 /* Set this early so we can use the pagetable walking functions */
515 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
516 PMAP_LOCK_INIT(kernel_pmap);
518 rw_init(&pvh_global_lock, "pmap pv global");
520 /* Assume the address we were loaded to is a valid physical address. */
521 min_pa = max_pa = kernstart;
524 * Find the minimum physical address. physmap is sorted,
525 * but may contain empty ranges.
527 for (i = 0; i < physmap_idx * 2; i += 2) {
528 if (physmap[i] == physmap[i + 1])
530 if (physmap[i] <= min_pa)
532 if (physmap[i + 1] > max_pa)
533 max_pa = physmap[i + 1];
535 printf("physmap_idx %lx\n", physmap_idx);
536 printf("min_pa %lx\n", min_pa);
537 printf("max_pa %lx\n", max_pa);
539 /* Create a direct map region early so we can use it for pa -> va */
540 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
543 * Read the page table to find out what is already mapped.
544 * This assumes we have mapped a block of memory from KERNBASE
545 * using a single L1 entry.
547 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
549 /* Sanity check the index, KERNBASE should be the first VA */
550 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
552 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
554 /* Create the l3 tables for the early devmap */
555 freemempos = pmap_bootstrap_l3(l1pt,
556 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
560 #define alloc_pages(var, np) \
561 (var) = freemempos; \
562 freemempos += (np * PAGE_SIZE); \
563 memset((char *)(var), 0, ((np) * PAGE_SIZE));
565 /* Allocate dynamic per-cpu area. */
566 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
567 dpcpu_init((void *)dpcpu, 0);
569 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
570 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
571 msgbufp = (void *)msgbufpv;
573 virtual_avail = roundup2(freemempos, L2_SIZE);
574 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
575 kernel_vm_end = virtual_avail;
577 pa = pmap_early_vtophys(l1pt, freemempos);
579 /* Initialize phys_avail. */
580 for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
582 start = physmap[map_slot];
583 end = physmap[map_slot + 1];
587 if (start >= kernstart && end <= pa)
590 if (start < kernstart && end > kernstart)
592 else if (start < pa && end > pa)
594 phys_avail[avail_slot] = start;
595 phys_avail[avail_slot + 1] = end;
596 physmem += (end - start) >> PAGE_SHIFT;
599 if (end != physmap[map_slot + 1] && end > pa) {
600 phys_avail[avail_slot] = pa;
601 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
602 physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
606 phys_avail[avail_slot] = 0;
607 phys_avail[avail_slot + 1] = 0;
610 * Maxmem isn't the "maximum memory", it's one larger than the
611 * highest page of the physical address space. It should be
612 * called something like "Maxphyspage".
614 Maxmem = atop(phys_avail[avail_slot - 1]);
618 * Initialize a vm_page's machine-dependent fields.
621 pmap_page_init(vm_page_t m)
624 TAILQ_INIT(&m->md.pv_list);
625 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
629 * Initialize the pmap module.
630 * Called by vm_init, to initialize any structures that the pmap
631 * system needs to map virtual memory.
639 * Initialize the pv chunk list mutex.
641 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
644 * Initialize the pool of pv list locks.
646 for (i = 0; i < NPV_LIST_LOCKS; i++)
647 rw_init(&pv_list_locks[i], "pmap pv list");
652 * For SMP, these functions have to use IPIs for coherence.
654 * In general, the calling thread uses a plain fence to order the
655 * writes to the page tables before invoking an SBI callback to invoke
656 * sfence_vma() on remote CPUs.
658 * Since the riscv pmap does not yet have a pm_active field, IPIs are
659 * sent to all CPUs in the system.
662 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
668 CPU_CLR(PCPU_GET(cpuid), &mask);
670 sbi_remote_sfence_vma(mask.__bits, va, 1);
676 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
682 CPU_CLR(PCPU_GET(cpuid), &mask);
684 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
687 * Might consider a loop of sfence_vma_page() for a small
688 * number of pages in the future.
695 pmap_invalidate_all(pmap_t pmap)
701 CPU_CLR(PCPU_GET(cpuid), &mask);
705 * XXX: The SBI doc doesn't detail how to specify x0 as the
706 * address to perform a global fence. BBL currently treats
707 * all sfence_vma requests as global however.
709 sbi_remote_sfence_vma(mask.__bits, 0, 0);
715 * Normal, non-SMP, invalidation functions.
716 * We inline these within pmap.c for speed.
719 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
726 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
730 * Might consider a loop of sfence_vma_page() for a small
731 * number of pages in the future.
737 pmap_invalidate_all(pmap_t pmap)
745 * Routine: pmap_extract
747 * Extract the physical page address associated
748 * with the given map/virtual_address pair.
751 pmap_extract(pmap_t pmap, vm_offset_t va)
760 * Start with the l2 tabel. We are unable to allocate
761 * pages in the l1 table.
763 l2p = pmap_l2(pmap, va);
766 if ((l2 & PTE_RX) == 0) {
767 l3p = pmap_l2_to_l3(l2p, va);
770 pa = PTE_TO_PHYS(l3);
771 pa |= (va & L3_OFFSET);
774 /* L2 is superpages */
775 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
776 pa |= (va & L2_OFFSET);
784 * Routine: pmap_extract_and_hold
786 * Atomically extract and hold the physical page
787 * with the given pmap and virtual address pair
788 * if that mapping permits the given protection.
791 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
802 l3p = pmap_l3(pmap, va);
803 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
804 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
805 phys = PTE_TO_PHYS(l3);
806 if (vm_page_pa_tryrelock(pmap, phys, &pa))
808 m = PHYS_TO_VM_PAGE(phys);
818 pmap_kextract(vm_offset_t va)
824 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
825 pa = DMAP_TO_PHYS(va);
827 l2 = pmap_l2(kernel_pmap, va);
829 panic("pmap_kextract: No l2");
830 if ((pmap_load(l2) & PTE_RX) != 0) {
832 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
833 pa |= (va & L2_OFFSET);
837 l3 = pmap_l2_to_l3(l2, va);
839 panic("pmap_kextract: No l3...");
840 pa = PTE_TO_PHYS(pmap_load(l3));
841 pa |= (va & PAGE_MASK);
846 /***************************************************
847 * Low level mapping routines.....
848 ***************************************************/
851 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
858 KASSERT((pa & L3_OFFSET) == 0,
859 ("pmap_kenter_device: Invalid physical address"));
860 KASSERT((sva & L3_OFFSET) == 0,
861 ("pmap_kenter_device: Invalid virtual address"));
862 KASSERT((size & PAGE_MASK) == 0,
863 ("pmap_kenter_device: Mapping is not page-sized"));
867 l3 = pmap_l3(kernel_pmap, va);
868 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
870 pn = (pa / PAGE_SIZE);
872 entry |= (pn << PTE_PPN0_S);
873 pmap_store(l3, entry);
879 pmap_invalidate_range(kernel_pmap, sva, va);
883 * Remove a page from the kernel pagetables.
884 * Note: not SMP coherent.
887 pmap_kremove(vm_offset_t va)
891 l3 = pmap_l3(kernel_pmap, va);
892 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
899 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
904 KASSERT((sva & L3_OFFSET) == 0,
905 ("pmap_kremove_device: Invalid virtual address"));
906 KASSERT((size & PAGE_MASK) == 0,
907 ("pmap_kremove_device: Mapping is not page-sized"));
911 l3 = pmap_l3(kernel_pmap, va);
912 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
919 pmap_invalidate_range(kernel_pmap, sva, va);
923 * Used to map a range of physical addresses into kernel
924 * virtual address space.
926 * The value passed in '*virt' is a suggested virtual address for
927 * the mapping. Architectures which can support a direct-mapped
928 * physical to virtual region can return the appropriate address
929 * within that region, leaving '*virt' unchanged. Other
930 * architectures should map the pages starting at '*virt' and
931 * update '*virt' with the first usable address after the mapped
935 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
938 return PHYS_TO_DMAP(start);
943 * Add a list of wired pages to the kva
944 * this routine is only used for temporary
945 * kernel mappings that do not need to have
946 * page modification or references recorded.
947 * Note that old mappings are simply written
948 * over. The page *must* be wired.
949 * Note: SMP coherent. Uses a ranged shootdown IPI.
952 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
962 for (i = 0; i < count; i++) {
964 pa = VM_PAGE_TO_PHYS(m);
965 pn = (pa / PAGE_SIZE);
966 l3 = pmap_l3(kernel_pmap, va);
969 entry |= (pn << PTE_PPN0_S);
970 pmap_store(l3, entry);
974 pmap_invalidate_range(kernel_pmap, sva, va);
978 * This routine tears out page mappings from the
979 * kernel -- it is meant only for temporary mappings.
980 * Note: SMP coherent. Uses a ranged shootdown IPI.
983 pmap_qremove(vm_offset_t sva, int count)
988 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
990 for (va = sva; count-- > 0; va += PAGE_SIZE) {
991 l3 = pmap_l3(kernel_pmap, va);
992 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
995 pmap_invalidate_range(kernel_pmap, sva, va);
998 /***************************************************
999 * Page table page management routines.....
1000 ***************************************************/
1002 * Schedule the specified unused page table page to be freed. Specifically,
1003 * add the page to the specified list of pages that will be released to the
1004 * physical memory manager after the TLB has been updated.
1006 static __inline void
1007 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1008 boolean_t set_PG_ZERO)
1012 m->flags |= PG_ZERO;
1014 m->flags &= ~PG_ZERO;
1015 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1019 * Decrements a page table page's wire count, which is used to record the
1020 * number of valid page table entries within the page. If the wire count
1021 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1022 * page table page was unmapped and FALSE otherwise.
1024 static inline boolean_t
1025 pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1029 if (m->wire_count == 0) {
1030 _pmap_unwire_l3(pmap, va, m, free);
1038 _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1042 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1044 * unmap the page table page
1046 if (m->pindex >= NUPDE) {
1049 l1 = pmap_l1(pmap, va);
1051 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1055 l2 = pmap_l2(pmap, va);
1058 pmap_resident_count_dec(pmap, 1);
1059 if (m->pindex < NUPDE) {
1061 /* We just released a PT, unhold the matching PD */
1064 l1 = pmap_l1(pmap, va);
1065 phys = PTE_TO_PHYS(pmap_load(l1));
1066 pdpg = PHYS_TO_VM_PAGE(phys);
1067 pmap_unwire_l3(pmap, va, pdpg, free);
1069 pmap_invalidate_page(pmap, va);
1074 * Put page on a list so that it is released after
1075 * *ALL* TLB shootdown is done
1077 pmap_add_delayed_free_list(m, free, TRUE);
1081 * After removing an l3 entry, this routine is used to
1082 * conditionally free the page, and manage the hold/wire counts.
1085 pmap_unuse_l3(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1086 struct spglist *free)
1091 if (va >= VM_MAXUSER_ADDRESS)
1093 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1095 phys = PTE_TO_PHYS(ptepde);
1097 mpte = PHYS_TO_VM_PAGE(phys);
1098 return (pmap_unwire_l3(pmap, va, mpte, free));
1102 pmap_pinit0(pmap_t pmap)
1105 PMAP_LOCK_INIT(pmap);
1106 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1107 pmap->pm_l1 = kernel_pmap->pm_l1;
1111 pmap_pinit(pmap_t pmap)
1117 * allocate the l1 page
1119 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1120 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1123 l1phys = VM_PAGE_TO_PHYS(l1pt);
1124 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1126 if ((l1pt->flags & PG_ZERO) == 0)
1127 pagezero(pmap->pm_l1);
1129 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1131 /* Install kernel pagetables */
1132 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1134 /* Add to the list of all user pmaps */
1135 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1141 * This routine is called if the desired page table page does not exist.
1143 * If page table page allocation fails, this routine may sleep before
1144 * returning NULL. It sleeps only if a lock pointer was given.
1146 * Note: If a page allocation fails at page table level two or three,
1147 * one or two pages may be held during the wait, only to be released
1148 * afterwards. This conservative approach is easily argued to avoid
1152 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1154 vm_page_t m, /*pdppg, */pdpg;
1159 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1162 * Allocate a page table page.
1164 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1165 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1166 if (lockp != NULL) {
1167 RELEASE_PV_LIST_LOCK(lockp);
1169 rw_runlock(&pvh_global_lock);
1171 rw_rlock(&pvh_global_lock);
1176 * Indicate the need to retry. While waiting, the page table
1177 * page may have been allocated.
1182 if ((m->flags & PG_ZERO) == 0)
1186 * Map the pagetable page into the process address space, if
1187 * it isn't already there.
1190 if (ptepindex >= NUPDE) {
1192 vm_pindex_t l1index;
1194 l1index = ptepindex - NUPDE;
1195 l1 = &pmap->pm_l1[l1index];
1197 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1199 entry |= (pn << PTE_PPN0_S);
1200 pmap_store(l1, entry);
1201 pmap_distribute_l1(pmap, l1index, entry);
1203 vm_pindex_t l1index;
1204 pd_entry_t *l1, *l2;
1206 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1207 l1 = &pmap->pm_l1[l1index];
1208 if (pmap_load(l1) == 0) {
1209 /* recurse for allocating page dir */
1210 if (_pmap_alloc_l3(pmap, NUPDE + l1index,
1212 vm_page_unwire_noq(m);
1213 vm_page_free_zero(m);
1217 phys = PTE_TO_PHYS(pmap_load(l1));
1218 pdpg = PHYS_TO_VM_PAGE(phys);
1222 phys = PTE_TO_PHYS(pmap_load(l1));
1223 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1224 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1226 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1228 entry |= (pn << PTE_PPN0_S);
1229 pmap_store(l2, entry);
1232 pmap_resident_count_inc(pmap, 1);
1238 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1240 vm_pindex_t ptepindex;
1246 * Calculate pagetable page index
1248 ptepindex = pmap_l2_pindex(va);
1251 * Get the page directory entry
1253 l2 = pmap_l2(pmap, va);
1256 * If the page table page is mapped, we just increment the
1257 * hold count, and activate it.
1259 if (l2 != NULL && pmap_load(l2) != 0) {
1260 phys = PTE_TO_PHYS(pmap_load(l2));
1261 m = PHYS_TO_VM_PAGE(phys);
1265 * Here if the pte page isn't mapped, or if it has been
1268 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1269 if (m == NULL && lockp != NULL)
1276 /***************************************************
1277 * Pmap allocation/deallocation routines.
1278 ***************************************************/
1281 * Release any resources held by the given physical map.
1282 * Called when a pmap initialized by pmap_pinit is being released.
1283 * Should only be called if the map contains no valid mappings.
1286 pmap_release(pmap_t pmap)
1290 KASSERT(pmap->pm_stats.resident_count == 0,
1291 ("pmap_release: pmap resident count %ld != 0",
1292 pmap->pm_stats.resident_count));
1294 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1295 vm_page_unwire_noq(m);
1296 vm_page_free_zero(m);
1298 /* Remove pmap from the allpmaps list */
1299 LIST_REMOVE(pmap, pm_list);
1301 /* Remove kernel pagetables */
1302 bzero(pmap->pm_l1, PAGE_SIZE);
1307 kvm_size(SYSCTL_HANDLER_ARGS)
1309 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1311 return sysctl_handle_long(oidp, &ksize, 0, req);
1313 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1314 0, 0, kvm_size, "LU", "Size of KVM");
1317 kvm_free(SYSCTL_HANDLER_ARGS)
1319 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1321 return sysctl_handle_long(oidp, &kfree, 0, req);
1323 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1324 0, 0, kvm_free, "LU", "Amount of KVM free");
1328 * grow the number of kernel page table entries, if needed
1331 pmap_growkernel(vm_offset_t addr)
1335 pd_entry_t *l1, *l2;
1339 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1341 addr = roundup2(addr, L2_SIZE);
1342 if (addr - 1 >= vm_map_max(kernel_map))
1343 addr = vm_map_max(kernel_map);
1344 while (kernel_vm_end < addr) {
1345 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1346 if (pmap_load(l1) == 0) {
1347 /* We need a new PDP entry */
1348 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1349 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1350 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1352 panic("pmap_growkernel: no memory to grow kernel");
1353 if ((nkpg->flags & PG_ZERO) == 0)
1354 pmap_zero_page(nkpg);
1355 paddr = VM_PAGE_TO_PHYS(nkpg);
1357 pn = (paddr / PAGE_SIZE);
1359 entry |= (pn << PTE_PPN0_S);
1360 pmap_store(l1, entry);
1361 pmap_distribute_l1(kernel_pmap,
1362 pmap_l1_index(kernel_vm_end), entry);
1363 continue; /* try again */
1365 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1366 if ((pmap_load(l2) & PTE_V) != 0 &&
1367 (pmap_load(l2) & PTE_RWX) == 0) {
1368 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1369 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1370 kernel_vm_end = vm_map_max(kernel_map);
1376 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1377 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1380 panic("pmap_growkernel: no memory to grow kernel");
1381 if ((nkpg->flags & PG_ZERO) == 0) {
1382 pmap_zero_page(nkpg);
1384 paddr = VM_PAGE_TO_PHYS(nkpg);
1386 pn = (paddr / PAGE_SIZE);
1388 entry |= (pn << PTE_PPN0_S);
1389 pmap_store(l2, entry);
1391 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1393 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1394 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1395 kernel_vm_end = vm_map_max(kernel_map);
1402 /***************************************************
1403 * page management routines.
1404 ***************************************************/
1406 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1407 CTASSERT(_NPCM == 3);
1408 CTASSERT(_NPCPV == 168);
1410 static __inline struct pv_chunk *
1411 pv_to_chunk(pv_entry_t pv)
1414 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1417 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1419 #define PC_FREE0 0xfffffffffffffffful
1420 #define PC_FREE1 0xfffffffffffffffful
1421 #define PC_FREE2 0x000000fffffffffful
1423 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1427 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1429 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1430 "Current number of pv entry chunks");
1431 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1432 "Current number of pv entry chunks allocated");
1433 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1434 "Current number of pv entry chunks frees");
1435 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1436 "Number of times tried to get a chunk page but failed.");
1438 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1439 static int pv_entry_spare;
1441 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1442 "Current number of pv entry frees");
1443 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1444 "Current number of pv entry allocs");
1445 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1446 "Current number of pv entries");
1447 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1448 "Current number of spare pv entries");
1453 * We are in a serious low memory condition. Resort to
1454 * drastic measures to free some pages so we can allocate
1455 * another pv entry chunk.
1457 * Returns NULL if PV entries were reclaimed from the specified pmap.
1459 * We do not, however, unmap 2mpages because subsequent accesses will
1460 * allocate per-page pv entries until repromotion occurs, thereby
1461 * exacerbating the shortage of free pv entries.
1464 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1467 panic("RISCVTODO: reclaim_pv_chunk");
1471 * free the pv_entry back to the free list
1474 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1476 struct pv_chunk *pc;
1477 int idx, field, bit;
1479 rw_assert(&pvh_global_lock, RA_LOCKED);
1480 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1481 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1482 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1483 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1484 pc = pv_to_chunk(pv);
1485 idx = pv - &pc->pc_pventry[0];
1488 pc->pc_map[field] |= 1ul << bit;
1489 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1490 pc->pc_map[2] != PC_FREE2) {
1491 /* 98% of the time, pc is already at the head of the list. */
1492 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1493 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1494 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1498 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1503 free_pv_chunk(struct pv_chunk *pc)
1507 mtx_lock(&pv_chunks_mutex);
1508 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1509 mtx_unlock(&pv_chunks_mutex);
1510 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1511 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1512 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1513 /* entire chunk is free, return it */
1514 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1515 #if 0 /* TODO: For minidump */
1516 dump_drop_page(m->phys_addr);
1518 vm_page_unwire(m, PQ_NONE);
1523 * Returns a new PV entry, allocating a new PV chunk from the system when
1524 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1525 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1528 * The given PV list lock may be released.
1531 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1535 struct pv_chunk *pc;
1538 rw_assert(&pvh_global_lock, RA_LOCKED);
1539 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1540 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1542 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1544 for (field = 0; field < _NPCM; field++) {
1545 if (pc->pc_map[field]) {
1546 bit = ffsl(pc->pc_map[field]) - 1;
1550 if (field < _NPCM) {
1551 pv = &pc->pc_pventry[field * 64 + bit];
1552 pc->pc_map[field] &= ~(1ul << bit);
1553 /* If this was the last item, move it to tail */
1554 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1555 pc->pc_map[2] == 0) {
1556 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1557 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1560 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1561 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1565 /* No free items, allocate another chunk */
1566 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1569 if (lockp == NULL) {
1570 PV_STAT(pc_chunk_tryfail++);
1573 m = reclaim_pv_chunk(pmap, lockp);
1577 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1578 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1579 #if 0 /* TODO: This is for minidump */
1580 dump_add_page(m->phys_addr);
1582 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1584 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1585 pc->pc_map[1] = PC_FREE1;
1586 pc->pc_map[2] = PC_FREE2;
1587 mtx_lock(&pv_chunks_mutex);
1588 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1589 mtx_unlock(&pv_chunks_mutex);
1590 pv = &pc->pc_pventry[0];
1591 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1592 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1593 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1598 * First find and then remove the pv entry for the specified pmap and virtual
1599 * address from the specified pv list. Returns the pv entry if found and NULL
1600 * otherwise. This operation can be performed on pv lists for either 4KB or
1601 * 2MB page mappings.
1603 static __inline pv_entry_t
1604 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1608 rw_assert(&pvh_global_lock, RA_LOCKED);
1609 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1610 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1611 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1620 * First find and then destroy the pv entry for the specified pmap and virtual
1621 * address. This operation can be performed on pv lists for either 4KB or 2MB
1625 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1629 pv = pmap_pvh_remove(pvh, pmap, va);
1631 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
1632 free_pv_entry(pmap, pv);
1636 * Conditionally create the PV entry for a 4KB page mapping if the required
1637 * memory can be allocated without resorting to reclamation.
1640 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1641 struct rwlock **lockp)
1645 rw_assert(&pvh_global_lock, RA_LOCKED);
1646 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1647 /* Pass NULL instead of the lock pointer to disable reclamation. */
1648 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1650 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1651 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1659 * pmap_remove_l3: do the things to unmap a page in a process
1662 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
1663 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
1669 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1670 old_l3 = pmap_load_clear(l3);
1671 pmap_invalidate_page(pmap, va);
1672 if (old_l3 & PTE_SW_WIRED)
1673 pmap->pm_stats.wired_count -= 1;
1674 pmap_resident_count_dec(pmap, 1);
1675 if (old_l3 & PTE_SW_MANAGED) {
1676 phys = PTE_TO_PHYS(old_l3);
1677 m = PHYS_TO_VM_PAGE(phys);
1678 if ((old_l3 & PTE_D) != 0)
1681 vm_page_aflag_set(m, PGA_REFERENCED);
1682 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1683 pmap_pvh_free(&m->md, pmap, va);
1686 return (pmap_unuse_l3(pmap, va, l2e, free));
1690 * Remove the given range of addresses from the specified map.
1692 * It is assumed that the start and end are properly
1693 * rounded to the page size.
1696 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1698 struct rwlock *lock;
1699 vm_offset_t va, va_next;
1700 pd_entry_t *l1, *l2;
1701 pt_entry_t l3_pte, *l3;
1702 struct spglist free;
1705 * Perform an unsynchronized read. This is, however, safe.
1707 if (pmap->pm_stats.resident_count == 0)
1712 rw_rlock(&pvh_global_lock);
1716 for (; sva < eva; sva = va_next) {
1717 if (pmap->pm_stats.resident_count == 0)
1720 l1 = pmap_l1(pmap, sva);
1721 if (pmap_load(l1) == 0) {
1722 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1729 * Calculate index for next page table.
1731 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1735 l2 = pmap_l1_to_l2(l1, sva);
1739 l3_pte = pmap_load(l2);
1742 * Weed out invalid mappings.
1746 if ((pmap_load(l2) & PTE_RX) != 0)
1750 * Limit our scan to either the end of the va represented
1751 * by the current page table page, or to the end of the
1752 * range being removed.
1758 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1761 panic("l3 == NULL");
1762 if (pmap_load(l3) == 0) {
1763 if (va != va_next) {
1764 pmap_invalidate_range(pmap, va, sva);
1771 if (pmap_remove_l3(pmap, l3, sva, l3_pte, &free,
1778 pmap_invalidate_range(pmap, va, sva);
1782 rw_runlock(&pvh_global_lock);
1784 vm_page_free_pages_toq(&free, false);
1788 * Routine: pmap_remove_all
1790 * Removes this physical page from
1791 * all physical maps in which it resides.
1792 * Reflects back modify bits to the pager.
1795 * Original versions of this routine were very
1796 * inefficient because they iteratively called
1797 * pmap_remove (slow...)
1801 pmap_remove_all(vm_page_t m)
1805 pt_entry_t *l3, tl3;
1806 pd_entry_t *l2, tl2;
1807 struct spglist free;
1809 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1810 ("pmap_remove_all: page %p is not managed", m));
1812 rw_wlock(&pvh_global_lock);
1813 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1816 pmap_resident_count_dec(pmap, 1);
1817 l2 = pmap_l2(pmap, pv->pv_va);
1818 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
1819 tl2 = pmap_load(l2);
1821 KASSERT((tl2 & PTE_RX) == 0,
1822 ("pmap_remove_all: found a table when expecting "
1823 "a block in %p's pv list", m));
1825 l3 = pmap_l2_to_l3(l2, pv->pv_va);
1826 tl3 = pmap_load_clear(l3);
1827 pmap_invalidate_page(pmap, pv->pv_va);
1828 if (tl3 & PTE_SW_WIRED)
1829 pmap->pm_stats.wired_count--;
1830 if ((tl3 & PTE_A) != 0)
1831 vm_page_aflag_set(m, PGA_REFERENCED);
1834 * Update the vm_page_t clean and reference bits.
1836 if ((tl3 & PTE_D) != 0)
1838 pmap_unuse_l3(pmap, pv->pv_va, pmap_load(l2), &free);
1839 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
1841 free_pv_entry(pmap, pv);
1844 vm_page_aflag_clear(m, PGA_WRITEABLE);
1845 rw_wunlock(&pvh_global_lock);
1846 vm_page_free_pages_toq(&free, false);
1850 * Set the physical protection on the
1851 * specified range of this map as requested.
1854 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1856 pd_entry_t *l1, *l2;
1857 pt_entry_t *l3, l3e, mask;
1859 vm_offset_t va_next;
1861 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1862 pmap_remove(pmap, sva, eva);
1866 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
1867 (VM_PROT_WRITE | VM_PROT_EXECUTE))
1871 if ((prot & VM_PROT_WRITE) == 0)
1872 mask |= PTE_W | PTE_D;
1873 if ((prot & VM_PROT_EXECUTE) == 0)
1877 for (; sva < eva; sva = va_next) {
1878 l1 = pmap_l1(pmap, sva);
1879 if (pmap_load(l1) == 0) {
1880 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1886 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1890 l2 = pmap_l1_to_l2(l1, sva);
1891 if (l2 == NULL || pmap_load(l2) == 0)
1893 if ((pmap_load(l2) & PTE_RX) != 0)
1899 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1901 l3e = pmap_load(l3);
1903 if ((l3e & PTE_V) == 0)
1905 if ((prot & VM_PROT_WRITE) == 0 &&
1906 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
1907 (PTE_SW_MANAGED | PTE_D)) {
1908 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
1911 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
1913 /* XXX: Use pmap_invalidate_range */
1914 pmap_invalidate_page(pmap, sva);
1921 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
1932 l3 = pmap_l3(pmap, va);
1936 orig_l3 = pmap_load(l3);
1937 if ((orig_l3 & PTE_V) == 0 ||
1938 (ftype == VM_PROT_WRITE && (orig_l3 & PTE_W) == 0) ||
1939 (ftype == VM_PROT_EXECUTE && (orig_l3 & PTE_X) == 0) ||
1940 (ftype == VM_PROT_READ && (orig_l3 & PTE_R) == 0))
1943 new_l3 = orig_l3 | PTE_A;
1944 if (ftype == VM_PROT_WRITE)
1947 if (orig_l3 != new_l3) {
1948 pmap_store(l3, new_l3);
1949 pmap_invalidate_page(pmap, va);
1955 * XXX: This case should never happen since it means
1956 * the PTE shouldn't have resulted in a fault.
1966 * Insert the given physical page (p) at
1967 * the specified virtual address (v) in the
1968 * target physical map with the protection requested.
1970 * If specified, the page will be wired down, meaning
1971 * that the related pte can not be reclaimed.
1973 * NB: This is the only routine which MAY NOT lazy-evaluate
1974 * or lose information. That is, this routine must actually
1975 * insert this page into the given map NOW.
1978 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
1979 u_int flags, int8_t psind __unused)
1981 struct rwlock *lock;
1982 pd_entry_t *l1, *l2;
1983 pt_entry_t new_l3, orig_l3;
1986 vm_paddr_t opa, pa, l2_pa, l3_pa;
1987 vm_page_t mpte, om, l2_m, l3_m;
1994 va = trunc_page(va);
1995 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
1996 VM_OBJECT_ASSERT_LOCKED(m->object);
1997 pa = VM_PAGE_TO_PHYS(m);
1998 pn = (pa / PAGE_SIZE);
2000 new_l3 = PTE_V | PTE_R | PTE_A;
2001 if (prot & VM_PROT_EXECUTE)
2003 if (flags & VM_PROT_WRITE)
2005 if (prot & VM_PROT_WRITE)
2007 if ((va >> 63) == 0)
2010 new_l3 |= (pn << PTE_PPN0_S);
2011 if ((flags & PMAP_ENTER_WIRED) != 0)
2012 new_l3 |= PTE_SW_WIRED;
2015 * Set modified bit gratuitously for writeable mappings if
2016 * the page is unmanaged. We do not want to take a fault
2017 * to do the dirty bit accounting for these mappings.
2019 if ((m->oflags & VPO_UNMANAGED) != 0) {
2020 if (prot & VM_PROT_WRITE)
2023 new_l3 |= PTE_SW_MANAGED;
2025 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2030 rw_rlock(&pvh_global_lock);
2033 if (va < VM_MAXUSER_ADDRESS) {
2034 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2035 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2036 if (mpte == NULL && nosleep) {
2037 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2040 rw_runlock(&pvh_global_lock);
2042 return (KERN_RESOURCE_SHORTAGE);
2044 l3 = pmap_l3(pmap, va);
2046 l3 = pmap_l3(pmap, va);
2047 /* TODO: This is not optimal, but should mostly work */
2049 l2 = pmap_l2(pmap, va);
2051 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2052 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2055 panic("pmap_enter: l2 pte_m == NULL");
2056 if ((l2_m->flags & PG_ZERO) == 0)
2057 pmap_zero_page(l2_m);
2059 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2060 l2_pn = (l2_pa / PAGE_SIZE);
2062 l1 = pmap_l1(pmap, va);
2064 entry |= (l2_pn << PTE_PPN0_S);
2065 pmap_store(l1, entry);
2066 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2067 l2 = pmap_l1_to_l2(l1, va);
2071 ("No l2 table after allocating one"));
2073 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2074 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2076 panic("pmap_enter: l3 pte_m == NULL");
2077 if ((l3_m->flags & PG_ZERO) == 0)
2078 pmap_zero_page(l3_m);
2080 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2081 l3_pn = (l3_pa / PAGE_SIZE);
2083 entry |= (l3_pn << PTE_PPN0_S);
2084 pmap_store(l2, entry);
2085 l3 = pmap_l2_to_l3(l2, va);
2087 pmap_invalidate_page(pmap, va);
2090 orig_l3 = pmap_load(l3);
2091 opa = PTE_TO_PHYS(orig_l3);
2095 * Is the specified virtual address already mapped?
2097 if ((orig_l3 & PTE_V) != 0) {
2099 * Wiring change, just update stats. We don't worry about
2100 * wiring PT pages as they remain resident as long as there
2101 * are valid mappings in them. Hence, if a user page is wired,
2102 * the PT page will be also.
2104 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2105 (orig_l3 & PTE_SW_WIRED) == 0)
2106 pmap->pm_stats.wired_count++;
2107 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2108 (orig_l3 & PTE_SW_WIRED) != 0)
2109 pmap->pm_stats.wired_count--;
2112 * Remove the extra PT page reference.
2116 KASSERT(mpte->wire_count > 0,
2117 ("pmap_enter: missing reference to page table page,"
2122 * Has the physical page changed?
2126 * No, might be a protection or wiring change.
2128 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2129 (new_l3 & PTE_W) != 0)
2130 vm_page_aflag_set(m, PGA_WRITEABLE);
2135 * The physical page has changed. Temporarily invalidate
2136 * the mapping. This ensures that all threads sharing the
2137 * pmap keep a consistent view of the mapping, which is
2138 * necessary for the correct handling of COW faults. It
2139 * also permits reuse of the old mapping's PV entry,
2140 * avoiding an allocation.
2142 * For consistency, handle unmanaged mappings the same way.
2144 orig_l3 = pmap_load_clear(l3);
2145 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2146 ("pmap_enter: unexpected pa update for %#lx", va));
2147 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2148 om = PHYS_TO_VM_PAGE(opa);
2151 * The pmap lock is sufficient to synchronize with
2152 * concurrent calls to pmap_page_test_mappings() and
2153 * pmap_ts_referenced().
2155 if ((orig_l3 & PTE_D) != 0)
2157 if ((orig_l3 & PTE_A) != 0)
2158 vm_page_aflag_set(om, PGA_REFERENCED);
2159 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2160 pv = pmap_pvh_remove(&om->md, pmap, va);
2161 if ((new_l3 & PTE_SW_MANAGED) == 0)
2162 free_pv_entry(pmap, pv);
2163 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2164 TAILQ_EMPTY(&om->md.pv_list))
2165 vm_page_aflag_clear(om, PGA_WRITEABLE);
2167 pmap_invalidate_page(pmap, va);
2171 * Increment the counters.
2173 if ((new_l3 & PTE_SW_WIRED) != 0)
2174 pmap->pm_stats.wired_count++;
2175 pmap_resident_count_inc(pmap, 1);
2178 * Enter on the PV list if part of our managed memory.
2180 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2182 pv = get_pv_entry(pmap, &lock);
2185 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2186 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2188 if ((new_l3 & PTE_W) != 0)
2189 vm_page_aflag_set(m, PGA_WRITEABLE);
2194 * Sync the i-cache on all harts before updating the PTE
2195 * if the new PTE is executable.
2197 if (prot & VM_PROT_EXECUTE)
2198 pmap_sync_icache(pmap, va, PAGE_SIZE);
2201 * Update the L3 entry.
2204 orig_l3 = pmap_load_store(l3, new_l3);
2205 pmap_invalidate_page(pmap, va);
2206 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2207 ("pmap_enter: invalid update"));
2208 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2209 (PTE_D | PTE_SW_MANAGED))
2212 pmap_store(l3, new_l3);
2217 rw_runlock(&pvh_global_lock);
2219 return (KERN_SUCCESS);
2223 * Maps a sequence of resident pages belonging to the same object.
2224 * The sequence begins with the given page m_start. This page is
2225 * mapped at the given virtual address start. Each subsequent page is
2226 * mapped at a virtual address that is offset from start by the same
2227 * amount as the page is offset from m_start within the object. The
2228 * last page in the sequence is the page with the largest offset from
2229 * m_start that can be mapped at a virtual address less than the given
2230 * virtual address end. Not every virtual page between start and end
2231 * is mapped; only those for which a resident page exists with the
2232 * corresponding offset from m_start are mapped.
2235 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2236 vm_page_t m_start, vm_prot_t prot)
2238 struct rwlock *lock;
2241 vm_pindex_t diff, psize;
2243 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2245 psize = atop(end - start);
2249 rw_rlock(&pvh_global_lock);
2251 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2252 va = start + ptoa(diff);
2253 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte, &lock);
2254 m = TAILQ_NEXT(m, listq);
2258 rw_runlock(&pvh_global_lock);
2263 * this code makes some *MAJOR* assumptions:
2264 * 1. Current pmap & pmap exists.
2267 * 4. No page table pages.
2268 * but is *MUCH* faster than pmap_enter...
2272 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2274 struct rwlock *lock;
2277 rw_rlock(&pvh_global_lock);
2279 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
2282 rw_runlock(&pvh_global_lock);
2287 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2288 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
2290 struct spglist free;
2293 pt_entry_t *l3, newl3;
2295 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2296 (m->oflags & VPO_UNMANAGED) != 0,
2297 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2298 rw_assert(&pvh_global_lock, RA_LOCKED);
2299 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2301 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
2303 * In the case that a page table page is not
2304 * resident, we are creating it here.
2306 if (va < VM_MAXUSER_ADDRESS) {
2307 vm_pindex_t l2pindex;
2310 * Calculate pagetable page index
2312 l2pindex = pmap_l2_pindex(va);
2313 if (mpte && (mpte->pindex == l2pindex)) {
2319 l2 = pmap_l2(pmap, va);
2322 * If the page table page is mapped, we just increment
2323 * the hold count, and activate it. Otherwise, we
2324 * attempt to allocate a page table page. If this
2325 * attempt fails, we don't retry. Instead, we give up.
2327 if (l2 != NULL && pmap_load(l2) != 0) {
2328 phys = PTE_TO_PHYS(pmap_load(l2));
2329 mpte = PHYS_TO_VM_PAGE(phys);
2333 * Pass NULL instead of the PV list lock
2334 * pointer, because we don't intend to sleep.
2336 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
2341 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
2342 l3 = &l3[pmap_l3_index(va)];
2345 l3 = pmap_l3(kernel_pmap, va);
2348 panic("pmap_enter_quick_locked: No l3");
2349 if (pmap_load(l3) != 0) {
2358 * Enter on the PV list if part of our managed memory.
2360 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2361 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
2364 if (pmap_unwire_l3(pmap, va, mpte, &free)) {
2365 pmap_invalidate_page(pmap, va);
2366 vm_page_free_pages_toq(&free, false);
2374 * Increment counters
2376 pmap_resident_count_inc(pmap, 1);
2378 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
2380 if ((prot & VM_PROT_EXECUTE) != 0)
2382 if ((m->oflags & VPO_UNMANAGED) == 0)
2383 newl3 |= PTE_SW_MANAGED;
2384 if (va < VM_MAX_USER_ADDRESS)
2388 * Sync the i-cache on all harts before updating the PTE
2389 * if the new PTE is executable.
2391 if (prot & VM_PROT_EXECUTE)
2392 pmap_sync_icache(pmap, va, PAGE_SIZE);
2394 pmap_store(l3, newl3);
2396 pmap_invalidate_page(pmap, va);
2401 * This code maps large physical mmap regions into the
2402 * processor address space. Note that some shortcuts
2403 * are taken, but the code works.
2406 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2407 vm_pindex_t pindex, vm_size_t size)
2410 VM_OBJECT_ASSERT_WLOCKED(object);
2411 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2412 ("pmap_object_init_pt: non-device object"));
2416 * Clear the wired attribute from the mappings for the specified range of
2417 * addresses in the given pmap. Every valid mapping within that range
2418 * must have the wired attribute set. In contrast, invalid mappings
2419 * cannot have the wired attribute set, so they are ignored.
2421 * The wired attribute of the page table entry is not a hardware feature,
2422 * so there is no need to invalidate any TLB entries.
2425 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2427 vm_offset_t va_next;
2428 pd_entry_t *l1, *l2;
2430 boolean_t pv_lists_locked;
2432 pv_lists_locked = FALSE;
2434 for (; sva < eva; sva = va_next) {
2435 l1 = pmap_l1(pmap, sva);
2436 if (pmap_load(l1) == 0) {
2437 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2443 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2447 l2 = pmap_l1_to_l2(l1, sva);
2448 if (pmap_load(l2) == 0)
2453 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2455 if (pmap_load(l3) == 0)
2457 if ((pmap_load(l3) & PTE_SW_WIRED) == 0)
2458 panic("pmap_unwire: l3 %#jx is missing "
2459 "PTE_SW_WIRED", (uintmax_t)*l3);
2462 * PG_W must be cleared atomically. Although the pmap
2463 * lock synchronizes access to PG_W, another processor
2464 * could be setting PG_M and/or PG_A concurrently.
2466 atomic_clear_long(l3, PTE_SW_WIRED);
2467 pmap->pm_stats.wired_count--;
2470 if (pv_lists_locked)
2471 rw_runlock(&pvh_global_lock);
2476 * Copy the range specified by src_addr/len
2477 * from the source map to the range dst_addr/len
2478 * in the destination map.
2480 * This routine is only advisory and need not do anything.
2484 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2485 vm_offset_t src_addr)
2491 * pmap_zero_page zeros the specified hardware page by mapping
2492 * the page into KVM and using bzero to clear its contents.
2495 pmap_zero_page(vm_page_t m)
2497 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2499 pagezero((void *)va);
2503 * pmap_zero_page_area zeros the specified hardware page by mapping
2504 * the page into KVM and using bzero to clear its contents.
2506 * off and size may not cover an area beyond a single hardware page.
2509 pmap_zero_page_area(vm_page_t m, int off, int size)
2511 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2513 if (off == 0 && size == PAGE_SIZE)
2514 pagezero((void *)va);
2516 bzero((char *)va + off, size);
2520 * pmap_copy_page copies the specified (machine independent)
2521 * page by mapping the page into virtual memory and using
2522 * bcopy to copy the page, one machine dependent page at a
2526 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2528 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2529 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2531 pagecopy((void *)src, (void *)dst);
2534 int unmapped_buf_allowed = 1;
2537 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2538 vm_offset_t b_offset, int xfersize)
2542 vm_paddr_t p_a, p_b;
2543 vm_offset_t a_pg_offset, b_pg_offset;
2546 while (xfersize > 0) {
2547 a_pg_offset = a_offset & PAGE_MASK;
2548 m_a = ma[a_offset >> PAGE_SHIFT];
2549 p_a = m_a->phys_addr;
2550 b_pg_offset = b_offset & PAGE_MASK;
2551 m_b = mb[b_offset >> PAGE_SHIFT];
2552 p_b = m_b->phys_addr;
2553 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2554 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2555 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
2556 panic("!DMAP a %lx", p_a);
2558 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
2560 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
2561 panic("!DMAP b %lx", p_b);
2563 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
2565 bcopy(a_cp, b_cp, cnt);
2573 pmap_quick_enter_page(vm_page_t m)
2576 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
2580 pmap_quick_remove_page(vm_offset_t addr)
2585 * Returns true if the pmap's pv is one of the first
2586 * 16 pvs linked to from this page. This count may
2587 * be changed upwards or downwards in the future; it
2588 * is only necessary that true be returned for a small
2589 * subset of pmaps for proper page aging.
2592 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2594 struct rwlock *lock;
2599 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2600 ("pmap_page_exists_quick: page %p is not managed", m));
2602 rw_rlock(&pvh_global_lock);
2603 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2605 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2606 if (PV_PMAP(pv) == pmap) {
2615 rw_runlock(&pvh_global_lock);
2620 * pmap_page_wired_mappings:
2622 * Return the number of managed mappings to the given physical page
2626 pmap_page_wired_mappings(vm_page_t m)
2628 struct rwlock *lock;
2634 if ((m->oflags & VPO_UNMANAGED) != 0)
2636 rw_rlock(&pvh_global_lock);
2637 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2641 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2643 if (!PMAP_TRYLOCK(pmap)) {
2644 md_gen = m->md.pv_gen;
2648 if (md_gen != m->md.pv_gen) {
2653 l3 = pmap_l3(pmap, pv->pv_va);
2654 if (l3 != NULL && (pmap_load(l3) & PTE_SW_WIRED) != 0)
2659 rw_runlock(&pvh_global_lock);
2664 * Destroy all managed, non-wired mappings in the given user-space
2665 * pmap. This pmap cannot be active on any processor besides the
2668 * This function cannot be applied to the kernel pmap. Moreover, it
2669 * is not intended for general use. It is only to be used during
2670 * process termination. Consequently, it can be implemented in ways
2671 * that make it faster than pmap_remove(). First, it can more quickly
2672 * destroy mappings by iterating over the pmap's collection of PV
2673 * entries, rather than searching the page table. Second, it doesn't
2674 * have to test and clear the page table entries atomically, because
2675 * no processor is currently accessing the user address space. In
2676 * particular, a page table entry's dirty bit won't change state once
2677 * this function starts.
2680 pmap_remove_pages(pmap_t pmap)
2682 pd_entry_t ptepde, *l2;
2683 pt_entry_t *l3, tl3;
2684 struct spglist free;
2687 struct pv_chunk *pc, *npc;
2688 struct rwlock *lock;
2690 uint64_t inuse, bitmask;
2691 int allfree, field, freed, idx;
2697 rw_rlock(&pvh_global_lock);
2699 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2702 for (field = 0; field < _NPCM; field++) {
2703 inuse = ~pc->pc_map[field] & pc_freemask[field];
2704 while (inuse != 0) {
2705 bit = ffsl(inuse) - 1;
2706 bitmask = 1UL << bit;
2707 idx = field * 64 + bit;
2708 pv = &pc->pc_pventry[idx];
2711 l2 = pmap_l2(pmap, pv->pv_va);
2712 ptepde = pmap_load(l2);
2713 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2714 tl3 = pmap_load(l3);
2717 * We cannot remove wired pages from a
2718 * process' mapping at this time.
2720 if (tl3 & PTE_SW_WIRED) {
2725 pa = PTE_TO_PHYS(tl3);
2726 m = PHYS_TO_VM_PAGE(pa);
2727 KASSERT(m->phys_addr == pa,
2728 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2729 m, (uintmax_t)m->phys_addr,
2732 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
2733 m < &vm_page_array[vm_page_array_size],
2734 ("pmap_remove_pages: bad l3 %#jx",
2740 * Update the vm_page_t clean/reference bits.
2742 if ((tl3 & PTE_D) != 0)
2745 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
2748 pc->pc_map[field] |= bitmask;
2750 pmap_resident_count_dec(pmap, 1);
2751 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2754 pmap_unuse_l3(pmap, pv->pv_va, ptepde, &free);
2758 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
2759 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
2760 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
2762 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2768 pmap_invalidate_all(pmap);
2769 rw_runlock(&pvh_global_lock);
2771 vm_page_free_pages_toq(&free, false);
2775 * This is used to check if a page has been accessed or modified. As we
2776 * don't have a bit to see if it has been modified we have to assume it
2777 * has been if the page is read/write.
2780 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
2782 struct rwlock *lock;
2784 pt_entry_t *l3, mask, value;
2790 rw_rlock(&pvh_global_lock);
2791 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2794 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2796 if (!PMAP_TRYLOCK(pmap)) {
2797 md_gen = m->md.pv_gen;
2801 if (md_gen != m->md.pv_gen) {
2806 l3 = pmap_l3(pmap, pv->pv_va);
2820 mask |= ATTR_AP_RW_BIT;
2821 value |= ATTR_AP(ATTR_AP_RW);
2824 mask |= ATTR_AF | ATTR_DESCR_MASK;
2825 value |= ATTR_AF | L3_PAGE;
2829 rv = (pmap_load(l3) & mask) == value;
2836 rw_runlock(&pvh_global_lock);
2843 * Return whether or not the specified physical page was modified
2844 * in any physical maps.
2847 pmap_is_modified(vm_page_t m)
2850 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2851 ("pmap_is_modified: page %p is not managed", m));
2854 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2855 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2856 * is clear, no PTEs can have PG_M set.
2858 VM_OBJECT_ASSERT_WLOCKED(m->object);
2859 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2861 return (pmap_page_test_mappings(m, FALSE, TRUE));
2865 * pmap_is_prefaultable:
2867 * Return whether or not the specified virtual address is eligible
2871 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2878 l3 = pmap_l3(pmap, addr);
2879 if (l3 != NULL && pmap_load(l3) != 0) {
2887 * pmap_is_referenced:
2889 * Return whether or not the specified physical page was referenced
2890 * in any physical maps.
2893 pmap_is_referenced(vm_page_t m)
2896 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2897 ("pmap_is_referenced: page %p is not managed", m));
2898 return (pmap_page_test_mappings(m, TRUE, FALSE));
2902 * Clear the write and modified bits in each of the given page's mappings.
2905 pmap_remove_write(vm_page_t m)
2908 struct rwlock *lock;
2910 pt_entry_t *l3, oldl3;
2914 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2915 ("pmap_remove_write: page %p is not managed", m));
2918 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2919 * set by another thread while the object is locked. Thus,
2920 * if PGA_WRITEABLE is clear, no page table entries need updating.
2922 VM_OBJECT_ASSERT_WLOCKED(m->object);
2923 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2925 rw_rlock(&pvh_global_lock);
2926 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2929 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2931 if (!PMAP_TRYLOCK(pmap)) {
2932 md_gen = m->md.pv_gen;
2936 if (md_gen != m->md.pv_gen) {
2942 l3 = pmap_l3(pmap, pv->pv_va);
2944 oldl3 = pmap_load(l3);
2946 if ((oldl3 & PTE_W) != 0) {
2947 newl3 = oldl3 & ~PTE_W;
2948 if (!atomic_cmpset_long(l3, oldl3, newl3))
2950 /* TODO: check for PTE_D? */
2951 if ((oldl3 & PTE_A) != 0)
2953 pmap_invalidate_page(pmap, pv->pv_va);
2958 vm_page_aflag_clear(m, PGA_WRITEABLE);
2959 rw_runlock(&pvh_global_lock);
2962 static __inline boolean_t
2963 safe_to_clear_referenced(pmap_t pmap, pt_entry_t pte)
2970 * pmap_ts_referenced:
2972 * Return a count of reference bits for a page, clearing those bits.
2973 * It is not necessary for every reference bit to be cleared, but it
2974 * is necessary that 0 only be returned when there are truly no
2975 * reference bits set.
2977 * As an optimization, update the page's dirty field if a modified bit is
2978 * found while counting reference bits. This opportunistic update can be
2979 * performed at low cost and can eliminate the need for some future calls
2980 * to pmap_is_modified(). However, since this function stops after
2981 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
2982 * dirty pages. Those dirty pages will only be detected by a future call
2983 * to pmap_is_modified().
2986 pmap_ts_referenced(vm_page_t m)
2990 struct rwlock *lock;
2992 pt_entry_t *l3, old_l3;
2994 int cleared, md_gen, not_cleared;
2995 struct spglist free;
2997 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2998 ("pmap_ts_referenced: page %p is not managed", m));
3001 pa = VM_PAGE_TO_PHYS(m);
3002 lock = PHYS_TO_PV_LIST_LOCK(pa);
3003 rw_rlock(&pvh_global_lock);
3007 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
3014 if (!PMAP_TRYLOCK(pmap)) {
3015 md_gen = m->md.pv_gen;
3019 if (md_gen != m->md.pv_gen) {
3024 l2 = pmap_l2(pmap, pv->pv_va);
3026 KASSERT((pmap_load(l2) & PTE_RX) == 0,
3027 ("pmap_ts_referenced: found an invalid l2 table"));
3029 l3 = pmap_l2_to_l3(l2, pv->pv_va);
3030 old_l3 = pmap_load(l3);
3031 if ((old_l3 & PTE_D) != 0)
3033 if ((old_l3 & PTE_A) != 0) {
3034 if (safe_to_clear_referenced(pmap, old_l3)) {
3036 * TODO: We don't handle the access flag
3037 * at all. We need to be able to set it in
3038 * the exception handler.
3040 panic("RISCVTODO: safe_to_clear_referenced\n");
3041 } else if ((old_l3 & PTE_SW_WIRED) == 0) {
3043 * Wired pages cannot be paged out so
3044 * doing accessed bit emulation for
3045 * them is wasted effort. We do the
3046 * hard work for unwired pages only.
3048 pmap_remove_l3(pmap, l3, pv->pv_va,
3049 pmap_load(l2), &free, &lock);
3050 pmap_invalidate_page(pmap, pv->pv_va);
3055 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3056 ("inconsistent pv lock %p %p for page %p",
3057 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3062 /* Rotate the PV list if it has more than one entry. */
3063 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3064 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3065 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3068 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
3069 not_cleared < PMAP_TS_REFERENCED_MAX);
3072 rw_runlock(&pvh_global_lock);
3073 vm_page_free_pages_toq(&free, false);
3074 return (cleared + not_cleared);
3078 * Apply the given advice to the specified range of addresses within the
3079 * given pmap. Depending on the advice, clear the referenced and/or
3080 * modified flags in each mapping and set the mapped page's dirty field.
3083 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3088 * Clear the modify bits on the specified physical page.
3091 pmap_clear_modify(vm_page_t m)
3094 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3095 ("pmap_clear_modify: page %p is not managed", m));
3096 VM_OBJECT_ASSERT_WLOCKED(m->object);
3097 KASSERT(!vm_page_xbusied(m),
3098 ("pmap_clear_modify: page %p is exclusive busied", m));
3101 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
3102 * If the object containing the page is locked and the page is not
3103 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
3105 if ((m->aflags & PGA_WRITEABLE) == 0)
3108 /* RISCVTODO: We lack support for tracking if a page is modified */
3112 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3115 return ((void *)PHYS_TO_DMAP(pa));
3119 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
3124 * Sets the memory attribute for the specified page.
3127 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3130 m->md.pv_memattr = ma;
3133 * RISCVTODO: Implement the below (from the amd64 pmap)
3134 * If "m" is a normal page, update its direct mapping. This update
3135 * can be relied upon to perform any cache operations that are
3136 * required for data coherence.
3138 if ((m->flags & PG_FICTITIOUS) == 0 &&
3139 PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
3140 panic("RISCVTODO: pmap_page_set_memattr");
3144 * perform the pmap work for mincore
3147 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3149 pt_entry_t *l2, *l3, tpte;
3159 l2 = pmap_l2(pmap, addr);
3160 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
3161 if ((tpte & (PTE_R | PTE_W | PTE_X)) != 0) {
3162 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
3163 val = MINCORE_INCORE | MINCORE_SUPER;
3165 l3 = pmap_l2_to_l3(l2, addr);
3166 tpte = pmap_load(l3);
3167 if ((tpte & PTE_V) == 0)
3169 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
3170 val = MINCORE_INCORE;
3173 if ((tpte & PTE_D) != 0)
3174 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
3175 if ((tpte & PTE_A) != 0)
3176 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
3177 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
3181 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
3182 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
3183 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
3184 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
3187 PA_UNLOCK_COND(*locked_pa);
3193 pmap_activate(struct thread *td)
3199 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3200 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
3202 reg = SATP_MODE_SV39;
3203 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
3206 pmap_invalidate_all(pmap);
3211 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3216 * From the RISC-V User-Level ISA V2.2:
3218 * "To make a store to instruction memory visible to all
3219 * RISC-V harts, the writing hart has to execute a data FENCE
3220 * before requesting that all remote RISC-V harts execute a
3225 CPU_CLR(PCPU_GET(cpuid), &mask);
3227 sbi_remote_fence_i(mask.__bits);
3232 * Increase the starting virtual address of the given mapping if a
3233 * different alignment might result in more superpage mappings.
3236 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3237 vm_offset_t *addr, vm_size_t size)
3242 * Get the kernel virtual address of a set of physical pages. If there are
3243 * physical addresses not covered by the DMAP perform a transient mapping
3244 * that will be removed when calling pmap_unmap_io_transient.
3246 * \param page The pages the caller wishes to obtain the virtual
3247 * address on the kernel memory map.
3248 * \param vaddr On return contains the kernel virtual memory address
3249 * of the pages passed in the page parameter.
3250 * \param count Number of pages passed in.
3251 * \param can_fault TRUE if the thread using the mapped pages can take
3252 * page faults, FALSE otherwise.
3254 * \returns TRUE if the caller must call pmap_unmap_io_transient when
3255 * finished or FALSE otherwise.
3259 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3260 boolean_t can_fault)
3263 boolean_t needs_mapping;
3267 * Allocate any KVA space that we need, this is done in a separate
3268 * loop to prevent calling vmem_alloc while pinned.
3270 needs_mapping = FALSE;
3271 for (i = 0; i < count; i++) {
3272 paddr = VM_PAGE_TO_PHYS(page[i]);
3273 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
3274 error = vmem_alloc(kernel_arena, PAGE_SIZE,
3275 M_BESTFIT | M_WAITOK, &vaddr[i]);
3276 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
3277 needs_mapping = TRUE;
3279 vaddr[i] = PHYS_TO_DMAP(paddr);
3283 /* Exit early if everything is covered by the DMAP */
3289 for (i = 0; i < count; i++) {
3290 paddr = VM_PAGE_TO_PHYS(page[i]);
3291 if (paddr >= DMAP_MAX_PHYSADDR) {
3293 "pmap_map_io_transient: TODO: Map out of DMAP data");
3297 return (needs_mapping);
3301 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3302 boolean_t can_fault)
3309 for (i = 0; i < count; i++) {
3310 paddr = VM_PAGE_TO_PHYS(page[i]);
3311 if (paddr >= DMAP_MAX_PHYSADDR) {
3312 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
3318 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
3321 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);