2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2003 Peter Wemm
10 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
11 * All rights reserved.
12 * Copyright (c) 2014 Andrew Turner
13 * All rights reserved.
14 * Copyright (c) 2014 The FreeBSD Foundation
15 * All rights reserved.
16 * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
17 * All rights reserved.
19 * This code is derived from software contributed to Berkeley by
20 * the Systems Programming Group of the University of Utah Computer
21 * Science Department and William Jolitz of UUNET Technologies Inc.
23 * Portions of this software were developed by Andrew Turner under
24 * sponsorship from The FreeBSD Foundation.
26 * Portions of this software were developed by SRI International and the
27 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
28 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
30 * Portions of this software were developed by the University of Cambridge
31 * Computer Laboratory as part of the CTSRD Project, with support from the
32 * UK Higher Education Innovation Fund (HEIF).
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. All advertising materials mentioning features or use of this software
43 * must display the following acknowledgement:
44 * This product includes software developed by the University of
45 * California, Berkeley and its contributors.
46 * 4. Neither the name of the University nor the names of its contributors
47 * may be used to endorse or promote products derived from this software
48 * without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
54 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
55 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
56 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
57 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
58 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
59 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
65 * Copyright (c) 2003 Networks Associates Technology, Inc.
66 * All rights reserved.
68 * This software was developed for the FreeBSD Project by Jake Burkholder,
69 * Safeport Network Services, and Network Associates Laboratories, the
70 * Security Research Division of Network Associates, Inc. under
71 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
72 * CHATS research program.
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce the above copyright
80 * notice, this list of conditions and the following disclaimer in the
81 * documentation and/or other materials provided with the distribution.
83 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
84 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
85 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
86 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
87 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
88 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
89 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
90 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
91 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
92 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
96 #include <sys/cdefs.h>
97 __FBSDID("$FreeBSD$");
100 * Manages physical address maps.
102 * Since the information managed by this module is
103 * also stored by the logical address mapping module,
104 * this module may throw away valid virtual-to-physical
105 * mappings at almost any time. However, invalidations
106 * of virtual-to-physical mappings must be done as
109 * In order to cope with hardware architectures which
110 * make virtual-to-physical map invalidates expensive,
111 * this module may delay invalidate or reduced protection
112 * operations until such time as they are actually
113 * necessary. This module is given full information as
114 * to which processors are currently using which maps,
115 * and to when physical maps must be made correct.
118 #include <sys/param.h>
120 #include <sys/systm.h>
121 #include <sys/kernel.h>
123 #include <sys/lock.h>
124 #include <sys/malloc.h>
125 #include <sys/mman.h>
126 #include <sys/msgbuf.h>
127 #include <sys/mutex.h>
128 #include <sys/proc.h>
129 #include <sys/rwlock.h>
131 #include <sys/vmem.h>
132 #include <sys/vmmeter.h>
133 #include <sys/sched.h>
134 #include <sys/sysctl.h>
138 #include <vm/vm_param.h>
139 #include <vm/vm_kern.h>
140 #include <vm/vm_page.h>
141 #include <vm/vm_map.h>
142 #include <vm/vm_object.h>
143 #include <vm/vm_extern.h>
144 #include <vm/vm_pageout.h>
145 #include <vm/vm_pager.h>
146 #include <vm/vm_radix.h>
147 #include <vm/vm_reserv.h>
150 #include <machine/machdep.h>
151 #include <machine/md_var.h>
152 #include <machine/pcb.h>
154 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
155 #define NUPDE (NPDEPG * NPDEPG)
156 #define NUSERPGTBLS (NUPDE + NPDEPG)
158 #if !defined(DIAGNOSTIC)
159 #ifdef __GNUC_GNU_INLINE__
160 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
162 #define PMAP_INLINE extern inline
169 #define PV_STAT(x) do { x ; } while (0)
171 #define PV_STAT(x) do { } while (0)
174 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
176 #define NPV_LIST_LOCKS MAXCPU
178 #define PHYS_TO_PV_LIST_LOCK(pa) \
179 (&pv_list_locks[pa_index(pa) % NPV_LIST_LOCKS])
181 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
182 struct rwlock **_lockp = (lockp); \
183 struct rwlock *_new_lock; \
185 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
186 if (_new_lock != *_lockp) { \
187 if (*_lockp != NULL) \
188 rw_wunlock(*_lockp); \
189 *_lockp = _new_lock; \
194 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
195 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
197 #define RELEASE_PV_LIST_LOCK(lockp) do { \
198 struct rwlock **_lockp = (lockp); \
200 if (*_lockp != NULL) { \
201 rw_wunlock(*_lockp); \
206 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
207 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
209 /* The list of all the user pmaps */
210 LIST_HEAD(pmaplist, pmap);
211 static struct pmaplist allpmaps;
213 static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
215 struct pmap kernel_pmap_store;
217 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
218 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
219 vm_offset_t kernel_vm_end = 0;
221 struct msgbuf *msgbufp = NULL;
223 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
224 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
225 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
227 /* This code assumes all L1 DMAP entries will be used */
228 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
229 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
231 static struct rwlock_padalign pvh_global_lock;
234 * Data for the pv entry allocation mechanism
236 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
237 static struct mtx pv_chunks_mutex;
238 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
240 static void free_pv_chunk(struct pv_chunk *pc);
241 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
242 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
243 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
244 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
245 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
247 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
248 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
249 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
250 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
251 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
252 vm_page_t m, struct rwlock **lockp);
254 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
255 struct rwlock **lockp);
257 static void _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
258 struct spglist *free);
259 static int pmap_unuse_l3(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
262 * These load the old table data and store the new value.
263 * They need to be atomic as the System MMU may write to the table at
264 * the same time as the CPU.
266 #define pmap_load_store(table, entry) atomic_swap_64(table, entry)
267 #define pmap_set(table, mask) atomic_set_64(table, mask)
268 #define pmap_load_clear(table) atomic_swap_64(table, 0)
269 #define pmap_load(table) (*table)
271 /********************/
272 /* Inline functions */
273 /********************/
276 pagecopy(void *s, void *d)
279 memcpy(d, s, PAGE_SIZE);
289 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
290 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
291 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
293 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
295 static __inline pd_entry_t *
296 pmap_l1(pmap_t pmap, vm_offset_t va)
299 return (&pmap->pm_l1[pmap_l1_index(va)]);
302 static __inline pd_entry_t *
303 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
308 phys = PTE_TO_PHYS(pmap_load(l1));
309 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
311 return (&l2[pmap_l2_index(va)]);
314 static __inline pd_entry_t *
315 pmap_l2(pmap_t pmap, vm_offset_t va)
319 l1 = pmap_l1(pmap, va);
322 if ((pmap_load(l1) & PTE_V) == 0)
324 if ((pmap_load(l1) & PTE_RX) != 0)
327 return (pmap_l1_to_l2(l1, va));
330 static __inline pt_entry_t *
331 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
336 phys = PTE_TO_PHYS(pmap_load(l2));
337 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
339 return (&l3[pmap_l3_index(va)]);
342 static __inline pt_entry_t *
343 pmap_l3(pmap_t pmap, vm_offset_t va)
347 l2 = pmap_l2(pmap, va);
350 if ((pmap_load(l2) & PTE_V) == 0)
352 if ((pmap_load(l2) & PTE_RX) != 0)
355 return (pmap_l2_to_l3(l2, va));
360 pmap_is_write(pt_entry_t entry)
363 return (entry & PTE_W);
367 pmap_is_current(pmap_t pmap)
370 return ((pmap == pmap_kernel()) ||
371 (pmap == curthread->td_proc->p_vmspace->vm_map.pmap));
375 pmap_l3_valid(pt_entry_t l3)
382 pmap_l3_valid_cacheable(pt_entry_t l3)
390 #define PTE_SYNC(pte) cpu_dcache_wb_range((vm_offset_t)pte, sizeof(*pte))
392 /* Checks if the page is dirty. */
394 pmap_page_dirty(pt_entry_t pte)
397 return (pte & PTE_D);
401 pmap_resident_count_inc(pmap_t pmap, int count)
404 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
405 pmap->pm_stats.resident_count += count;
409 pmap_resident_count_dec(pmap_t pmap, int count)
412 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
413 KASSERT(pmap->pm_stats.resident_count >= count,
414 ("pmap %p resident count underflow %ld %d", pmap,
415 pmap->pm_stats.resident_count, count));
416 pmap->pm_stats.resident_count -= count;
420 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
423 struct pmap *user_pmap;
426 /* Distribute new kernel L1 entry to all the user pmaps */
427 if (pmap != kernel_pmap)
430 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
431 l1 = &user_pmap->pm_l1[l1index];
433 pmap_load_store(l1, entry);
440 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
446 l1 = (pd_entry_t *)l1pt;
447 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
449 /* Check locore has used a table L1 map */
450 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
451 ("Invalid bootstrap L1 table"));
453 /* Find the address of the L2 table */
454 l2 = (pt_entry_t *)init_pt_va;
455 *l2_slot = pmap_l2_index(va);
461 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
463 u_int l1_slot, l2_slot;
467 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
469 /* Check locore has used L2 superpages */
470 KASSERT((l2[l2_slot] & PTE_RX) != 0,
471 ("Invalid bootstrap L2 table"));
473 /* L2 is superpages */
474 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
475 ret += (va & L2_OFFSET);
481 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
490 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
491 va = DMAP_MIN_ADDRESS;
492 l1 = (pd_entry_t *)kern_l1;
493 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
495 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
496 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
497 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
500 pn = (pa / PAGE_SIZE);
501 entry = (PTE_V | PTE_RWX);
502 entry |= (pn << PTE_PPN0_S);
503 pmap_load_store(&l1[l1_slot], entry);
506 /* Set the upper limit of the DMAP region */
510 cpu_dcache_wb_range((vm_offset_t)l1, PAGE_SIZE);
515 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
517 vm_offset_t l2pt, l3pt;
524 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
526 l2 = pmap_l2(kernel_pmap, va);
527 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
528 l2pt = (vm_offset_t)l2;
529 l2_slot = pmap_l2_index(va);
532 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
533 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
535 pa = pmap_early_vtophys(l1pt, l3pt);
536 pn = (pa / PAGE_SIZE);
538 entry |= (pn << PTE_PPN0_S);
539 pmap_load_store(&l2[l2_slot], entry);
544 /* Clean the L2 page table */
545 memset((void *)l3_start, 0, l3pt - l3_start);
546 cpu_dcache_wb_range(l3_start, l3pt - l3_start);
548 cpu_dcache_wb_range((vm_offset_t)l2, PAGE_SIZE);
554 * Bootstrap the system enough to run with virtual memory.
557 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
559 u_int l1_slot, l2_slot, avail_slot, map_slot, used_map_slot;
562 vm_offset_t va, freemempos;
563 vm_offset_t dpcpu, msgbufpv;
564 vm_paddr_t pa, min_pa, max_pa;
567 kern_delta = KERNBASE - kernstart;
570 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
571 printf("%lx\n", l1pt);
572 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
574 /* Set this early so we can use the pagetable walking functions */
575 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
576 PMAP_LOCK_INIT(kernel_pmap);
579 * Initialize the global pv list lock.
581 rw_init(&pvh_global_lock, "pmap pv global");
583 LIST_INIT(&allpmaps);
585 /* Assume the address we were loaded to is a valid physical address */
586 min_pa = max_pa = KERNBASE - kern_delta;
589 * Find the minimum physical address. physmap is sorted,
590 * but may contain empty ranges.
592 for (i = 0; i < (physmap_idx * 2); i += 2) {
593 if (physmap[i] == physmap[i + 1])
595 if (physmap[i] <= min_pa)
597 if (physmap[i + 1] > max_pa)
598 max_pa = physmap[i + 1];
600 printf("physmap_idx %lx\n", physmap_idx);
601 printf("min_pa %lx\n", min_pa);
602 printf("max_pa %lx\n", max_pa);
604 /* Create a direct map region early so we can use it for pa -> va */
605 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
608 pa = KERNBASE - kern_delta;
611 * Start to initialize phys_avail by copying from physmap
612 * up to the physical address KERNBASE points at.
614 map_slot = avail_slot = 0;
615 for (; map_slot < (physmap_idx * 2); map_slot += 2) {
616 if (physmap[map_slot] == physmap[map_slot + 1])
619 if (physmap[map_slot] <= pa &&
620 physmap[map_slot + 1] > pa)
623 phys_avail[avail_slot] = physmap[map_slot];
624 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
625 physmem += (phys_avail[avail_slot + 1] -
626 phys_avail[avail_slot]) >> PAGE_SHIFT;
630 /* Add the memory before the kernel */
631 if (physmap[avail_slot] < pa) {
632 phys_avail[avail_slot] = physmap[map_slot];
633 phys_avail[avail_slot + 1] = pa;
634 physmem += (phys_avail[avail_slot + 1] -
635 phys_avail[avail_slot]) >> PAGE_SHIFT;
638 used_map_slot = map_slot;
641 * Read the page table to find out what is already mapped.
642 * This assumes we have mapped a block of memory from KERNBASE
643 * using a single L1 entry.
645 l2 = pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
647 /* Sanity check the index, KERNBASE should be the first VA */
648 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
650 /* Find how many pages we have mapped */
651 for (; l2_slot < Ln_ENTRIES; l2_slot++) {
652 if ((l2[l2_slot] & PTE_V) == 0)
655 /* Check locore used L2 superpages */
656 KASSERT((l2[l2_slot] & PTE_RX) != 0,
657 ("Invalid bootstrap L2 table"));
663 va = roundup2(va, L2_SIZE);
665 freemempos = KERNBASE + kernlen;
666 freemempos = roundup2(freemempos, PAGE_SIZE);
668 /* Create the l3 tables for the early devmap */
669 freemempos = pmap_bootstrap_l3(l1pt,
670 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
674 #define alloc_pages(var, np) \
675 (var) = freemempos; \
676 freemempos += (np * PAGE_SIZE); \
677 memset((char *)(var), 0, ((np) * PAGE_SIZE));
679 /* Allocate dynamic per-cpu area. */
680 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
681 dpcpu_init((void *)dpcpu, 0);
683 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
684 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
685 msgbufp = (void *)msgbufpv;
687 virtual_avail = roundup2(freemempos, L2_SIZE);
688 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
689 kernel_vm_end = virtual_avail;
691 pa = pmap_early_vtophys(l1pt, freemempos);
693 /* Finish initialising physmap */
694 map_slot = used_map_slot;
695 for (; avail_slot < (PHYS_AVAIL_SIZE - 2) &&
696 map_slot < (physmap_idx * 2); map_slot += 2) {
697 if (physmap[map_slot] == physmap[map_slot + 1]) {
701 /* Have we used the current range? */
702 if (physmap[map_slot + 1] <= pa) {
706 /* Do we need to split the entry? */
707 if (physmap[map_slot] < pa) {
708 phys_avail[avail_slot] = pa;
709 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
711 phys_avail[avail_slot] = physmap[map_slot];
712 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
714 physmem += (phys_avail[avail_slot + 1] -
715 phys_avail[avail_slot]) >> PAGE_SHIFT;
719 phys_avail[avail_slot] = 0;
720 phys_avail[avail_slot + 1] = 0;
723 * Maxmem isn't the "maximum memory", it's one larger than the
724 * highest page of the physical address space. It should be
725 * called something like "Maxphyspage".
727 Maxmem = atop(phys_avail[avail_slot - 1]);
733 * Initialize a vm_page's machine-dependent fields.
736 pmap_page_init(vm_page_t m)
739 TAILQ_INIT(&m->md.pv_list);
740 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
744 * Initialize the pmap module.
745 * Called by vm_init, to initialize any structures that the pmap
746 * system needs to map virtual memory.
754 * Initialize the pv chunk list mutex.
756 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
759 * Initialize the pool of pv list locks.
761 for (i = 0; i < NPV_LIST_LOCKS; i++)
762 rw_init(&pv_list_locks[i], "pmap pv list");
766 * Normal, non-SMP, invalidation functions.
767 * We inline these within pmap.c for speed.
770 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
776 __asm __volatile("sfence.vma %0" :: "r" (va) : "memory");
781 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
787 __asm __volatile("sfence.vma");
792 pmap_invalidate_all(pmap_t pmap)
798 __asm __volatile("sfence.vma");
803 * Routine: pmap_extract
805 * Extract the physical page address associated
806 * with the given map/virtual_address pair.
809 pmap_extract(pmap_t pmap, vm_offset_t va)
818 * Start with the l2 tabel. We are unable to allocate
819 * pages in the l1 table.
821 l2p = pmap_l2(pmap, va);
824 if ((l2 & PTE_RX) == 0) {
825 l3p = pmap_l2_to_l3(l2p, va);
828 pa = PTE_TO_PHYS(l3);
829 pa |= (va & L3_OFFSET);
832 /* L2 is superpages */
833 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
834 pa |= (va & L2_OFFSET);
842 * Routine: pmap_extract_and_hold
844 * Atomically extract and hold the physical page
845 * with the given pmap and virtual address pair
846 * if that mapping permits the given protection.
849 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
860 l3p = pmap_l3(pmap, va);
861 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
862 if ((pmap_is_write(l3)) || ((prot & VM_PROT_WRITE) == 0)) {
863 phys = PTE_TO_PHYS(l3);
864 if (vm_page_pa_tryrelock(pmap, phys, &pa))
866 m = PHYS_TO_VM_PAGE(phys);
876 pmap_kextract(vm_offset_t va)
882 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
883 pa = DMAP_TO_PHYS(va);
885 l2 = pmap_l2(kernel_pmap, va);
887 panic("pmap_kextract: No l2");
888 if ((pmap_load(l2) & PTE_RX) != 0) {
890 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
891 pa |= (va & L2_OFFSET);
895 l3 = pmap_l2_to_l3(l2, va);
897 panic("pmap_kextract: No l3...");
898 pa = PTE_TO_PHYS(pmap_load(l3));
899 pa |= (va & PAGE_MASK);
904 /***************************************************
905 * Low level mapping routines.....
906 ***************************************************/
909 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
916 KASSERT((pa & L3_OFFSET) == 0,
917 ("pmap_kenter_device: Invalid physical address"));
918 KASSERT((sva & L3_OFFSET) == 0,
919 ("pmap_kenter_device: Invalid virtual address"));
920 KASSERT((size & PAGE_MASK) == 0,
921 ("pmap_kenter_device: Mapping is not page-sized"));
925 l3 = pmap_l3(kernel_pmap, va);
926 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
928 pn = (pa / PAGE_SIZE);
929 entry = (PTE_V | PTE_RWX);
930 entry |= (pn << PTE_PPN0_S);
931 pmap_load_store(l3, entry);
939 pmap_invalidate_range(kernel_pmap, sva, va);
943 * Remove a page from the kernel pagetables.
944 * Note: not SMP coherent.
947 pmap_kremove(vm_offset_t va)
951 l3 = pmap_l3(kernel_pmap, va);
952 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
954 if (pmap_l3_valid_cacheable(pmap_load(l3)))
955 cpu_dcache_wb_range(va, L3_SIZE);
958 pmap_invalidate_page(kernel_pmap, va);
962 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
967 KASSERT((sva & L3_OFFSET) == 0,
968 ("pmap_kremove_device: Invalid virtual address"));
969 KASSERT((size & PAGE_MASK) == 0,
970 ("pmap_kremove_device: Mapping is not page-sized"));
974 l3 = pmap_l3(kernel_pmap, va);
975 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
982 pmap_invalidate_range(kernel_pmap, sva, va);
986 * Used to map a range of physical addresses into kernel
987 * virtual address space.
989 * The value passed in '*virt' is a suggested virtual address for
990 * the mapping. Architectures which can support a direct-mapped
991 * physical to virtual region can return the appropriate address
992 * within that region, leaving '*virt' unchanged. Other
993 * architectures should map the pages starting at '*virt' and
994 * update '*virt' with the first usable address after the mapped
998 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1001 return PHYS_TO_DMAP(start);
1006 * Add a list of wired pages to the kva
1007 * this routine is only used for temporary
1008 * kernel mappings that do not need to have
1009 * page modification or references recorded.
1010 * Note that old mappings are simply written
1011 * over. The page *must* be wired.
1012 * Note: SMP coherent. Uses a ranged shootdown IPI.
1015 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1025 for (i = 0; i < count; i++) {
1027 pa = VM_PAGE_TO_PHYS(m);
1028 pn = (pa / PAGE_SIZE);
1029 l3 = pmap_l3(kernel_pmap, va);
1031 entry = (PTE_V | PTE_RWX);
1032 entry |= (pn << PTE_PPN0_S);
1033 pmap_load_store(l3, entry);
1038 pmap_invalidate_range(kernel_pmap, sva, va);
1042 * This routine tears out page mappings from the
1043 * kernel -- it is meant only for temporary mappings.
1044 * Note: SMP coherent. Uses a ranged shootdown IPI.
1047 pmap_qremove(vm_offset_t sva, int count)
1052 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1055 while (count-- > 0) {
1056 l3 = pmap_l3(kernel_pmap, va);
1057 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1059 if (pmap_l3_valid_cacheable(pmap_load(l3)))
1060 cpu_dcache_wb_range(va, L3_SIZE);
1061 pmap_load_clear(l3);
1066 pmap_invalidate_range(kernel_pmap, sva, va);
1069 /***************************************************
1070 * Page table page management routines.....
1071 ***************************************************/
1072 static __inline void
1073 pmap_free_zero_pages(struct spglist *free)
1077 while ((m = SLIST_FIRST(free)) != NULL) {
1078 SLIST_REMOVE_HEAD(free, plinks.s.ss);
1079 /* Preserve the page's PG_ZERO setting. */
1080 vm_page_free_toq(m);
1085 * Schedule the specified unused page table page to be freed. Specifically,
1086 * add the page to the specified list of pages that will be released to the
1087 * physical memory manager after the TLB has been updated.
1089 static __inline void
1090 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1091 boolean_t set_PG_ZERO)
1095 m->flags |= PG_ZERO;
1097 m->flags &= ~PG_ZERO;
1098 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1102 * Decrements a page table page's wire count, which is used to record the
1103 * number of valid page table entries within the page. If the wire count
1104 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1105 * page table page was unmapped and FALSE otherwise.
1107 static inline boolean_t
1108 pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1112 if (m->wire_count == 0) {
1113 _pmap_unwire_l3(pmap, va, m, free);
1121 _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1125 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1127 * unmap the page table page
1129 if (m->pindex >= NUPDE) {
1132 l1 = pmap_l1(pmap, va);
1133 pmap_load_clear(l1);
1134 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1139 l2 = pmap_l2(pmap, va);
1140 pmap_load_clear(l2);
1143 pmap_resident_count_dec(pmap, 1);
1144 if (m->pindex < NUPDE) {
1146 /* We just released a PT, unhold the matching PD */
1149 l1 = pmap_l1(pmap, va);
1150 phys = PTE_TO_PHYS(pmap_load(l1));
1151 pdpg = PHYS_TO_VM_PAGE(phys);
1152 pmap_unwire_l3(pmap, va, pdpg, free);
1154 pmap_invalidate_page(pmap, va);
1157 * This is a release store so that the ordinary store unmapping
1158 * the page table page is globally performed before TLB shoot-
1161 atomic_subtract_rel_int(&vm_cnt.v_wire_count, 1);
1164 * Put page on a list so that it is released after
1165 * *ALL* TLB shootdown is done
1167 pmap_add_delayed_free_list(m, free, TRUE);
1171 * After removing an l3 entry, this routine is used to
1172 * conditionally free the page, and manage the hold/wire counts.
1175 pmap_unuse_l3(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1176 struct spglist *free)
1181 if (va >= VM_MAXUSER_ADDRESS)
1183 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1185 phys = PTE_TO_PHYS(ptepde);
1187 mpte = PHYS_TO_VM_PAGE(phys);
1188 return (pmap_unwire_l3(pmap, va, mpte, free));
1192 pmap_pinit0(pmap_t pmap)
1195 PMAP_LOCK_INIT(pmap);
1196 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1197 pmap->pm_l1 = kernel_pmap->pm_l1;
1201 pmap_pinit(pmap_t pmap)
1207 * allocate the l1 page
1209 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1210 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1213 l1phys = VM_PAGE_TO_PHYS(l1pt);
1214 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1216 if ((l1pt->flags & PG_ZERO) == 0)
1217 pagezero(pmap->pm_l1);
1219 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1221 /* Install kernel pagetables */
1222 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1224 /* Add to the list of all user pmaps */
1225 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1231 * This routine is called if the desired page table page does not exist.
1233 * If page table page allocation fails, this routine may sleep before
1234 * returning NULL. It sleeps only if a lock pointer was given.
1236 * Note: If a page allocation fails at page table level two or three,
1237 * one or two pages may be held during the wait, only to be released
1238 * afterwards. This conservative approach is easily argued to avoid
1242 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1244 vm_page_t m, /*pdppg, */pdpg;
1249 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1252 * Allocate a page table page.
1254 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1255 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1256 if (lockp != NULL) {
1257 RELEASE_PV_LIST_LOCK(lockp);
1259 rw_runlock(&pvh_global_lock);
1261 rw_rlock(&pvh_global_lock);
1266 * Indicate the need to retry. While waiting, the page table
1267 * page may have been allocated.
1272 if ((m->flags & PG_ZERO) == 0)
1276 * Map the pagetable page into the process address space, if
1277 * it isn't already there.
1280 if (ptepindex >= NUPDE) {
1282 vm_pindex_t l1index;
1284 l1index = ptepindex - NUPDE;
1285 l1 = &pmap->pm_l1[l1index];
1287 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1289 entry |= (pn << PTE_PPN0_S);
1290 pmap_load_store(l1, entry);
1291 pmap_distribute_l1(pmap, l1index, entry);
1296 vm_pindex_t l1index;
1297 pd_entry_t *l1, *l2;
1299 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1300 l1 = &pmap->pm_l1[l1index];
1301 if (pmap_load(l1) == 0) {
1302 /* recurse for allocating page dir */
1303 if (_pmap_alloc_l3(pmap, NUPDE + l1index,
1306 atomic_subtract_int(&vm_cnt.v_wire_count, 1);
1307 vm_page_free_zero(m);
1311 phys = PTE_TO_PHYS(pmap_load(l1));
1312 pdpg = PHYS_TO_VM_PAGE(phys);
1316 phys = PTE_TO_PHYS(pmap_load(l1));
1317 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1318 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1320 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1322 entry |= (pn << PTE_PPN0_S);
1323 pmap_load_store(l2, entry);
1328 pmap_resident_count_inc(pmap, 1);
1334 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1336 vm_pindex_t ptepindex;
1342 * Calculate pagetable page index
1344 ptepindex = pmap_l2_pindex(va);
1347 * Get the page directory entry
1349 l2 = pmap_l2(pmap, va);
1352 * If the page table page is mapped, we just increment the
1353 * hold count, and activate it.
1355 if (l2 != NULL && pmap_load(l2) != 0) {
1356 phys = PTE_TO_PHYS(pmap_load(l2));
1357 m = PHYS_TO_VM_PAGE(phys);
1361 * Here if the pte page isn't mapped, or if it has been
1364 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1365 if (m == NULL && lockp != NULL)
1372 /***************************************************
1373 * Pmap allocation/deallocation routines.
1374 ***************************************************/
1377 * Release any resources held by the given physical map.
1378 * Called when a pmap initialized by pmap_pinit is being released.
1379 * Should only be called if the map contains no valid mappings.
1382 pmap_release(pmap_t pmap)
1386 KASSERT(pmap->pm_stats.resident_count == 0,
1387 ("pmap_release: pmap resident count %ld != 0",
1388 pmap->pm_stats.resident_count));
1390 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1392 atomic_subtract_int(&vm_cnt.v_wire_count, 1);
1393 vm_page_free_zero(m);
1395 /* Remove pmap from the allpmaps list */
1396 LIST_REMOVE(pmap, pm_list);
1398 /* Remove kernel pagetables */
1399 bzero(pmap->pm_l1, PAGE_SIZE);
1404 kvm_size(SYSCTL_HANDLER_ARGS)
1406 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1408 return sysctl_handle_long(oidp, &ksize, 0, req);
1410 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1411 0, 0, kvm_size, "LU", "Size of KVM");
1414 kvm_free(SYSCTL_HANDLER_ARGS)
1416 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1418 return sysctl_handle_long(oidp, &kfree, 0, req);
1420 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1421 0, 0, kvm_free, "LU", "Amount of KVM free");
1425 * grow the number of kernel page table entries, if needed
1428 pmap_growkernel(vm_offset_t addr)
1432 pd_entry_t *l1, *l2;
1436 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1438 addr = roundup2(addr, L2_SIZE);
1439 if (addr - 1 >= kernel_map->max_offset)
1440 addr = kernel_map->max_offset;
1441 while (kernel_vm_end < addr) {
1442 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1443 if (pmap_load(l1) == 0) {
1444 /* We need a new PDP entry */
1445 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1446 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1447 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1449 panic("pmap_growkernel: no memory to grow kernel");
1450 if ((nkpg->flags & PG_ZERO) == 0)
1451 pmap_zero_page(nkpg);
1452 paddr = VM_PAGE_TO_PHYS(nkpg);
1454 pn = (paddr / PAGE_SIZE);
1456 entry |= (pn << PTE_PPN0_S);
1457 pmap_load_store(l1, entry);
1458 pmap_distribute_l1(kernel_pmap,
1459 pmap_l1_index(kernel_vm_end), entry);
1462 continue; /* try again */
1464 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1465 if ((pmap_load(l2) & PTE_A) != 0) {
1466 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1467 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1468 kernel_vm_end = kernel_map->max_offset;
1474 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1475 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1478 panic("pmap_growkernel: no memory to grow kernel");
1479 if ((nkpg->flags & PG_ZERO) == 0) {
1480 pmap_zero_page(nkpg);
1482 paddr = VM_PAGE_TO_PHYS(nkpg);
1484 pn = (paddr / PAGE_SIZE);
1486 entry |= (pn << PTE_PPN0_S);
1487 pmap_load_store(l2, entry);
1490 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1492 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1493 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1494 kernel_vm_end = kernel_map->max_offset;
1501 /***************************************************
1502 * page management routines.
1503 ***************************************************/
1505 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1506 CTASSERT(_NPCM == 3);
1507 CTASSERT(_NPCPV == 168);
1509 static __inline struct pv_chunk *
1510 pv_to_chunk(pv_entry_t pv)
1513 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1516 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1518 #define PC_FREE0 0xfffffffffffffffful
1519 #define PC_FREE1 0xfffffffffffffffful
1520 #define PC_FREE2 0x000000fffffffffful
1522 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1526 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1528 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1529 "Current number of pv entry chunks");
1530 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1531 "Current number of pv entry chunks allocated");
1532 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1533 "Current number of pv entry chunks frees");
1534 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1535 "Number of times tried to get a chunk page but failed.");
1537 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1538 static int pv_entry_spare;
1540 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1541 "Current number of pv entry frees");
1542 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1543 "Current number of pv entry allocs");
1544 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1545 "Current number of pv entries");
1546 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1547 "Current number of spare pv entries");
1552 * We are in a serious low memory condition. Resort to
1553 * drastic measures to free some pages so we can allocate
1554 * another pv entry chunk.
1556 * Returns NULL if PV entries were reclaimed from the specified pmap.
1558 * We do not, however, unmap 2mpages because subsequent accesses will
1559 * allocate per-page pv entries until repromotion occurs, thereby
1560 * exacerbating the shortage of free pv entries.
1563 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1566 panic("RISCVTODO: reclaim_pv_chunk");
1570 * free the pv_entry back to the free list
1573 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1575 struct pv_chunk *pc;
1576 int idx, field, bit;
1578 rw_assert(&pvh_global_lock, RA_LOCKED);
1579 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1580 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1581 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1582 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1583 pc = pv_to_chunk(pv);
1584 idx = pv - &pc->pc_pventry[0];
1587 pc->pc_map[field] |= 1ul << bit;
1588 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1589 pc->pc_map[2] != PC_FREE2) {
1590 /* 98% of the time, pc is already at the head of the list. */
1591 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1592 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1593 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1597 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1602 free_pv_chunk(struct pv_chunk *pc)
1606 mtx_lock(&pv_chunks_mutex);
1607 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1608 mtx_unlock(&pv_chunks_mutex);
1609 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1610 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1611 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1612 /* entire chunk is free, return it */
1613 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1614 #if 0 /* TODO: For minidump */
1615 dump_drop_page(m->phys_addr);
1617 vm_page_unwire(m, PQ_INACTIVE);
1622 * Returns a new PV entry, allocating a new PV chunk from the system when
1623 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1624 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1627 * The given PV list lock may be released.
1630 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1634 struct pv_chunk *pc;
1637 rw_assert(&pvh_global_lock, RA_LOCKED);
1638 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1639 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1641 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1643 for (field = 0; field < _NPCM; field++) {
1644 if (pc->pc_map[field]) {
1645 bit = ffsl(pc->pc_map[field]) - 1;
1649 if (field < _NPCM) {
1650 pv = &pc->pc_pventry[field * 64 + bit];
1651 pc->pc_map[field] &= ~(1ul << bit);
1652 /* If this was the last item, move it to tail */
1653 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1654 pc->pc_map[2] == 0) {
1655 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1656 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1659 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1660 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1664 /* No free items, allocate another chunk */
1665 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1668 if (lockp == NULL) {
1669 PV_STAT(pc_chunk_tryfail++);
1672 m = reclaim_pv_chunk(pmap, lockp);
1676 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1677 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1678 #if 0 /* TODO: This is for minidump */
1679 dump_add_page(m->phys_addr);
1681 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1683 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1684 pc->pc_map[1] = PC_FREE1;
1685 pc->pc_map[2] = PC_FREE2;
1686 mtx_lock(&pv_chunks_mutex);
1687 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1688 mtx_unlock(&pv_chunks_mutex);
1689 pv = &pc->pc_pventry[0];
1690 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1691 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1692 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1697 * First find and then remove the pv entry for the specified pmap and virtual
1698 * address from the specified pv list. Returns the pv entry if found and NULL
1699 * otherwise. This operation can be performed on pv lists for either 4KB or
1700 * 2MB page mappings.
1702 static __inline pv_entry_t
1703 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1707 rw_assert(&pvh_global_lock, RA_LOCKED);
1708 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1709 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1710 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1719 * First find and then destroy the pv entry for the specified pmap and virtual
1720 * address. This operation can be performed on pv lists for either 4KB or 2MB
1724 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1728 pv = pmap_pvh_remove(pvh, pmap, va);
1730 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
1731 free_pv_entry(pmap, pv);
1735 * Conditionally create the PV entry for a 4KB page mapping if the required
1736 * memory can be allocated without resorting to reclamation.
1739 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1740 struct rwlock **lockp)
1744 rw_assert(&pvh_global_lock, RA_LOCKED);
1745 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1746 /* Pass NULL instead of the lock pointer to disable reclamation. */
1747 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1749 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1750 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1758 * pmap_remove_l3: do the things to unmap a page in a process
1761 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
1762 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
1768 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1769 if (pmap_is_current(pmap) && pmap_l3_valid_cacheable(pmap_load(l3)))
1770 cpu_dcache_wb_range(va, L3_SIZE);
1771 old_l3 = pmap_load_clear(l3);
1773 pmap_invalidate_page(pmap, va);
1774 if (old_l3 & PTE_SW_WIRED)
1775 pmap->pm_stats.wired_count -= 1;
1776 pmap_resident_count_dec(pmap, 1);
1777 if (old_l3 & PTE_SW_MANAGED) {
1778 phys = PTE_TO_PHYS(old_l3);
1779 m = PHYS_TO_VM_PAGE(phys);
1780 if (pmap_page_dirty(old_l3))
1783 vm_page_aflag_set(m, PGA_REFERENCED);
1784 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1785 pmap_pvh_free(&m->md, pmap, va);
1788 return (pmap_unuse_l3(pmap, va, l2e, free));
1792 * Remove the given range of addresses from the specified map.
1794 * It is assumed that the start and end are properly
1795 * rounded to the page size.
1798 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1800 struct rwlock *lock;
1801 vm_offset_t va, va_next;
1802 pd_entry_t *l1, *l2;
1803 pt_entry_t l3_pte, *l3;
1804 struct spglist free;
1808 * Perform an unsynchronized read. This is, however, safe.
1810 if (pmap->pm_stats.resident_count == 0)
1816 rw_rlock(&pvh_global_lock);
1820 for (; sva < eva; sva = va_next) {
1821 if (pmap->pm_stats.resident_count == 0)
1824 l1 = pmap_l1(pmap, sva);
1825 if (pmap_load(l1) == 0) {
1826 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1833 * Calculate index for next page table.
1835 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1839 l2 = pmap_l1_to_l2(l1, sva);
1843 l3_pte = pmap_load(l2);
1846 * Weed out invalid mappings.
1850 if ((pmap_load(l2) & PTE_RX) != 0)
1854 * Limit our scan to either the end of the va represented
1855 * by the current page table page, or to the end of the
1856 * range being removed.
1862 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1865 panic("l3 == NULL");
1866 if (pmap_load(l3) == 0) {
1867 if (va != va_next) {
1868 pmap_invalidate_range(pmap, va, sva);
1875 if (pmap_remove_l3(pmap, l3, sva, l3_pte, &free,
1882 pmap_invalidate_range(pmap, va, sva);
1887 pmap_invalidate_all(pmap);
1888 rw_runlock(&pvh_global_lock);
1890 pmap_free_zero_pages(&free);
1894 * Routine: pmap_remove_all
1896 * Removes this physical page from
1897 * all physical maps in which it resides.
1898 * Reflects back modify bits to the pager.
1901 * Original versions of this routine were very
1902 * inefficient because they iteratively called
1903 * pmap_remove (slow...)
1907 pmap_remove_all(vm_page_t m)
1911 pt_entry_t *l3, tl3;
1912 pd_entry_t *l2, tl2;
1913 struct spglist free;
1915 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1916 ("pmap_remove_all: page %p is not managed", m));
1918 rw_wlock(&pvh_global_lock);
1919 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1922 pmap_resident_count_dec(pmap, 1);
1923 l2 = pmap_l2(pmap, pv->pv_va);
1924 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
1925 tl2 = pmap_load(l2);
1927 KASSERT((tl2 & PTE_RX) == 0,
1928 ("pmap_remove_all: found a table when expecting "
1929 "a block in %p's pv list", m));
1931 l3 = pmap_l2_to_l3(l2, pv->pv_va);
1932 if (pmap_is_current(pmap) &&
1933 pmap_l3_valid_cacheable(pmap_load(l3)))
1934 cpu_dcache_wb_range(pv->pv_va, L3_SIZE);
1935 tl3 = pmap_load_clear(l3);
1937 pmap_invalidate_page(pmap, pv->pv_va);
1938 if (tl3 & PTE_SW_WIRED)
1939 pmap->pm_stats.wired_count--;
1940 if ((tl3 & PTE_A) != 0)
1941 vm_page_aflag_set(m, PGA_REFERENCED);
1944 * Update the vm_page_t clean and reference bits.
1946 if (pmap_page_dirty(tl3))
1948 pmap_unuse_l3(pmap, pv->pv_va, pmap_load(l2), &free);
1949 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
1951 free_pv_entry(pmap, pv);
1954 vm_page_aflag_clear(m, PGA_WRITEABLE);
1955 rw_wunlock(&pvh_global_lock);
1956 pmap_free_zero_pages(&free);
1960 * Set the physical protection on the
1961 * specified range of this map as requested.
1964 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1966 vm_offset_t va, va_next;
1967 pd_entry_t *l1, *l2;
1968 pt_entry_t *l3p, l3;
1971 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1972 pmap_remove(pmap, sva, eva);
1976 if ((prot & VM_PROT_WRITE) == VM_PROT_WRITE)
1980 for (; sva < eva; sva = va_next) {
1982 l1 = pmap_l1(pmap, sva);
1983 if (pmap_load(l1) == 0) {
1984 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1990 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1994 l2 = pmap_l1_to_l2(l1, sva);
1997 if (pmap_load(l2) == 0)
1999 if ((pmap_load(l2) & PTE_RX) != 0)
2006 for (l3p = pmap_l2_to_l3(l2, sva); sva != va_next; l3p++,
2008 l3 = pmap_load(l3p);
2009 if (pmap_l3_valid(l3)) {
2010 entry = pmap_load(l3p);
2012 pmap_load_store(l3p, entry);
2014 /* XXX: Use pmap_invalidate_range */
2015 pmap_invalidate_page(pmap, va);
2021 /* TODO: Only invalidate entries we are touching */
2022 pmap_invalidate_all(pmap);
2026 * Insert the given physical page (p) at
2027 * the specified virtual address (v) in the
2028 * target physical map with the protection requested.
2030 * If specified, the page will be wired down, meaning
2031 * that the related pte can not be reclaimed.
2033 * NB: This is the only routine which MAY NOT lazy-evaluate
2034 * or lose information. That is, this routine must actually
2035 * insert this page into the given map NOW.
2038 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2039 u_int flags, int8_t psind __unused)
2041 struct rwlock *lock;
2042 pd_entry_t *l1, *l2;
2043 pt_entry_t new_l3, orig_l3;
2046 vm_paddr_t opa, pa, l2_pa, l3_pa;
2047 vm_page_t mpte, om, l2_m, l3_m;
2054 va = trunc_page(va);
2055 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2056 VM_OBJECT_ASSERT_LOCKED(m->object);
2057 pa = VM_PAGE_TO_PHYS(m);
2058 pn = (pa / PAGE_SIZE);
2060 new_l3 = PTE_V | PTE_R | PTE_X;
2061 if (prot & VM_PROT_WRITE)
2063 if ((va >> 63) == 0)
2066 new_l3 |= (pn << PTE_PPN0_S);
2067 if ((flags & PMAP_ENTER_WIRED) != 0)
2068 new_l3 |= PTE_SW_WIRED;
2070 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2075 rw_rlock(&pvh_global_lock);
2078 if (va < VM_MAXUSER_ADDRESS) {
2079 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2080 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2081 if (mpte == NULL && nosleep) {
2082 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2085 rw_runlock(&pvh_global_lock);
2087 return (KERN_RESOURCE_SHORTAGE);
2089 l3 = pmap_l3(pmap, va);
2091 l3 = pmap_l3(pmap, va);
2092 /* TODO: This is not optimal, but should mostly work */
2094 l2 = pmap_l2(pmap, va);
2096 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2097 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2100 panic("pmap_enter: l2 pte_m == NULL");
2101 if ((l2_m->flags & PG_ZERO) == 0)
2102 pmap_zero_page(l2_m);
2104 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2105 l2_pn = (l2_pa / PAGE_SIZE);
2107 l1 = pmap_l1(pmap, va);
2109 entry |= (l2_pn << PTE_PPN0_S);
2110 pmap_load_store(l1, entry);
2111 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2114 l2 = pmap_l1_to_l2(l1, va);
2118 ("No l2 table after allocating one"));
2120 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2121 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2123 panic("pmap_enter: l3 pte_m == NULL");
2124 if ((l3_m->flags & PG_ZERO) == 0)
2125 pmap_zero_page(l3_m);
2127 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2128 l3_pn = (l3_pa / PAGE_SIZE);
2130 entry |= (l3_pn << PTE_PPN0_S);
2131 pmap_load_store(l2, entry);
2133 l3 = pmap_l2_to_l3(l2, va);
2135 pmap_invalidate_page(pmap, va);
2139 orig_l3 = pmap_load(l3);
2140 opa = PTE_TO_PHYS(orig_l3);
2143 * Is the specified virtual address already mapped?
2145 if (pmap_l3_valid(orig_l3)) {
2147 * Wiring change, just update stats. We don't worry about
2148 * wiring PT pages as they remain resident as long as there
2149 * are valid mappings in them. Hence, if a user page is wired,
2150 * the PT page will be also.
2152 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2153 (orig_l3 & PTE_SW_WIRED) == 0)
2154 pmap->pm_stats.wired_count++;
2155 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2156 (orig_l3 & PTE_SW_WIRED) != 0)
2157 pmap->pm_stats.wired_count--;
2160 * Remove the extra PT page reference.
2164 KASSERT(mpte->wire_count > 0,
2165 ("pmap_enter: missing reference to page table page,"
2170 * Has the physical page changed?
2174 * No, might be a protection or wiring change.
2176 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2177 new_l3 |= PTE_SW_MANAGED;
2178 if (pmap_is_write(new_l3))
2179 vm_page_aflag_set(m, PGA_WRITEABLE);
2184 /* Flush the cache, there might be uncommitted data in it */
2185 if (pmap_is_current(pmap) && pmap_l3_valid_cacheable(orig_l3))
2186 cpu_dcache_wb_range(va, L3_SIZE);
2189 * Increment the counters.
2191 if ((new_l3 & PTE_SW_WIRED) != 0)
2192 pmap->pm_stats.wired_count++;
2193 pmap_resident_count_inc(pmap, 1);
2196 * Enter on the PV list if part of our managed memory.
2198 if ((m->oflags & VPO_UNMANAGED) == 0) {
2199 new_l3 |= PTE_SW_MANAGED;
2200 pv = get_pv_entry(pmap, &lock);
2202 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2203 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2205 if (pmap_is_write(new_l3))
2206 vm_page_aflag_set(m, PGA_WRITEABLE);
2210 * Update the L3 entry.
2214 orig_l3 = pmap_load_store(l3, new_l3);
2216 opa = PTE_TO_PHYS(orig_l3);
2219 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2220 om = PHYS_TO_VM_PAGE(opa);
2221 if (pmap_page_dirty(orig_l3))
2223 if ((orig_l3 & PTE_A) != 0)
2224 vm_page_aflag_set(om, PGA_REFERENCED);
2225 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2226 pmap_pvh_free(&om->md, pmap, va);
2228 } else if (pmap_page_dirty(orig_l3)) {
2229 if ((orig_l3 & PTE_SW_MANAGED) != 0)
2233 pmap_load_store(l3, new_l3);
2236 pmap_invalidate_page(pmap, va);
2237 if ((pmap != pmap_kernel()) && (pmap == &curproc->p_vmspace->vm_pmap))
2238 cpu_icache_sync_range(va, PAGE_SIZE);
2242 rw_runlock(&pvh_global_lock);
2244 return (KERN_SUCCESS);
2248 * Maps a sequence of resident pages belonging to the same object.
2249 * The sequence begins with the given page m_start. This page is
2250 * mapped at the given virtual address start. Each subsequent page is
2251 * mapped at a virtual address that is offset from start by the same
2252 * amount as the page is offset from m_start within the object. The
2253 * last page in the sequence is the page with the largest offset from
2254 * m_start that can be mapped at a virtual address less than the given
2255 * virtual address end. Not every virtual page between start and end
2256 * is mapped; only those for which a resident page exists with the
2257 * corresponding offset from m_start are mapped.
2260 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2261 vm_page_t m_start, vm_prot_t prot)
2263 struct rwlock *lock;
2266 vm_pindex_t diff, psize;
2268 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2270 psize = atop(end - start);
2274 rw_rlock(&pvh_global_lock);
2276 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2277 va = start + ptoa(diff);
2278 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte, &lock);
2279 m = TAILQ_NEXT(m, listq);
2283 rw_runlock(&pvh_global_lock);
2288 * this code makes some *MAJOR* assumptions:
2289 * 1. Current pmap & pmap exists.
2292 * 4. No page table pages.
2293 * but is *MUCH* faster than pmap_enter...
2297 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2299 struct rwlock *lock;
2302 rw_rlock(&pvh_global_lock);
2304 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
2307 rw_runlock(&pvh_global_lock);
2312 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2313 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
2315 struct spglist free;
2323 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2324 (m->oflags & VPO_UNMANAGED) != 0,
2325 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2326 rw_assert(&pvh_global_lock, RA_LOCKED);
2327 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2329 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
2331 * In the case that a page table page is not
2332 * resident, we are creating it here.
2334 if (va < VM_MAXUSER_ADDRESS) {
2335 vm_pindex_t l2pindex;
2338 * Calculate pagetable page index
2340 l2pindex = pmap_l2_pindex(va);
2341 if (mpte && (mpte->pindex == l2pindex)) {
2347 l2 = pmap_l2(pmap, va);
2350 * If the page table page is mapped, we just increment
2351 * the hold count, and activate it. Otherwise, we
2352 * attempt to allocate a page table page. If this
2353 * attempt fails, we don't retry. Instead, we give up.
2355 if (l2 != NULL && pmap_load(l2) != 0) {
2356 phys = PTE_TO_PHYS(pmap_load(l2));
2357 mpte = PHYS_TO_VM_PAGE(phys);
2361 * Pass NULL instead of the PV list lock
2362 * pointer, because we don't intend to sleep.
2364 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
2369 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
2370 l3 = &l3[pmap_l3_index(va)];
2373 l3 = pmap_l3(kernel_pmap, va);
2376 panic("pmap_enter_quick_locked: No l3");
2377 if (pmap_load(l3) != 0) {
2386 * Enter on the PV list if part of our managed memory.
2388 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2389 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
2392 if (pmap_unwire_l3(pmap, va, mpte, &free)) {
2393 pmap_invalidate_page(pmap, va);
2394 pmap_free_zero_pages(&free);
2402 * Increment counters
2404 pmap_resident_count_inc(pmap, 1);
2406 pa = VM_PAGE_TO_PHYS(m);
2407 pn = (pa / PAGE_SIZE);
2409 /* RISCVTODO: check permissions */
2410 entry = (PTE_V | PTE_RWX);
2411 entry |= (pn << PTE_PPN0_S);
2414 * Now validate mapping with RO protection
2416 if ((m->oflags & VPO_UNMANAGED) == 0)
2417 entry |= PTE_SW_MANAGED;
2418 pmap_load_store(l3, entry);
2421 pmap_invalidate_page(pmap, va);
2426 * This code maps large physical mmap regions into the
2427 * processor address space. Note that some shortcuts
2428 * are taken, but the code works.
2431 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2432 vm_pindex_t pindex, vm_size_t size)
2435 VM_OBJECT_ASSERT_WLOCKED(object);
2436 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2437 ("pmap_object_init_pt: non-device object"));
2441 * Clear the wired attribute from the mappings for the specified range of
2442 * addresses in the given pmap. Every valid mapping within that range
2443 * must have the wired attribute set. In contrast, invalid mappings
2444 * cannot have the wired attribute set, so they are ignored.
2446 * The wired attribute of the page table entry is not a hardware feature,
2447 * so there is no need to invalidate any TLB entries.
2450 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2452 vm_offset_t va_next;
2453 pd_entry_t *l1, *l2;
2455 boolean_t pv_lists_locked;
2457 pv_lists_locked = FALSE;
2459 for (; sva < eva; sva = va_next) {
2460 l1 = pmap_l1(pmap, sva);
2461 if (pmap_load(l1) == 0) {
2462 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2468 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2472 l2 = pmap_l1_to_l2(l1, sva);
2473 if (pmap_load(l2) == 0)
2478 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2480 if (pmap_load(l3) == 0)
2482 if ((pmap_load(l3) & PTE_SW_WIRED) == 0)
2483 panic("pmap_unwire: l3 %#jx is missing "
2484 "PTE_SW_WIRED", (uintmax_t)*l3);
2487 * PG_W must be cleared atomically. Although the pmap
2488 * lock synchronizes access to PG_W, another processor
2489 * could be setting PG_M and/or PG_A concurrently.
2491 atomic_clear_long(l3, PTE_SW_WIRED);
2492 pmap->pm_stats.wired_count--;
2495 if (pv_lists_locked)
2496 rw_runlock(&pvh_global_lock);
2501 * Copy the range specified by src_addr/len
2502 * from the source map to the range dst_addr/len
2503 * in the destination map.
2505 * This routine is only advisory and need not do anything.
2509 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2510 vm_offset_t src_addr)
2516 * pmap_zero_page zeros the specified hardware page by mapping
2517 * the page into KVM and using bzero to clear its contents.
2520 pmap_zero_page(vm_page_t m)
2522 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2524 pagezero((void *)va);
2528 * pmap_zero_page_area zeros the specified hardware page by mapping
2529 * the page into KVM and using bzero to clear its contents.
2531 * off and size may not cover an area beyond a single hardware page.
2534 pmap_zero_page_area(vm_page_t m, int off, int size)
2536 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2538 if (off == 0 && size == PAGE_SIZE)
2539 pagezero((void *)va);
2541 bzero((char *)va + off, size);
2545 * pmap_copy_page copies the specified (machine independent)
2546 * page by mapping the page into virtual memory and using
2547 * bcopy to copy the page, one machine dependent page at a
2551 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2553 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2554 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2556 pagecopy((void *)src, (void *)dst);
2559 int unmapped_buf_allowed = 1;
2562 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2563 vm_offset_t b_offset, int xfersize)
2567 vm_paddr_t p_a, p_b;
2568 vm_offset_t a_pg_offset, b_pg_offset;
2571 while (xfersize > 0) {
2572 a_pg_offset = a_offset & PAGE_MASK;
2573 m_a = ma[a_offset >> PAGE_SHIFT];
2574 p_a = m_a->phys_addr;
2575 b_pg_offset = b_offset & PAGE_MASK;
2576 m_b = mb[b_offset >> PAGE_SHIFT];
2577 p_b = m_b->phys_addr;
2578 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2579 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2580 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
2581 panic("!DMAP a %lx", p_a);
2583 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
2585 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
2586 panic("!DMAP b %lx", p_b);
2588 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
2590 bcopy(a_cp, b_cp, cnt);
2598 pmap_quick_enter_page(vm_page_t m)
2601 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
2605 pmap_quick_remove_page(vm_offset_t addr)
2610 * Returns true if the pmap's pv is one of the first
2611 * 16 pvs linked to from this page. This count may
2612 * be changed upwards or downwards in the future; it
2613 * is only necessary that true be returned for a small
2614 * subset of pmaps for proper page aging.
2617 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2619 struct rwlock *lock;
2624 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2625 ("pmap_page_exists_quick: page %p is not managed", m));
2627 rw_rlock(&pvh_global_lock);
2628 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2630 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2631 if (PV_PMAP(pv) == pmap) {
2640 rw_runlock(&pvh_global_lock);
2645 * pmap_page_wired_mappings:
2647 * Return the number of managed mappings to the given physical page
2651 pmap_page_wired_mappings(vm_page_t m)
2653 struct rwlock *lock;
2659 if ((m->oflags & VPO_UNMANAGED) != 0)
2661 rw_rlock(&pvh_global_lock);
2662 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2666 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2668 if (!PMAP_TRYLOCK(pmap)) {
2669 md_gen = m->md.pv_gen;
2673 if (md_gen != m->md.pv_gen) {
2678 l3 = pmap_l3(pmap, pv->pv_va);
2679 if (l3 != NULL && (pmap_load(l3) & PTE_SW_WIRED) != 0)
2684 rw_runlock(&pvh_global_lock);
2689 * Destroy all managed, non-wired mappings in the given user-space
2690 * pmap. This pmap cannot be active on any processor besides the
2693 * This function cannot be applied to the kernel pmap. Moreover, it
2694 * is not intended for general use. It is only to be used during
2695 * process termination. Consequently, it can be implemented in ways
2696 * that make it faster than pmap_remove(). First, it can more quickly
2697 * destroy mappings by iterating over the pmap's collection of PV
2698 * entries, rather than searching the page table. Second, it doesn't
2699 * have to test and clear the page table entries atomically, because
2700 * no processor is currently accessing the user address space. In
2701 * particular, a page table entry's dirty bit won't change state once
2702 * this function starts.
2705 pmap_remove_pages(pmap_t pmap)
2707 pd_entry_t ptepde, *l2;
2708 pt_entry_t *l3, tl3;
2709 struct spglist free;
2712 struct pv_chunk *pc, *npc;
2713 struct rwlock *lock;
2715 uint64_t inuse, bitmask;
2716 int allfree, field, freed, idx;
2722 rw_rlock(&pvh_global_lock);
2724 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2727 for (field = 0; field < _NPCM; field++) {
2728 inuse = ~pc->pc_map[field] & pc_freemask[field];
2729 while (inuse != 0) {
2730 bit = ffsl(inuse) - 1;
2731 bitmask = 1UL << bit;
2732 idx = field * 64 + bit;
2733 pv = &pc->pc_pventry[idx];
2736 l2 = pmap_l2(pmap, pv->pv_va);
2737 ptepde = pmap_load(l2);
2738 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2739 tl3 = pmap_load(l3);
2742 * We cannot remove wired pages from a process' mapping at this time
2744 if (tl3 & PTE_SW_WIRED) {
2749 pa = PTE_TO_PHYS(tl3);
2750 m = PHYS_TO_VM_PAGE(pa);
2751 KASSERT(m->phys_addr == pa,
2752 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2753 m, (uintmax_t)m->phys_addr,
2756 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
2757 m < &vm_page_array[vm_page_array_size],
2758 ("pmap_remove_pages: bad l3 %#jx",
2761 if (pmap_is_current(pmap) &&
2762 pmap_l3_valid_cacheable(pmap_load(l3)))
2763 cpu_dcache_wb_range(pv->pv_va, L3_SIZE);
2764 pmap_load_clear(l3);
2766 pmap_invalidate_page(pmap, pv->pv_va);
2769 * Update the vm_page_t clean/reference bits.
2771 if (pmap_page_dirty(tl3))
2774 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
2777 pc->pc_map[field] |= bitmask;
2779 pmap_resident_count_dec(pmap, 1);
2780 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2783 pmap_unuse_l3(pmap, pv->pv_va, ptepde, &free);
2787 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
2788 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
2789 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
2791 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2795 pmap_invalidate_all(pmap);
2798 rw_runlock(&pvh_global_lock);
2800 pmap_free_zero_pages(&free);
2804 * This is used to check if a page has been accessed or modified. As we
2805 * don't have a bit to see if it has been modified we have to assume it
2806 * has been if the page is read/write.
2809 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
2811 struct rwlock *lock;
2813 pt_entry_t *l3, mask, value;
2819 rw_rlock(&pvh_global_lock);
2820 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2823 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2825 if (!PMAP_TRYLOCK(pmap)) {
2826 md_gen = m->md.pv_gen;
2830 if (md_gen != m->md.pv_gen) {
2835 l3 = pmap_l3(pmap, pv->pv_va);
2849 mask |= ATTR_AP_RW_BIT;
2850 value |= ATTR_AP(ATTR_AP_RW);
2853 mask |= ATTR_AF | ATTR_DESCR_MASK;
2854 value |= ATTR_AF | L3_PAGE;
2858 rv = (pmap_load(l3) & mask) == value;
2865 rw_runlock(&pvh_global_lock);
2872 * Return whether or not the specified physical page was modified
2873 * in any physical maps.
2876 pmap_is_modified(vm_page_t m)
2879 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2880 ("pmap_is_modified: page %p is not managed", m));
2883 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2884 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2885 * is clear, no PTEs can have PG_M set.
2887 VM_OBJECT_ASSERT_WLOCKED(m->object);
2888 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2890 return (pmap_page_test_mappings(m, FALSE, TRUE));
2894 * pmap_is_prefaultable:
2896 * Return whether or not the specified virtual address is eligible
2900 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2907 l3 = pmap_l3(pmap, addr);
2908 if (l3 != NULL && pmap_load(l3) != 0) {
2916 * pmap_is_referenced:
2918 * Return whether or not the specified physical page was referenced
2919 * in any physical maps.
2922 pmap_is_referenced(vm_page_t m)
2925 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2926 ("pmap_is_referenced: page %p is not managed", m));
2927 return (pmap_page_test_mappings(m, TRUE, FALSE));
2931 * Clear the write and modified bits in each of the given page's mappings.
2934 pmap_remove_write(vm_page_t m)
2937 struct rwlock *lock;
2939 pt_entry_t *l3, oldl3;
2943 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2944 ("pmap_remove_write: page %p is not managed", m));
2947 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2948 * set by another thread while the object is locked. Thus,
2949 * if PGA_WRITEABLE is clear, no page table entries need updating.
2951 VM_OBJECT_ASSERT_WLOCKED(m->object);
2952 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2954 rw_rlock(&pvh_global_lock);
2955 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2958 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2960 if (!PMAP_TRYLOCK(pmap)) {
2961 md_gen = m->md.pv_gen;
2965 if (md_gen != m->md.pv_gen) {
2971 l3 = pmap_l3(pmap, pv->pv_va);
2973 oldl3 = pmap_load(l3);
2975 if (pmap_is_write(oldl3)) {
2976 newl3 = oldl3 & ~(PTE_W);
2977 if (!atomic_cmpset_long(l3, oldl3, newl3))
2979 /* TODO: use pmap_page_dirty(oldl3) ? */
2980 if ((oldl3 & PTE_A) != 0)
2982 pmap_invalidate_page(pmap, pv->pv_va);
2987 vm_page_aflag_clear(m, PGA_WRITEABLE);
2988 rw_runlock(&pvh_global_lock);
2991 static __inline boolean_t
2992 safe_to_clear_referenced(pmap_t pmap, pt_entry_t pte)
2999 * pmap_ts_referenced:
3001 * Return a count of reference bits for a page, clearing those bits.
3002 * It is not necessary for every reference bit to be cleared, but it
3003 * is necessary that 0 only be returned when there are truly no
3004 * reference bits set.
3006 * As an optimization, update the page's dirty field if a modified bit is
3007 * found while counting reference bits. This opportunistic update can be
3008 * performed at low cost and can eliminate the need for some future calls
3009 * to pmap_is_modified(). However, since this function stops after
3010 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3011 * dirty pages. Those dirty pages will only be detected by a future call
3012 * to pmap_is_modified().
3015 pmap_ts_referenced(vm_page_t m)
3019 struct rwlock *lock;
3021 pt_entry_t *l3, old_l3;
3023 int cleared, md_gen, not_cleared;
3024 struct spglist free;
3026 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3027 ("pmap_ts_referenced: page %p is not managed", m));
3030 pa = VM_PAGE_TO_PHYS(m);
3031 lock = PHYS_TO_PV_LIST_LOCK(pa);
3032 rw_rlock(&pvh_global_lock);
3036 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
3043 if (!PMAP_TRYLOCK(pmap)) {
3044 md_gen = m->md.pv_gen;
3048 if (md_gen != m->md.pv_gen) {
3053 l2 = pmap_l2(pmap, pv->pv_va);
3055 KASSERT((pmap_load(l2) & PTE_RX) == 0,
3056 ("pmap_ts_referenced: found an invalid l2 table"));
3058 l3 = pmap_l2_to_l3(l2, pv->pv_va);
3059 old_l3 = pmap_load(l3);
3060 if (pmap_page_dirty(old_l3))
3062 if ((old_l3 & PTE_A) != 0) {
3063 if (safe_to_clear_referenced(pmap, old_l3)) {
3065 * TODO: We don't handle the access flag
3066 * at all. We need to be able to set it in
3067 * the exception handler.
3069 panic("RISCVTODO: safe_to_clear_referenced\n");
3070 } else if ((old_l3 & PTE_SW_WIRED) == 0) {
3072 * Wired pages cannot be paged out so
3073 * doing accessed bit emulation for
3074 * them is wasted effort. We do the
3075 * hard work for unwired pages only.
3077 pmap_remove_l3(pmap, l3, pv->pv_va,
3078 pmap_load(l2), &free, &lock);
3079 pmap_invalidate_page(pmap, pv->pv_va);
3084 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3085 ("inconsistent pv lock %p %p for page %p",
3086 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3091 /* Rotate the PV list if it has more than one entry. */
3092 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3093 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3094 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3097 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
3098 not_cleared < PMAP_TS_REFERENCED_MAX);
3101 rw_runlock(&pvh_global_lock);
3102 pmap_free_zero_pages(&free);
3103 return (cleared + not_cleared);
3107 * Apply the given advice to the specified range of addresses within the
3108 * given pmap. Depending on the advice, clear the referenced and/or
3109 * modified flags in each mapping and set the mapped page's dirty field.
3112 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3117 * Clear the modify bits on the specified physical page.
3120 pmap_clear_modify(vm_page_t m)
3123 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3124 ("pmap_clear_modify: page %p is not managed", m));
3125 VM_OBJECT_ASSERT_WLOCKED(m->object);
3126 KASSERT(!vm_page_xbusied(m),
3127 ("pmap_clear_modify: page %p is exclusive busied", m));
3130 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
3131 * If the object containing the page is locked and the page is not
3132 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
3134 if ((m->aflags & PGA_WRITEABLE) == 0)
3137 /* RISCVTODO: We lack support for tracking if a page is modified */
3141 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3144 return ((void *)PHYS_TO_DMAP(pa));
3148 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
3153 * Sets the memory attribute for the specified page.
3156 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3159 m->md.pv_memattr = ma;
3162 * RISCVTODO: Implement the below (from the amd64 pmap)
3163 * If "m" is a normal page, update its direct mapping. This update
3164 * can be relied upon to perform any cache operations that are
3165 * required for data coherence.
3167 if ((m->flags & PG_FICTITIOUS) == 0 &&
3168 PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
3169 panic("RISCVTODO: pmap_page_set_memattr");
3173 * perform the pmap work for mincore
3176 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3179 panic("RISCVTODO: pmap_mincore");
3183 pmap_activate(struct thread *td)
3189 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3190 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
3192 reg = SATP_MODE_SV39;
3193 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
3194 __asm __volatile("csrw sptbr, %0" :: "r"(reg));
3196 pmap_invalidate_all(pmap);
3201 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3204 panic("RISCVTODO: pmap_sync_icache");
3208 * Increase the starting virtual address of the given mapping if a
3209 * different alignment might result in more superpage mappings.
3212 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3213 vm_offset_t *addr, vm_size_t size)
3218 * Get the kernel virtual address of a set of physical pages. If there are
3219 * physical addresses not covered by the DMAP perform a transient mapping
3220 * that will be removed when calling pmap_unmap_io_transient.
3222 * \param page The pages the caller wishes to obtain the virtual
3223 * address on the kernel memory map.
3224 * \param vaddr On return contains the kernel virtual memory address
3225 * of the pages passed in the page parameter.
3226 * \param count Number of pages passed in.
3227 * \param can_fault TRUE if the thread using the mapped pages can take
3228 * page faults, FALSE otherwise.
3230 * \returns TRUE if the caller must call pmap_unmap_io_transient when
3231 * finished or FALSE otherwise.
3235 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3236 boolean_t can_fault)
3239 boolean_t needs_mapping;
3243 * Allocate any KVA space that we need, this is done in a separate
3244 * loop to prevent calling vmem_alloc while pinned.
3246 needs_mapping = FALSE;
3247 for (i = 0; i < count; i++) {
3248 paddr = VM_PAGE_TO_PHYS(page[i]);
3249 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
3250 error = vmem_alloc(kernel_arena, PAGE_SIZE,
3251 M_BESTFIT | M_WAITOK, &vaddr[i]);
3252 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
3253 needs_mapping = TRUE;
3255 vaddr[i] = PHYS_TO_DMAP(paddr);
3259 /* Exit early if everything is covered by the DMAP */
3265 for (i = 0; i < count; i++) {
3266 paddr = VM_PAGE_TO_PHYS(page[i]);
3267 if (paddr >= DMAP_MAX_PHYSADDR) {
3269 "pmap_map_io_transient: TODO: Map out of DMAP data");
3273 return (needs_mapping);
3277 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3278 boolean_t can_fault)
3285 for (i = 0; i < count; i++) {
3286 paddr = VM_PAGE_TO_PHYS(page[i]);
3287 if (paddr >= DMAP_MAX_PHYSADDR) {
3288 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");