2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
122 #include <sys/systm.h>
123 #include <sys/kernel.h>
125 #include <sys/lock.h>
126 #include <sys/malloc.h>
127 #include <sys/mman.h>
128 #include <sys/msgbuf.h>
129 #include <sys/mutex.h>
130 #include <sys/proc.h>
131 #include <sys/rwlock.h>
133 #include <sys/vmem.h>
134 #include <sys/vmmeter.h>
135 #include <sys/sched.h>
136 #include <sys/sysctl.h>
140 #include <vm/vm_param.h>
141 #include <vm/vm_kern.h>
142 #include <vm/vm_page.h>
143 #include <vm/vm_map.h>
144 #include <vm/vm_object.h>
145 #include <vm/vm_extern.h>
146 #include <vm/vm_pageout.h>
147 #include <vm/vm_pager.h>
148 #include <vm/vm_radix.h>
149 #include <vm/vm_reserv.h>
152 #include <machine/machdep.h>
153 #include <machine/md_var.h>
154 #include <machine/pcb.h>
156 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
157 #define NUPDE (NPDEPG * NPDEPG)
158 #define NUSERPGTBLS (NUPDE + NPDEPG)
160 #if !defined(DIAGNOSTIC)
161 #ifdef __GNUC_GNU_INLINE__
162 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
164 #define PMAP_INLINE extern inline
171 #define PV_STAT(x) do { x ; } while (0)
173 #define PV_STAT(x) do { } while (0)
176 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
178 #define NPV_LIST_LOCKS MAXCPU
180 #define PHYS_TO_PV_LIST_LOCK(pa) \
181 (&pv_list_locks[pa_index(pa) % NPV_LIST_LOCKS])
183 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
184 struct rwlock **_lockp = (lockp); \
185 struct rwlock *_new_lock; \
187 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
188 if (_new_lock != *_lockp) { \
189 if (*_lockp != NULL) \
190 rw_wunlock(*_lockp); \
191 *_lockp = _new_lock; \
196 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
197 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
199 #define RELEASE_PV_LIST_LOCK(lockp) do { \
200 struct rwlock **_lockp = (lockp); \
202 if (*_lockp != NULL) { \
203 rw_wunlock(*_lockp); \
208 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
209 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
211 /* The list of all the user pmaps */
212 LIST_HEAD(pmaplist, pmap);
213 static struct pmaplist allpmaps;
215 static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
217 struct pmap kernel_pmap_store;
219 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
220 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
221 vm_offset_t kernel_vm_end = 0;
223 struct msgbuf *msgbufp = NULL;
225 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
226 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
227 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
229 /* This code assumes all L1 DMAP entries will be used */
230 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
231 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
233 static struct rwlock_padalign pvh_global_lock;
236 * Data for the pv entry allocation mechanism
238 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
239 static struct mtx pv_chunks_mutex;
240 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
242 static void free_pv_chunk(struct pv_chunk *pc);
243 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
244 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
245 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
246 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
247 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
249 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
250 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
251 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
252 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
253 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
254 vm_page_t m, struct rwlock **lockp);
256 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
257 struct rwlock **lockp);
259 static void _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
260 struct spglist *free);
261 static int pmap_unuse_l3(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
264 * These load the old table data and store the new value.
265 * They need to be atomic as the System MMU may write to the table at
266 * the same time as the CPU.
268 #define pmap_load_store(table, entry) atomic_swap_64(table, entry)
269 #define pmap_set(table, mask) atomic_set_64(table, mask)
270 #define pmap_load_clear(table) atomic_swap_64(table, 0)
271 #define pmap_load(table) (*table)
273 /********************/
274 /* Inline functions */
275 /********************/
278 pagecopy(void *s, void *d)
281 memcpy(d, s, PAGE_SIZE);
291 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
292 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
293 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
295 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
297 static __inline pd_entry_t *
298 pmap_l1(pmap_t pmap, vm_offset_t va)
301 return (&pmap->pm_l1[pmap_l1_index(va)]);
304 static __inline pd_entry_t *
305 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
310 phys = PTE_TO_PHYS(pmap_load(l1));
311 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
313 return (&l2[pmap_l2_index(va)]);
316 static __inline pd_entry_t *
317 pmap_l2(pmap_t pmap, vm_offset_t va)
321 l1 = pmap_l1(pmap, va);
324 if ((pmap_load(l1) & PTE_V) == 0)
326 if ((pmap_load(l1) & PTE_RX) != 0)
329 return (pmap_l1_to_l2(l1, va));
332 static __inline pt_entry_t *
333 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
338 phys = PTE_TO_PHYS(pmap_load(l2));
339 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
341 return (&l3[pmap_l3_index(va)]);
344 static __inline pt_entry_t *
345 pmap_l3(pmap_t pmap, vm_offset_t va)
349 l2 = pmap_l2(pmap, va);
352 if ((pmap_load(l2) & PTE_V) == 0)
354 if ((pmap_load(l2) & PTE_RX) != 0)
357 return (pmap_l2_to_l3(l2, va));
362 pmap_is_write(pt_entry_t entry)
365 return (entry & PTE_W);
369 pmap_is_current(pmap_t pmap)
372 return ((pmap == pmap_kernel()) ||
373 (pmap == curthread->td_proc->p_vmspace->vm_map.pmap));
377 pmap_l3_valid(pt_entry_t l3)
384 pmap_l3_valid_cacheable(pt_entry_t l3)
392 #define PTE_SYNC(pte) cpu_dcache_wb_range((vm_offset_t)pte, sizeof(*pte))
394 /* Checks if the page is dirty. */
396 pmap_page_dirty(pt_entry_t pte)
399 return (pte & PTE_D);
403 pmap_resident_count_inc(pmap_t pmap, int count)
406 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
407 pmap->pm_stats.resident_count += count;
411 pmap_resident_count_dec(pmap_t pmap, int count)
414 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
415 KASSERT(pmap->pm_stats.resident_count >= count,
416 ("pmap %p resident count underflow %ld %d", pmap,
417 pmap->pm_stats.resident_count, count));
418 pmap->pm_stats.resident_count -= count;
422 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
425 struct pmap *user_pmap;
428 /* Distribute new kernel L1 entry to all the user pmaps */
429 if (pmap != kernel_pmap)
432 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
433 l1 = &user_pmap->pm_l1[l1index];
435 pmap_load_store(l1, entry);
442 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
448 l1 = (pd_entry_t *)l1pt;
449 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
451 /* Check locore has used a table L1 map */
452 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
453 ("Invalid bootstrap L1 table"));
455 /* Find the address of the L2 table */
456 l2 = (pt_entry_t *)init_pt_va;
457 *l2_slot = pmap_l2_index(va);
463 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
465 u_int l1_slot, l2_slot;
469 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
471 /* Check locore has used L2 superpages */
472 KASSERT((l2[l2_slot] & PTE_RX) != 0,
473 ("Invalid bootstrap L2 table"));
475 /* L2 is superpages */
476 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
477 ret += (va & L2_OFFSET);
483 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
492 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
493 va = DMAP_MIN_ADDRESS;
494 l1 = (pd_entry_t *)kern_l1;
495 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
497 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
498 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
499 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
502 pn = (pa / PAGE_SIZE);
503 entry = (PTE_V | PTE_RWX);
504 entry |= (pn << PTE_PPN0_S);
505 pmap_load_store(&l1[l1_slot], entry);
508 /* Set the upper limit of the DMAP region */
512 cpu_dcache_wb_range((vm_offset_t)l1, PAGE_SIZE);
517 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
519 vm_offset_t l2pt, l3pt;
526 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
528 l2 = pmap_l2(kernel_pmap, va);
529 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
530 l2pt = (vm_offset_t)l2;
531 l2_slot = pmap_l2_index(va);
534 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
535 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
537 pa = pmap_early_vtophys(l1pt, l3pt);
538 pn = (pa / PAGE_SIZE);
540 entry |= (pn << PTE_PPN0_S);
541 pmap_load_store(&l2[l2_slot], entry);
546 /* Clean the L2 page table */
547 memset((void *)l3_start, 0, l3pt - l3_start);
548 cpu_dcache_wb_range(l3_start, l3pt - l3_start);
550 cpu_dcache_wb_range((vm_offset_t)l2, PAGE_SIZE);
556 * Bootstrap the system enough to run with virtual memory.
559 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
561 u_int l1_slot, l2_slot, avail_slot, map_slot, used_map_slot;
564 vm_offset_t va, freemempos;
565 vm_offset_t dpcpu, msgbufpv;
566 vm_paddr_t pa, min_pa, max_pa;
569 kern_delta = KERNBASE - kernstart;
572 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
573 printf("%lx\n", l1pt);
574 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
576 /* Set this early so we can use the pagetable walking functions */
577 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
578 PMAP_LOCK_INIT(kernel_pmap);
581 * Initialize the global pv list lock.
583 rw_init(&pvh_global_lock, "pmap pv global");
585 LIST_INIT(&allpmaps);
587 /* Assume the address we were loaded to is a valid physical address */
588 min_pa = max_pa = KERNBASE - kern_delta;
591 * Find the minimum physical address. physmap is sorted,
592 * but may contain empty ranges.
594 for (i = 0; i < (physmap_idx * 2); i += 2) {
595 if (physmap[i] == physmap[i + 1])
597 if (physmap[i] <= min_pa)
599 if (physmap[i + 1] > max_pa)
600 max_pa = physmap[i + 1];
602 printf("physmap_idx %lx\n", physmap_idx);
603 printf("min_pa %lx\n", min_pa);
604 printf("max_pa %lx\n", max_pa);
606 /* Create a direct map region early so we can use it for pa -> va */
607 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
610 pa = KERNBASE - kern_delta;
613 * Start to initialize phys_avail by copying from physmap
614 * up to the physical address KERNBASE points at.
616 map_slot = avail_slot = 0;
617 for (; map_slot < (physmap_idx * 2); map_slot += 2) {
618 if (physmap[map_slot] == physmap[map_slot + 1])
621 if (physmap[map_slot] <= pa &&
622 physmap[map_slot + 1] > pa)
625 phys_avail[avail_slot] = physmap[map_slot];
626 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
627 physmem += (phys_avail[avail_slot + 1] -
628 phys_avail[avail_slot]) >> PAGE_SHIFT;
632 /* Add the memory before the kernel */
633 if (physmap[avail_slot] < pa) {
634 phys_avail[avail_slot] = physmap[map_slot];
635 phys_avail[avail_slot + 1] = pa;
636 physmem += (phys_avail[avail_slot + 1] -
637 phys_avail[avail_slot]) >> PAGE_SHIFT;
640 used_map_slot = map_slot;
643 * Read the page table to find out what is already mapped.
644 * This assumes we have mapped a block of memory from KERNBASE
645 * using a single L1 entry.
647 l2 = pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
649 /* Sanity check the index, KERNBASE should be the first VA */
650 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
652 /* Find how many pages we have mapped */
653 for (; l2_slot < Ln_ENTRIES; l2_slot++) {
654 if ((l2[l2_slot] & PTE_V) == 0)
657 /* Check locore used L2 superpages */
658 KASSERT((l2[l2_slot] & PTE_RX) != 0,
659 ("Invalid bootstrap L2 table"));
665 va = roundup2(va, L2_SIZE);
667 freemempos = KERNBASE + kernlen;
668 freemempos = roundup2(freemempos, PAGE_SIZE);
670 /* Create the l3 tables for the early devmap */
671 freemempos = pmap_bootstrap_l3(l1pt,
672 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
676 #define alloc_pages(var, np) \
677 (var) = freemempos; \
678 freemempos += (np * PAGE_SIZE); \
679 memset((char *)(var), 0, ((np) * PAGE_SIZE));
681 /* Allocate dynamic per-cpu area. */
682 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
683 dpcpu_init((void *)dpcpu, 0);
685 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
686 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
687 msgbufp = (void *)msgbufpv;
689 virtual_avail = roundup2(freemempos, L2_SIZE);
690 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
691 kernel_vm_end = virtual_avail;
693 pa = pmap_early_vtophys(l1pt, freemempos);
695 /* Finish initialising physmap */
696 map_slot = used_map_slot;
697 for (; avail_slot < (PHYS_AVAIL_SIZE - 2) &&
698 map_slot < (physmap_idx * 2); map_slot += 2) {
699 if (physmap[map_slot] == physmap[map_slot + 1]) {
703 /* Have we used the current range? */
704 if (physmap[map_slot + 1] <= pa) {
708 /* Do we need to split the entry? */
709 if (physmap[map_slot] < pa) {
710 phys_avail[avail_slot] = pa;
711 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
713 phys_avail[avail_slot] = physmap[map_slot];
714 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
716 physmem += (phys_avail[avail_slot + 1] -
717 phys_avail[avail_slot]) >> PAGE_SHIFT;
721 phys_avail[avail_slot] = 0;
722 phys_avail[avail_slot + 1] = 0;
725 * Maxmem isn't the "maximum memory", it's one larger than the
726 * highest page of the physical address space. It should be
727 * called something like "Maxphyspage".
729 Maxmem = atop(phys_avail[avail_slot - 1]);
735 * Initialize a vm_page's machine-dependent fields.
738 pmap_page_init(vm_page_t m)
741 TAILQ_INIT(&m->md.pv_list);
742 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
746 * Initialize the pmap module.
747 * Called by vm_init, to initialize any structures that the pmap
748 * system needs to map virtual memory.
756 * Initialize the pv chunk list mutex.
758 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
761 * Initialize the pool of pv list locks.
763 for (i = 0; i < NPV_LIST_LOCKS; i++)
764 rw_init(&pv_list_locks[i], "pmap pv list");
768 * Normal, non-SMP, invalidation functions.
769 * We inline these within pmap.c for speed.
772 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
778 __asm __volatile("sfence.vma %0" :: "r" (va) : "memory");
783 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
789 __asm __volatile("sfence.vma");
794 pmap_invalidate_all(pmap_t pmap)
800 __asm __volatile("sfence.vma");
805 * Routine: pmap_extract
807 * Extract the physical page address associated
808 * with the given map/virtual_address pair.
811 pmap_extract(pmap_t pmap, vm_offset_t va)
820 * Start with the l2 tabel. We are unable to allocate
821 * pages in the l1 table.
823 l2p = pmap_l2(pmap, va);
826 if ((l2 & PTE_RX) == 0) {
827 l3p = pmap_l2_to_l3(l2p, va);
830 pa = PTE_TO_PHYS(l3);
831 pa |= (va & L3_OFFSET);
834 /* L2 is superpages */
835 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
836 pa |= (va & L2_OFFSET);
844 * Routine: pmap_extract_and_hold
846 * Atomically extract and hold the physical page
847 * with the given pmap and virtual address pair
848 * if that mapping permits the given protection.
851 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
862 l3p = pmap_l3(pmap, va);
863 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
864 if ((pmap_is_write(l3)) || ((prot & VM_PROT_WRITE) == 0)) {
865 phys = PTE_TO_PHYS(l3);
866 if (vm_page_pa_tryrelock(pmap, phys, &pa))
868 m = PHYS_TO_VM_PAGE(phys);
878 pmap_kextract(vm_offset_t va)
884 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
885 pa = DMAP_TO_PHYS(va);
887 l2 = pmap_l2(kernel_pmap, va);
889 panic("pmap_kextract: No l2");
890 if ((pmap_load(l2) & PTE_RX) != 0) {
892 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
893 pa |= (va & L2_OFFSET);
897 l3 = pmap_l2_to_l3(l2, va);
899 panic("pmap_kextract: No l3...");
900 pa = PTE_TO_PHYS(pmap_load(l3));
901 pa |= (va & PAGE_MASK);
906 /***************************************************
907 * Low level mapping routines.....
908 ***************************************************/
911 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
918 KASSERT((pa & L3_OFFSET) == 0,
919 ("pmap_kenter_device: Invalid physical address"));
920 KASSERT((sva & L3_OFFSET) == 0,
921 ("pmap_kenter_device: Invalid virtual address"));
922 KASSERT((size & PAGE_MASK) == 0,
923 ("pmap_kenter_device: Mapping is not page-sized"));
927 l3 = pmap_l3(kernel_pmap, va);
928 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
930 pn = (pa / PAGE_SIZE);
931 entry = (PTE_V | PTE_RWX);
932 entry |= (pn << PTE_PPN0_S);
933 pmap_load_store(l3, entry);
941 pmap_invalidate_range(kernel_pmap, sva, va);
945 * Remove a page from the kernel pagetables.
946 * Note: not SMP coherent.
949 pmap_kremove(vm_offset_t va)
953 l3 = pmap_l3(kernel_pmap, va);
954 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
956 if (pmap_l3_valid_cacheable(pmap_load(l3)))
957 cpu_dcache_wb_range(va, L3_SIZE);
960 pmap_invalidate_page(kernel_pmap, va);
964 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
969 KASSERT((sva & L3_OFFSET) == 0,
970 ("pmap_kremove_device: Invalid virtual address"));
971 KASSERT((size & PAGE_MASK) == 0,
972 ("pmap_kremove_device: Mapping is not page-sized"));
976 l3 = pmap_l3(kernel_pmap, va);
977 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
984 pmap_invalidate_range(kernel_pmap, sva, va);
988 * Used to map a range of physical addresses into kernel
989 * virtual address space.
991 * The value passed in '*virt' is a suggested virtual address for
992 * the mapping. Architectures which can support a direct-mapped
993 * physical to virtual region can return the appropriate address
994 * within that region, leaving '*virt' unchanged. Other
995 * architectures should map the pages starting at '*virt' and
996 * update '*virt' with the first usable address after the mapped
1000 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1003 return PHYS_TO_DMAP(start);
1008 * Add a list of wired pages to the kva
1009 * this routine is only used for temporary
1010 * kernel mappings that do not need to have
1011 * page modification or references recorded.
1012 * Note that old mappings are simply written
1013 * over. The page *must* be wired.
1014 * Note: SMP coherent. Uses a ranged shootdown IPI.
1017 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1027 for (i = 0; i < count; i++) {
1029 pa = VM_PAGE_TO_PHYS(m);
1030 pn = (pa / PAGE_SIZE);
1031 l3 = pmap_l3(kernel_pmap, va);
1033 entry = (PTE_V | PTE_RWX);
1034 entry |= (pn << PTE_PPN0_S);
1035 pmap_load_store(l3, entry);
1040 pmap_invalidate_range(kernel_pmap, sva, va);
1044 * This routine tears out page mappings from the
1045 * kernel -- it is meant only for temporary mappings.
1046 * Note: SMP coherent. Uses a ranged shootdown IPI.
1049 pmap_qremove(vm_offset_t sva, int count)
1054 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1057 while (count-- > 0) {
1058 l3 = pmap_l3(kernel_pmap, va);
1059 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1061 if (pmap_l3_valid_cacheable(pmap_load(l3)))
1062 cpu_dcache_wb_range(va, L3_SIZE);
1063 pmap_load_clear(l3);
1068 pmap_invalidate_range(kernel_pmap, sva, va);
1071 /***************************************************
1072 * Page table page management routines.....
1073 ***************************************************/
1074 static __inline void
1075 pmap_free_zero_pages(struct spglist *free)
1079 while ((m = SLIST_FIRST(free)) != NULL) {
1080 SLIST_REMOVE_HEAD(free, plinks.s.ss);
1081 /* Preserve the page's PG_ZERO setting. */
1082 vm_page_free_toq(m);
1087 * Schedule the specified unused page table page to be freed. Specifically,
1088 * add the page to the specified list of pages that will be released to the
1089 * physical memory manager after the TLB has been updated.
1091 static __inline void
1092 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1093 boolean_t set_PG_ZERO)
1097 m->flags |= PG_ZERO;
1099 m->flags &= ~PG_ZERO;
1100 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1104 * Decrements a page table page's wire count, which is used to record the
1105 * number of valid page table entries within the page. If the wire count
1106 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1107 * page table page was unmapped and FALSE otherwise.
1109 static inline boolean_t
1110 pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1114 if (m->wire_count == 0) {
1115 _pmap_unwire_l3(pmap, va, m, free);
1123 _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1127 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1129 * unmap the page table page
1131 if (m->pindex >= NUPDE) {
1134 l1 = pmap_l1(pmap, va);
1135 pmap_load_clear(l1);
1136 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1141 l2 = pmap_l2(pmap, va);
1142 pmap_load_clear(l2);
1145 pmap_resident_count_dec(pmap, 1);
1146 if (m->pindex < NUPDE) {
1148 /* We just released a PT, unhold the matching PD */
1151 l1 = pmap_l1(pmap, va);
1152 phys = PTE_TO_PHYS(pmap_load(l1));
1153 pdpg = PHYS_TO_VM_PAGE(phys);
1154 pmap_unwire_l3(pmap, va, pdpg, free);
1156 pmap_invalidate_page(pmap, va);
1159 * This is a release store so that the ordinary store unmapping
1160 * the page table page is globally performed before TLB shoot-
1163 atomic_subtract_rel_int(&vm_cnt.v_wire_count, 1);
1166 * Put page on a list so that it is released after
1167 * *ALL* TLB shootdown is done
1169 pmap_add_delayed_free_list(m, free, TRUE);
1173 * After removing an l3 entry, this routine is used to
1174 * conditionally free the page, and manage the hold/wire counts.
1177 pmap_unuse_l3(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1178 struct spglist *free)
1183 if (va >= VM_MAXUSER_ADDRESS)
1185 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1187 phys = PTE_TO_PHYS(ptepde);
1189 mpte = PHYS_TO_VM_PAGE(phys);
1190 return (pmap_unwire_l3(pmap, va, mpte, free));
1194 pmap_pinit0(pmap_t pmap)
1197 PMAP_LOCK_INIT(pmap);
1198 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1199 pmap->pm_l1 = kernel_pmap->pm_l1;
1203 pmap_pinit(pmap_t pmap)
1209 * allocate the l1 page
1211 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1212 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1215 l1phys = VM_PAGE_TO_PHYS(l1pt);
1216 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1218 if ((l1pt->flags & PG_ZERO) == 0)
1219 pagezero(pmap->pm_l1);
1221 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1223 /* Install kernel pagetables */
1224 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1226 /* Add to the list of all user pmaps */
1227 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1233 * This routine is called if the desired page table page does not exist.
1235 * If page table page allocation fails, this routine may sleep before
1236 * returning NULL. It sleeps only if a lock pointer was given.
1238 * Note: If a page allocation fails at page table level two or three,
1239 * one or two pages may be held during the wait, only to be released
1240 * afterwards. This conservative approach is easily argued to avoid
1244 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1246 vm_page_t m, /*pdppg, */pdpg;
1251 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1254 * Allocate a page table page.
1256 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1257 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1258 if (lockp != NULL) {
1259 RELEASE_PV_LIST_LOCK(lockp);
1261 rw_runlock(&pvh_global_lock);
1263 rw_rlock(&pvh_global_lock);
1268 * Indicate the need to retry. While waiting, the page table
1269 * page may have been allocated.
1274 if ((m->flags & PG_ZERO) == 0)
1278 * Map the pagetable page into the process address space, if
1279 * it isn't already there.
1282 if (ptepindex >= NUPDE) {
1284 vm_pindex_t l1index;
1286 l1index = ptepindex - NUPDE;
1287 l1 = &pmap->pm_l1[l1index];
1289 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1291 entry |= (pn << PTE_PPN0_S);
1292 pmap_load_store(l1, entry);
1293 pmap_distribute_l1(pmap, l1index, entry);
1298 vm_pindex_t l1index;
1299 pd_entry_t *l1, *l2;
1301 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1302 l1 = &pmap->pm_l1[l1index];
1303 if (pmap_load(l1) == 0) {
1304 /* recurse for allocating page dir */
1305 if (_pmap_alloc_l3(pmap, NUPDE + l1index,
1308 atomic_subtract_int(&vm_cnt.v_wire_count, 1);
1309 vm_page_free_zero(m);
1313 phys = PTE_TO_PHYS(pmap_load(l1));
1314 pdpg = PHYS_TO_VM_PAGE(phys);
1318 phys = PTE_TO_PHYS(pmap_load(l1));
1319 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1320 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1322 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1324 entry |= (pn << PTE_PPN0_S);
1325 pmap_load_store(l2, entry);
1330 pmap_resident_count_inc(pmap, 1);
1336 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1338 vm_pindex_t ptepindex;
1344 * Calculate pagetable page index
1346 ptepindex = pmap_l2_pindex(va);
1349 * Get the page directory entry
1351 l2 = pmap_l2(pmap, va);
1354 * If the page table page is mapped, we just increment the
1355 * hold count, and activate it.
1357 if (l2 != NULL && pmap_load(l2) != 0) {
1358 phys = PTE_TO_PHYS(pmap_load(l2));
1359 m = PHYS_TO_VM_PAGE(phys);
1363 * Here if the pte page isn't mapped, or if it has been
1366 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1367 if (m == NULL && lockp != NULL)
1374 /***************************************************
1375 * Pmap allocation/deallocation routines.
1376 ***************************************************/
1379 * Release any resources held by the given physical map.
1380 * Called when a pmap initialized by pmap_pinit is being released.
1381 * Should only be called if the map contains no valid mappings.
1384 pmap_release(pmap_t pmap)
1388 KASSERT(pmap->pm_stats.resident_count == 0,
1389 ("pmap_release: pmap resident count %ld != 0",
1390 pmap->pm_stats.resident_count));
1392 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1394 atomic_subtract_int(&vm_cnt.v_wire_count, 1);
1395 vm_page_free_zero(m);
1397 /* Remove pmap from the allpmaps list */
1398 LIST_REMOVE(pmap, pm_list);
1400 /* Remove kernel pagetables */
1401 bzero(pmap->pm_l1, PAGE_SIZE);
1406 kvm_size(SYSCTL_HANDLER_ARGS)
1408 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1410 return sysctl_handle_long(oidp, &ksize, 0, req);
1412 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1413 0, 0, kvm_size, "LU", "Size of KVM");
1416 kvm_free(SYSCTL_HANDLER_ARGS)
1418 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1420 return sysctl_handle_long(oidp, &kfree, 0, req);
1422 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1423 0, 0, kvm_free, "LU", "Amount of KVM free");
1427 * grow the number of kernel page table entries, if needed
1430 pmap_growkernel(vm_offset_t addr)
1434 pd_entry_t *l1, *l2;
1438 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1440 addr = roundup2(addr, L2_SIZE);
1441 if (addr - 1 >= kernel_map->max_offset)
1442 addr = kernel_map->max_offset;
1443 while (kernel_vm_end < addr) {
1444 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1445 if (pmap_load(l1) == 0) {
1446 /* We need a new PDP entry */
1447 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1448 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1449 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1451 panic("pmap_growkernel: no memory to grow kernel");
1452 if ((nkpg->flags & PG_ZERO) == 0)
1453 pmap_zero_page(nkpg);
1454 paddr = VM_PAGE_TO_PHYS(nkpg);
1456 pn = (paddr / PAGE_SIZE);
1458 entry |= (pn << PTE_PPN0_S);
1459 pmap_load_store(l1, entry);
1460 pmap_distribute_l1(kernel_pmap,
1461 pmap_l1_index(kernel_vm_end), entry);
1464 continue; /* try again */
1466 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1467 if ((pmap_load(l2) & PTE_A) != 0) {
1468 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1469 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1470 kernel_vm_end = kernel_map->max_offset;
1476 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1477 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1480 panic("pmap_growkernel: no memory to grow kernel");
1481 if ((nkpg->flags & PG_ZERO) == 0) {
1482 pmap_zero_page(nkpg);
1484 paddr = VM_PAGE_TO_PHYS(nkpg);
1486 pn = (paddr / PAGE_SIZE);
1488 entry |= (pn << PTE_PPN0_S);
1489 pmap_load_store(l2, entry);
1492 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1494 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1495 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1496 kernel_vm_end = kernel_map->max_offset;
1503 /***************************************************
1504 * page management routines.
1505 ***************************************************/
1507 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1508 CTASSERT(_NPCM == 3);
1509 CTASSERT(_NPCPV == 168);
1511 static __inline struct pv_chunk *
1512 pv_to_chunk(pv_entry_t pv)
1515 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1518 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1520 #define PC_FREE0 0xfffffffffffffffful
1521 #define PC_FREE1 0xfffffffffffffffful
1522 #define PC_FREE2 0x000000fffffffffful
1524 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1528 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1530 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1531 "Current number of pv entry chunks");
1532 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1533 "Current number of pv entry chunks allocated");
1534 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1535 "Current number of pv entry chunks frees");
1536 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1537 "Number of times tried to get a chunk page but failed.");
1539 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1540 static int pv_entry_spare;
1542 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1543 "Current number of pv entry frees");
1544 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1545 "Current number of pv entry allocs");
1546 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1547 "Current number of pv entries");
1548 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1549 "Current number of spare pv entries");
1554 * We are in a serious low memory condition. Resort to
1555 * drastic measures to free some pages so we can allocate
1556 * another pv entry chunk.
1558 * Returns NULL if PV entries were reclaimed from the specified pmap.
1560 * We do not, however, unmap 2mpages because subsequent accesses will
1561 * allocate per-page pv entries until repromotion occurs, thereby
1562 * exacerbating the shortage of free pv entries.
1565 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1568 panic("RISCVTODO: reclaim_pv_chunk");
1572 * free the pv_entry back to the free list
1575 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1577 struct pv_chunk *pc;
1578 int idx, field, bit;
1580 rw_assert(&pvh_global_lock, RA_LOCKED);
1581 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1582 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1583 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1584 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1585 pc = pv_to_chunk(pv);
1586 idx = pv - &pc->pc_pventry[0];
1589 pc->pc_map[field] |= 1ul << bit;
1590 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1591 pc->pc_map[2] != PC_FREE2) {
1592 /* 98% of the time, pc is already at the head of the list. */
1593 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1594 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1595 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1599 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1604 free_pv_chunk(struct pv_chunk *pc)
1608 mtx_lock(&pv_chunks_mutex);
1609 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1610 mtx_unlock(&pv_chunks_mutex);
1611 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1612 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1613 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1614 /* entire chunk is free, return it */
1615 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1616 #if 0 /* TODO: For minidump */
1617 dump_drop_page(m->phys_addr);
1619 vm_page_unwire(m, PQ_NONE);
1624 * Returns a new PV entry, allocating a new PV chunk from the system when
1625 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1626 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1629 * The given PV list lock may be released.
1632 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1636 struct pv_chunk *pc;
1639 rw_assert(&pvh_global_lock, RA_LOCKED);
1640 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1641 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1643 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1645 for (field = 0; field < _NPCM; field++) {
1646 if (pc->pc_map[field]) {
1647 bit = ffsl(pc->pc_map[field]) - 1;
1651 if (field < _NPCM) {
1652 pv = &pc->pc_pventry[field * 64 + bit];
1653 pc->pc_map[field] &= ~(1ul << bit);
1654 /* If this was the last item, move it to tail */
1655 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1656 pc->pc_map[2] == 0) {
1657 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1658 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1661 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1662 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1666 /* No free items, allocate another chunk */
1667 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1670 if (lockp == NULL) {
1671 PV_STAT(pc_chunk_tryfail++);
1674 m = reclaim_pv_chunk(pmap, lockp);
1678 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1679 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1680 #if 0 /* TODO: This is for minidump */
1681 dump_add_page(m->phys_addr);
1683 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1685 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1686 pc->pc_map[1] = PC_FREE1;
1687 pc->pc_map[2] = PC_FREE2;
1688 mtx_lock(&pv_chunks_mutex);
1689 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1690 mtx_unlock(&pv_chunks_mutex);
1691 pv = &pc->pc_pventry[0];
1692 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1693 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1694 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1699 * First find and then remove the pv entry for the specified pmap and virtual
1700 * address from the specified pv list. Returns the pv entry if found and NULL
1701 * otherwise. This operation can be performed on pv lists for either 4KB or
1702 * 2MB page mappings.
1704 static __inline pv_entry_t
1705 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1709 rw_assert(&pvh_global_lock, RA_LOCKED);
1710 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1711 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1712 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1721 * First find and then destroy the pv entry for the specified pmap and virtual
1722 * address. This operation can be performed on pv lists for either 4KB or 2MB
1726 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1730 pv = pmap_pvh_remove(pvh, pmap, va);
1732 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
1733 free_pv_entry(pmap, pv);
1737 * Conditionally create the PV entry for a 4KB page mapping if the required
1738 * memory can be allocated without resorting to reclamation.
1741 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1742 struct rwlock **lockp)
1746 rw_assert(&pvh_global_lock, RA_LOCKED);
1747 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1748 /* Pass NULL instead of the lock pointer to disable reclamation. */
1749 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1751 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1752 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1760 * pmap_remove_l3: do the things to unmap a page in a process
1763 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
1764 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
1770 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1771 if (pmap_is_current(pmap) && pmap_l3_valid_cacheable(pmap_load(l3)))
1772 cpu_dcache_wb_range(va, L3_SIZE);
1773 old_l3 = pmap_load_clear(l3);
1775 pmap_invalidate_page(pmap, va);
1776 if (old_l3 & PTE_SW_WIRED)
1777 pmap->pm_stats.wired_count -= 1;
1778 pmap_resident_count_dec(pmap, 1);
1779 if (old_l3 & PTE_SW_MANAGED) {
1780 phys = PTE_TO_PHYS(old_l3);
1781 m = PHYS_TO_VM_PAGE(phys);
1782 if (pmap_page_dirty(old_l3))
1785 vm_page_aflag_set(m, PGA_REFERENCED);
1786 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1787 pmap_pvh_free(&m->md, pmap, va);
1790 return (pmap_unuse_l3(pmap, va, l2e, free));
1794 * Remove the given range of addresses from the specified map.
1796 * It is assumed that the start and end are properly
1797 * rounded to the page size.
1800 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1802 struct rwlock *lock;
1803 vm_offset_t va, va_next;
1804 pd_entry_t *l1, *l2;
1805 pt_entry_t l3_pte, *l3;
1806 struct spglist free;
1809 * Perform an unsynchronized read. This is, however, safe.
1811 if (pmap->pm_stats.resident_count == 0)
1816 rw_rlock(&pvh_global_lock);
1820 for (; sva < eva; sva = va_next) {
1821 if (pmap->pm_stats.resident_count == 0)
1824 l1 = pmap_l1(pmap, sva);
1825 if (pmap_load(l1) == 0) {
1826 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1833 * Calculate index for next page table.
1835 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1839 l2 = pmap_l1_to_l2(l1, sva);
1843 l3_pte = pmap_load(l2);
1846 * Weed out invalid mappings.
1850 if ((pmap_load(l2) & PTE_RX) != 0)
1854 * Limit our scan to either the end of the va represented
1855 * by the current page table page, or to the end of the
1856 * range being removed.
1862 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1865 panic("l3 == NULL");
1866 if (pmap_load(l3) == 0) {
1867 if (va != va_next) {
1868 pmap_invalidate_range(pmap, va, sva);
1875 if (pmap_remove_l3(pmap, l3, sva, l3_pte, &free,
1882 pmap_invalidate_range(pmap, va, sva);
1886 rw_runlock(&pvh_global_lock);
1888 pmap_free_zero_pages(&free);
1892 * Routine: pmap_remove_all
1894 * Removes this physical page from
1895 * all physical maps in which it resides.
1896 * Reflects back modify bits to the pager.
1899 * Original versions of this routine were very
1900 * inefficient because they iteratively called
1901 * pmap_remove (slow...)
1905 pmap_remove_all(vm_page_t m)
1909 pt_entry_t *l3, tl3;
1910 pd_entry_t *l2, tl2;
1911 struct spglist free;
1913 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1914 ("pmap_remove_all: page %p is not managed", m));
1916 rw_wlock(&pvh_global_lock);
1917 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1920 pmap_resident_count_dec(pmap, 1);
1921 l2 = pmap_l2(pmap, pv->pv_va);
1922 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
1923 tl2 = pmap_load(l2);
1925 KASSERT((tl2 & PTE_RX) == 0,
1926 ("pmap_remove_all: found a table when expecting "
1927 "a block in %p's pv list", m));
1929 l3 = pmap_l2_to_l3(l2, pv->pv_va);
1930 if (pmap_is_current(pmap) &&
1931 pmap_l3_valid_cacheable(pmap_load(l3)))
1932 cpu_dcache_wb_range(pv->pv_va, L3_SIZE);
1933 tl3 = pmap_load_clear(l3);
1935 pmap_invalidate_page(pmap, pv->pv_va);
1936 if (tl3 & PTE_SW_WIRED)
1937 pmap->pm_stats.wired_count--;
1938 if ((tl3 & PTE_A) != 0)
1939 vm_page_aflag_set(m, PGA_REFERENCED);
1942 * Update the vm_page_t clean and reference bits.
1944 if (pmap_page_dirty(tl3))
1946 pmap_unuse_l3(pmap, pv->pv_va, pmap_load(l2), &free);
1947 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
1949 free_pv_entry(pmap, pv);
1952 vm_page_aflag_clear(m, PGA_WRITEABLE);
1953 rw_wunlock(&pvh_global_lock);
1954 pmap_free_zero_pages(&free);
1958 * Set the physical protection on the
1959 * specified range of this map as requested.
1962 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1964 vm_offset_t va, va_next;
1965 pd_entry_t *l1, *l2;
1966 pt_entry_t *l3p, l3;
1969 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1970 pmap_remove(pmap, sva, eva);
1974 if ((prot & VM_PROT_WRITE) == VM_PROT_WRITE)
1978 for (; sva < eva; sva = va_next) {
1980 l1 = pmap_l1(pmap, sva);
1981 if (pmap_load(l1) == 0) {
1982 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1988 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1992 l2 = pmap_l1_to_l2(l1, sva);
1995 if (pmap_load(l2) == 0)
1997 if ((pmap_load(l2) & PTE_RX) != 0)
2004 for (l3p = pmap_l2_to_l3(l2, sva); sva != va_next; l3p++,
2006 l3 = pmap_load(l3p);
2007 if (pmap_l3_valid(l3)) {
2008 entry = pmap_load(l3p);
2010 pmap_load_store(l3p, entry);
2012 /* XXX: Use pmap_invalidate_range */
2013 pmap_invalidate_page(pmap, sva);
2021 * Insert the given physical page (p) at
2022 * the specified virtual address (v) in the
2023 * target physical map with the protection requested.
2025 * If specified, the page will be wired down, meaning
2026 * that the related pte can not be reclaimed.
2028 * NB: This is the only routine which MAY NOT lazy-evaluate
2029 * or lose information. That is, this routine must actually
2030 * insert this page into the given map NOW.
2033 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2034 u_int flags, int8_t psind __unused)
2036 struct rwlock *lock;
2037 pd_entry_t *l1, *l2;
2038 pt_entry_t new_l3, orig_l3;
2041 vm_paddr_t opa, pa, l2_pa, l3_pa;
2042 vm_page_t mpte, om, l2_m, l3_m;
2049 va = trunc_page(va);
2050 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2051 VM_OBJECT_ASSERT_LOCKED(m->object);
2052 pa = VM_PAGE_TO_PHYS(m);
2053 pn = (pa / PAGE_SIZE);
2055 new_l3 = PTE_V | PTE_R | PTE_X;
2056 if (prot & VM_PROT_WRITE)
2058 if ((va >> 63) == 0)
2061 new_l3 |= (pn << PTE_PPN0_S);
2062 if ((flags & PMAP_ENTER_WIRED) != 0)
2063 new_l3 |= PTE_SW_WIRED;
2065 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2070 rw_rlock(&pvh_global_lock);
2073 if (va < VM_MAXUSER_ADDRESS) {
2074 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2075 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2076 if (mpte == NULL && nosleep) {
2077 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2080 rw_runlock(&pvh_global_lock);
2082 return (KERN_RESOURCE_SHORTAGE);
2084 l3 = pmap_l3(pmap, va);
2086 l3 = pmap_l3(pmap, va);
2087 /* TODO: This is not optimal, but should mostly work */
2089 l2 = pmap_l2(pmap, va);
2091 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2092 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2095 panic("pmap_enter: l2 pte_m == NULL");
2096 if ((l2_m->flags & PG_ZERO) == 0)
2097 pmap_zero_page(l2_m);
2099 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2100 l2_pn = (l2_pa / PAGE_SIZE);
2102 l1 = pmap_l1(pmap, va);
2104 entry |= (l2_pn << PTE_PPN0_S);
2105 pmap_load_store(l1, entry);
2106 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2109 l2 = pmap_l1_to_l2(l1, va);
2113 ("No l2 table after allocating one"));
2115 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2116 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2118 panic("pmap_enter: l3 pte_m == NULL");
2119 if ((l3_m->flags & PG_ZERO) == 0)
2120 pmap_zero_page(l3_m);
2122 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2123 l3_pn = (l3_pa / PAGE_SIZE);
2125 entry |= (l3_pn << PTE_PPN0_S);
2126 pmap_load_store(l2, entry);
2128 l3 = pmap_l2_to_l3(l2, va);
2130 pmap_invalidate_page(pmap, va);
2134 orig_l3 = pmap_load(l3);
2135 opa = PTE_TO_PHYS(orig_l3);
2138 * Is the specified virtual address already mapped?
2140 if (pmap_l3_valid(orig_l3)) {
2142 * Wiring change, just update stats. We don't worry about
2143 * wiring PT pages as they remain resident as long as there
2144 * are valid mappings in them. Hence, if a user page is wired,
2145 * the PT page will be also.
2147 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2148 (orig_l3 & PTE_SW_WIRED) == 0)
2149 pmap->pm_stats.wired_count++;
2150 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2151 (orig_l3 & PTE_SW_WIRED) != 0)
2152 pmap->pm_stats.wired_count--;
2155 * Remove the extra PT page reference.
2159 KASSERT(mpte->wire_count > 0,
2160 ("pmap_enter: missing reference to page table page,"
2165 * Has the physical page changed?
2169 * No, might be a protection or wiring change.
2171 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2172 new_l3 |= PTE_SW_MANAGED;
2173 if (pmap_is_write(new_l3))
2174 vm_page_aflag_set(m, PGA_WRITEABLE);
2179 /* Flush the cache, there might be uncommitted data in it */
2180 if (pmap_is_current(pmap) && pmap_l3_valid_cacheable(orig_l3))
2181 cpu_dcache_wb_range(va, L3_SIZE);
2184 * Increment the counters.
2186 if ((new_l3 & PTE_SW_WIRED) != 0)
2187 pmap->pm_stats.wired_count++;
2188 pmap_resident_count_inc(pmap, 1);
2191 * Enter on the PV list if part of our managed memory.
2193 if ((m->oflags & VPO_UNMANAGED) == 0) {
2194 new_l3 |= PTE_SW_MANAGED;
2195 pv = get_pv_entry(pmap, &lock);
2197 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2198 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2200 if (pmap_is_write(new_l3))
2201 vm_page_aflag_set(m, PGA_WRITEABLE);
2205 * Update the L3 entry.
2209 orig_l3 = pmap_load_store(l3, new_l3);
2211 opa = PTE_TO_PHYS(orig_l3);
2214 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2215 om = PHYS_TO_VM_PAGE(opa);
2216 if (pmap_page_dirty(orig_l3))
2218 if ((orig_l3 & PTE_A) != 0)
2219 vm_page_aflag_set(om, PGA_REFERENCED);
2220 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2221 pmap_pvh_free(&om->md, pmap, va);
2223 } else if (pmap_page_dirty(orig_l3)) {
2224 if ((orig_l3 & PTE_SW_MANAGED) != 0)
2228 pmap_load_store(l3, new_l3);
2231 pmap_invalidate_page(pmap, va);
2232 if ((pmap != pmap_kernel()) && (pmap == &curproc->p_vmspace->vm_pmap))
2233 cpu_icache_sync_range(va, PAGE_SIZE);
2237 rw_runlock(&pvh_global_lock);
2239 return (KERN_SUCCESS);
2243 * Maps a sequence of resident pages belonging to the same object.
2244 * The sequence begins with the given page m_start. This page is
2245 * mapped at the given virtual address start. Each subsequent page is
2246 * mapped at a virtual address that is offset from start by the same
2247 * amount as the page is offset from m_start within the object. The
2248 * last page in the sequence is the page with the largest offset from
2249 * m_start that can be mapped at a virtual address less than the given
2250 * virtual address end. Not every virtual page between start and end
2251 * is mapped; only those for which a resident page exists with the
2252 * corresponding offset from m_start are mapped.
2255 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2256 vm_page_t m_start, vm_prot_t prot)
2258 struct rwlock *lock;
2261 vm_pindex_t diff, psize;
2263 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2265 psize = atop(end - start);
2269 rw_rlock(&pvh_global_lock);
2271 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2272 va = start + ptoa(diff);
2273 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte, &lock);
2274 m = TAILQ_NEXT(m, listq);
2278 rw_runlock(&pvh_global_lock);
2283 * this code makes some *MAJOR* assumptions:
2284 * 1. Current pmap & pmap exists.
2287 * 4. No page table pages.
2288 * but is *MUCH* faster than pmap_enter...
2292 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2294 struct rwlock *lock;
2297 rw_rlock(&pvh_global_lock);
2299 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
2302 rw_runlock(&pvh_global_lock);
2307 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2308 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
2310 struct spglist free;
2318 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2319 (m->oflags & VPO_UNMANAGED) != 0,
2320 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2321 rw_assert(&pvh_global_lock, RA_LOCKED);
2322 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2324 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
2326 * In the case that a page table page is not
2327 * resident, we are creating it here.
2329 if (va < VM_MAXUSER_ADDRESS) {
2330 vm_pindex_t l2pindex;
2333 * Calculate pagetable page index
2335 l2pindex = pmap_l2_pindex(va);
2336 if (mpte && (mpte->pindex == l2pindex)) {
2342 l2 = pmap_l2(pmap, va);
2345 * If the page table page is mapped, we just increment
2346 * the hold count, and activate it. Otherwise, we
2347 * attempt to allocate a page table page. If this
2348 * attempt fails, we don't retry. Instead, we give up.
2350 if (l2 != NULL && pmap_load(l2) != 0) {
2351 phys = PTE_TO_PHYS(pmap_load(l2));
2352 mpte = PHYS_TO_VM_PAGE(phys);
2356 * Pass NULL instead of the PV list lock
2357 * pointer, because we don't intend to sleep.
2359 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
2364 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
2365 l3 = &l3[pmap_l3_index(va)];
2368 l3 = pmap_l3(kernel_pmap, va);
2371 panic("pmap_enter_quick_locked: No l3");
2372 if (pmap_load(l3) != 0) {
2381 * Enter on the PV list if part of our managed memory.
2383 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2384 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
2387 if (pmap_unwire_l3(pmap, va, mpte, &free)) {
2388 pmap_invalidate_page(pmap, va);
2389 pmap_free_zero_pages(&free);
2397 * Increment counters
2399 pmap_resident_count_inc(pmap, 1);
2401 pa = VM_PAGE_TO_PHYS(m);
2402 pn = (pa / PAGE_SIZE);
2404 /* RISCVTODO: check permissions */
2405 entry = (PTE_V | PTE_RWX);
2406 entry |= (pn << PTE_PPN0_S);
2409 * Now validate mapping with RO protection
2411 if ((m->oflags & VPO_UNMANAGED) == 0)
2412 entry |= PTE_SW_MANAGED;
2413 pmap_load_store(l3, entry);
2416 pmap_invalidate_page(pmap, va);
2421 * This code maps large physical mmap regions into the
2422 * processor address space. Note that some shortcuts
2423 * are taken, but the code works.
2426 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2427 vm_pindex_t pindex, vm_size_t size)
2430 VM_OBJECT_ASSERT_WLOCKED(object);
2431 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2432 ("pmap_object_init_pt: non-device object"));
2436 * Clear the wired attribute from the mappings for the specified range of
2437 * addresses in the given pmap. Every valid mapping within that range
2438 * must have the wired attribute set. In contrast, invalid mappings
2439 * cannot have the wired attribute set, so they are ignored.
2441 * The wired attribute of the page table entry is not a hardware feature,
2442 * so there is no need to invalidate any TLB entries.
2445 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2447 vm_offset_t va_next;
2448 pd_entry_t *l1, *l2;
2450 boolean_t pv_lists_locked;
2452 pv_lists_locked = FALSE;
2454 for (; sva < eva; sva = va_next) {
2455 l1 = pmap_l1(pmap, sva);
2456 if (pmap_load(l1) == 0) {
2457 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2463 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2467 l2 = pmap_l1_to_l2(l1, sva);
2468 if (pmap_load(l2) == 0)
2473 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2475 if (pmap_load(l3) == 0)
2477 if ((pmap_load(l3) & PTE_SW_WIRED) == 0)
2478 panic("pmap_unwire: l3 %#jx is missing "
2479 "PTE_SW_WIRED", (uintmax_t)*l3);
2482 * PG_W must be cleared atomically. Although the pmap
2483 * lock synchronizes access to PG_W, another processor
2484 * could be setting PG_M and/or PG_A concurrently.
2486 atomic_clear_long(l3, PTE_SW_WIRED);
2487 pmap->pm_stats.wired_count--;
2490 if (pv_lists_locked)
2491 rw_runlock(&pvh_global_lock);
2496 * Copy the range specified by src_addr/len
2497 * from the source map to the range dst_addr/len
2498 * in the destination map.
2500 * This routine is only advisory and need not do anything.
2504 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2505 vm_offset_t src_addr)
2511 * pmap_zero_page zeros the specified hardware page by mapping
2512 * the page into KVM and using bzero to clear its contents.
2515 pmap_zero_page(vm_page_t m)
2517 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2519 pagezero((void *)va);
2523 * pmap_zero_page_area zeros the specified hardware page by mapping
2524 * the page into KVM and using bzero to clear its contents.
2526 * off and size may not cover an area beyond a single hardware page.
2529 pmap_zero_page_area(vm_page_t m, int off, int size)
2531 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2533 if (off == 0 && size == PAGE_SIZE)
2534 pagezero((void *)va);
2536 bzero((char *)va + off, size);
2540 * pmap_copy_page copies the specified (machine independent)
2541 * page by mapping the page into virtual memory and using
2542 * bcopy to copy the page, one machine dependent page at a
2546 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2548 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2549 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2551 pagecopy((void *)src, (void *)dst);
2554 int unmapped_buf_allowed = 1;
2557 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2558 vm_offset_t b_offset, int xfersize)
2562 vm_paddr_t p_a, p_b;
2563 vm_offset_t a_pg_offset, b_pg_offset;
2566 while (xfersize > 0) {
2567 a_pg_offset = a_offset & PAGE_MASK;
2568 m_a = ma[a_offset >> PAGE_SHIFT];
2569 p_a = m_a->phys_addr;
2570 b_pg_offset = b_offset & PAGE_MASK;
2571 m_b = mb[b_offset >> PAGE_SHIFT];
2572 p_b = m_b->phys_addr;
2573 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2574 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2575 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
2576 panic("!DMAP a %lx", p_a);
2578 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
2580 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
2581 panic("!DMAP b %lx", p_b);
2583 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
2585 bcopy(a_cp, b_cp, cnt);
2593 pmap_quick_enter_page(vm_page_t m)
2596 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
2600 pmap_quick_remove_page(vm_offset_t addr)
2605 * Returns true if the pmap's pv is one of the first
2606 * 16 pvs linked to from this page. This count may
2607 * be changed upwards or downwards in the future; it
2608 * is only necessary that true be returned for a small
2609 * subset of pmaps for proper page aging.
2612 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2614 struct rwlock *lock;
2619 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2620 ("pmap_page_exists_quick: page %p is not managed", m));
2622 rw_rlock(&pvh_global_lock);
2623 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2625 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2626 if (PV_PMAP(pv) == pmap) {
2635 rw_runlock(&pvh_global_lock);
2640 * pmap_page_wired_mappings:
2642 * Return the number of managed mappings to the given physical page
2646 pmap_page_wired_mappings(vm_page_t m)
2648 struct rwlock *lock;
2654 if ((m->oflags & VPO_UNMANAGED) != 0)
2656 rw_rlock(&pvh_global_lock);
2657 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2661 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2663 if (!PMAP_TRYLOCK(pmap)) {
2664 md_gen = m->md.pv_gen;
2668 if (md_gen != m->md.pv_gen) {
2673 l3 = pmap_l3(pmap, pv->pv_va);
2674 if (l3 != NULL && (pmap_load(l3) & PTE_SW_WIRED) != 0)
2679 rw_runlock(&pvh_global_lock);
2684 * Destroy all managed, non-wired mappings in the given user-space
2685 * pmap. This pmap cannot be active on any processor besides the
2688 * This function cannot be applied to the kernel pmap. Moreover, it
2689 * is not intended for general use. It is only to be used during
2690 * process termination. Consequently, it can be implemented in ways
2691 * that make it faster than pmap_remove(). First, it can more quickly
2692 * destroy mappings by iterating over the pmap's collection of PV
2693 * entries, rather than searching the page table. Second, it doesn't
2694 * have to test and clear the page table entries atomically, because
2695 * no processor is currently accessing the user address space. In
2696 * particular, a page table entry's dirty bit won't change state once
2697 * this function starts.
2700 pmap_remove_pages(pmap_t pmap)
2702 pd_entry_t ptepde, *l2;
2703 pt_entry_t *l3, tl3;
2704 struct spglist free;
2707 struct pv_chunk *pc, *npc;
2708 struct rwlock *lock;
2710 uint64_t inuse, bitmask;
2711 int allfree, field, freed, idx;
2717 rw_rlock(&pvh_global_lock);
2719 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2722 for (field = 0; field < _NPCM; field++) {
2723 inuse = ~pc->pc_map[field] & pc_freemask[field];
2724 while (inuse != 0) {
2725 bit = ffsl(inuse) - 1;
2726 bitmask = 1UL << bit;
2727 idx = field * 64 + bit;
2728 pv = &pc->pc_pventry[idx];
2731 l2 = pmap_l2(pmap, pv->pv_va);
2732 ptepde = pmap_load(l2);
2733 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2734 tl3 = pmap_load(l3);
2737 * We cannot remove wired pages from a process' mapping at this time
2739 if (tl3 & PTE_SW_WIRED) {
2744 pa = PTE_TO_PHYS(tl3);
2745 m = PHYS_TO_VM_PAGE(pa);
2746 KASSERT(m->phys_addr == pa,
2747 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2748 m, (uintmax_t)m->phys_addr,
2751 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
2752 m < &vm_page_array[vm_page_array_size],
2753 ("pmap_remove_pages: bad l3 %#jx",
2756 if (pmap_is_current(pmap) &&
2757 pmap_l3_valid_cacheable(pmap_load(l3)))
2758 cpu_dcache_wb_range(pv->pv_va, L3_SIZE);
2759 pmap_load_clear(l3);
2761 pmap_invalidate_page(pmap, pv->pv_va);
2764 * Update the vm_page_t clean/reference bits.
2766 if (pmap_page_dirty(tl3))
2769 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
2772 pc->pc_map[field] |= bitmask;
2774 pmap_resident_count_dec(pmap, 1);
2775 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2778 pmap_unuse_l3(pmap, pv->pv_va, ptepde, &free);
2782 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
2783 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
2784 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
2786 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2790 pmap_invalidate_all(pmap);
2793 rw_runlock(&pvh_global_lock);
2795 pmap_free_zero_pages(&free);
2799 * This is used to check if a page has been accessed or modified. As we
2800 * don't have a bit to see if it has been modified we have to assume it
2801 * has been if the page is read/write.
2804 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
2806 struct rwlock *lock;
2808 pt_entry_t *l3, mask, value;
2814 rw_rlock(&pvh_global_lock);
2815 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2818 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2820 if (!PMAP_TRYLOCK(pmap)) {
2821 md_gen = m->md.pv_gen;
2825 if (md_gen != m->md.pv_gen) {
2830 l3 = pmap_l3(pmap, pv->pv_va);
2844 mask |= ATTR_AP_RW_BIT;
2845 value |= ATTR_AP(ATTR_AP_RW);
2848 mask |= ATTR_AF | ATTR_DESCR_MASK;
2849 value |= ATTR_AF | L3_PAGE;
2853 rv = (pmap_load(l3) & mask) == value;
2860 rw_runlock(&pvh_global_lock);
2867 * Return whether or not the specified physical page was modified
2868 * in any physical maps.
2871 pmap_is_modified(vm_page_t m)
2874 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2875 ("pmap_is_modified: page %p is not managed", m));
2878 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2879 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2880 * is clear, no PTEs can have PG_M set.
2882 VM_OBJECT_ASSERT_WLOCKED(m->object);
2883 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2885 return (pmap_page_test_mappings(m, FALSE, TRUE));
2889 * pmap_is_prefaultable:
2891 * Return whether or not the specified virtual address is eligible
2895 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2902 l3 = pmap_l3(pmap, addr);
2903 if (l3 != NULL && pmap_load(l3) != 0) {
2911 * pmap_is_referenced:
2913 * Return whether or not the specified physical page was referenced
2914 * in any physical maps.
2917 pmap_is_referenced(vm_page_t m)
2920 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2921 ("pmap_is_referenced: page %p is not managed", m));
2922 return (pmap_page_test_mappings(m, TRUE, FALSE));
2926 * Clear the write and modified bits in each of the given page's mappings.
2929 pmap_remove_write(vm_page_t m)
2932 struct rwlock *lock;
2934 pt_entry_t *l3, oldl3;
2938 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2939 ("pmap_remove_write: page %p is not managed", m));
2942 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2943 * set by another thread while the object is locked. Thus,
2944 * if PGA_WRITEABLE is clear, no page table entries need updating.
2946 VM_OBJECT_ASSERT_WLOCKED(m->object);
2947 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2949 rw_rlock(&pvh_global_lock);
2950 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2953 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2955 if (!PMAP_TRYLOCK(pmap)) {
2956 md_gen = m->md.pv_gen;
2960 if (md_gen != m->md.pv_gen) {
2966 l3 = pmap_l3(pmap, pv->pv_va);
2968 oldl3 = pmap_load(l3);
2970 if (pmap_is_write(oldl3)) {
2971 newl3 = oldl3 & ~(PTE_W);
2972 if (!atomic_cmpset_long(l3, oldl3, newl3))
2974 /* TODO: use pmap_page_dirty(oldl3) ? */
2975 if ((oldl3 & PTE_A) != 0)
2977 pmap_invalidate_page(pmap, pv->pv_va);
2982 vm_page_aflag_clear(m, PGA_WRITEABLE);
2983 rw_runlock(&pvh_global_lock);
2986 static __inline boolean_t
2987 safe_to_clear_referenced(pmap_t pmap, pt_entry_t pte)
2994 * pmap_ts_referenced:
2996 * Return a count of reference bits for a page, clearing those bits.
2997 * It is not necessary for every reference bit to be cleared, but it
2998 * is necessary that 0 only be returned when there are truly no
2999 * reference bits set.
3001 * As an optimization, update the page's dirty field if a modified bit is
3002 * found while counting reference bits. This opportunistic update can be
3003 * performed at low cost and can eliminate the need for some future calls
3004 * to pmap_is_modified(). However, since this function stops after
3005 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3006 * dirty pages. Those dirty pages will only be detected by a future call
3007 * to pmap_is_modified().
3010 pmap_ts_referenced(vm_page_t m)
3014 struct rwlock *lock;
3016 pt_entry_t *l3, old_l3;
3018 int cleared, md_gen, not_cleared;
3019 struct spglist free;
3021 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3022 ("pmap_ts_referenced: page %p is not managed", m));
3025 pa = VM_PAGE_TO_PHYS(m);
3026 lock = PHYS_TO_PV_LIST_LOCK(pa);
3027 rw_rlock(&pvh_global_lock);
3031 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
3038 if (!PMAP_TRYLOCK(pmap)) {
3039 md_gen = m->md.pv_gen;
3043 if (md_gen != m->md.pv_gen) {
3048 l2 = pmap_l2(pmap, pv->pv_va);
3050 KASSERT((pmap_load(l2) & PTE_RX) == 0,
3051 ("pmap_ts_referenced: found an invalid l2 table"));
3053 l3 = pmap_l2_to_l3(l2, pv->pv_va);
3054 old_l3 = pmap_load(l3);
3055 if (pmap_page_dirty(old_l3))
3057 if ((old_l3 & PTE_A) != 0) {
3058 if (safe_to_clear_referenced(pmap, old_l3)) {
3060 * TODO: We don't handle the access flag
3061 * at all. We need to be able to set it in
3062 * the exception handler.
3064 panic("RISCVTODO: safe_to_clear_referenced\n");
3065 } else if ((old_l3 & PTE_SW_WIRED) == 0) {
3067 * Wired pages cannot be paged out so
3068 * doing accessed bit emulation for
3069 * them is wasted effort. We do the
3070 * hard work for unwired pages only.
3072 pmap_remove_l3(pmap, l3, pv->pv_va,
3073 pmap_load(l2), &free, &lock);
3074 pmap_invalidate_page(pmap, pv->pv_va);
3079 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3080 ("inconsistent pv lock %p %p for page %p",
3081 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3086 /* Rotate the PV list if it has more than one entry. */
3087 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3088 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3089 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3092 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
3093 not_cleared < PMAP_TS_REFERENCED_MAX);
3096 rw_runlock(&pvh_global_lock);
3097 pmap_free_zero_pages(&free);
3098 return (cleared + not_cleared);
3102 * Apply the given advice to the specified range of addresses within the
3103 * given pmap. Depending on the advice, clear the referenced and/or
3104 * modified flags in each mapping and set the mapped page's dirty field.
3107 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3112 * Clear the modify bits on the specified physical page.
3115 pmap_clear_modify(vm_page_t m)
3118 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3119 ("pmap_clear_modify: page %p is not managed", m));
3120 VM_OBJECT_ASSERT_WLOCKED(m->object);
3121 KASSERT(!vm_page_xbusied(m),
3122 ("pmap_clear_modify: page %p is exclusive busied", m));
3125 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
3126 * If the object containing the page is locked and the page is not
3127 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
3129 if ((m->aflags & PGA_WRITEABLE) == 0)
3132 /* RISCVTODO: We lack support for tracking if a page is modified */
3136 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3139 return ((void *)PHYS_TO_DMAP(pa));
3143 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
3148 * Sets the memory attribute for the specified page.
3151 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3154 m->md.pv_memattr = ma;
3157 * RISCVTODO: Implement the below (from the amd64 pmap)
3158 * If "m" is a normal page, update its direct mapping. This update
3159 * can be relied upon to perform any cache operations that are
3160 * required for data coherence.
3162 if ((m->flags & PG_FICTITIOUS) == 0 &&
3163 PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
3164 panic("RISCVTODO: pmap_page_set_memattr");
3168 * perform the pmap work for mincore
3171 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3174 panic("RISCVTODO: pmap_mincore");
3178 pmap_activate(struct thread *td)
3184 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3185 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
3187 reg = SATP_MODE_SV39;
3188 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
3189 __asm __volatile("csrw sptbr, %0" :: "r"(reg));
3191 pmap_invalidate_all(pmap);
3196 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3199 panic("RISCVTODO: pmap_sync_icache");
3203 * Increase the starting virtual address of the given mapping if a
3204 * different alignment might result in more superpage mappings.
3207 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3208 vm_offset_t *addr, vm_size_t size)
3213 * Get the kernel virtual address of a set of physical pages. If there are
3214 * physical addresses not covered by the DMAP perform a transient mapping
3215 * that will be removed when calling pmap_unmap_io_transient.
3217 * \param page The pages the caller wishes to obtain the virtual
3218 * address on the kernel memory map.
3219 * \param vaddr On return contains the kernel virtual memory address
3220 * of the pages passed in the page parameter.
3221 * \param count Number of pages passed in.
3222 * \param can_fault TRUE if the thread using the mapped pages can take
3223 * page faults, FALSE otherwise.
3225 * \returns TRUE if the caller must call pmap_unmap_io_transient when
3226 * finished or FALSE otherwise.
3230 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3231 boolean_t can_fault)
3234 boolean_t needs_mapping;
3238 * Allocate any KVA space that we need, this is done in a separate
3239 * loop to prevent calling vmem_alloc while pinned.
3241 needs_mapping = FALSE;
3242 for (i = 0; i < count; i++) {
3243 paddr = VM_PAGE_TO_PHYS(page[i]);
3244 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
3245 error = vmem_alloc(kernel_arena, PAGE_SIZE,
3246 M_BESTFIT | M_WAITOK, &vaddr[i]);
3247 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
3248 needs_mapping = TRUE;
3250 vaddr[i] = PHYS_TO_DMAP(paddr);
3254 /* Exit early if everything is covered by the DMAP */
3260 for (i = 0; i < count; i++) {
3261 paddr = VM_PAGE_TO_PHYS(page[i]);
3262 if (paddr >= DMAP_MAX_PHYSADDR) {
3264 "pmap_map_io_transient: TODO: Map out of DMAP data");
3268 return (needs_mapping);
3272 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3273 boolean_t can_fault)
3280 for (i = 0; i < count; i++) {
3281 paddr = VM_PAGE_TO_PHYS(page[i]);
3282 if (paddr >= DMAP_MAX_PHYSADDR) {
3283 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");