2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
122 #include <sys/systm.h>
123 #include <sys/kernel.h>
125 #include <sys/lock.h>
126 #include <sys/malloc.h>
127 #include <sys/mman.h>
128 #include <sys/msgbuf.h>
129 #include <sys/mutex.h>
130 #include <sys/proc.h>
131 #include <sys/rwlock.h>
133 #include <sys/vmem.h>
134 #include <sys/vmmeter.h>
135 #include <sys/sched.h>
136 #include <sys/sysctl.h>
140 #include <vm/vm_param.h>
141 #include <vm/vm_kern.h>
142 #include <vm/vm_page.h>
143 #include <vm/vm_map.h>
144 #include <vm/vm_object.h>
145 #include <vm/vm_extern.h>
146 #include <vm/vm_pageout.h>
147 #include <vm/vm_pager.h>
148 #include <vm/vm_radix.h>
149 #include <vm/vm_reserv.h>
152 #include <machine/machdep.h>
153 #include <machine/md_var.h>
154 #include <machine/pcb.h>
155 #include <machine/sbi.h>
157 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
158 #define NUPDE (NPDEPG * NPDEPG)
159 #define NUSERPGTBLS (NUPDE + NPDEPG)
161 #if !defined(DIAGNOSTIC)
162 #ifdef __GNUC_GNU_INLINE__
163 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
165 #define PMAP_INLINE extern inline
172 #define PV_STAT(x) do { x ; } while (0)
174 #define PV_STAT(x) do { } while (0)
177 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
179 #define NPV_LIST_LOCKS MAXCPU
181 #define PHYS_TO_PV_LIST_LOCK(pa) \
182 (&pv_list_locks[pa_index(pa) % NPV_LIST_LOCKS])
184 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
185 struct rwlock **_lockp = (lockp); \
186 struct rwlock *_new_lock; \
188 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
189 if (_new_lock != *_lockp) { \
190 if (*_lockp != NULL) \
191 rw_wunlock(*_lockp); \
192 *_lockp = _new_lock; \
197 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
198 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
200 #define RELEASE_PV_LIST_LOCK(lockp) do { \
201 struct rwlock **_lockp = (lockp); \
203 if (*_lockp != NULL) { \
204 rw_wunlock(*_lockp); \
209 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
210 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
212 /* The list of all the user pmaps */
213 LIST_HEAD(pmaplist, pmap);
214 static struct pmaplist allpmaps;
216 static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
218 struct pmap kernel_pmap_store;
220 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
221 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
222 vm_offset_t kernel_vm_end = 0;
224 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
225 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
226 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
228 /* This code assumes all L1 DMAP entries will be used */
229 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
230 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
232 static struct rwlock_padalign pvh_global_lock;
235 * Data for the pv entry allocation mechanism
237 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
238 static struct mtx pv_chunks_mutex;
239 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
241 static void free_pv_chunk(struct pv_chunk *pc);
242 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
243 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
244 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
245 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
246 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
248 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
249 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
250 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
251 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
252 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
253 vm_page_t m, struct rwlock **lockp);
255 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
256 struct rwlock **lockp);
258 static void _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
259 struct spglist *free);
260 static int pmap_unuse_l3(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
263 * These load the old table data and store the new value.
264 * They need to be atomic as the System MMU may write to the table at
265 * the same time as the CPU.
267 #define pmap_load_store(table, entry) atomic_swap_64(table, entry)
268 #define pmap_set(table, mask) atomic_set_64(table, mask)
269 #define pmap_load_clear(table) atomic_swap_64(table, 0)
270 #define pmap_load(table) (*table)
272 /********************/
273 /* Inline functions */
274 /********************/
277 pagecopy(void *s, void *d)
280 memcpy(d, s, PAGE_SIZE);
290 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
291 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
292 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
294 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
296 static __inline pd_entry_t *
297 pmap_l1(pmap_t pmap, vm_offset_t va)
300 return (&pmap->pm_l1[pmap_l1_index(va)]);
303 static __inline pd_entry_t *
304 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
309 phys = PTE_TO_PHYS(pmap_load(l1));
310 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
312 return (&l2[pmap_l2_index(va)]);
315 static __inline pd_entry_t *
316 pmap_l2(pmap_t pmap, vm_offset_t va)
320 l1 = pmap_l1(pmap, va);
323 if ((pmap_load(l1) & PTE_V) == 0)
325 if ((pmap_load(l1) & PTE_RX) != 0)
328 return (pmap_l1_to_l2(l1, va));
331 static __inline pt_entry_t *
332 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
337 phys = PTE_TO_PHYS(pmap_load(l2));
338 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
340 return (&l3[pmap_l3_index(va)]);
343 static __inline pt_entry_t *
344 pmap_l3(pmap_t pmap, vm_offset_t va)
348 l2 = pmap_l2(pmap, va);
351 if ((pmap_load(l2) & PTE_V) == 0)
353 if ((pmap_load(l2) & PTE_RX) != 0)
356 return (pmap_l2_to_l3(l2, va));
361 pmap_is_write(pt_entry_t entry)
364 return (entry & PTE_W);
368 pmap_l3_valid(pt_entry_t l3)
375 pmap_page_accessed(pt_entry_t pte)
378 return (pte & PTE_A);
381 /* Checks if the page is dirty. */
383 pmap_page_dirty(pt_entry_t pte)
386 return (pte & PTE_D);
390 pmap_resident_count_inc(pmap_t pmap, int count)
393 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
394 pmap->pm_stats.resident_count += count;
398 pmap_resident_count_dec(pmap_t pmap, int count)
401 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
402 KASSERT(pmap->pm_stats.resident_count >= count,
403 ("pmap %p resident count underflow %ld %d", pmap,
404 pmap->pm_stats.resident_count, count));
405 pmap->pm_stats.resident_count -= count;
409 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
412 struct pmap *user_pmap;
415 /* Distribute new kernel L1 entry to all the user pmaps */
416 if (pmap != kernel_pmap)
419 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
420 l1 = &user_pmap->pm_l1[l1index];
422 pmap_load_store(l1, entry);
429 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
435 l1 = (pd_entry_t *)l1pt;
436 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
438 /* Check locore has used a table L1 map */
439 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
440 ("Invalid bootstrap L1 table"));
442 /* Find the address of the L2 table */
443 l2 = (pt_entry_t *)init_pt_va;
444 *l2_slot = pmap_l2_index(va);
450 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
452 u_int l1_slot, l2_slot;
456 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
458 /* Check locore has used L2 superpages */
459 KASSERT((l2[l2_slot] & PTE_RX) != 0,
460 ("Invalid bootstrap L2 table"));
462 /* L2 is superpages */
463 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
464 ret += (va & L2_OFFSET);
470 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
479 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
480 va = DMAP_MIN_ADDRESS;
481 l1 = (pd_entry_t *)kern_l1;
482 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
484 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
485 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
486 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
489 pn = (pa / PAGE_SIZE);
490 entry = (PTE_V | PTE_RWX);
491 entry |= (pn << PTE_PPN0_S);
492 pmap_load_store(&l1[l1_slot], entry);
495 /* Set the upper limit of the DMAP region */
503 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
512 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
514 l2 = pmap_l2(kernel_pmap, va);
515 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
516 l2_slot = pmap_l2_index(va);
519 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
520 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
522 pa = pmap_early_vtophys(l1pt, l3pt);
523 pn = (pa / PAGE_SIZE);
525 entry |= (pn << PTE_PPN0_S);
526 pmap_load_store(&l2[l2_slot], entry);
531 /* Clean the L2 page table */
532 memset((void *)l3_start, 0, l3pt - l3_start);
538 * Bootstrap the system enough to run with virtual memory.
541 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
543 u_int l1_slot, l2_slot, avail_slot, map_slot, used_map_slot;
546 vm_offset_t va, freemempos;
547 vm_offset_t dpcpu, msgbufpv;
548 vm_paddr_t pa, min_pa, max_pa;
551 kern_delta = KERNBASE - kernstart;
554 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
555 printf("%lx\n", l1pt);
556 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
558 /* Set this early so we can use the pagetable walking functions */
559 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
560 PMAP_LOCK_INIT(kernel_pmap);
563 * Initialize the global pv list lock.
565 rw_init(&pvh_global_lock, "pmap pv global");
567 LIST_INIT(&allpmaps);
569 /* Assume the address we were loaded to is a valid physical address */
570 min_pa = max_pa = KERNBASE - kern_delta;
573 * Find the minimum physical address. physmap is sorted,
574 * but may contain empty ranges.
576 for (i = 0; i < (physmap_idx * 2); i += 2) {
577 if (physmap[i] == physmap[i + 1])
579 if (physmap[i] <= min_pa)
581 if (physmap[i + 1] > max_pa)
582 max_pa = physmap[i + 1];
584 printf("physmap_idx %lx\n", physmap_idx);
585 printf("min_pa %lx\n", min_pa);
586 printf("max_pa %lx\n", max_pa);
588 /* Create a direct map region early so we can use it for pa -> va */
589 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
592 pa = KERNBASE - kern_delta;
595 * Start to initialize phys_avail by copying from physmap
596 * up to the physical address KERNBASE points at.
598 map_slot = avail_slot = 0;
599 for (; map_slot < (physmap_idx * 2); map_slot += 2) {
600 if (physmap[map_slot] == physmap[map_slot + 1])
603 if (physmap[map_slot] <= pa &&
604 physmap[map_slot + 1] > pa)
607 phys_avail[avail_slot] = physmap[map_slot];
608 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
609 physmem += (phys_avail[avail_slot + 1] -
610 phys_avail[avail_slot]) >> PAGE_SHIFT;
614 /* Add the memory before the kernel */
615 if (physmap[avail_slot] < pa) {
616 phys_avail[avail_slot] = physmap[map_slot];
617 phys_avail[avail_slot + 1] = pa;
618 physmem += (phys_avail[avail_slot + 1] -
619 phys_avail[avail_slot]) >> PAGE_SHIFT;
622 used_map_slot = map_slot;
625 * Read the page table to find out what is already mapped.
626 * This assumes we have mapped a block of memory from KERNBASE
627 * using a single L1 entry.
629 l2 = pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
631 /* Sanity check the index, KERNBASE should be the first VA */
632 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
634 /* Find how many pages we have mapped */
635 for (; l2_slot < Ln_ENTRIES; l2_slot++) {
636 if ((l2[l2_slot] & PTE_V) == 0)
639 /* Check locore used L2 superpages */
640 KASSERT((l2[l2_slot] & PTE_RX) != 0,
641 ("Invalid bootstrap L2 table"));
647 va = roundup2(va, L2_SIZE);
649 freemempos = KERNBASE + kernlen;
650 freemempos = roundup2(freemempos, PAGE_SIZE);
652 /* Create the l3 tables for the early devmap */
653 freemempos = pmap_bootstrap_l3(l1pt,
654 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
658 #define alloc_pages(var, np) \
659 (var) = freemempos; \
660 freemempos += (np * PAGE_SIZE); \
661 memset((char *)(var), 0, ((np) * PAGE_SIZE));
663 /* Allocate dynamic per-cpu area. */
664 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
665 dpcpu_init((void *)dpcpu, 0);
667 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
668 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
669 msgbufp = (void *)msgbufpv;
671 virtual_avail = roundup2(freemempos, L2_SIZE);
672 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
673 kernel_vm_end = virtual_avail;
675 pa = pmap_early_vtophys(l1pt, freemempos);
677 /* Finish initialising physmap */
678 map_slot = used_map_slot;
679 for (; avail_slot < (PHYS_AVAIL_SIZE - 2) &&
680 map_slot < (physmap_idx * 2); map_slot += 2) {
681 if (physmap[map_slot] == physmap[map_slot + 1]) {
685 /* Have we used the current range? */
686 if (physmap[map_slot + 1] <= pa) {
690 /* Do we need to split the entry? */
691 if (physmap[map_slot] < pa) {
692 phys_avail[avail_slot] = pa;
693 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
695 phys_avail[avail_slot] = physmap[map_slot];
696 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
698 physmem += (phys_avail[avail_slot + 1] -
699 phys_avail[avail_slot]) >> PAGE_SHIFT;
703 phys_avail[avail_slot] = 0;
704 phys_avail[avail_slot + 1] = 0;
707 * Maxmem isn't the "maximum memory", it's one larger than the
708 * highest page of the physical address space. It should be
709 * called something like "Maxphyspage".
711 Maxmem = atop(phys_avail[avail_slot - 1]);
715 * Initialize a vm_page's machine-dependent fields.
718 pmap_page_init(vm_page_t m)
721 TAILQ_INIT(&m->md.pv_list);
722 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
726 * Initialize the pmap module.
727 * Called by vm_init, to initialize any structures that the pmap
728 * system needs to map virtual memory.
736 * Initialize the pv chunk list mutex.
738 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
741 * Initialize the pool of pv list locks.
743 for (i = 0; i < NPV_LIST_LOCKS; i++)
744 rw_init(&pv_list_locks[i], "pmap pv list");
749 * For SMP, these functions have to use IPIs for coherence.
751 * In general, the calling thread uses a plain fence to order the
752 * writes to the page tables before invoking an SBI callback to invoke
753 * sfence_vma() on remote CPUs.
755 * Since the riscv pmap does not yet have a pm_active field, IPIs are
756 * sent to all CPUs in the system.
759 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
765 CPU_CLR(PCPU_GET(cpuid), &mask);
767 sbi_remote_sfence_vma(mask.__bits, va, 1);
773 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
779 CPU_CLR(PCPU_GET(cpuid), &mask);
781 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
784 * Might consider a loop of sfence_vma_page() for a small
785 * number of pages in the future.
792 pmap_invalidate_all(pmap_t pmap)
798 CPU_CLR(PCPU_GET(cpuid), &mask);
802 * XXX: The SBI doc doesn't detail how to specify x0 as the
803 * address to perform a global fence. BBL currently treats
804 * all sfence_vma requests as global however.
806 sbi_remote_sfence_vma(mask.__bits, 0, 0);
812 * Normal, non-SMP, invalidation functions.
813 * We inline these within pmap.c for speed.
816 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
823 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
827 * Might consider a loop of sfence_vma_page() for a small
828 * number of pages in the future.
834 pmap_invalidate_all(pmap_t pmap)
842 * Routine: pmap_extract
844 * Extract the physical page address associated
845 * with the given map/virtual_address pair.
848 pmap_extract(pmap_t pmap, vm_offset_t va)
857 * Start with the l2 tabel. We are unable to allocate
858 * pages in the l1 table.
860 l2p = pmap_l2(pmap, va);
863 if ((l2 & PTE_RX) == 0) {
864 l3p = pmap_l2_to_l3(l2p, va);
867 pa = PTE_TO_PHYS(l3);
868 pa |= (va & L3_OFFSET);
871 /* L2 is superpages */
872 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
873 pa |= (va & L2_OFFSET);
881 * Routine: pmap_extract_and_hold
883 * Atomically extract and hold the physical page
884 * with the given pmap and virtual address pair
885 * if that mapping permits the given protection.
888 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
899 l3p = pmap_l3(pmap, va);
900 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
901 if ((pmap_is_write(l3)) || ((prot & VM_PROT_WRITE) == 0)) {
902 phys = PTE_TO_PHYS(l3);
903 if (vm_page_pa_tryrelock(pmap, phys, &pa))
905 m = PHYS_TO_VM_PAGE(phys);
915 pmap_kextract(vm_offset_t va)
921 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
922 pa = DMAP_TO_PHYS(va);
924 l2 = pmap_l2(kernel_pmap, va);
926 panic("pmap_kextract: No l2");
927 if ((pmap_load(l2) & PTE_RX) != 0) {
929 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
930 pa |= (va & L2_OFFSET);
934 l3 = pmap_l2_to_l3(l2, va);
936 panic("pmap_kextract: No l3...");
937 pa = PTE_TO_PHYS(pmap_load(l3));
938 pa |= (va & PAGE_MASK);
943 /***************************************************
944 * Low level mapping routines.....
945 ***************************************************/
948 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
955 KASSERT((pa & L3_OFFSET) == 0,
956 ("pmap_kenter_device: Invalid physical address"));
957 KASSERT((sva & L3_OFFSET) == 0,
958 ("pmap_kenter_device: Invalid virtual address"));
959 KASSERT((size & PAGE_MASK) == 0,
960 ("pmap_kenter_device: Mapping is not page-sized"));
964 l3 = pmap_l3(kernel_pmap, va);
965 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
967 pn = (pa / PAGE_SIZE);
968 entry = (PTE_V | PTE_RWX);
969 entry |= (pn << PTE_PPN0_S);
970 pmap_load_store(l3, entry);
976 pmap_invalidate_range(kernel_pmap, sva, va);
980 * Remove a page from the kernel pagetables.
981 * Note: not SMP coherent.
984 pmap_kremove(vm_offset_t va)
988 l3 = pmap_l3(kernel_pmap, va);
989 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
997 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
1002 KASSERT((sva & L3_OFFSET) == 0,
1003 ("pmap_kremove_device: Invalid virtual address"));
1004 KASSERT((size & PAGE_MASK) == 0,
1005 ("pmap_kremove_device: Mapping is not page-sized"));
1009 l3 = pmap_l3(kernel_pmap, va);
1010 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
1011 pmap_load_clear(l3);
1017 pmap_invalidate_range(kernel_pmap, sva, va);
1021 * Used to map a range of physical addresses into kernel
1022 * virtual address space.
1024 * The value passed in '*virt' is a suggested virtual address for
1025 * the mapping. Architectures which can support a direct-mapped
1026 * physical to virtual region can return the appropriate address
1027 * within that region, leaving '*virt' unchanged. Other
1028 * architectures should map the pages starting at '*virt' and
1029 * update '*virt' with the first usable address after the mapped
1033 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1036 return PHYS_TO_DMAP(start);
1041 * Add a list of wired pages to the kva
1042 * this routine is only used for temporary
1043 * kernel mappings that do not need to have
1044 * page modification or references recorded.
1045 * Note that old mappings are simply written
1046 * over. The page *must* be wired.
1047 * Note: SMP coherent. Uses a ranged shootdown IPI.
1050 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1060 for (i = 0; i < count; i++) {
1062 pa = VM_PAGE_TO_PHYS(m);
1063 pn = (pa / PAGE_SIZE);
1064 l3 = pmap_l3(kernel_pmap, va);
1066 entry = (PTE_V | PTE_RWX);
1067 entry |= (pn << PTE_PPN0_S);
1068 pmap_load_store(l3, entry);
1072 pmap_invalidate_range(kernel_pmap, sva, va);
1076 * This routine tears out page mappings from the
1077 * kernel -- it is meant only for temporary mappings.
1078 * Note: SMP coherent. Uses a ranged shootdown IPI.
1081 pmap_qremove(vm_offset_t sva, int count)
1086 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1089 while (count-- > 0) {
1090 l3 = pmap_l3(kernel_pmap, va);
1091 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1093 pmap_load_clear(l3);
1097 pmap_invalidate_range(kernel_pmap, sva, va);
1100 /***************************************************
1101 * Page table page management routines.....
1102 ***************************************************/
1104 * Schedule the specified unused page table page to be freed. Specifically,
1105 * add the page to the specified list of pages that will be released to the
1106 * physical memory manager after the TLB has been updated.
1108 static __inline void
1109 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1110 boolean_t set_PG_ZERO)
1114 m->flags |= PG_ZERO;
1116 m->flags &= ~PG_ZERO;
1117 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1121 * Decrements a page table page's wire count, which is used to record the
1122 * number of valid page table entries within the page. If the wire count
1123 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1124 * page table page was unmapped and FALSE otherwise.
1126 static inline boolean_t
1127 pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1131 if (m->wire_count == 0) {
1132 _pmap_unwire_l3(pmap, va, m, free);
1140 _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1144 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1146 * unmap the page table page
1148 if (m->pindex >= NUPDE) {
1151 l1 = pmap_l1(pmap, va);
1152 pmap_load_clear(l1);
1153 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1157 l2 = pmap_l2(pmap, va);
1158 pmap_load_clear(l2);
1160 pmap_resident_count_dec(pmap, 1);
1161 if (m->pindex < NUPDE) {
1163 /* We just released a PT, unhold the matching PD */
1166 l1 = pmap_l1(pmap, va);
1167 phys = PTE_TO_PHYS(pmap_load(l1));
1168 pdpg = PHYS_TO_VM_PAGE(phys);
1169 pmap_unwire_l3(pmap, va, pdpg, free);
1171 pmap_invalidate_page(pmap, va);
1176 * Put page on a list so that it is released after
1177 * *ALL* TLB shootdown is done
1179 pmap_add_delayed_free_list(m, free, TRUE);
1183 * After removing an l3 entry, this routine is used to
1184 * conditionally free the page, and manage the hold/wire counts.
1187 pmap_unuse_l3(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1188 struct spglist *free)
1193 if (va >= VM_MAXUSER_ADDRESS)
1195 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1197 phys = PTE_TO_PHYS(ptepde);
1199 mpte = PHYS_TO_VM_PAGE(phys);
1200 return (pmap_unwire_l3(pmap, va, mpte, free));
1204 pmap_pinit0(pmap_t pmap)
1207 PMAP_LOCK_INIT(pmap);
1208 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1209 pmap->pm_l1 = kernel_pmap->pm_l1;
1213 pmap_pinit(pmap_t pmap)
1219 * allocate the l1 page
1221 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1222 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1225 l1phys = VM_PAGE_TO_PHYS(l1pt);
1226 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1228 if ((l1pt->flags & PG_ZERO) == 0)
1229 pagezero(pmap->pm_l1);
1231 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1233 /* Install kernel pagetables */
1234 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1236 /* Add to the list of all user pmaps */
1237 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1243 * This routine is called if the desired page table page does not exist.
1245 * If page table page allocation fails, this routine may sleep before
1246 * returning NULL. It sleeps only if a lock pointer was given.
1248 * Note: If a page allocation fails at page table level two or three,
1249 * one or two pages may be held during the wait, only to be released
1250 * afterwards. This conservative approach is easily argued to avoid
1254 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1256 vm_page_t m, /*pdppg, */pdpg;
1261 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1264 * Allocate a page table page.
1266 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1267 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1268 if (lockp != NULL) {
1269 RELEASE_PV_LIST_LOCK(lockp);
1271 rw_runlock(&pvh_global_lock);
1273 rw_rlock(&pvh_global_lock);
1278 * Indicate the need to retry. While waiting, the page table
1279 * page may have been allocated.
1284 if ((m->flags & PG_ZERO) == 0)
1288 * Map the pagetable page into the process address space, if
1289 * it isn't already there.
1292 if (ptepindex >= NUPDE) {
1294 vm_pindex_t l1index;
1296 l1index = ptepindex - NUPDE;
1297 l1 = &pmap->pm_l1[l1index];
1299 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1301 entry |= (pn << PTE_PPN0_S);
1302 pmap_load_store(l1, entry);
1303 pmap_distribute_l1(pmap, l1index, entry);
1305 vm_pindex_t l1index;
1306 pd_entry_t *l1, *l2;
1308 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1309 l1 = &pmap->pm_l1[l1index];
1310 if (pmap_load(l1) == 0) {
1311 /* recurse for allocating page dir */
1312 if (_pmap_alloc_l3(pmap, NUPDE + l1index,
1314 vm_page_unwire_noq(m);
1315 vm_page_free_zero(m);
1319 phys = PTE_TO_PHYS(pmap_load(l1));
1320 pdpg = PHYS_TO_VM_PAGE(phys);
1324 phys = PTE_TO_PHYS(pmap_load(l1));
1325 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1326 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1328 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1330 entry |= (pn << PTE_PPN0_S);
1331 pmap_load_store(l2, entry);
1334 pmap_resident_count_inc(pmap, 1);
1340 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1342 vm_pindex_t ptepindex;
1348 * Calculate pagetable page index
1350 ptepindex = pmap_l2_pindex(va);
1353 * Get the page directory entry
1355 l2 = pmap_l2(pmap, va);
1358 * If the page table page is mapped, we just increment the
1359 * hold count, and activate it.
1361 if (l2 != NULL && pmap_load(l2) != 0) {
1362 phys = PTE_TO_PHYS(pmap_load(l2));
1363 m = PHYS_TO_VM_PAGE(phys);
1367 * Here if the pte page isn't mapped, or if it has been
1370 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1371 if (m == NULL && lockp != NULL)
1378 /***************************************************
1379 * Pmap allocation/deallocation routines.
1380 ***************************************************/
1383 * Release any resources held by the given physical map.
1384 * Called when a pmap initialized by pmap_pinit is being released.
1385 * Should only be called if the map contains no valid mappings.
1388 pmap_release(pmap_t pmap)
1392 KASSERT(pmap->pm_stats.resident_count == 0,
1393 ("pmap_release: pmap resident count %ld != 0",
1394 pmap->pm_stats.resident_count));
1396 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1397 vm_page_unwire_noq(m);
1398 vm_page_free_zero(m);
1400 /* Remove pmap from the allpmaps list */
1401 LIST_REMOVE(pmap, pm_list);
1403 /* Remove kernel pagetables */
1404 bzero(pmap->pm_l1, PAGE_SIZE);
1409 kvm_size(SYSCTL_HANDLER_ARGS)
1411 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1413 return sysctl_handle_long(oidp, &ksize, 0, req);
1415 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1416 0, 0, kvm_size, "LU", "Size of KVM");
1419 kvm_free(SYSCTL_HANDLER_ARGS)
1421 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1423 return sysctl_handle_long(oidp, &kfree, 0, req);
1425 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1426 0, 0, kvm_free, "LU", "Amount of KVM free");
1430 * grow the number of kernel page table entries, if needed
1433 pmap_growkernel(vm_offset_t addr)
1437 pd_entry_t *l1, *l2;
1441 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1443 addr = roundup2(addr, L2_SIZE);
1444 if (addr - 1 >= vm_map_max(kernel_map))
1445 addr = vm_map_max(kernel_map);
1446 while (kernel_vm_end < addr) {
1447 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1448 if (pmap_load(l1) == 0) {
1449 /* We need a new PDP entry */
1450 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1451 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1452 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1454 panic("pmap_growkernel: no memory to grow kernel");
1455 if ((nkpg->flags & PG_ZERO) == 0)
1456 pmap_zero_page(nkpg);
1457 paddr = VM_PAGE_TO_PHYS(nkpg);
1459 pn = (paddr / PAGE_SIZE);
1461 entry |= (pn << PTE_PPN0_S);
1462 pmap_load_store(l1, entry);
1463 pmap_distribute_l1(kernel_pmap,
1464 pmap_l1_index(kernel_vm_end), entry);
1465 continue; /* try again */
1467 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1468 if ((pmap_load(l2) & PTE_A) != 0) {
1469 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1470 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1471 kernel_vm_end = vm_map_max(kernel_map);
1477 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1478 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1481 panic("pmap_growkernel: no memory to grow kernel");
1482 if ((nkpg->flags & PG_ZERO) == 0) {
1483 pmap_zero_page(nkpg);
1485 paddr = VM_PAGE_TO_PHYS(nkpg);
1487 pn = (paddr / PAGE_SIZE);
1489 entry |= (pn << PTE_PPN0_S);
1490 pmap_load_store(l2, entry);
1492 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1494 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1495 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1496 kernel_vm_end = vm_map_max(kernel_map);
1503 /***************************************************
1504 * page management routines.
1505 ***************************************************/
1507 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1508 CTASSERT(_NPCM == 3);
1509 CTASSERT(_NPCPV == 168);
1511 static __inline struct pv_chunk *
1512 pv_to_chunk(pv_entry_t pv)
1515 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1518 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1520 #define PC_FREE0 0xfffffffffffffffful
1521 #define PC_FREE1 0xfffffffffffffffful
1522 #define PC_FREE2 0x000000fffffffffful
1524 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1528 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1530 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1531 "Current number of pv entry chunks");
1532 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1533 "Current number of pv entry chunks allocated");
1534 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1535 "Current number of pv entry chunks frees");
1536 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1537 "Number of times tried to get a chunk page but failed.");
1539 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1540 static int pv_entry_spare;
1542 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1543 "Current number of pv entry frees");
1544 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1545 "Current number of pv entry allocs");
1546 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1547 "Current number of pv entries");
1548 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1549 "Current number of spare pv entries");
1554 * We are in a serious low memory condition. Resort to
1555 * drastic measures to free some pages so we can allocate
1556 * another pv entry chunk.
1558 * Returns NULL if PV entries were reclaimed from the specified pmap.
1560 * We do not, however, unmap 2mpages because subsequent accesses will
1561 * allocate per-page pv entries until repromotion occurs, thereby
1562 * exacerbating the shortage of free pv entries.
1565 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1568 panic("RISCVTODO: reclaim_pv_chunk");
1572 * free the pv_entry back to the free list
1575 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1577 struct pv_chunk *pc;
1578 int idx, field, bit;
1580 rw_assert(&pvh_global_lock, RA_LOCKED);
1581 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1582 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1583 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1584 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1585 pc = pv_to_chunk(pv);
1586 idx = pv - &pc->pc_pventry[0];
1589 pc->pc_map[field] |= 1ul << bit;
1590 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1591 pc->pc_map[2] != PC_FREE2) {
1592 /* 98% of the time, pc is already at the head of the list. */
1593 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1594 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1595 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1599 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1604 free_pv_chunk(struct pv_chunk *pc)
1608 mtx_lock(&pv_chunks_mutex);
1609 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1610 mtx_unlock(&pv_chunks_mutex);
1611 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1612 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1613 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1614 /* entire chunk is free, return it */
1615 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1616 #if 0 /* TODO: For minidump */
1617 dump_drop_page(m->phys_addr);
1619 vm_page_unwire(m, PQ_NONE);
1624 * Returns a new PV entry, allocating a new PV chunk from the system when
1625 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1626 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1629 * The given PV list lock may be released.
1632 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1636 struct pv_chunk *pc;
1639 rw_assert(&pvh_global_lock, RA_LOCKED);
1640 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1641 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1643 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1645 for (field = 0; field < _NPCM; field++) {
1646 if (pc->pc_map[field]) {
1647 bit = ffsl(pc->pc_map[field]) - 1;
1651 if (field < _NPCM) {
1652 pv = &pc->pc_pventry[field * 64 + bit];
1653 pc->pc_map[field] &= ~(1ul << bit);
1654 /* If this was the last item, move it to tail */
1655 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1656 pc->pc_map[2] == 0) {
1657 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1658 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1661 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1662 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1666 /* No free items, allocate another chunk */
1667 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1670 if (lockp == NULL) {
1671 PV_STAT(pc_chunk_tryfail++);
1674 m = reclaim_pv_chunk(pmap, lockp);
1678 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1679 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1680 #if 0 /* TODO: This is for minidump */
1681 dump_add_page(m->phys_addr);
1683 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1685 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1686 pc->pc_map[1] = PC_FREE1;
1687 pc->pc_map[2] = PC_FREE2;
1688 mtx_lock(&pv_chunks_mutex);
1689 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1690 mtx_unlock(&pv_chunks_mutex);
1691 pv = &pc->pc_pventry[0];
1692 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1693 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1694 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1699 * First find and then remove the pv entry for the specified pmap and virtual
1700 * address from the specified pv list. Returns the pv entry if found and NULL
1701 * otherwise. This operation can be performed on pv lists for either 4KB or
1702 * 2MB page mappings.
1704 static __inline pv_entry_t
1705 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1709 rw_assert(&pvh_global_lock, RA_LOCKED);
1710 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1711 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1712 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1721 * First find and then destroy the pv entry for the specified pmap and virtual
1722 * address. This operation can be performed on pv lists for either 4KB or 2MB
1726 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1730 pv = pmap_pvh_remove(pvh, pmap, va);
1732 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
1733 free_pv_entry(pmap, pv);
1737 * Conditionally create the PV entry for a 4KB page mapping if the required
1738 * memory can be allocated without resorting to reclamation.
1741 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1742 struct rwlock **lockp)
1746 rw_assert(&pvh_global_lock, RA_LOCKED);
1747 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1748 /* Pass NULL instead of the lock pointer to disable reclamation. */
1749 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1751 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1752 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1760 * pmap_remove_l3: do the things to unmap a page in a process
1763 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
1764 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
1770 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1771 old_l3 = pmap_load_clear(l3);
1772 pmap_invalidate_page(pmap, va);
1773 if (old_l3 & PTE_SW_WIRED)
1774 pmap->pm_stats.wired_count -= 1;
1775 pmap_resident_count_dec(pmap, 1);
1776 if (old_l3 & PTE_SW_MANAGED) {
1777 phys = PTE_TO_PHYS(old_l3);
1778 m = PHYS_TO_VM_PAGE(phys);
1779 if (pmap_page_dirty(old_l3))
1782 vm_page_aflag_set(m, PGA_REFERENCED);
1783 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1784 pmap_pvh_free(&m->md, pmap, va);
1787 return (pmap_unuse_l3(pmap, va, l2e, free));
1791 * Remove the given range of addresses from the specified map.
1793 * It is assumed that the start and end are properly
1794 * rounded to the page size.
1797 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1799 struct rwlock *lock;
1800 vm_offset_t va, va_next;
1801 pd_entry_t *l1, *l2;
1802 pt_entry_t l3_pte, *l3;
1803 struct spglist free;
1806 * Perform an unsynchronized read. This is, however, safe.
1808 if (pmap->pm_stats.resident_count == 0)
1813 rw_rlock(&pvh_global_lock);
1817 for (; sva < eva; sva = va_next) {
1818 if (pmap->pm_stats.resident_count == 0)
1821 l1 = pmap_l1(pmap, sva);
1822 if (pmap_load(l1) == 0) {
1823 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1830 * Calculate index for next page table.
1832 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1836 l2 = pmap_l1_to_l2(l1, sva);
1840 l3_pte = pmap_load(l2);
1843 * Weed out invalid mappings.
1847 if ((pmap_load(l2) & PTE_RX) != 0)
1851 * Limit our scan to either the end of the va represented
1852 * by the current page table page, or to the end of the
1853 * range being removed.
1859 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1862 panic("l3 == NULL");
1863 if (pmap_load(l3) == 0) {
1864 if (va != va_next) {
1865 pmap_invalidate_range(pmap, va, sva);
1872 if (pmap_remove_l3(pmap, l3, sva, l3_pte, &free,
1879 pmap_invalidate_range(pmap, va, sva);
1883 rw_runlock(&pvh_global_lock);
1885 vm_page_free_pages_toq(&free, false);
1889 * Routine: pmap_remove_all
1891 * Removes this physical page from
1892 * all physical maps in which it resides.
1893 * Reflects back modify bits to the pager.
1896 * Original versions of this routine were very
1897 * inefficient because they iteratively called
1898 * pmap_remove (slow...)
1902 pmap_remove_all(vm_page_t m)
1906 pt_entry_t *l3, tl3;
1907 pd_entry_t *l2, tl2;
1908 struct spglist free;
1910 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1911 ("pmap_remove_all: page %p is not managed", m));
1913 rw_wlock(&pvh_global_lock);
1914 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1917 pmap_resident_count_dec(pmap, 1);
1918 l2 = pmap_l2(pmap, pv->pv_va);
1919 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
1920 tl2 = pmap_load(l2);
1922 KASSERT((tl2 & PTE_RX) == 0,
1923 ("pmap_remove_all: found a table when expecting "
1924 "a block in %p's pv list", m));
1926 l3 = pmap_l2_to_l3(l2, pv->pv_va);
1927 tl3 = pmap_load_clear(l3);
1928 pmap_invalidate_page(pmap, pv->pv_va);
1929 if (tl3 & PTE_SW_WIRED)
1930 pmap->pm_stats.wired_count--;
1931 if ((tl3 & PTE_A) != 0)
1932 vm_page_aflag_set(m, PGA_REFERENCED);
1935 * Update the vm_page_t clean and reference bits.
1937 if (pmap_page_dirty(tl3))
1939 pmap_unuse_l3(pmap, pv->pv_va, pmap_load(l2), &free);
1940 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
1942 free_pv_entry(pmap, pv);
1945 vm_page_aflag_clear(m, PGA_WRITEABLE);
1946 rw_wunlock(&pvh_global_lock);
1947 vm_page_free_pages_toq(&free, false);
1951 * Set the physical protection on the
1952 * specified range of this map as requested.
1955 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1957 vm_offset_t va_next;
1958 pd_entry_t *l1, *l2;
1959 pt_entry_t *l3p, l3;
1962 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1963 pmap_remove(pmap, sva, eva);
1967 if ((prot & VM_PROT_WRITE) == VM_PROT_WRITE)
1971 for (; sva < eva; sva = va_next) {
1973 l1 = pmap_l1(pmap, sva);
1974 if (pmap_load(l1) == 0) {
1975 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1981 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1985 l2 = pmap_l1_to_l2(l1, sva);
1988 if (pmap_load(l2) == 0)
1990 if ((pmap_load(l2) & PTE_RX) != 0)
1996 for (l3p = pmap_l2_to_l3(l2, sva); sva != va_next; l3p++,
1998 l3 = pmap_load(l3p);
1999 if (pmap_l3_valid(l3)) {
2000 entry = pmap_load(l3p);
2002 pmap_load_store(l3p, entry);
2003 /* XXX: Use pmap_invalidate_range */
2004 pmap_invalidate_page(pmap, sva);
2012 * Insert the given physical page (p) at
2013 * the specified virtual address (v) in the
2014 * target physical map with the protection requested.
2016 * If specified, the page will be wired down, meaning
2017 * that the related pte can not be reclaimed.
2019 * NB: This is the only routine which MAY NOT lazy-evaluate
2020 * or lose information. That is, this routine must actually
2021 * insert this page into the given map NOW.
2024 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2025 u_int flags, int8_t psind __unused)
2027 struct rwlock *lock;
2028 pd_entry_t *l1, *l2;
2029 pt_entry_t new_l3, orig_l3;
2032 vm_paddr_t opa, pa, l2_pa, l3_pa;
2033 vm_page_t mpte, om, l2_m, l3_m;
2040 va = trunc_page(va);
2041 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2042 VM_OBJECT_ASSERT_LOCKED(m->object);
2043 pa = VM_PAGE_TO_PHYS(m);
2044 pn = (pa / PAGE_SIZE);
2046 new_l3 = PTE_V | PTE_R | PTE_X;
2047 if (prot & VM_PROT_WRITE)
2049 if ((va >> 63) == 0)
2052 new_l3 |= (pn << PTE_PPN0_S);
2053 if ((flags & PMAP_ENTER_WIRED) != 0)
2054 new_l3 |= PTE_SW_WIRED;
2055 if ((m->oflags & VPO_UNMANAGED) == 0)
2056 new_l3 |= PTE_SW_MANAGED;
2058 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2063 rw_rlock(&pvh_global_lock);
2066 if (va < VM_MAXUSER_ADDRESS) {
2067 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2068 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2069 if (mpte == NULL && nosleep) {
2070 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2073 rw_runlock(&pvh_global_lock);
2075 return (KERN_RESOURCE_SHORTAGE);
2077 l3 = pmap_l3(pmap, va);
2079 l3 = pmap_l3(pmap, va);
2080 /* TODO: This is not optimal, but should mostly work */
2082 l2 = pmap_l2(pmap, va);
2084 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2085 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2088 panic("pmap_enter: l2 pte_m == NULL");
2089 if ((l2_m->flags & PG_ZERO) == 0)
2090 pmap_zero_page(l2_m);
2092 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2093 l2_pn = (l2_pa / PAGE_SIZE);
2095 l1 = pmap_l1(pmap, va);
2097 entry |= (l2_pn << PTE_PPN0_S);
2098 pmap_load_store(l1, entry);
2099 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2100 l2 = pmap_l1_to_l2(l1, va);
2104 ("No l2 table after allocating one"));
2106 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2107 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2109 panic("pmap_enter: l3 pte_m == NULL");
2110 if ((l3_m->flags & PG_ZERO) == 0)
2111 pmap_zero_page(l3_m);
2113 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2114 l3_pn = (l3_pa / PAGE_SIZE);
2116 entry |= (l3_pn << PTE_PPN0_S);
2117 pmap_load_store(l2, entry);
2118 l3 = pmap_l2_to_l3(l2, va);
2120 pmap_invalidate_page(pmap, va);
2123 orig_l3 = pmap_load(l3);
2124 opa = PTE_TO_PHYS(orig_l3);
2128 * Is the specified virtual address already mapped?
2130 if (pmap_l3_valid(orig_l3)) {
2132 * Wiring change, just update stats. We don't worry about
2133 * wiring PT pages as they remain resident as long as there
2134 * are valid mappings in them. Hence, if a user page is wired,
2135 * the PT page will be also.
2137 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2138 (orig_l3 & PTE_SW_WIRED) == 0)
2139 pmap->pm_stats.wired_count++;
2140 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2141 (orig_l3 & PTE_SW_WIRED) != 0)
2142 pmap->pm_stats.wired_count--;
2145 * Remove the extra PT page reference.
2149 KASSERT(mpte->wire_count > 0,
2150 ("pmap_enter: missing reference to page table page,"
2155 * Has the physical page changed?
2159 * No, might be a protection or wiring change.
2161 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2162 if (pmap_is_write(new_l3))
2163 vm_page_aflag_set(m, PGA_WRITEABLE);
2169 * The physical page has changed. Temporarily invalidate
2170 * the mapping. This ensures that all threads sharing the
2171 * pmap keep a consistent view of the mapping, which is
2172 * necessary for the correct handling of COW faults. It
2173 * also permits reuse of the old mapping's PV entry,
2174 * avoiding an allocation.
2176 * For consistency, handle unmanaged mappings the same way.
2178 orig_l3 = pmap_load_clear(l3);
2179 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2180 ("pmap_enter: unexpected pa update for %#lx", va));
2181 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2182 om = PHYS_TO_VM_PAGE(opa);
2185 * The pmap lock is sufficient to synchronize with
2186 * concurrent calls to pmap_page_test_mappings() and
2187 * pmap_ts_referenced().
2189 if (pmap_page_dirty(orig_l3))
2191 if ((orig_l3 & PTE_A) != 0)
2192 vm_page_aflag_set(om, PGA_REFERENCED);
2193 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2194 pv = pmap_pvh_remove(&om->md, pmap, va);
2195 if ((new_l3 & PTE_SW_MANAGED) == 0)
2196 free_pv_entry(pmap, pv);
2197 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2198 TAILQ_EMPTY(&om->md.pv_list))
2199 vm_page_aflag_clear(om, PGA_WRITEABLE);
2201 pmap_invalidate_page(pmap, va);
2205 * Increment the counters.
2207 if ((new_l3 & PTE_SW_WIRED) != 0)
2208 pmap->pm_stats.wired_count++;
2209 pmap_resident_count_inc(pmap, 1);
2212 * Enter on the PV list if part of our managed memory.
2214 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2216 pv = get_pv_entry(pmap, &lock);
2219 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2220 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2222 if (pmap_is_write(new_l3))
2223 vm_page_aflag_set(m, PGA_WRITEABLE);
2228 * Sync the i-cache on all harts before updating the PTE
2229 * if the new PTE is executable.
2231 if (prot & VM_PROT_EXECUTE)
2232 pmap_sync_icache(pmap, va, PAGE_SIZE);
2235 * Update the L3 entry.
2238 orig_l3 = pmap_load_store(l3, new_l3);
2239 pmap_invalidate_page(pmap, va);
2240 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2241 ("pmap_enter: invalid update"));
2242 if (pmap_page_dirty(orig_l3) &&
2243 (orig_l3 & PTE_SW_MANAGED) != 0)
2246 pmap_load_store(l3, new_l3);
2251 rw_runlock(&pvh_global_lock);
2253 return (KERN_SUCCESS);
2257 * Maps a sequence of resident pages belonging to the same object.
2258 * The sequence begins with the given page m_start. This page is
2259 * mapped at the given virtual address start. Each subsequent page is
2260 * mapped at a virtual address that is offset from start by the same
2261 * amount as the page is offset from m_start within the object. The
2262 * last page in the sequence is the page with the largest offset from
2263 * m_start that can be mapped at a virtual address less than the given
2264 * virtual address end. Not every virtual page between start and end
2265 * is mapped; only those for which a resident page exists with the
2266 * corresponding offset from m_start are mapped.
2269 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2270 vm_page_t m_start, vm_prot_t prot)
2272 struct rwlock *lock;
2275 vm_pindex_t diff, psize;
2277 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2279 psize = atop(end - start);
2283 rw_rlock(&pvh_global_lock);
2285 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2286 va = start + ptoa(diff);
2287 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte, &lock);
2288 m = TAILQ_NEXT(m, listq);
2292 rw_runlock(&pvh_global_lock);
2297 * this code makes some *MAJOR* assumptions:
2298 * 1. Current pmap & pmap exists.
2301 * 4. No page table pages.
2302 * but is *MUCH* faster than pmap_enter...
2306 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2308 struct rwlock *lock;
2311 rw_rlock(&pvh_global_lock);
2313 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
2316 rw_runlock(&pvh_global_lock);
2321 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2322 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
2324 struct spglist free;
2332 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2333 (m->oflags & VPO_UNMANAGED) != 0,
2334 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2335 rw_assert(&pvh_global_lock, RA_LOCKED);
2336 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2338 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
2340 * In the case that a page table page is not
2341 * resident, we are creating it here.
2343 if (va < VM_MAXUSER_ADDRESS) {
2344 vm_pindex_t l2pindex;
2347 * Calculate pagetable page index
2349 l2pindex = pmap_l2_pindex(va);
2350 if (mpte && (mpte->pindex == l2pindex)) {
2356 l2 = pmap_l2(pmap, va);
2359 * If the page table page is mapped, we just increment
2360 * the hold count, and activate it. Otherwise, we
2361 * attempt to allocate a page table page. If this
2362 * attempt fails, we don't retry. Instead, we give up.
2364 if (l2 != NULL && pmap_load(l2) != 0) {
2365 phys = PTE_TO_PHYS(pmap_load(l2));
2366 mpte = PHYS_TO_VM_PAGE(phys);
2370 * Pass NULL instead of the PV list lock
2371 * pointer, because we don't intend to sleep.
2373 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
2378 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
2379 l3 = &l3[pmap_l3_index(va)];
2382 l3 = pmap_l3(kernel_pmap, va);
2385 panic("pmap_enter_quick_locked: No l3");
2386 if (pmap_load(l3) != 0) {
2395 * Enter on the PV list if part of our managed memory.
2397 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2398 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
2401 if (pmap_unwire_l3(pmap, va, mpte, &free)) {
2402 pmap_invalidate_page(pmap, va);
2403 vm_page_free_pages_toq(&free, false);
2411 * Increment counters
2413 pmap_resident_count_inc(pmap, 1);
2415 pa = VM_PAGE_TO_PHYS(m);
2416 pn = (pa / PAGE_SIZE);
2418 /* RISCVTODO: check permissions */
2419 entry = (PTE_V | PTE_RWX);
2420 entry |= (pn << PTE_PPN0_S);
2423 * Now validate mapping with RO protection
2425 if ((m->oflags & VPO_UNMANAGED) == 0)
2426 entry |= PTE_SW_MANAGED;
2429 * Sync the i-cache on all harts before updating the PTE
2430 * if the new PTE is executable.
2432 if (prot & VM_PROT_EXECUTE)
2433 pmap_sync_icache(pmap, va, PAGE_SIZE);
2435 pmap_load_store(l3, entry);
2437 pmap_invalidate_page(pmap, va);
2442 * This code maps large physical mmap regions into the
2443 * processor address space. Note that some shortcuts
2444 * are taken, but the code works.
2447 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2448 vm_pindex_t pindex, vm_size_t size)
2451 VM_OBJECT_ASSERT_WLOCKED(object);
2452 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2453 ("pmap_object_init_pt: non-device object"));
2457 * Clear the wired attribute from the mappings for the specified range of
2458 * addresses in the given pmap. Every valid mapping within that range
2459 * must have the wired attribute set. In contrast, invalid mappings
2460 * cannot have the wired attribute set, so they are ignored.
2462 * The wired attribute of the page table entry is not a hardware feature,
2463 * so there is no need to invalidate any TLB entries.
2466 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2468 vm_offset_t va_next;
2469 pd_entry_t *l1, *l2;
2471 boolean_t pv_lists_locked;
2473 pv_lists_locked = FALSE;
2475 for (; sva < eva; sva = va_next) {
2476 l1 = pmap_l1(pmap, sva);
2477 if (pmap_load(l1) == 0) {
2478 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2484 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2488 l2 = pmap_l1_to_l2(l1, sva);
2489 if (pmap_load(l2) == 0)
2494 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2496 if (pmap_load(l3) == 0)
2498 if ((pmap_load(l3) & PTE_SW_WIRED) == 0)
2499 panic("pmap_unwire: l3 %#jx is missing "
2500 "PTE_SW_WIRED", (uintmax_t)*l3);
2503 * PG_W must be cleared atomically. Although the pmap
2504 * lock synchronizes access to PG_W, another processor
2505 * could be setting PG_M and/or PG_A concurrently.
2507 atomic_clear_long(l3, PTE_SW_WIRED);
2508 pmap->pm_stats.wired_count--;
2511 if (pv_lists_locked)
2512 rw_runlock(&pvh_global_lock);
2517 * Copy the range specified by src_addr/len
2518 * from the source map to the range dst_addr/len
2519 * in the destination map.
2521 * This routine is only advisory and need not do anything.
2525 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2526 vm_offset_t src_addr)
2532 * pmap_zero_page zeros the specified hardware page by mapping
2533 * the page into KVM and using bzero to clear its contents.
2536 pmap_zero_page(vm_page_t m)
2538 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2540 pagezero((void *)va);
2544 * pmap_zero_page_area zeros the specified hardware page by mapping
2545 * the page into KVM and using bzero to clear its contents.
2547 * off and size may not cover an area beyond a single hardware page.
2550 pmap_zero_page_area(vm_page_t m, int off, int size)
2552 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2554 if (off == 0 && size == PAGE_SIZE)
2555 pagezero((void *)va);
2557 bzero((char *)va + off, size);
2561 * pmap_copy_page copies the specified (machine independent)
2562 * page by mapping the page into virtual memory and using
2563 * bcopy to copy the page, one machine dependent page at a
2567 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2569 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2570 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2572 pagecopy((void *)src, (void *)dst);
2575 int unmapped_buf_allowed = 1;
2578 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2579 vm_offset_t b_offset, int xfersize)
2583 vm_paddr_t p_a, p_b;
2584 vm_offset_t a_pg_offset, b_pg_offset;
2587 while (xfersize > 0) {
2588 a_pg_offset = a_offset & PAGE_MASK;
2589 m_a = ma[a_offset >> PAGE_SHIFT];
2590 p_a = m_a->phys_addr;
2591 b_pg_offset = b_offset & PAGE_MASK;
2592 m_b = mb[b_offset >> PAGE_SHIFT];
2593 p_b = m_b->phys_addr;
2594 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2595 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2596 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
2597 panic("!DMAP a %lx", p_a);
2599 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
2601 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
2602 panic("!DMAP b %lx", p_b);
2604 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
2606 bcopy(a_cp, b_cp, cnt);
2614 pmap_quick_enter_page(vm_page_t m)
2617 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
2621 pmap_quick_remove_page(vm_offset_t addr)
2626 * Returns true if the pmap's pv is one of the first
2627 * 16 pvs linked to from this page. This count may
2628 * be changed upwards or downwards in the future; it
2629 * is only necessary that true be returned for a small
2630 * subset of pmaps for proper page aging.
2633 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2635 struct rwlock *lock;
2640 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2641 ("pmap_page_exists_quick: page %p is not managed", m));
2643 rw_rlock(&pvh_global_lock);
2644 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2646 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2647 if (PV_PMAP(pv) == pmap) {
2656 rw_runlock(&pvh_global_lock);
2661 * pmap_page_wired_mappings:
2663 * Return the number of managed mappings to the given physical page
2667 pmap_page_wired_mappings(vm_page_t m)
2669 struct rwlock *lock;
2675 if ((m->oflags & VPO_UNMANAGED) != 0)
2677 rw_rlock(&pvh_global_lock);
2678 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2682 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2684 if (!PMAP_TRYLOCK(pmap)) {
2685 md_gen = m->md.pv_gen;
2689 if (md_gen != m->md.pv_gen) {
2694 l3 = pmap_l3(pmap, pv->pv_va);
2695 if (l3 != NULL && (pmap_load(l3) & PTE_SW_WIRED) != 0)
2700 rw_runlock(&pvh_global_lock);
2705 * Destroy all managed, non-wired mappings in the given user-space
2706 * pmap. This pmap cannot be active on any processor besides the
2709 * This function cannot be applied to the kernel pmap. Moreover, it
2710 * is not intended for general use. It is only to be used during
2711 * process termination. Consequently, it can be implemented in ways
2712 * that make it faster than pmap_remove(). First, it can more quickly
2713 * destroy mappings by iterating over the pmap's collection of PV
2714 * entries, rather than searching the page table. Second, it doesn't
2715 * have to test and clear the page table entries atomically, because
2716 * no processor is currently accessing the user address space. In
2717 * particular, a page table entry's dirty bit won't change state once
2718 * this function starts.
2721 pmap_remove_pages(pmap_t pmap)
2723 pd_entry_t ptepde, *l2;
2724 pt_entry_t *l3, tl3;
2725 struct spglist free;
2728 struct pv_chunk *pc, *npc;
2729 struct rwlock *lock;
2731 uint64_t inuse, bitmask;
2732 int allfree, field, freed, idx;
2738 rw_rlock(&pvh_global_lock);
2740 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2743 for (field = 0; field < _NPCM; field++) {
2744 inuse = ~pc->pc_map[field] & pc_freemask[field];
2745 while (inuse != 0) {
2746 bit = ffsl(inuse) - 1;
2747 bitmask = 1UL << bit;
2748 idx = field * 64 + bit;
2749 pv = &pc->pc_pventry[idx];
2752 l2 = pmap_l2(pmap, pv->pv_va);
2753 ptepde = pmap_load(l2);
2754 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2755 tl3 = pmap_load(l3);
2758 * We cannot remove wired pages from a process' mapping at this time
2760 if (tl3 & PTE_SW_WIRED) {
2765 pa = PTE_TO_PHYS(tl3);
2766 m = PHYS_TO_VM_PAGE(pa);
2767 KASSERT(m->phys_addr == pa,
2768 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2769 m, (uintmax_t)m->phys_addr,
2772 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
2773 m < &vm_page_array[vm_page_array_size],
2774 ("pmap_remove_pages: bad l3 %#jx",
2777 pmap_load_clear(l3);
2778 pmap_invalidate_page(pmap, pv->pv_va);
2781 * Update the vm_page_t clean/reference bits.
2783 if (pmap_page_dirty(tl3))
2786 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
2789 pc->pc_map[field] |= bitmask;
2791 pmap_resident_count_dec(pmap, 1);
2792 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2795 pmap_unuse_l3(pmap, pv->pv_va, ptepde, &free);
2799 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
2800 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
2801 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
2803 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2807 pmap_invalidate_all(pmap);
2810 rw_runlock(&pvh_global_lock);
2812 vm_page_free_pages_toq(&free, false);
2816 * This is used to check if a page has been accessed or modified. As we
2817 * don't have a bit to see if it has been modified we have to assume it
2818 * has been if the page is read/write.
2821 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
2823 struct rwlock *lock;
2825 pt_entry_t *l3, mask, value;
2831 rw_rlock(&pvh_global_lock);
2832 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2835 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2837 if (!PMAP_TRYLOCK(pmap)) {
2838 md_gen = m->md.pv_gen;
2842 if (md_gen != m->md.pv_gen) {
2847 l3 = pmap_l3(pmap, pv->pv_va);
2861 mask |= ATTR_AP_RW_BIT;
2862 value |= ATTR_AP(ATTR_AP_RW);
2865 mask |= ATTR_AF | ATTR_DESCR_MASK;
2866 value |= ATTR_AF | L3_PAGE;
2870 rv = (pmap_load(l3) & mask) == value;
2877 rw_runlock(&pvh_global_lock);
2884 * Return whether or not the specified physical page was modified
2885 * in any physical maps.
2888 pmap_is_modified(vm_page_t m)
2891 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2892 ("pmap_is_modified: page %p is not managed", m));
2895 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2896 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2897 * is clear, no PTEs can have PG_M set.
2899 VM_OBJECT_ASSERT_WLOCKED(m->object);
2900 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2902 return (pmap_page_test_mappings(m, FALSE, TRUE));
2906 * pmap_is_prefaultable:
2908 * Return whether or not the specified virtual address is eligible
2912 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2919 l3 = pmap_l3(pmap, addr);
2920 if (l3 != NULL && pmap_load(l3) != 0) {
2928 * pmap_is_referenced:
2930 * Return whether or not the specified physical page was referenced
2931 * in any physical maps.
2934 pmap_is_referenced(vm_page_t m)
2937 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2938 ("pmap_is_referenced: page %p is not managed", m));
2939 return (pmap_page_test_mappings(m, TRUE, FALSE));
2943 * Clear the write and modified bits in each of the given page's mappings.
2946 pmap_remove_write(vm_page_t m)
2949 struct rwlock *lock;
2951 pt_entry_t *l3, oldl3;
2955 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2956 ("pmap_remove_write: page %p is not managed", m));
2959 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2960 * set by another thread while the object is locked. Thus,
2961 * if PGA_WRITEABLE is clear, no page table entries need updating.
2963 VM_OBJECT_ASSERT_WLOCKED(m->object);
2964 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2966 rw_rlock(&pvh_global_lock);
2967 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2970 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2972 if (!PMAP_TRYLOCK(pmap)) {
2973 md_gen = m->md.pv_gen;
2977 if (md_gen != m->md.pv_gen) {
2983 l3 = pmap_l3(pmap, pv->pv_va);
2985 oldl3 = pmap_load(l3);
2987 if (pmap_is_write(oldl3)) {
2988 newl3 = oldl3 & ~(PTE_W);
2989 if (!atomic_cmpset_long(l3, oldl3, newl3))
2991 /* TODO: use pmap_page_dirty(oldl3) ? */
2992 if ((oldl3 & PTE_A) != 0)
2994 pmap_invalidate_page(pmap, pv->pv_va);
2999 vm_page_aflag_clear(m, PGA_WRITEABLE);
3000 rw_runlock(&pvh_global_lock);
3003 static __inline boolean_t
3004 safe_to_clear_referenced(pmap_t pmap, pt_entry_t pte)
3011 * pmap_ts_referenced:
3013 * Return a count of reference bits for a page, clearing those bits.
3014 * It is not necessary for every reference bit to be cleared, but it
3015 * is necessary that 0 only be returned when there are truly no
3016 * reference bits set.
3018 * As an optimization, update the page's dirty field if a modified bit is
3019 * found while counting reference bits. This opportunistic update can be
3020 * performed at low cost and can eliminate the need for some future calls
3021 * to pmap_is_modified(). However, since this function stops after
3022 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3023 * dirty pages. Those dirty pages will only be detected by a future call
3024 * to pmap_is_modified().
3027 pmap_ts_referenced(vm_page_t m)
3031 struct rwlock *lock;
3033 pt_entry_t *l3, old_l3;
3035 int cleared, md_gen, not_cleared;
3036 struct spglist free;
3038 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3039 ("pmap_ts_referenced: page %p is not managed", m));
3042 pa = VM_PAGE_TO_PHYS(m);
3043 lock = PHYS_TO_PV_LIST_LOCK(pa);
3044 rw_rlock(&pvh_global_lock);
3048 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
3055 if (!PMAP_TRYLOCK(pmap)) {
3056 md_gen = m->md.pv_gen;
3060 if (md_gen != m->md.pv_gen) {
3065 l2 = pmap_l2(pmap, pv->pv_va);
3067 KASSERT((pmap_load(l2) & PTE_RX) == 0,
3068 ("pmap_ts_referenced: found an invalid l2 table"));
3070 l3 = pmap_l2_to_l3(l2, pv->pv_va);
3071 old_l3 = pmap_load(l3);
3072 if (pmap_page_dirty(old_l3))
3074 if ((old_l3 & PTE_A) != 0) {
3075 if (safe_to_clear_referenced(pmap, old_l3)) {
3077 * TODO: We don't handle the access flag
3078 * at all. We need to be able to set it in
3079 * the exception handler.
3081 panic("RISCVTODO: safe_to_clear_referenced\n");
3082 } else if ((old_l3 & PTE_SW_WIRED) == 0) {
3084 * Wired pages cannot be paged out so
3085 * doing accessed bit emulation for
3086 * them is wasted effort. We do the
3087 * hard work for unwired pages only.
3089 pmap_remove_l3(pmap, l3, pv->pv_va,
3090 pmap_load(l2), &free, &lock);
3091 pmap_invalidate_page(pmap, pv->pv_va);
3096 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3097 ("inconsistent pv lock %p %p for page %p",
3098 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3103 /* Rotate the PV list if it has more than one entry. */
3104 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3105 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3106 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3109 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
3110 not_cleared < PMAP_TS_REFERENCED_MAX);
3113 rw_runlock(&pvh_global_lock);
3114 vm_page_free_pages_toq(&free, false);
3115 return (cleared + not_cleared);
3119 * Apply the given advice to the specified range of addresses within the
3120 * given pmap. Depending on the advice, clear the referenced and/or
3121 * modified flags in each mapping and set the mapped page's dirty field.
3124 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3129 * Clear the modify bits on the specified physical page.
3132 pmap_clear_modify(vm_page_t m)
3135 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3136 ("pmap_clear_modify: page %p is not managed", m));
3137 VM_OBJECT_ASSERT_WLOCKED(m->object);
3138 KASSERT(!vm_page_xbusied(m),
3139 ("pmap_clear_modify: page %p is exclusive busied", m));
3142 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
3143 * If the object containing the page is locked and the page is not
3144 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
3146 if ((m->aflags & PGA_WRITEABLE) == 0)
3149 /* RISCVTODO: We lack support for tracking if a page is modified */
3153 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3156 return ((void *)PHYS_TO_DMAP(pa));
3160 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
3165 * Sets the memory attribute for the specified page.
3168 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3171 m->md.pv_memattr = ma;
3174 * RISCVTODO: Implement the below (from the amd64 pmap)
3175 * If "m" is a normal page, update its direct mapping. This update
3176 * can be relied upon to perform any cache operations that are
3177 * required for data coherence.
3179 if ((m->flags & PG_FICTITIOUS) == 0 &&
3180 PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
3181 panic("RISCVTODO: pmap_page_set_memattr");
3185 * perform the pmap work for mincore
3188 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3190 pt_entry_t *l2, *l3, tpte;
3200 l2 = pmap_l2(pmap, addr);
3201 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
3202 if ((tpte & (PTE_R | PTE_W | PTE_X)) != 0) {
3203 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
3204 val = MINCORE_INCORE | MINCORE_SUPER;
3206 l3 = pmap_l2_to_l3(l2, addr);
3207 tpte = pmap_load(l3);
3208 if ((tpte & PTE_V) == 0)
3210 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
3211 val = MINCORE_INCORE;
3214 if (pmap_page_dirty(tpte))
3215 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
3216 if (pmap_page_accessed(tpte))
3217 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
3218 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
3222 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
3223 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
3224 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
3225 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
3228 PA_UNLOCK_COND(*locked_pa);
3234 pmap_activate(struct thread *td)
3240 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3241 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
3243 reg = SATP_MODE_SV39;
3244 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
3245 __asm __volatile("csrw sptbr, %0" :: "r"(reg));
3247 pmap_invalidate_all(pmap);
3252 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3257 * From the RISC-V User-Level ISA V2.2:
3259 * "To make a store to instruction memory visible to all
3260 * RISC-V harts, the writing hart has to execute a data FENCE
3261 * before requesting that all remote RISC-V harts execute a
3266 CPU_CLR(PCPU_GET(cpuid), &mask);
3268 sbi_remote_fence_i(mask.__bits);
3273 * Increase the starting virtual address of the given mapping if a
3274 * different alignment might result in more superpage mappings.
3277 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3278 vm_offset_t *addr, vm_size_t size)
3283 * Get the kernel virtual address of a set of physical pages. If there are
3284 * physical addresses not covered by the DMAP perform a transient mapping
3285 * that will be removed when calling pmap_unmap_io_transient.
3287 * \param page The pages the caller wishes to obtain the virtual
3288 * address on the kernel memory map.
3289 * \param vaddr On return contains the kernel virtual memory address
3290 * of the pages passed in the page parameter.
3291 * \param count Number of pages passed in.
3292 * \param can_fault TRUE if the thread using the mapped pages can take
3293 * page faults, FALSE otherwise.
3295 * \returns TRUE if the caller must call pmap_unmap_io_transient when
3296 * finished or FALSE otherwise.
3300 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3301 boolean_t can_fault)
3304 boolean_t needs_mapping;
3308 * Allocate any KVA space that we need, this is done in a separate
3309 * loop to prevent calling vmem_alloc while pinned.
3311 needs_mapping = FALSE;
3312 for (i = 0; i < count; i++) {
3313 paddr = VM_PAGE_TO_PHYS(page[i]);
3314 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
3315 error = vmem_alloc(kernel_arena, PAGE_SIZE,
3316 M_BESTFIT | M_WAITOK, &vaddr[i]);
3317 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
3318 needs_mapping = TRUE;
3320 vaddr[i] = PHYS_TO_DMAP(paddr);
3324 /* Exit early if everything is covered by the DMAP */
3330 for (i = 0; i < count; i++) {
3331 paddr = VM_PAGE_TO_PHYS(page[i]);
3332 if (paddr >= DMAP_MAX_PHYSADDR) {
3334 "pmap_map_io_transient: TODO: Map out of DMAP data");
3338 return (needs_mapping);
3342 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3343 boolean_t can_fault)
3350 for (i = 0; i < count; i++) {
3351 paddr = VM_PAGE_TO_PHYS(page[i]);
3352 if (paddr >= DMAP_MAX_PHYSADDR) {
3353 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
3359 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
3362 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);