2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
122 #include <sys/systm.h>
123 #include <sys/kernel.h>
125 #include <sys/lock.h>
126 #include <sys/malloc.h>
127 #include <sys/mman.h>
128 #include <sys/msgbuf.h>
129 #include <sys/mutex.h>
130 #include <sys/proc.h>
131 #include <sys/rwlock.h>
133 #include <sys/vmem.h>
134 #include <sys/vmmeter.h>
135 #include <sys/sched.h>
136 #include <sys/sysctl.h>
140 #include <vm/vm_param.h>
141 #include <vm/vm_kern.h>
142 #include <vm/vm_page.h>
143 #include <vm/vm_map.h>
144 #include <vm/vm_object.h>
145 #include <vm/vm_extern.h>
146 #include <vm/vm_pageout.h>
147 #include <vm/vm_pager.h>
148 #include <vm/vm_radix.h>
149 #include <vm/vm_reserv.h>
152 #include <machine/machdep.h>
153 #include <machine/md_var.h>
154 #include <machine/pcb.h>
155 #include <machine/sbi.h>
157 #define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
158 #define NUPDE (NPDEPG * NPDEPG)
159 #define NUSERPGTBLS (NUPDE + NPDEPG)
161 #if !defined(DIAGNOSTIC)
162 #ifdef __GNUC_GNU_INLINE__
163 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
165 #define PMAP_INLINE extern inline
172 #define PV_STAT(x) do { x ; } while (0)
174 #define PV_STAT(x) do { } while (0)
177 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
179 #define NPV_LIST_LOCKS MAXCPU
181 #define PHYS_TO_PV_LIST_LOCK(pa) \
182 (&pv_list_locks[pa_index(pa) % NPV_LIST_LOCKS])
184 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
185 struct rwlock **_lockp = (lockp); \
186 struct rwlock *_new_lock; \
188 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
189 if (_new_lock != *_lockp) { \
190 if (*_lockp != NULL) \
191 rw_wunlock(*_lockp); \
192 *_lockp = _new_lock; \
197 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
198 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
200 #define RELEASE_PV_LIST_LOCK(lockp) do { \
201 struct rwlock **_lockp = (lockp); \
203 if (*_lockp != NULL) { \
204 rw_wunlock(*_lockp); \
209 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
210 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
212 /* The list of all the user pmaps */
213 LIST_HEAD(pmaplist, pmap);
214 static struct pmaplist allpmaps;
216 struct pmap kernel_pmap_store;
218 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
219 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
220 vm_offset_t kernel_vm_end = 0;
222 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
223 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
224 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
226 /* This code assumes all L1 DMAP entries will be used */
227 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
228 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
230 static struct rwlock_padalign pvh_global_lock;
233 * Data for the pv entry allocation mechanism
235 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
236 static struct mtx pv_chunks_mutex;
237 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
239 static void free_pv_chunk(struct pv_chunk *pc);
240 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
241 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
242 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
243 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
244 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
246 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
247 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
248 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
249 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
250 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
251 vm_page_t m, struct rwlock **lockp);
253 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
254 struct rwlock **lockp);
256 static void _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
257 struct spglist *free);
258 static int pmap_unuse_l3(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
261 * These load the old table data and store the new value.
262 * They need to be atomic as the System MMU may write to the table at
263 * the same time as the CPU.
265 #define pmap_load_store(table, entry) atomic_swap_64(table, entry)
266 #define pmap_set(table, mask) atomic_set_64(table, mask)
267 #define pmap_load_clear(table) atomic_swap_64(table, 0)
268 #define pmap_load(table) (*table)
270 /********************/
271 /* Inline functions */
272 /********************/
275 pagecopy(void *s, void *d)
278 memcpy(d, s, PAGE_SIZE);
288 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
289 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
290 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
292 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
294 static __inline pd_entry_t *
295 pmap_l1(pmap_t pmap, vm_offset_t va)
298 return (&pmap->pm_l1[pmap_l1_index(va)]);
301 static __inline pd_entry_t *
302 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
307 phys = PTE_TO_PHYS(pmap_load(l1));
308 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
310 return (&l2[pmap_l2_index(va)]);
313 static __inline pd_entry_t *
314 pmap_l2(pmap_t pmap, vm_offset_t va)
318 l1 = pmap_l1(pmap, va);
321 if ((pmap_load(l1) & PTE_V) == 0)
323 if ((pmap_load(l1) & PTE_RX) != 0)
326 return (pmap_l1_to_l2(l1, va));
329 static __inline pt_entry_t *
330 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
335 phys = PTE_TO_PHYS(pmap_load(l2));
336 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
338 return (&l3[pmap_l3_index(va)]);
341 static __inline pt_entry_t *
342 pmap_l3(pmap_t pmap, vm_offset_t va)
346 l2 = pmap_l2(pmap, va);
349 if ((pmap_load(l2) & PTE_V) == 0)
351 if ((pmap_load(l2) & PTE_RX) != 0)
354 return (pmap_l2_to_l3(l2, va));
358 pmap_resident_count_inc(pmap_t pmap, int count)
361 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
362 pmap->pm_stats.resident_count += count;
366 pmap_resident_count_dec(pmap_t pmap, int count)
369 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
370 KASSERT(pmap->pm_stats.resident_count >= count,
371 ("pmap %p resident count underflow %ld %d", pmap,
372 pmap->pm_stats.resident_count, count));
373 pmap->pm_stats.resident_count -= count;
377 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
380 struct pmap *user_pmap;
383 /* Distribute new kernel L1 entry to all the user pmaps */
384 if (pmap != kernel_pmap)
387 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
388 l1 = &user_pmap->pm_l1[l1index];
390 pmap_load_store(l1, entry);
397 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
403 l1 = (pd_entry_t *)l1pt;
404 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
406 /* Check locore has used a table L1 map */
407 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
408 ("Invalid bootstrap L1 table"));
410 /* Find the address of the L2 table */
411 l2 = (pt_entry_t *)init_pt_va;
412 *l2_slot = pmap_l2_index(va);
418 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
420 u_int l1_slot, l2_slot;
424 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
426 /* Check locore has used L2 superpages */
427 KASSERT((l2[l2_slot] & PTE_RX) != 0,
428 ("Invalid bootstrap L2 table"));
430 /* L2 is superpages */
431 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
432 ret += (va & L2_OFFSET);
438 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
447 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
448 va = DMAP_MIN_ADDRESS;
449 l1 = (pd_entry_t *)kern_l1;
450 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
452 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
453 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
454 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
457 pn = (pa / PAGE_SIZE);
459 entry |= (pn << PTE_PPN0_S);
460 pmap_load_store(&l1[l1_slot], entry);
463 /* Set the upper limit of the DMAP region */
471 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
480 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
482 l2 = pmap_l2(kernel_pmap, va);
483 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
484 l2_slot = pmap_l2_index(va);
487 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
488 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
490 pa = pmap_early_vtophys(l1pt, l3pt);
491 pn = (pa / PAGE_SIZE);
493 entry |= (pn << PTE_PPN0_S);
494 pmap_load_store(&l2[l2_slot], entry);
499 /* Clean the L2 page table */
500 memset((void *)l3_start, 0, l3pt - l3_start);
506 * Bootstrap the system enough to run with virtual memory.
509 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
511 u_int l1_slot, l2_slot, avail_slot, map_slot, used_map_slot;
514 vm_offset_t va, freemempos;
515 vm_offset_t dpcpu, msgbufpv;
516 vm_paddr_t pa, min_pa, max_pa;
519 kern_delta = KERNBASE - kernstart;
522 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
523 printf("%lx\n", l1pt);
524 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
526 /* Set this early so we can use the pagetable walking functions */
527 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
528 PMAP_LOCK_INIT(kernel_pmap);
531 * Initialize the global pv list lock.
533 rw_init(&pvh_global_lock, "pmap pv global");
535 LIST_INIT(&allpmaps);
537 /* Assume the address we were loaded to is a valid physical address */
538 min_pa = max_pa = KERNBASE - kern_delta;
541 * Find the minimum physical address. physmap is sorted,
542 * but may contain empty ranges.
544 for (i = 0; i < (physmap_idx * 2); i += 2) {
545 if (physmap[i] == physmap[i + 1])
547 if (physmap[i] <= min_pa)
549 if (physmap[i + 1] > max_pa)
550 max_pa = physmap[i + 1];
552 printf("physmap_idx %lx\n", physmap_idx);
553 printf("min_pa %lx\n", min_pa);
554 printf("max_pa %lx\n", max_pa);
556 /* Create a direct map region early so we can use it for pa -> va */
557 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
560 pa = KERNBASE - kern_delta;
563 * Start to initialize phys_avail by copying from physmap
564 * up to the physical address KERNBASE points at.
566 map_slot = avail_slot = 0;
567 for (; map_slot < (physmap_idx * 2); map_slot += 2) {
568 if (physmap[map_slot] == physmap[map_slot + 1])
571 if (physmap[map_slot] <= pa &&
572 physmap[map_slot + 1] > pa)
575 phys_avail[avail_slot] = physmap[map_slot];
576 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
577 physmem += (phys_avail[avail_slot + 1] -
578 phys_avail[avail_slot]) >> PAGE_SHIFT;
582 /* Add the memory before the kernel */
583 if (physmap[avail_slot] < pa) {
584 phys_avail[avail_slot] = physmap[map_slot];
585 phys_avail[avail_slot + 1] = pa;
586 physmem += (phys_avail[avail_slot + 1] -
587 phys_avail[avail_slot]) >> PAGE_SHIFT;
590 used_map_slot = map_slot;
593 * Read the page table to find out what is already mapped.
594 * This assumes we have mapped a block of memory from KERNBASE
595 * using a single L1 entry.
597 l2 = pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
599 /* Sanity check the index, KERNBASE should be the first VA */
600 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
602 /* Find how many pages we have mapped */
603 for (; l2_slot < Ln_ENTRIES; l2_slot++) {
604 if ((l2[l2_slot] & PTE_V) == 0)
607 /* Check locore used L2 superpages */
608 KASSERT((l2[l2_slot] & PTE_RX) != 0,
609 ("Invalid bootstrap L2 table"));
615 va = roundup2(va, L2_SIZE);
617 freemempos = KERNBASE + kernlen;
618 freemempos = roundup2(freemempos, PAGE_SIZE);
620 /* Create the l3 tables for the early devmap */
621 freemempos = pmap_bootstrap_l3(l1pt,
622 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
626 #define alloc_pages(var, np) \
627 (var) = freemempos; \
628 freemempos += (np * PAGE_SIZE); \
629 memset((char *)(var), 0, ((np) * PAGE_SIZE));
631 /* Allocate dynamic per-cpu area. */
632 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
633 dpcpu_init((void *)dpcpu, 0);
635 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
636 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
637 msgbufp = (void *)msgbufpv;
639 virtual_avail = roundup2(freemempos, L2_SIZE);
640 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
641 kernel_vm_end = virtual_avail;
643 pa = pmap_early_vtophys(l1pt, freemempos);
645 /* Finish initialising physmap */
646 map_slot = used_map_slot;
647 for (; avail_slot < (PHYS_AVAIL_SIZE - 2) &&
648 map_slot < (physmap_idx * 2); map_slot += 2) {
649 if (physmap[map_slot] == physmap[map_slot + 1]) {
653 /* Have we used the current range? */
654 if (physmap[map_slot + 1] <= pa) {
658 /* Do we need to split the entry? */
659 if (physmap[map_slot] < pa) {
660 phys_avail[avail_slot] = pa;
661 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
663 phys_avail[avail_slot] = physmap[map_slot];
664 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
666 physmem += (phys_avail[avail_slot + 1] -
667 phys_avail[avail_slot]) >> PAGE_SHIFT;
671 phys_avail[avail_slot] = 0;
672 phys_avail[avail_slot + 1] = 0;
675 * Maxmem isn't the "maximum memory", it's one larger than the
676 * highest page of the physical address space. It should be
677 * called something like "Maxphyspage".
679 Maxmem = atop(phys_avail[avail_slot - 1]);
683 * Initialize a vm_page's machine-dependent fields.
686 pmap_page_init(vm_page_t m)
689 TAILQ_INIT(&m->md.pv_list);
690 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
694 * Initialize the pmap module.
695 * Called by vm_init, to initialize any structures that the pmap
696 * system needs to map virtual memory.
704 * Initialize the pv chunk list mutex.
706 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
709 * Initialize the pool of pv list locks.
711 for (i = 0; i < NPV_LIST_LOCKS; i++)
712 rw_init(&pv_list_locks[i], "pmap pv list");
717 * For SMP, these functions have to use IPIs for coherence.
719 * In general, the calling thread uses a plain fence to order the
720 * writes to the page tables before invoking an SBI callback to invoke
721 * sfence_vma() on remote CPUs.
723 * Since the riscv pmap does not yet have a pm_active field, IPIs are
724 * sent to all CPUs in the system.
727 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
733 CPU_CLR(PCPU_GET(cpuid), &mask);
735 sbi_remote_sfence_vma(mask.__bits, va, 1);
741 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
747 CPU_CLR(PCPU_GET(cpuid), &mask);
749 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
752 * Might consider a loop of sfence_vma_page() for a small
753 * number of pages in the future.
760 pmap_invalidate_all(pmap_t pmap)
766 CPU_CLR(PCPU_GET(cpuid), &mask);
770 * XXX: The SBI doc doesn't detail how to specify x0 as the
771 * address to perform a global fence. BBL currently treats
772 * all sfence_vma requests as global however.
774 sbi_remote_sfence_vma(mask.__bits, 0, 0);
780 * Normal, non-SMP, invalidation functions.
781 * We inline these within pmap.c for speed.
784 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
791 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
795 * Might consider a loop of sfence_vma_page() for a small
796 * number of pages in the future.
802 pmap_invalidate_all(pmap_t pmap)
810 * Routine: pmap_extract
812 * Extract the physical page address associated
813 * with the given map/virtual_address pair.
816 pmap_extract(pmap_t pmap, vm_offset_t va)
825 * Start with the l2 tabel. We are unable to allocate
826 * pages in the l1 table.
828 l2p = pmap_l2(pmap, va);
831 if ((l2 & PTE_RX) == 0) {
832 l3p = pmap_l2_to_l3(l2p, va);
835 pa = PTE_TO_PHYS(l3);
836 pa |= (va & L3_OFFSET);
839 /* L2 is superpages */
840 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
841 pa |= (va & L2_OFFSET);
849 * Routine: pmap_extract_and_hold
851 * Atomically extract and hold the physical page
852 * with the given pmap and virtual address pair
853 * if that mapping permits the given protection.
856 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
867 l3p = pmap_l3(pmap, va);
868 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
869 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
870 phys = PTE_TO_PHYS(l3);
871 if (vm_page_pa_tryrelock(pmap, phys, &pa))
873 m = PHYS_TO_VM_PAGE(phys);
883 pmap_kextract(vm_offset_t va)
889 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
890 pa = DMAP_TO_PHYS(va);
892 l2 = pmap_l2(kernel_pmap, va);
894 panic("pmap_kextract: No l2");
895 if ((pmap_load(l2) & PTE_RX) != 0) {
897 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
898 pa |= (va & L2_OFFSET);
902 l3 = pmap_l2_to_l3(l2, va);
904 panic("pmap_kextract: No l3...");
905 pa = PTE_TO_PHYS(pmap_load(l3));
906 pa |= (va & PAGE_MASK);
911 /***************************************************
912 * Low level mapping routines.....
913 ***************************************************/
916 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
923 KASSERT((pa & L3_OFFSET) == 0,
924 ("pmap_kenter_device: Invalid physical address"));
925 KASSERT((sva & L3_OFFSET) == 0,
926 ("pmap_kenter_device: Invalid virtual address"));
927 KASSERT((size & PAGE_MASK) == 0,
928 ("pmap_kenter_device: Mapping is not page-sized"));
932 l3 = pmap_l3(kernel_pmap, va);
933 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
935 pn = (pa / PAGE_SIZE);
937 entry |= (pn << PTE_PPN0_S);
938 pmap_load_store(l3, entry);
944 pmap_invalidate_range(kernel_pmap, sva, va);
948 * Remove a page from the kernel pagetables.
949 * Note: not SMP coherent.
952 pmap_kremove(vm_offset_t va)
956 l3 = pmap_l3(kernel_pmap, va);
957 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
965 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
970 KASSERT((sva & L3_OFFSET) == 0,
971 ("pmap_kremove_device: Invalid virtual address"));
972 KASSERT((size & PAGE_MASK) == 0,
973 ("pmap_kremove_device: Mapping is not page-sized"));
977 l3 = pmap_l3(kernel_pmap, va);
978 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
985 pmap_invalidate_range(kernel_pmap, sva, va);
989 * Used to map a range of physical addresses into kernel
990 * virtual address space.
992 * The value passed in '*virt' is a suggested virtual address for
993 * the mapping. Architectures which can support a direct-mapped
994 * physical to virtual region can return the appropriate address
995 * within that region, leaving '*virt' unchanged. Other
996 * architectures should map the pages starting at '*virt' and
997 * update '*virt' with the first usable address after the mapped
1001 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1004 return PHYS_TO_DMAP(start);
1009 * Add a list of wired pages to the kva
1010 * this routine is only used for temporary
1011 * kernel mappings that do not need to have
1012 * page modification or references recorded.
1013 * Note that old mappings are simply written
1014 * over. The page *must* be wired.
1015 * Note: SMP coherent. Uses a ranged shootdown IPI.
1018 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1028 for (i = 0; i < count; i++) {
1030 pa = VM_PAGE_TO_PHYS(m);
1031 pn = (pa / PAGE_SIZE);
1032 l3 = pmap_l3(kernel_pmap, va);
1035 entry |= (pn << PTE_PPN0_S);
1036 pmap_load_store(l3, entry);
1040 pmap_invalidate_range(kernel_pmap, sva, va);
1044 * This routine tears out page mappings from the
1045 * kernel -- it is meant only for temporary mappings.
1046 * Note: SMP coherent. Uses a ranged shootdown IPI.
1049 pmap_qremove(vm_offset_t sva, int count)
1054 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1057 while (count-- > 0) {
1058 l3 = pmap_l3(kernel_pmap, va);
1059 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1061 pmap_load_clear(l3);
1065 pmap_invalidate_range(kernel_pmap, sva, va);
1068 /***************************************************
1069 * Page table page management routines.....
1070 ***************************************************/
1072 * Schedule the specified unused page table page to be freed. Specifically,
1073 * add the page to the specified list of pages that will be released to the
1074 * physical memory manager after the TLB has been updated.
1076 static __inline void
1077 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1078 boolean_t set_PG_ZERO)
1082 m->flags |= PG_ZERO;
1084 m->flags &= ~PG_ZERO;
1085 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1089 * Decrements a page table page's wire count, which is used to record the
1090 * number of valid page table entries within the page. If the wire count
1091 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1092 * page table page was unmapped and FALSE otherwise.
1094 static inline boolean_t
1095 pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1099 if (m->wire_count == 0) {
1100 _pmap_unwire_l3(pmap, va, m, free);
1108 _pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1112 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1114 * unmap the page table page
1116 if (m->pindex >= NUPDE) {
1119 l1 = pmap_l1(pmap, va);
1120 pmap_load_clear(l1);
1121 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1125 l2 = pmap_l2(pmap, va);
1126 pmap_load_clear(l2);
1128 pmap_resident_count_dec(pmap, 1);
1129 if (m->pindex < NUPDE) {
1131 /* We just released a PT, unhold the matching PD */
1134 l1 = pmap_l1(pmap, va);
1135 phys = PTE_TO_PHYS(pmap_load(l1));
1136 pdpg = PHYS_TO_VM_PAGE(phys);
1137 pmap_unwire_l3(pmap, va, pdpg, free);
1139 pmap_invalidate_page(pmap, va);
1144 * Put page on a list so that it is released after
1145 * *ALL* TLB shootdown is done
1147 pmap_add_delayed_free_list(m, free, TRUE);
1151 * After removing an l3 entry, this routine is used to
1152 * conditionally free the page, and manage the hold/wire counts.
1155 pmap_unuse_l3(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1156 struct spglist *free)
1161 if (va >= VM_MAXUSER_ADDRESS)
1163 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1165 phys = PTE_TO_PHYS(ptepde);
1167 mpte = PHYS_TO_VM_PAGE(phys);
1168 return (pmap_unwire_l3(pmap, va, mpte, free));
1172 pmap_pinit0(pmap_t pmap)
1175 PMAP_LOCK_INIT(pmap);
1176 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1177 pmap->pm_l1 = kernel_pmap->pm_l1;
1181 pmap_pinit(pmap_t pmap)
1187 * allocate the l1 page
1189 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1190 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1193 l1phys = VM_PAGE_TO_PHYS(l1pt);
1194 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1196 if ((l1pt->flags & PG_ZERO) == 0)
1197 pagezero(pmap->pm_l1);
1199 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1201 /* Install kernel pagetables */
1202 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1204 /* Add to the list of all user pmaps */
1205 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1211 * This routine is called if the desired page table page does not exist.
1213 * If page table page allocation fails, this routine may sleep before
1214 * returning NULL. It sleeps only if a lock pointer was given.
1216 * Note: If a page allocation fails at page table level two or three,
1217 * one or two pages may be held during the wait, only to be released
1218 * afterwards. This conservative approach is easily argued to avoid
1222 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1224 vm_page_t m, /*pdppg, */pdpg;
1229 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1232 * Allocate a page table page.
1234 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1235 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1236 if (lockp != NULL) {
1237 RELEASE_PV_LIST_LOCK(lockp);
1239 rw_runlock(&pvh_global_lock);
1241 rw_rlock(&pvh_global_lock);
1246 * Indicate the need to retry. While waiting, the page table
1247 * page may have been allocated.
1252 if ((m->flags & PG_ZERO) == 0)
1256 * Map the pagetable page into the process address space, if
1257 * it isn't already there.
1260 if (ptepindex >= NUPDE) {
1262 vm_pindex_t l1index;
1264 l1index = ptepindex - NUPDE;
1265 l1 = &pmap->pm_l1[l1index];
1267 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1269 entry |= (pn << PTE_PPN0_S);
1270 pmap_load_store(l1, entry);
1271 pmap_distribute_l1(pmap, l1index, entry);
1273 vm_pindex_t l1index;
1274 pd_entry_t *l1, *l2;
1276 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1277 l1 = &pmap->pm_l1[l1index];
1278 if (pmap_load(l1) == 0) {
1279 /* recurse for allocating page dir */
1280 if (_pmap_alloc_l3(pmap, NUPDE + l1index,
1282 vm_page_unwire_noq(m);
1283 vm_page_free_zero(m);
1287 phys = PTE_TO_PHYS(pmap_load(l1));
1288 pdpg = PHYS_TO_VM_PAGE(phys);
1292 phys = PTE_TO_PHYS(pmap_load(l1));
1293 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1294 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1296 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1298 entry |= (pn << PTE_PPN0_S);
1299 pmap_load_store(l2, entry);
1302 pmap_resident_count_inc(pmap, 1);
1308 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1310 vm_pindex_t ptepindex;
1316 * Calculate pagetable page index
1318 ptepindex = pmap_l2_pindex(va);
1321 * Get the page directory entry
1323 l2 = pmap_l2(pmap, va);
1326 * If the page table page is mapped, we just increment the
1327 * hold count, and activate it.
1329 if (l2 != NULL && pmap_load(l2) != 0) {
1330 phys = PTE_TO_PHYS(pmap_load(l2));
1331 m = PHYS_TO_VM_PAGE(phys);
1335 * Here if the pte page isn't mapped, or if it has been
1338 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1339 if (m == NULL && lockp != NULL)
1346 /***************************************************
1347 * Pmap allocation/deallocation routines.
1348 ***************************************************/
1351 * Release any resources held by the given physical map.
1352 * Called when a pmap initialized by pmap_pinit is being released.
1353 * Should only be called if the map contains no valid mappings.
1356 pmap_release(pmap_t pmap)
1360 KASSERT(pmap->pm_stats.resident_count == 0,
1361 ("pmap_release: pmap resident count %ld != 0",
1362 pmap->pm_stats.resident_count));
1364 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1365 vm_page_unwire_noq(m);
1366 vm_page_free_zero(m);
1368 /* Remove pmap from the allpmaps list */
1369 LIST_REMOVE(pmap, pm_list);
1371 /* Remove kernel pagetables */
1372 bzero(pmap->pm_l1, PAGE_SIZE);
1377 kvm_size(SYSCTL_HANDLER_ARGS)
1379 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1381 return sysctl_handle_long(oidp, &ksize, 0, req);
1383 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1384 0, 0, kvm_size, "LU", "Size of KVM");
1387 kvm_free(SYSCTL_HANDLER_ARGS)
1389 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1391 return sysctl_handle_long(oidp, &kfree, 0, req);
1393 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1394 0, 0, kvm_free, "LU", "Amount of KVM free");
1398 * grow the number of kernel page table entries, if needed
1401 pmap_growkernel(vm_offset_t addr)
1405 pd_entry_t *l1, *l2;
1409 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1411 addr = roundup2(addr, L2_SIZE);
1412 if (addr - 1 >= vm_map_max(kernel_map))
1413 addr = vm_map_max(kernel_map);
1414 while (kernel_vm_end < addr) {
1415 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1416 if (pmap_load(l1) == 0) {
1417 /* We need a new PDP entry */
1418 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1419 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1420 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1422 panic("pmap_growkernel: no memory to grow kernel");
1423 if ((nkpg->flags & PG_ZERO) == 0)
1424 pmap_zero_page(nkpg);
1425 paddr = VM_PAGE_TO_PHYS(nkpg);
1427 pn = (paddr / PAGE_SIZE);
1429 entry |= (pn << PTE_PPN0_S);
1430 pmap_load_store(l1, entry);
1431 pmap_distribute_l1(kernel_pmap,
1432 pmap_l1_index(kernel_vm_end), entry);
1433 continue; /* try again */
1435 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1436 if ((pmap_load(l2) & PTE_V) != 0 &&
1437 (pmap_load(l2) & PTE_RWX) == 0) {
1438 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1439 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1440 kernel_vm_end = vm_map_max(kernel_map);
1446 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1447 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1450 panic("pmap_growkernel: no memory to grow kernel");
1451 if ((nkpg->flags & PG_ZERO) == 0) {
1452 pmap_zero_page(nkpg);
1454 paddr = VM_PAGE_TO_PHYS(nkpg);
1456 pn = (paddr / PAGE_SIZE);
1458 entry |= (pn << PTE_PPN0_S);
1459 pmap_load_store(l2, entry);
1461 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1463 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1464 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1465 kernel_vm_end = vm_map_max(kernel_map);
1472 /***************************************************
1473 * page management routines.
1474 ***************************************************/
1476 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1477 CTASSERT(_NPCM == 3);
1478 CTASSERT(_NPCPV == 168);
1480 static __inline struct pv_chunk *
1481 pv_to_chunk(pv_entry_t pv)
1484 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1487 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1489 #define PC_FREE0 0xfffffffffffffffful
1490 #define PC_FREE1 0xfffffffffffffffful
1491 #define PC_FREE2 0x000000fffffffffful
1493 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1497 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1499 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1500 "Current number of pv entry chunks");
1501 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1502 "Current number of pv entry chunks allocated");
1503 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1504 "Current number of pv entry chunks frees");
1505 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1506 "Number of times tried to get a chunk page but failed.");
1508 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1509 static int pv_entry_spare;
1511 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1512 "Current number of pv entry frees");
1513 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1514 "Current number of pv entry allocs");
1515 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1516 "Current number of pv entries");
1517 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1518 "Current number of spare pv entries");
1523 * We are in a serious low memory condition. Resort to
1524 * drastic measures to free some pages so we can allocate
1525 * another pv entry chunk.
1527 * Returns NULL if PV entries were reclaimed from the specified pmap.
1529 * We do not, however, unmap 2mpages because subsequent accesses will
1530 * allocate per-page pv entries until repromotion occurs, thereby
1531 * exacerbating the shortage of free pv entries.
1534 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1537 panic("RISCVTODO: reclaim_pv_chunk");
1541 * free the pv_entry back to the free list
1544 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1546 struct pv_chunk *pc;
1547 int idx, field, bit;
1549 rw_assert(&pvh_global_lock, RA_LOCKED);
1550 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1551 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1552 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1553 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1554 pc = pv_to_chunk(pv);
1555 idx = pv - &pc->pc_pventry[0];
1558 pc->pc_map[field] |= 1ul << bit;
1559 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1560 pc->pc_map[2] != PC_FREE2) {
1561 /* 98% of the time, pc is already at the head of the list. */
1562 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1563 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1564 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1568 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1573 free_pv_chunk(struct pv_chunk *pc)
1577 mtx_lock(&pv_chunks_mutex);
1578 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1579 mtx_unlock(&pv_chunks_mutex);
1580 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1581 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1582 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1583 /* entire chunk is free, return it */
1584 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1585 #if 0 /* TODO: For minidump */
1586 dump_drop_page(m->phys_addr);
1588 vm_page_unwire(m, PQ_NONE);
1593 * Returns a new PV entry, allocating a new PV chunk from the system when
1594 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1595 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1598 * The given PV list lock may be released.
1601 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1605 struct pv_chunk *pc;
1608 rw_assert(&pvh_global_lock, RA_LOCKED);
1609 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1610 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1612 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1614 for (field = 0; field < _NPCM; field++) {
1615 if (pc->pc_map[field]) {
1616 bit = ffsl(pc->pc_map[field]) - 1;
1620 if (field < _NPCM) {
1621 pv = &pc->pc_pventry[field * 64 + bit];
1622 pc->pc_map[field] &= ~(1ul << bit);
1623 /* If this was the last item, move it to tail */
1624 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1625 pc->pc_map[2] == 0) {
1626 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1627 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1630 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1631 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1635 /* No free items, allocate another chunk */
1636 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1639 if (lockp == NULL) {
1640 PV_STAT(pc_chunk_tryfail++);
1643 m = reclaim_pv_chunk(pmap, lockp);
1647 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1648 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1649 #if 0 /* TODO: This is for minidump */
1650 dump_add_page(m->phys_addr);
1652 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1654 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1655 pc->pc_map[1] = PC_FREE1;
1656 pc->pc_map[2] = PC_FREE2;
1657 mtx_lock(&pv_chunks_mutex);
1658 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1659 mtx_unlock(&pv_chunks_mutex);
1660 pv = &pc->pc_pventry[0];
1661 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1662 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1663 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1668 * First find and then remove the pv entry for the specified pmap and virtual
1669 * address from the specified pv list. Returns the pv entry if found and NULL
1670 * otherwise. This operation can be performed on pv lists for either 4KB or
1671 * 2MB page mappings.
1673 static __inline pv_entry_t
1674 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1678 rw_assert(&pvh_global_lock, RA_LOCKED);
1679 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1680 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1681 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1690 * First find and then destroy the pv entry for the specified pmap and virtual
1691 * address. This operation can be performed on pv lists for either 4KB or 2MB
1695 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1699 pv = pmap_pvh_remove(pvh, pmap, va);
1701 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
1702 free_pv_entry(pmap, pv);
1706 * Conditionally create the PV entry for a 4KB page mapping if the required
1707 * memory can be allocated without resorting to reclamation.
1710 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1711 struct rwlock **lockp)
1715 rw_assert(&pvh_global_lock, RA_LOCKED);
1716 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1717 /* Pass NULL instead of the lock pointer to disable reclamation. */
1718 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1720 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1721 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1729 * pmap_remove_l3: do the things to unmap a page in a process
1732 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
1733 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
1739 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1740 old_l3 = pmap_load_clear(l3);
1741 pmap_invalidate_page(pmap, va);
1742 if (old_l3 & PTE_SW_WIRED)
1743 pmap->pm_stats.wired_count -= 1;
1744 pmap_resident_count_dec(pmap, 1);
1745 if (old_l3 & PTE_SW_MANAGED) {
1746 phys = PTE_TO_PHYS(old_l3);
1747 m = PHYS_TO_VM_PAGE(phys);
1748 if ((old_l3 & PTE_D) != 0)
1751 vm_page_aflag_set(m, PGA_REFERENCED);
1752 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1753 pmap_pvh_free(&m->md, pmap, va);
1756 return (pmap_unuse_l3(pmap, va, l2e, free));
1760 * Remove the given range of addresses from the specified map.
1762 * It is assumed that the start and end are properly
1763 * rounded to the page size.
1766 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1768 struct rwlock *lock;
1769 vm_offset_t va, va_next;
1770 pd_entry_t *l1, *l2;
1771 pt_entry_t l3_pte, *l3;
1772 struct spglist free;
1775 * Perform an unsynchronized read. This is, however, safe.
1777 if (pmap->pm_stats.resident_count == 0)
1782 rw_rlock(&pvh_global_lock);
1786 for (; sva < eva; sva = va_next) {
1787 if (pmap->pm_stats.resident_count == 0)
1790 l1 = pmap_l1(pmap, sva);
1791 if (pmap_load(l1) == 0) {
1792 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1799 * Calculate index for next page table.
1801 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1805 l2 = pmap_l1_to_l2(l1, sva);
1809 l3_pte = pmap_load(l2);
1812 * Weed out invalid mappings.
1816 if ((pmap_load(l2) & PTE_RX) != 0)
1820 * Limit our scan to either the end of the va represented
1821 * by the current page table page, or to the end of the
1822 * range being removed.
1828 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
1831 panic("l3 == NULL");
1832 if (pmap_load(l3) == 0) {
1833 if (va != va_next) {
1834 pmap_invalidate_range(pmap, va, sva);
1841 if (pmap_remove_l3(pmap, l3, sva, l3_pte, &free,
1848 pmap_invalidate_range(pmap, va, sva);
1852 rw_runlock(&pvh_global_lock);
1854 vm_page_free_pages_toq(&free, false);
1858 * Routine: pmap_remove_all
1860 * Removes this physical page from
1861 * all physical maps in which it resides.
1862 * Reflects back modify bits to the pager.
1865 * Original versions of this routine were very
1866 * inefficient because they iteratively called
1867 * pmap_remove (slow...)
1871 pmap_remove_all(vm_page_t m)
1875 pt_entry_t *l3, tl3;
1876 pd_entry_t *l2, tl2;
1877 struct spglist free;
1879 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1880 ("pmap_remove_all: page %p is not managed", m));
1882 rw_wlock(&pvh_global_lock);
1883 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1886 pmap_resident_count_dec(pmap, 1);
1887 l2 = pmap_l2(pmap, pv->pv_va);
1888 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
1889 tl2 = pmap_load(l2);
1891 KASSERT((tl2 & PTE_RX) == 0,
1892 ("pmap_remove_all: found a table when expecting "
1893 "a block in %p's pv list", m));
1895 l3 = pmap_l2_to_l3(l2, pv->pv_va);
1896 tl3 = pmap_load_clear(l3);
1897 pmap_invalidate_page(pmap, pv->pv_va);
1898 if (tl3 & PTE_SW_WIRED)
1899 pmap->pm_stats.wired_count--;
1900 if ((tl3 & PTE_A) != 0)
1901 vm_page_aflag_set(m, PGA_REFERENCED);
1904 * Update the vm_page_t clean and reference bits.
1906 if ((tl3 & PTE_D) != 0)
1908 pmap_unuse_l3(pmap, pv->pv_va, pmap_load(l2), &free);
1909 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
1911 free_pv_entry(pmap, pv);
1914 vm_page_aflag_clear(m, PGA_WRITEABLE);
1915 rw_wunlock(&pvh_global_lock);
1916 vm_page_free_pages_toq(&free, false);
1920 * Set the physical protection on the
1921 * specified range of this map as requested.
1924 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1926 vm_offset_t va_next;
1927 pd_entry_t *l1, *l2;
1928 pt_entry_t *l3p, l3;
1931 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1932 pmap_remove(pmap, sva, eva);
1936 if ((prot & VM_PROT_WRITE) == VM_PROT_WRITE)
1940 for (; sva < eva; sva = va_next) {
1942 l1 = pmap_l1(pmap, sva);
1943 if (pmap_load(l1) == 0) {
1944 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
1950 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
1954 l2 = pmap_l1_to_l2(l1, sva);
1957 if (pmap_load(l2) == 0)
1959 if ((pmap_load(l2) & PTE_RX) != 0)
1965 for (l3p = pmap_l2_to_l3(l2, sva); sva != va_next; l3p++,
1967 l3 = pmap_load(l3p);
1968 if ((l3 & PTE_V) != 0) {
1969 entry = pmap_load(l3p);
1971 pmap_load_store(l3p, entry);
1972 /* XXX: Use pmap_invalidate_range */
1973 pmap_invalidate_page(pmap, sva);
1981 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1987 l3 = pmap_l3(pmap, va);
1991 orig_l3 = pmap_load(l3);
1992 if ((orig_l3 & PTE_V) == 0 ||
1993 ((prot & VM_PROT_WRITE) != 0 && (orig_l3 & PTE_W) == 0) ||
1994 ((prot & VM_PROT_READ) != 0 && (orig_l3 & PTE_R) == 0))
1997 new_l3 = orig_l3 | PTE_A;
1998 if ((prot & VM_PROT_WRITE) != 0)
2001 if (orig_l3 != new_l3) {
2002 pmap_load_store(l3, new_l3);
2003 pmap_invalidate_page(pmap, va);
2008 * XXX: This case should never happen since it means
2009 * the PTE shouldn't have resulted in a fault.
2016 * Insert the given physical page (p) at
2017 * the specified virtual address (v) in the
2018 * target physical map with the protection requested.
2020 * If specified, the page will be wired down, meaning
2021 * that the related pte can not be reclaimed.
2023 * NB: This is the only routine which MAY NOT lazy-evaluate
2024 * or lose information. That is, this routine must actually
2025 * insert this page into the given map NOW.
2028 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2029 u_int flags, int8_t psind __unused)
2031 struct rwlock *lock;
2032 pd_entry_t *l1, *l2;
2033 pt_entry_t new_l3, orig_l3;
2036 vm_paddr_t opa, pa, l2_pa, l3_pa;
2037 vm_page_t mpte, om, l2_m, l3_m;
2044 va = trunc_page(va);
2045 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2046 VM_OBJECT_ASSERT_LOCKED(m->object);
2047 pa = VM_PAGE_TO_PHYS(m);
2048 pn = (pa / PAGE_SIZE);
2050 new_l3 = PTE_V | PTE_R | PTE_X;
2051 if (prot & VM_PROT_WRITE)
2053 if ((va >> 63) == 0)
2056 new_l3 |= (pn << PTE_PPN0_S);
2057 if ((flags & PMAP_ENTER_WIRED) != 0)
2058 new_l3 |= PTE_SW_WIRED;
2059 if ((m->oflags & VPO_UNMANAGED) == 0)
2060 new_l3 |= PTE_SW_MANAGED;
2062 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2067 rw_rlock(&pvh_global_lock);
2070 if (va < VM_MAXUSER_ADDRESS) {
2071 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2072 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2073 if (mpte == NULL && nosleep) {
2074 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2077 rw_runlock(&pvh_global_lock);
2079 return (KERN_RESOURCE_SHORTAGE);
2081 l3 = pmap_l3(pmap, va);
2083 l3 = pmap_l3(pmap, va);
2084 /* TODO: This is not optimal, but should mostly work */
2086 l2 = pmap_l2(pmap, va);
2088 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2089 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2092 panic("pmap_enter: l2 pte_m == NULL");
2093 if ((l2_m->flags & PG_ZERO) == 0)
2094 pmap_zero_page(l2_m);
2096 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2097 l2_pn = (l2_pa / PAGE_SIZE);
2099 l1 = pmap_l1(pmap, va);
2101 entry |= (l2_pn << PTE_PPN0_S);
2102 pmap_load_store(l1, entry);
2103 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2104 l2 = pmap_l1_to_l2(l1, va);
2108 ("No l2 table after allocating one"));
2110 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2111 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2113 panic("pmap_enter: l3 pte_m == NULL");
2114 if ((l3_m->flags & PG_ZERO) == 0)
2115 pmap_zero_page(l3_m);
2117 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2118 l3_pn = (l3_pa / PAGE_SIZE);
2120 entry |= (l3_pn << PTE_PPN0_S);
2121 pmap_load_store(l2, entry);
2122 l3 = pmap_l2_to_l3(l2, va);
2124 pmap_invalidate_page(pmap, va);
2127 orig_l3 = pmap_load(l3);
2128 opa = PTE_TO_PHYS(orig_l3);
2132 * Is the specified virtual address already mapped?
2134 if ((orig_l3 & PTE_V) != 0) {
2136 * Wiring change, just update stats. We don't worry about
2137 * wiring PT pages as they remain resident as long as there
2138 * are valid mappings in them. Hence, if a user page is wired,
2139 * the PT page will be also.
2141 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2142 (orig_l3 & PTE_SW_WIRED) == 0)
2143 pmap->pm_stats.wired_count++;
2144 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2145 (orig_l3 & PTE_SW_WIRED) != 0)
2146 pmap->pm_stats.wired_count--;
2149 * Remove the extra PT page reference.
2153 KASSERT(mpte->wire_count > 0,
2154 ("pmap_enter: missing reference to page table page,"
2159 * Has the physical page changed?
2163 * No, might be a protection or wiring change.
2165 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2166 (new_l3 & PTE_W) != 0)
2167 vm_page_aflag_set(m, PGA_WRITEABLE);
2172 * The physical page has changed. Temporarily invalidate
2173 * the mapping. This ensures that all threads sharing the
2174 * pmap keep a consistent view of the mapping, which is
2175 * necessary for the correct handling of COW faults. It
2176 * also permits reuse of the old mapping's PV entry,
2177 * avoiding an allocation.
2179 * For consistency, handle unmanaged mappings the same way.
2181 orig_l3 = pmap_load_clear(l3);
2182 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2183 ("pmap_enter: unexpected pa update for %#lx", va));
2184 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2185 om = PHYS_TO_VM_PAGE(opa);
2188 * The pmap lock is sufficient to synchronize with
2189 * concurrent calls to pmap_page_test_mappings() and
2190 * pmap_ts_referenced().
2192 if ((orig_l3 & PTE_D) != 0)
2194 if ((orig_l3 & PTE_A) != 0)
2195 vm_page_aflag_set(om, PGA_REFERENCED);
2196 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2197 pv = pmap_pvh_remove(&om->md, pmap, va);
2198 if ((new_l3 & PTE_SW_MANAGED) == 0)
2199 free_pv_entry(pmap, pv);
2200 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2201 TAILQ_EMPTY(&om->md.pv_list))
2202 vm_page_aflag_clear(om, PGA_WRITEABLE);
2204 pmap_invalidate_page(pmap, va);
2208 * Increment the counters.
2210 if ((new_l3 & PTE_SW_WIRED) != 0)
2211 pmap->pm_stats.wired_count++;
2212 pmap_resident_count_inc(pmap, 1);
2215 * Enter on the PV list if part of our managed memory.
2217 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2219 pv = get_pv_entry(pmap, &lock);
2222 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2223 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2225 if ((new_l3 & PTE_W) != 0)
2226 vm_page_aflag_set(m, PGA_WRITEABLE);
2231 * Sync the i-cache on all harts before updating the PTE
2232 * if the new PTE is executable.
2234 if (prot & VM_PROT_EXECUTE)
2235 pmap_sync_icache(pmap, va, PAGE_SIZE);
2238 * Update the L3 entry.
2241 orig_l3 = pmap_load_store(l3, new_l3);
2242 pmap_invalidate_page(pmap, va);
2243 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2244 ("pmap_enter: invalid update"));
2245 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2246 (PTE_D | PTE_SW_MANAGED))
2249 pmap_load_store(l3, new_l3);
2254 rw_runlock(&pvh_global_lock);
2256 return (KERN_SUCCESS);
2260 * Maps a sequence of resident pages belonging to the same object.
2261 * The sequence begins with the given page m_start. This page is
2262 * mapped at the given virtual address start. Each subsequent page is
2263 * mapped at a virtual address that is offset from start by the same
2264 * amount as the page is offset from m_start within the object. The
2265 * last page in the sequence is the page with the largest offset from
2266 * m_start that can be mapped at a virtual address less than the given
2267 * virtual address end. Not every virtual page between start and end
2268 * is mapped; only those for which a resident page exists with the
2269 * corresponding offset from m_start are mapped.
2272 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2273 vm_page_t m_start, vm_prot_t prot)
2275 struct rwlock *lock;
2278 vm_pindex_t diff, psize;
2280 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2282 psize = atop(end - start);
2286 rw_rlock(&pvh_global_lock);
2288 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2289 va = start + ptoa(diff);
2290 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte, &lock);
2291 m = TAILQ_NEXT(m, listq);
2295 rw_runlock(&pvh_global_lock);
2300 * this code makes some *MAJOR* assumptions:
2301 * 1. Current pmap & pmap exists.
2304 * 4. No page table pages.
2305 * but is *MUCH* faster than pmap_enter...
2309 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2311 struct rwlock *lock;
2314 rw_rlock(&pvh_global_lock);
2316 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
2319 rw_runlock(&pvh_global_lock);
2324 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2325 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
2327 struct spglist free;
2335 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2336 (m->oflags & VPO_UNMANAGED) != 0,
2337 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2338 rw_assert(&pvh_global_lock, RA_LOCKED);
2339 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2341 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
2343 * In the case that a page table page is not
2344 * resident, we are creating it here.
2346 if (va < VM_MAXUSER_ADDRESS) {
2347 vm_pindex_t l2pindex;
2350 * Calculate pagetable page index
2352 l2pindex = pmap_l2_pindex(va);
2353 if (mpte && (mpte->pindex == l2pindex)) {
2359 l2 = pmap_l2(pmap, va);
2362 * If the page table page is mapped, we just increment
2363 * the hold count, and activate it. Otherwise, we
2364 * attempt to allocate a page table page. If this
2365 * attempt fails, we don't retry. Instead, we give up.
2367 if (l2 != NULL && pmap_load(l2) != 0) {
2368 phys = PTE_TO_PHYS(pmap_load(l2));
2369 mpte = PHYS_TO_VM_PAGE(phys);
2373 * Pass NULL instead of the PV list lock
2374 * pointer, because we don't intend to sleep.
2376 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
2381 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
2382 l3 = &l3[pmap_l3_index(va)];
2385 l3 = pmap_l3(kernel_pmap, va);
2388 panic("pmap_enter_quick_locked: No l3");
2389 if (pmap_load(l3) != 0) {
2398 * Enter on the PV list if part of our managed memory.
2400 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2401 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
2404 if (pmap_unwire_l3(pmap, va, mpte, &free)) {
2405 pmap_invalidate_page(pmap, va);
2406 vm_page_free_pages_toq(&free, false);
2414 * Increment counters
2416 pmap_resident_count_inc(pmap, 1);
2418 pa = VM_PAGE_TO_PHYS(m);
2419 pn = (pa / PAGE_SIZE);
2421 entry = (PTE_V | PTE_R | PTE_X);
2422 entry |= (pn << PTE_PPN0_S);
2425 * Now validate mapping with RO protection
2427 if ((m->oflags & VPO_UNMANAGED) == 0)
2428 entry |= PTE_SW_MANAGED;
2431 * Sync the i-cache on all harts before updating the PTE
2432 * if the new PTE is executable.
2434 if (prot & VM_PROT_EXECUTE)
2435 pmap_sync_icache(pmap, va, PAGE_SIZE);
2437 pmap_load_store(l3, entry);
2439 pmap_invalidate_page(pmap, va);
2444 * This code maps large physical mmap regions into the
2445 * processor address space. Note that some shortcuts
2446 * are taken, but the code works.
2449 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2450 vm_pindex_t pindex, vm_size_t size)
2453 VM_OBJECT_ASSERT_WLOCKED(object);
2454 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2455 ("pmap_object_init_pt: non-device object"));
2459 * Clear the wired attribute from the mappings for the specified range of
2460 * addresses in the given pmap. Every valid mapping within that range
2461 * must have the wired attribute set. In contrast, invalid mappings
2462 * cannot have the wired attribute set, so they are ignored.
2464 * The wired attribute of the page table entry is not a hardware feature,
2465 * so there is no need to invalidate any TLB entries.
2468 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2470 vm_offset_t va_next;
2471 pd_entry_t *l1, *l2;
2473 boolean_t pv_lists_locked;
2475 pv_lists_locked = FALSE;
2477 for (; sva < eva; sva = va_next) {
2478 l1 = pmap_l1(pmap, sva);
2479 if (pmap_load(l1) == 0) {
2480 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2486 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2490 l2 = pmap_l1_to_l2(l1, sva);
2491 if (pmap_load(l2) == 0)
2496 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2498 if (pmap_load(l3) == 0)
2500 if ((pmap_load(l3) & PTE_SW_WIRED) == 0)
2501 panic("pmap_unwire: l3 %#jx is missing "
2502 "PTE_SW_WIRED", (uintmax_t)*l3);
2505 * PG_W must be cleared atomically. Although the pmap
2506 * lock synchronizes access to PG_W, another processor
2507 * could be setting PG_M and/or PG_A concurrently.
2509 atomic_clear_long(l3, PTE_SW_WIRED);
2510 pmap->pm_stats.wired_count--;
2513 if (pv_lists_locked)
2514 rw_runlock(&pvh_global_lock);
2519 * Copy the range specified by src_addr/len
2520 * from the source map to the range dst_addr/len
2521 * in the destination map.
2523 * This routine is only advisory and need not do anything.
2527 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2528 vm_offset_t src_addr)
2534 * pmap_zero_page zeros the specified hardware page by mapping
2535 * the page into KVM and using bzero to clear its contents.
2538 pmap_zero_page(vm_page_t m)
2540 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2542 pagezero((void *)va);
2546 * pmap_zero_page_area zeros the specified hardware page by mapping
2547 * the page into KVM and using bzero to clear its contents.
2549 * off and size may not cover an area beyond a single hardware page.
2552 pmap_zero_page_area(vm_page_t m, int off, int size)
2554 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
2556 if (off == 0 && size == PAGE_SIZE)
2557 pagezero((void *)va);
2559 bzero((char *)va + off, size);
2563 * pmap_copy_page copies the specified (machine independent)
2564 * page by mapping the page into virtual memory and using
2565 * bcopy to copy the page, one machine dependent page at a
2569 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
2571 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
2572 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
2574 pagecopy((void *)src, (void *)dst);
2577 int unmapped_buf_allowed = 1;
2580 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2581 vm_offset_t b_offset, int xfersize)
2585 vm_paddr_t p_a, p_b;
2586 vm_offset_t a_pg_offset, b_pg_offset;
2589 while (xfersize > 0) {
2590 a_pg_offset = a_offset & PAGE_MASK;
2591 m_a = ma[a_offset >> PAGE_SHIFT];
2592 p_a = m_a->phys_addr;
2593 b_pg_offset = b_offset & PAGE_MASK;
2594 m_b = mb[b_offset >> PAGE_SHIFT];
2595 p_b = m_b->phys_addr;
2596 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2597 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2598 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
2599 panic("!DMAP a %lx", p_a);
2601 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
2603 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
2604 panic("!DMAP b %lx", p_b);
2606 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
2608 bcopy(a_cp, b_cp, cnt);
2616 pmap_quick_enter_page(vm_page_t m)
2619 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
2623 pmap_quick_remove_page(vm_offset_t addr)
2628 * Returns true if the pmap's pv is one of the first
2629 * 16 pvs linked to from this page. This count may
2630 * be changed upwards or downwards in the future; it
2631 * is only necessary that true be returned for a small
2632 * subset of pmaps for proper page aging.
2635 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2637 struct rwlock *lock;
2642 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2643 ("pmap_page_exists_quick: page %p is not managed", m));
2645 rw_rlock(&pvh_global_lock);
2646 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2648 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2649 if (PV_PMAP(pv) == pmap) {
2658 rw_runlock(&pvh_global_lock);
2663 * pmap_page_wired_mappings:
2665 * Return the number of managed mappings to the given physical page
2669 pmap_page_wired_mappings(vm_page_t m)
2671 struct rwlock *lock;
2677 if ((m->oflags & VPO_UNMANAGED) != 0)
2679 rw_rlock(&pvh_global_lock);
2680 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2684 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2686 if (!PMAP_TRYLOCK(pmap)) {
2687 md_gen = m->md.pv_gen;
2691 if (md_gen != m->md.pv_gen) {
2696 l3 = pmap_l3(pmap, pv->pv_va);
2697 if (l3 != NULL && (pmap_load(l3) & PTE_SW_WIRED) != 0)
2702 rw_runlock(&pvh_global_lock);
2707 * Destroy all managed, non-wired mappings in the given user-space
2708 * pmap. This pmap cannot be active on any processor besides the
2711 * This function cannot be applied to the kernel pmap. Moreover, it
2712 * is not intended for general use. It is only to be used during
2713 * process termination. Consequently, it can be implemented in ways
2714 * that make it faster than pmap_remove(). First, it can more quickly
2715 * destroy mappings by iterating over the pmap's collection of PV
2716 * entries, rather than searching the page table. Second, it doesn't
2717 * have to test and clear the page table entries atomically, because
2718 * no processor is currently accessing the user address space. In
2719 * particular, a page table entry's dirty bit won't change state once
2720 * this function starts.
2723 pmap_remove_pages(pmap_t pmap)
2725 pd_entry_t ptepde, *l2;
2726 pt_entry_t *l3, tl3;
2727 struct spglist free;
2730 struct pv_chunk *pc, *npc;
2731 struct rwlock *lock;
2733 uint64_t inuse, bitmask;
2734 int allfree, field, freed, idx;
2740 rw_rlock(&pvh_global_lock);
2742 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2745 for (field = 0; field < _NPCM; field++) {
2746 inuse = ~pc->pc_map[field] & pc_freemask[field];
2747 while (inuse != 0) {
2748 bit = ffsl(inuse) - 1;
2749 bitmask = 1UL << bit;
2750 idx = field * 64 + bit;
2751 pv = &pc->pc_pventry[idx];
2754 l2 = pmap_l2(pmap, pv->pv_va);
2755 ptepde = pmap_load(l2);
2756 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2757 tl3 = pmap_load(l3);
2760 * We cannot remove wired pages from a process' mapping at this time
2762 if (tl3 & PTE_SW_WIRED) {
2767 pa = PTE_TO_PHYS(tl3);
2768 m = PHYS_TO_VM_PAGE(pa);
2769 KASSERT(m->phys_addr == pa,
2770 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2771 m, (uintmax_t)m->phys_addr,
2774 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
2775 m < &vm_page_array[vm_page_array_size],
2776 ("pmap_remove_pages: bad l3 %#jx",
2779 pmap_load_clear(l3);
2780 pmap_invalidate_page(pmap, pv->pv_va);
2783 * Update the vm_page_t clean/reference bits.
2785 if ((tl3 & PTE_D) != 0)
2788 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
2791 pc->pc_map[field] |= bitmask;
2793 pmap_resident_count_dec(pmap, 1);
2794 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2797 pmap_unuse_l3(pmap, pv->pv_va, ptepde, &free);
2801 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
2802 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
2803 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
2805 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2809 pmap_invalidate_all(pmap);
2812 rw_runlock(&pvh_global_lock);
2814 vm_page_free_pages_toq(&free, false);
2818 * This is used to check if a page has been accessed or modified. As we
2819 * don't have a bit to see if it has been modified we have to assume it
2820 * has been if the page is read/write.
2823 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
2825 struct rwlock *lock;
2827 pt_entry_t *l3, mask, value;
2833 rw_rlock(&pvh_global_lock);
2834 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2837 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2839 if (!PMAP_TRYLOCK(pmap)) {
2840 md_gen = m->md.pv_gen;
2844 if (md_gen != m->md.pv_gen) {
2849 l3 = pmap_l3(pmap, pv->pv_va);
2863 mask |= ATTR_AP_RW_BIT;
2864 value |= ATTR_AP(ATTR_AP_RW);
2867 mask |= ATTR_AF | ATTR_DESCR_MASK;
2868 value |= ATTR_AF | L3_PAGE;
2872 rv = (pmap_load(l3) & mask) == value;
2879 rw_runlock(&pvh_global_lock);
2886 * Return whether or not the specified physical page was modified
2887 * in any physical maps.
2890 pmap_is_modified(vm_page_t m)
2893 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2894 ("pmap_is_modified: page %p is not managed", m));
2897 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2898 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2899 * is clear, no PTEs can have PG_M set.
2901 VM_OBJECT_ASSERT_WLOCKED(m->object);
2902 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2904 return (pmap_page_test_mappings(m, FALSE, TRUE));
2908 * pmap_is_prefaultable:
2910 * Return whether or not the specified virtual address is eligible
2914 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2921 l3 = pmap_l3(pmap, addr);
2922 if (l3 != NULL && pmap_load(l3) != 0) {
2930 * pmap_is_referenced:
2932 * Return whether or not the specified physical page was referenced
2933 * in any physical maps.
2936 pmap_is_referenced(vm_page_t m)
2939 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2940 ("pmap_is_referenced: page %p is not managed", m));
2941 return (pmap_page_test_mappings(m, TRUE, FALSE));
2945 * Clear the write and modified bits in each of the given page's mappings.
2948 pmap_remove_write(vm_page_t m)
2951 struct rwlock *lock;
2953 pt_entry_t *l3, oldl3;
2957 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2958 ("pmap_remove_write: page %p is not managed", m));
2961 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2962 * set by another thread while the object is locked. Thus,
2963 * if PGA_WRITEABLE is clear, no page table entries need updating.
2965 VM_OBJECT_ASSERT_WLOCKED(m->object);
2966 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2968 rw_rlock(&pvh_global_lock);
2969 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
2972 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
2974 if (!PMAP_TRYLOCK(pmap)) {
2975 md_gen = m->md.pv_gen;
2979 if (md_gen != m->md.pv_gen) {
2985 l3 = pmap_l3(pmap, pv->pv_va);
2987 oldl3 = pmap_load(l3);
2989 if ((oldl3 & PTE_W) != 0) {
2990 newl3 = oldl3 & ~PTE_W;
2991 if (!atomic_cmpset_long(l3, oldl3, newl3))
2993 /* TODO: check for PTE_D? */
2994 if ((oldl3 & PTE_A) != 0)
2996 pmap_invalidate_page(pmap, pv->pv_va);
3001 vm_page_aflag_clear(m, PGA_WRITEABLE);
3002 rw_runlock(&pvh_global_lock);
3005 static __inline boolean_t
3006 safe_to_clear_referenced(pmap_t pmap, pt_entry_t pte)
3013 * pmap_ts_referenced:
3015 * Return a count of reference bits for a page, clearing those bits.
3016 * It is not necessary for every reference bit to be cleared, but it
3017 * is necessary that 0 only be returned when there are truly no
3018 * reference bits set.
3020 * As an optimization, update the page's dirty field if a modified bit is
3021 * found while counting reference bits. This opportunistic update can be
3022 * performed at low cost and can eliminate the need for some future calls
3023 * to pmap_is_modified(). However, since this function stops after
3024 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3025 * dirty pages. Those dirty pages will only be detected by a future call
3026 * to pmap_is_modified().
3029 pmap_ts_referenced(vm_page_t m)
3033 struct rwlock *lock;
3035 pt_entry_t *l3, old_l3;
3037 int cleared, md_gen, not_cleared;
3038 struct spglist free;
3040 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3041 ("pmap_ts_referenced: page %p is not managed", m));
3044 pa = VM_PAGE_TO_PHYS(m);
3045 lock = PHYS_TO_PV_LIST_LOCK(pa);
3046 rw_rlock(&pvh_global_lock);
3050 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
3057 if (!PMAP_TRYLOCK(pmap)) {
3058 md_gen = m->md.pv_gen;
3062 if (md_gen != m->md.pv_gen) {
3067 l2 = pmap_l2(pmap, pv->pv_va);
3069 KASSERT((pmap_load(l2) & PTE_RX) == 0,
3070 ("pmap_ts_referenced: found an invalid l2 table"));
3072 l3 = pmap_l2_to_l3(l2, pv->pv_va);
3073 old_l3 = pmap_load(l3);
3074 if ((old_l3 & PTE_D) != 0)
3076 if ((old_l3 & PTE_A) != 0) {
3077 if (safe_to_clear_referenced(pmap, old_l3)) {
3079 * TODO: We don't handle the access flag
3080 * at all. We need to be able to set it in
3081 * the exception handler.
3083 panic("RISCVTODO: safe_to_clear_referenced\n");
3084 } else if ((old_l3 & PTE_SW_WIRED) == 0) {
3086 * Wired pages cannot be paged out so
3087 * doing accessed bit emulation for
3088 * them is wasted effort. We do the
3089 * hard work for unwired pages only.
3091 pmap_remove_l3(pmap, l3, pv->pv_va,
3092 pmap_load(l2), &free, &lock);
3093 pmap_invalidate_page(pmap, pv->pv_va);
3098 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3099 ("inconsistent pv lock %p %p for page %p",
3100 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3105 /* Rotate the PV list if it has more than one entry. */
3106 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3107 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3108 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3111 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
3112 not_cleared < PMAP_TS_REFERENCED_MAX);
3115 rw_runlock(&pvh_global_lock);
3116 vm_page_free_pages_toq(&free, false);
3117 return (cleared + not_cleared);
3121 * Apply the given advice to the specified range of addresses within the
3122 * given pmap. Depending on the advice, clear the referenced and/or
3123 * modified flags in each mapping and set the mapped page's dirty field.
3126 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3131 * Clear the modify bits on the specified physical page.
3134 pmap_clear_modify(vm_page_t m)
3137 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3138 ("pmap_clear_modify: page %p is not managed", m));
3139 VM_OBJECT_ASSERT_WLOCKED(m->object);
3140 KASSERT(!vm_page_xbusied(m),
3141 ("pmap_clear_modify: page %p is exclusive busied", m));
3144 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
3145 * If the object containing the page is locked and the page is not
3146 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
3148 if ((m->aflags & PGA_WRITEABLE) == 0)
3151 /* RISCVTODO: We lack support for tracking if a page is modified */
3155 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3158 return ((void *)PHYS_TO_DMAP(pa));
3162 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
3167 * Sets the memory attribute for the specified page.
3170 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3173 m->md.pv_memattr = ma;
3176 * RISCVTODO: Implement the below (from the amd64 pmap)
3177 * If "m" is a normal page, update its direct mapping. This update
3178 * can be relied upon to perform any cache operations that are
3179 * required for data coherence.
3181 if ((m->flags & PG_FICTITIOUS) == 0 &&
3182 PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
3183 panic("RISCVTODO: pmap_page_set_memattr");
3187 * perform the pmap work for mincore
3190 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3192 pt_entry_t *l2, *l3, tpte;
3202 l2 = pmap_l2(pmap, addr);
3203 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
3204 if ((tpte & (PTE_R | PTE_W | PTE_X)) != 0) {
3205 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
3206 val = MINCORE_INCORE | MINCORE_SUPER;
3208 l3 = pmap_l2_to_l3(l2, addr);
3209 tpte = pmap_load(l3);
3210 if ((tpte & PTE_V) == 0)
3212 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
3213 val = MINCORE_INCORE;
3216 if ((tpte & PTE_D) != 0)
3217 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
3218 if ((tpte & PTE_A) != 0)
3219 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
3220 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
3224 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
3225 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
3226 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
3227 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
3230 PA_UNLOCK_COND(*locked_pa);
3236 pmap_activate(struct thread *td)
3242 pmap = vmspace_pmap(td->td_proc->p_vmspace);
3243 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
3245 reg = SATP_MODE_SV39;
3246 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
3249 pmap_invalidate_all(pmap);
3254 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3259 * From the RISC-V User-Level ISA V2.2:
3261 * "To make a store to instruction memory visible to all
3262 * RISC-V harts, the writing hart has to execute a data FENCE
3263 * before requesting that all remote RISC-V harts execute a
3268 CPU_CLR(PCPU_GET(cpuid), &mask);
3270 sbi_remote_fence_i(mask.__bits);
3275 * Increase the starting virtual address of the given mapping if a
3276 * different alignment might result in more superpage mappings.
3279 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3280 vm_offset_t *addr, vm_size_t size)
3285 * Get the kernel virtual address of a set of physical pages. If there are
3286 * physical addresses not covered by the DMAP perform a transient mapping
3287 * that will be removed when calling pmap_unmap_io_transient.
3289 * \param page The pages the caller wishes to obtain the virtual
3290 * address on the kernel memory map.
3291 * \param vaddr On return contains the kernel virtual memory address
3292 * of the pages passed in the page parameter.
3293 * \param count Number of pages passed in.
3294 * \param can_fault TRUE if the thread using the mapped pages can take
3295 * page faults, FALSE otherwise.
3297 * \returns TRUE if the caller must call pmap_unmap_io_transient when
3298 * finished or FALSE otherwise.
3302 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3303 boolean_t can_fault)
3306 boolean_t needs_mapping;
3310 * Allocate any KVA space that we need, this is done in a separate
3311 * loop to prevent calling vmem_alloc while pinned.
3313 needs_mapping = FALSE;
3314 for (i = 0; i < count; i++) {
3315 paddr = VM_PAGE_TO_PHYS(page[i]);
3316 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
3317 error = vmem_alloc(kernel_arena, PAGE_SIZE,
3318 M_BESTFIT | M_WAITOK, &vaddr[i]);
3319 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
3320 needs_mapping = TRUE;
3322 vaddr[i] = PHYS_TO_DMAP(paddr);
3326 /* Exit early if everything is covered by the DMAP */
3332 for (i = 0; i < count; i++) {
3333 paddr = VM_PAGE_TO_PHYS(page[i]);
3334 if (paddr >= DMAP_MAX_PHYSADDR) {
3336 "pmap_map_io_transient: TODO: Map out of DMAP data");
3340 return (needs_mapping);
3344 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
3345 boolean_t can_fault)
3352 for (i = 0; i < count; i++) {
3353 paddr = VM_PAGE_TO_PHYS(page[i]);
3354 if (paddr >= DMAP_MAX_PHYSADDR) {
3355 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
3361 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
3364 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);