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MFC r348838:
[FreeBSD/FreeBSD.git] / sys / riscv / riscv / pmap.c
1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
3  *
4  * Copyright (c) 1991 Regents of the University of California.
5  * All rights reserved.
6  * Copyright (c) 1994 John S. Dyson
7  * All rights reserved.
8  * Copyright (c) 1994 David Greenman
9  * All rights reserved.
10  * Copyright (c) 2003 Peter Wemm
11  * All rights reserved.
12  * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13  * All rights reserved.
14  * Copyright (c) 2014 Andrew Turner
15  * All rights reserved.
16  * Copyright (c) 2014 The FreeBSD Foundation
17  * All rights reserved.
18  * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19  * All rights reserved.
20  *
21  * This code is derived from software contributed to Berkeley by
22  * the Systems Programming Group of the University of Utah Computer
23  * Science Department and William Jolitz of UUNET Technologies Inc.
24  *
25  * Portions of this software were developed by Andrew Turner under
26  * sponsorship from The FreeBSD Foundation.
27  *
28  * Portions of this software were developed by SRI International and the
29  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
31  *
32  * Portions of this software were developed by the University of Cambridge
33  * Computer Laboratory as part of the CTSRD Project, with support from the
34  * UK Higher Education Innovation Fund (HEIF).
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  * 3. All advertising materials mentioning features or use of this software
45  *    must display the following acknowledgement:
46  *      This product includes software developed by the University of
47  *      California, Berkeley and its contributors.
48  * 4. Neither the name of the University nor the names of its contributors
49  *    may be used to endorse or promote products derived from this software
50  *    without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62  * SUCH DAMAGE.
63  *
64  *      from:   @(#)pmap.c      7.7 (Berkeley)  5/12/91
65  */
66 /*-
67  * Copyright (c) 2003 Networks Associates Technology, Inc.
68  * All rights reserved.
69  *
70  * This software was developed for the FreeBSD Project by Jake Burkholder,
71  * Safeport Network Services, and Network Associates Laboratories, the
72  * Security Research Division of Network Associates, Inc. under
73  * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74  * CHATS research program.
75  *
76  * Redistribution and use in source and binary forms, with or without
77  * modification, are permitted provided that the following conditions
78  * are met:
79  * 1. Redistributions of source code must retain the above copyright
80  *    notice, this list of conditions and the following disclaimer.
81  * 2. Redistributions in binary form must reproduce the above copyright
82  *    notice, this list of conditions and the following disclaimer in the
83  *    documentation and/or other materials provided with the distribution.
84  *
85  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95  * SUCH DAMAGE.
96  */
97
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
100
101 /*
102  *      Manages physical address maps.
103  *
104  *      Since the information managed by this module is
105  *      also stored by the logical address mapping module,
106  *      this module may throw away valid virtual-to-physical
107  *      mappings at almost any time.  However, invalidations
108  *      of virtual-to-physical mappings must be done as
109  *      requested.
110  *
111  *      In order to cope with hardware architectures which
112  *      make virtual-to-physical map invalidates expensive,
113  *      this module may delay invalidate or reduced protection
114  *      operations until such time as they are actually
115  *      necessary.  This module is given full information as
116  *      to which processors are currently using which maps,
117  *      and to when physical maps must be made correct.
118  */
119
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
123 #include <sys/bus.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
126 #include <sys/ktr.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/proc.h>
133 #include <sys/rwlock.h>
134 #include <sys/sx.h>
135 #include <sys/vmem.h>
136 #include <sys/vmmeter.h>
137 #include <sys/sched.h>
138 #include <sys/sysctl.h>
139 #include <sys/smp.h>
140
141 #include <vm/vm.h>
142 #include <vm/vm_param.h>
143 #include <vm/vm_kern.h>
144 #include <vm/vm_page.h>
145 #include <vm/vm_map.h>
146 #include <vm/vm_object.h>
147 #include <vm/vm_extern.h>
148 #include <vm/vm_pageout.h>
149 #include <vm/vm_pager.h>
150 #include <vm/vm_phys.h>
151 #include <vm/vm_radix.h>
152 #include <vm/vm_reserv.h>
153 #include <vm/uma.h>
154
155 #include <machine/machdep.h>
156 #include <machine/md_var.h>
157 #include <machine/pcb.h>
158 #include <machine/sbi.h>
159
160 #define NUL1E           (Ln_ENTRIES * Ln_ENTRIES)
161 #define NUL2E           (Ln_ENTRIES * NUL1E)
162
163 #if !defined(DIAGNOSTIC)
164 #ifdef __GNUC_GNU_INLINE__
165 #define PMAP_INLINE     __attribute__((__gnu_inline__)) inline
166 #else
167 #define PMAP_INLINE     extern inline
168 #endif
169 #else
170 #define PMAP_INLINE
171 #endif
172
173 #ifdef PV_STATS
174 #define PV_STAT(x)      do { x ; } while (0)
175 #else
176 #define PV_STAT(x)      do { } while (0)
177 #endif
178
179 #define pmap_l2_pindex(v)       ((v) >> L2_SHIFT)
180 #define pa_to_pvh(pa)           (&pv_table[pa_index(pa)])
181
182 #define NPV_LIST_LOCKS  MAXCPU
183
184 #define PHYS_TO_PV_LIST_LOCK(pa)        \
185                         (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
186
187 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa)  do {    \
188         struct rwlock **_lockp = (lockp);               \
189         struct rwlock *_new_lock;                       \
190                                                         \
191         _new_lock = PHYS_TO_PV_LIST_LOCK(pa);           \
192         if (_new_lock != *_lockp) {                     \
193                 if (*_lockp != NULL)                    \
194                         rw_wunlock(*_lockp);            \
195                 *_lockp = _new_lock;                    \
196                 rw_wlock(*_lockp);                      \
197         }                                               \
198 } while (0)
199
200 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m)        \
201                         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
202
203 #define RELEASE_PV_LIST_LOCK(lockp)             do {    \
204         struct rwlock **_lockp = (lockp);               \
205                                                         \
206         if (*_lockp != NULL) {                          \
207                 rw_wunlock(*_lockp);                    \
208                 *_lockp = NULL;                         \
209         }                                               \
210 } while (0)
211
212 #define VM_PAGE_TO_PV_LIST_LOCK(m)      \
213                         PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
214
215 /* The list of all the user pmaps */
216 LIST_HEAD(pmaplist, pmap);
217 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
218
219 struct pmap kernel_pmap_store;
220
221 vm_offset_t virtual_avail;      /* VA of first avail page (after kernel bss) */
222 vm_offset_t virtual_end;        /* VA of last avail page (end of kernel AS) */
223 vm_offset_t kernel_vm_end = 0;
224
225 vm_paddr_t dmap_phys_base;      /* The start of the dmap region */
226 vm_paddr_t dmap_phys_max;       /* The limit of the dmap region */
227 vm_offset_t dmap_max_addr;      /* The virtual address limit of the dmap */
228
229 /* This code assumes all L1 DMAP entries will be used */
230 CTASSERT((DMAP_MIN_ADDRESS  & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
231 CTASSERT((DMAP_MAX_ADDRESS  & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
232
233 static struct rwlock_padalign pvh_global_lock;
234 static struct mtx_padalign allpmaps_lock;
235
236 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
237     "VM/pmap parameters");
238
239 static int superpages_enabled = 1;
240 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
241     CTLFLAG_RDTUN, &superpages_enabled, 0,
242     "Enable support for transparent superpages");
243
244 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
245     "2MB page mapping counters");
246
247 static u_long pmap_l2_demotions;
248 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
249     &pmap_l2_demotions, 0,
250     "2MB page demotions");
251
252 static u_long pmap_l2_mappings;
253 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
254     &pmap_l2_mappings, 0,
255     "2MB page mappings");
256
257 static u_long pmap_l2_p_failures;
258 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
259     &pmap_l2_p_failures, 0,
260     "2MB page promotion failures");
261
262 static u_long pmap_l2_promotions;
263 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
264     &pmap_l2_promotions, 0,
265     "2MB page promotions");
266
267 /*
268  * Data for the pv entry allocation mechanism
269  */
270 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
271 static struct mtx pv_chunks_mutex;
272 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
273 static struct md_page *pv_table;
274 static struct md_page pv_dummy;
275
276 extern cpuset_t all_harts;
277
278 /*
279  * Internal flags for pmap_enter()'s helper functions.
280  */
281 #define PMAP_ENTER_NORECLAIM    0x1000000       /* Don't reclaim PV entries. */
282 #define PMAP_ENTER_NOREPLACE    0x2000000       /* Don't replace mappings. */
283
284 static void     free_pv_chunk(struct pv_chunk *pc);
285 static void     free_pv_entry(pmap_t pmap, pv_entry_t pv);
286 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
287 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
288 static void     pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
289 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
290                     vm_offset_t va);
291 static bool     pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
292 static bool     pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
293                     vm_offset_t va, struct rwlock **lockp);
294 static int      pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
295                     u_int flags, vm_page_t m, struct rwlock **lockp);
296 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
297     vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
298 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
299     pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
300 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
301     vm_page_t m, struct rwlock **lockp);
302
303 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
304                 struct rwlock **lockp);
305
306 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
307     struct spglist *free);
308 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
309
310 #define pmap_clear(pte)                 pmap_store(pte, 0)
311 #define pmap_clear_bits(pte, bits)      atomic_clear_64(pte, bits)
312 #define pmap_load_store(pte, entry)     atomic_swap_64(pte, entry)
313 #define pmap_load_clear(pte)            pmap_load_store(pte, 0)
314 #define pmap_load(pte)                  atomic_load_64(pte)
315 #define pmap_store(pte, entry)          atomic_store_64(pte, entry)
316 #define pmap_store_bits(pte, bits)      atomic_set_64(pte, bits)
317
318 /********************/
319 /* Inline functions */
320 /********************/
321
322 static __inline void
323 pagecopy(void *s, void *d)
324 {
325
326         memcpy(d, s, PAGE_SIZE);
327 }
328
329 static __inline void
330 pagezero(void *p)
331 {
332
333         bzero(p, PAGE_SIZE);
334 }
335
336 #define pmap_l1_index(va)       (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
337 #define pmap_l2_index(va)       (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
338 #define pmap_l3_index(va)       (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
339
340 #define PTE_TO_PHYS(pte)        ((pte >> PTE_PPN0_S) * PAGE_SIZE)
341
342 static __inline pd_entry_t *
343 pmap_l1(pmap_t pmap, vm_offset_t va)
344 {
345
346         return (&pmap->pm_l1[pmap_l1_index(va)]);
347 }
348
349 static __inline pd_entry_t *
350 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
351 {
352         vm_paddr_t phys;
353         pd_entry_t *l2;
354
355         phys = PTE_TO_PHYS(pmap_load(l1));
356         l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
357
358         return (&l2[pmap_l2_index(va)]);
359 }
360
361 static __inline pd_entry_t *
362 pmap_l2(pmap_t pmap, vm_offset_t va)
363 {
364         pd_entry_t *l1;
365
366         l1 = pmap_l1(pmap, va);
367         if ((pmap_load(l1) & PTE_V) == 0)
368                 return (NULL);
369         if ((pmap_load(l1) & PTE_RX) != 0)
370                 return (NULL);
371
372         return (pmap_l1_to_l2(l1, va));
373 }
374
375 static __inline pt_entry_t *
376 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
377 {
378         vm_paddr_t phys;
379         pt_entry_t *l3;
380
381         phys = PTE_TO_PHYS(pmap_load(l2));
382         l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
383
384         return (&l3[pmap_l3_index(va)]);
385 }
386
387 static __inline pt_entry_t *
388 pmap_l3(pmap_t pmap, vm_offset_t va)
389 {
390         pd_entry_t *l2;
391
392         l2 = pmap_l2(pmap, va);
393         if (l2 == NULL)
394                 return (NULL);
395         if ((pmap_load(l2) & PTE_V) == 0)
396                 return (NULL);
397         if ((pmap_load(l2) & PTE_RX) != 0)
398                 return (NULL);
399
400         return (pmap_l2_to_l3(l2, va));
401 }
402
403 static __inline void
404 pmap_resident_count_inc(pmap_t pmap, int count)
405 {
406
407         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
408         pmap->pm_stats.resident_count += count;
409 }
410
411 static __inline void
412 pmap_resident_count_dec(pmap_t pmap, int count)
413 {
414
415         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
416         KASSERT(pmap->pm_stats.resident_count >= count,
417             ("pmap %p resident count underflow %ld %d", pmap,
418             pmap->pm_stats.resident_count, count));
419         pmap->pm_stats.resident_count -= count;
420 }
421
422 static void
423 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
424     pt_entry_t entry)
425 {
426         struct pmap *user_pmap;
427         pd_entry_t *l1;
428
429         /* Distribute new kernel L1 entry to all the user pmaps */
430         if (pmap != kernel_pmap)
431                 return;
432
433         mtx_lock(&allpmaps_lock);
434         LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
435                 l1 = &user_pmap->pm_l1[l1index];
436                 pmap_store(l1, entry);
437         }
438         mtx_unlock(&allpmaps_lock);
439 }
440
441 static pt_entry_t *
442 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
443     u_int *l2_slot)
444 {
445         pt_entry_t *l2;
446         pd_entry_t *l1;
447
448         l1 = (pd_entry_t *)l1pt;
449         *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
450
451         /* Check locore has used a table L1 map */
452         KASSERT((l1[*l1_slot] & PTE_RX) == 0,
453                 ("Invalid bootstrap L1 table"));
454
455         /* Find the address of the L2 table */
456         l2 = (pt_entry_t *)init_pt_va;
457         *l2_slot = pmap_l2_index(va);
458
459         return (l2);
460 }
461
462 static vm_paddr_t
463 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
464 {
465         u_int l1_slot, l2_slot;
466         pt_entry_t *l2;
467         u_int ret;
468
469         l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
470
471         /* Check locore has used L2 superpages */
472         KASSERT((l2[l2_slot] & PTE_RX) != 0,
473                 ("Invalid bootstrap L2 table"));
474
475         /* L2 is superpages */
476         ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
477         ret += (va & L2_OFFSET);
478
479         return (ret);
480 }
481
482 static void
483 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
484 {
485         vm_offset_t va;
486         vm_paddr_t pa;
487         pd_entry_t *l1;
488         u_int l1_slot;
489         pt_entry_t entry;
490         pn_t pn;
491
492         pa = dmap_phys_base = min_pa & ~L1_OFFSET;
493         va = DMAP_MIN_ADDRESS;
494         l1 = (pd_entry_t *)kern_l1;
495         l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
496
497         for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
498             pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
499                 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
500
501                 /* superpages */
502                 pn = (pa / PAGE_SIZE);
503                 entry = PTE_KERN;
504                 entry |= (pn << PTE_PPN0_S);
505                 pmap_store(&l1[l1_slot], entry);
506         }
507
508         /* Set the upper limit of the DMAP region */
509         dmap_phys_max = pa;
510         dmap_max_addr = va;
511
512         sfence_vma();
513 }
514
515 static vm_offset_t
516 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
517 {
518         vm_offset_t l3pt;
519         pt_entry_t entry;
520         pd_entry_t *l2;
521         vm_paddr_t pa;
522         u_int l2_slot;
523         pn_t pn;
524
525         KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
526
527         l2 = pmap_l2(kernel_pmap, va);
528         l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
529         l2_slot = pmap_l2_index(va);
530         l3pt = l3_start;
531
532         for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
533                 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
534
535                 pa = pmap_early_vtophys(l1pt, l3pt);
536                 pn = (pa / PAGE_SIZE);
537                 entry = (PTE_V);
538                 entry |= (pn << PTE_PPN0_S);
539                 pmap_store(&l2[l2_slot], entry);
540                 l3pt += PAGE_SIZE;
541         }
542
543
544         /* Clean the L2 page table */
545         memset((void *)l3_start, 0, l3pt - l3_start);
546
547         return (l3pt);
548 }
549
550 /*
551  *      Bootstrap the system enough to run with virtual memory.
552  */
553 void
554 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
555 {
556         u_int l1_slot, l2_slot, avail_slot, map_slot;
557         vm_offset_t freemempos;
558         vm_offset_t dpcpu, msgbufpv;
559         vm_paddr_t end, max_pa, min_pa, pa, start;
560         int i;
561
562         printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
563         printf("%lx\n", l1pt);
564         printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
565
566         /* Set this early so we can use the pagetable walking functions */
567         kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
568         PMAP_LOCK_INIT(kernel_pmap);
569
570         rw_init(&pvh_global_lock, "pmap pv global");
571
572         CPU_FILL(&kernel_pmap->pm_active);
573
574         /* Assume the address we were loaded to is a valid physical address. */
575         min_pa = max_pa = kernstart;
576
577         /*
578          * Find the minimum physical address. physmap is sorted,
579          * but may contain empty ranges.
580          */
581         for (i = 0; i < physmap_idx * 2; i += 2) {
582                 if (physmap[i] == physmap[i + 1])
583                         continue;
584                 if (physmap[i] <= min_pa)
585                         min_pa = physmap[i];
586                 if (physmap[i + 1] > max_pa)
587                         max_pa = physmap[i + 1];
588         }
589         printf("physmap_idx %lx\n", physmap_idx);
590         printf("min_pa %lx\n", min_pa);
591         printf("max_pa %lx\n", max_pa);
592
593         /* Create a direct map region early so we can use it for pa -> va */
594         pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
595
596         /*
597          * Read the page table to find out what is already mapped.
598          * This assumes we have mapped a block of memory from KERNBASE
599          * using a single L1 entry.
600          */
601         (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
602
603         /* Sanity check the index, KERNBASE should be the first VA */
604         KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
605
606         freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
607
608         /* Create the l3 tables for the early devmap */
609         freemempos = pmap_bootstrap_l3(l1pt,
610             VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
611
612         sfence_vma();
613
614 #define alloc_pages(var, np)                                            \
615         (var) = freemempos;                                             \
616         freemempos += (np * PAGE_SIZE);                                 \
617         memset((char *)(var), 0, ((np) * PAGE_SIZE));
618
619         /* Allocate dynamic per-cpu area. */
620         alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
621         dpcpu_init((void *)dpcpu, 0);
622
623         /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
624         alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
625         msgbufp = (void *)msgbufpv;
626
627         virtual_avail = roundup2(freemempos, L2_SIZE);
628         virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
629         kernel_vm_end = virtual_avail;
630         
631         pa = pmap_early_vtophys(l1pt, freemempos);
632
633         /* Initialize phys_avail and dump_avail. */
634         for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
635             map_slot += 2) {
636                 start = physmap[map_slot];
637                 end = physmap[map_slot + 1];
638
639                 if (start == end)
640                         continue;
641                 dump_avail[map_slot] = start;
642                 dump_avail[map_slot + 1] = end;
643                 realmem += atop((vm_offset_t)(end - start));
644
645                 if (start >= kernstart && end <= pa)
646                         continue;
647
648                 if (start < kernstart && end > kernstart)
649                         end = kernstart;
650                 else if (start < pa && end > pa)
651                         start = pa;
652                 phys_avail[avail_slot] = start;
653                 phys_avail[avail_slot + 1] = end;
654                 physmem += (end - start) >> PAGE_SHIFT;
655                 avail_slot += 2;
656
657                 if (end != physmap[map_slot + 1] && end > pa) {
658                         phys_avail[avail_slot] = pa;
659                         phys_avail[avail_slot + 1] = physmap[map_slot + 1];
660                         physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
661                         avail_slot += 2;
662                 }
663         }
664         phys_avail[avail_slot] = 0;
665         phys_avail[avail_slot + 1] = 0;
666
667         /*
668          * Maxmem isn't the "maximum memory", it's one larger than the
669          * highest page of the physical address space.  It should be
670          * called something like "Maxphyspage".
671          */
672         Maxmem = atop(phys_avail[avail_slot - 1]);
673 }
674
675 /*
676  *      Initialize a vm_page's machine-dependent fields.
677  */
678 void
679 pmap_page_init(vm_page_t m)
680 {
681
682         TAILQ_INIT(&m->md.pv_list);
683         m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
684 }
685
686 /*
687  *      Initialize the pmap module.
688  *      Called by vm_init, to initialize any structures that the pmap
689  *      system needs to map virtual memory.
690  */
691 void
692 pmap_init(void)
693 {
694         vm_size_t s;
695         int i, pv_npg;
696
697         /*
698          * Initialize the pv chunk and pmap list mutexes.
699          */
700         mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
701         mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
702
703         /*
704          * Initialize the pool of pv list locks.
705          */
706         for (i = 0; i < NPV_LIST_LOCKS; i++)
707                 rw_init(&pv_list_locks[i], "pmap pv list");
708
709         /*
710          * Calculate the size of the pv head table for superpages.
711          */
712         pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
713
714         /*
715          * Allocate memory for the pv head table for superpages.
716          */
717         s = (vm_size_t)(pv_npg * sizeof(struct md_page));
718         s = round_page(s);
719         pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
720         for (i = 0; i < pv_npg; i++)
721                 TAILQ_INIT(&pv_table[i].pv_list);
722         TAILQ_INIT(&pv_dummy.pv_list);
723
724         if (superpages_enabled)
725                 pagesizes[1] = L2_SIZE;
726 }
727
728 #ifdef SMP
729 /*
730  * For SMP, these functions have to use IPIs for coherence.
731  *
732  * In general, the calling thread uses a plain fence to order the
733  * writes to the page tables before invoking an SBI callback to invoke
734  * sfence_vma() on remote CPUs.
735  */
736 static void
737 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
738 {
739         cpuset_t mask;
740
741         sched_pin();
742         mask = pmap->pm_active;
743         CPU_CLR(PCPU_GET(hart), &mask);
744         fence();
745         if (!CPU_EMPTY(&mask) && smp_started)
746                 sbi_remote_sfence_vma(mask.__bits, va, 1);
747         sfence_vma_page(va);
748         sched_unpin();
749 }
750
751 static void
752 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
753 {
754         cpuset_t mask;
755
756         sched_pin();
757         mask = pmap->pm_active;
758         CPU_CLR(PCPU_GET(hart), &mask);
759         fence();
760         if (!CPU_EMPTY(&mask) && smp_started)
761                 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
762
763         /*
764          * Might consider a loop of sfence_vma_page() for a small
765          * number of pages in the future.
766          */
767         sfence_vma();
768         sched_unpin();
769 }
770
771 static void
772 pmap_invalidate_all(pmap_t pmap)
773 {
774         cpuset_t mask;
775
776         sched_pin();
777         mask = pmap->pm_active;
778         CPU_CLR(PCPU_GET(hart), &mask);
779
780         /*
781          * XXX: The SBI doc doesn't detail how to specify x0 as the
782          * address to perform a global fence.  BBL currently treats
783          * all sfence_vma requests as global however.
784          */
785         fence();
786         if (!CPU_EMPTY(&mask) && smp_started)
787                 sbi_remote_sfence_vma(mask.__bits, 0, 0);
788         sfence_vma();
789         sched_unpin();
790 }
791 #else
792 /*
793  * Normal, non-SMP, invalidation functions.
794  * We inline these within pmap.c for speed.
795  */
796 static __inline void
797 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
798 {
799
800         sfence_vma_page(va);
801 }
802
803 static __inline void
804 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
805 {
806
807         /*
808          * Might consider a loop of sfence_vma_page() for a small
809          * number of pages in the future.
810          */
811         sfence_vma();
812 }
813
814 static __inline void
815 pmap_invalidate_all(pmap_t pmap)
816 {
817
818         sfence_vma();
819 }
820 #endif
821
822 /*
823  *      Routine:        pmap_extract
824  *      Function:
825  *              Extract the physical page address associated
826  *              with the given map/virtual_address pair.
827  */
828 vm_paddr_t 
829 pmap_extract(pmap_t pmap, vm_offset_t va)
830 {
831         pd_entry_t *l2p, l2;
832         pt_entry_t *l3p, l3;
833         vm_paddr_t pa;
834
835         pa = 0;
836         PMAP_LOCK(pmap);
837         /*
838          * Start with the l2 tabel. We are unable to allocate
839          * pages in the l1 table.
840          */
841         l2p = pmap_l2(pmap, va);
842         if (l2p != NULL) {
843                 l2 = pmap_load(l2p);
844                 if ((l2 & PTE_RX) == 0) {
845                         l3p = pmap_l2_to_l3(l2p, va);
846                         if (l3p != NULL) {
847                                 l3 = pmap_load(l3p);
848                                 pa = PTE_TO_PHYS(l3);
849                                 pa |= (va & L3_OFFSET);
850                         }
851                 } else {
852                         /* L2 is superpages */
853                         pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
854                         pa |= (va & L2_OFFSET);
855                 }
856         }
857         PMAP_UNLOCK(pmap);
858         return (pa);
859 }
860
861 /*
862  *      Routine:        pmap_extract_and_hold
863  *      Function:
864  *              Atomically extract and hold the physical page
865  *              with the given pmap and virtual address pair
866  *              if that mapping permits the given protection.
867  */
868 vm_page_t
869 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
870 {
871         pt_entry_t *l3p, l3;
872         vm_paddr_t phys;
873         vm_paddr_t pa;
874         vm_page_t m;
875
876         pa = 0;
877         m = NULL;
878         PMAP_LOCK(pmap);
879 retry:
880         l3p = pmap_l3(pmap, va);
881         if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
882                 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
883                         phys = PTE_TO_PHYS(l3);
884                         if (vm_page_pa_tryrelock(pmap, phys, &pa))
885                                 goto retry;
886                         m = PHYS_TO_VM_PAGE(phys);
887                         vm_page_hold(m);
888                 }
889         }
890         PA_UNLOCK_COND(pa);
891         PMAP_UNLOCK(pmap);
892         return (m);
893 }
894
895 vm_paddr_t
896 pmap_kextract(vm_offset_t va)
897 {
898         pd_entry_t *l2;
899         pt_entry_t *l3;
900         vm_paddr_t pa;
901
902         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
903                 pa = DMAP_TO_PHYS(va);
904         } else {
905                 l2 = pmap_l2(kernel_pmap, va);
906                 if (l2 == NULL)
907                         panic("pmap_kextract: No l2");
908                 if ((pmap_load(l2) & PTE_RX) != 0) {
909                         /* superpages */
910                         pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
911                         pa |= (va & L2_OFFSET);
912                         return (pa);
913                 }
914
915                 l3 = pmap_l2_to_l3(l2, va);
916                 if (l3 == NULL)
917                         panic("pmap_kextract: No l3...");
918                 pa = PTE_TO_PHYS(pmap_load(l3));
919                 pa |= (va & PAGE_MASK);
920         }
921         return (pa);
922 }
923
924 /***************************************************
925  * Low level mapping routines.....
926  ***************************************************/
927
928 void
929 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
930 {
931         pt_entry_t entry;
932         pt_entry_t *l3;
933         vm_offset_t va;
934         pn_t pn;
935
936         KASSERT((pa & L3_OFFSET) == 0,
937            ("pmap_kenter_device: Invalid physical address"));
938         KASSERT((sva & L3_OFFSET) == 0,
939            ("pmap_kenter_device: Invalid virtual address"));
940         KASSERT((size & PAGE_MASK) == 0,
941             ("pmap_kenter_device: Mapping is not page-sized"));
942
943         va = sva;
944         while (size != 0) {
945                 l3 = pmap_l3(kernel_pmap, va);
946                 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
947
948                 pn = (pa / PAGE_SIZE);
949                 entry = PTE_KERN;
950                 entry |= (pn << PTE_PPN0_S);
951                 pmap_store(l3, entry);
952
953                 va += PAGE_SIZE;
954                 pa += PAGE_SIZE;
955                 size -= PAGE_SIZE;
956         }
957         pmap_invalidate_range(kernel_pmap, sva, va);
958 }
959
960 /*
961  * Remove a page from the kernel pagetables.
962  * Note: not SMP coherent.
963  */
964 PMAP_INLINE void
965 pmap_kremove(vm_offset_t va)
966 {
967         pt_entry_t *l3;
968
969         l3 = pmap_l3(kernel_pmap, va);
970         KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
971
972         pmap_clear(l3);
973         sfence_vma();
974 }
975
976 void
977 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
978 {
979         pt_entry_t *l3;
980         vm_offset_t va;
981
982         KASSERT((sva & L3_OFFSET) == 0,
983            ("pmap_kremove_device: Invalid virtual address"));
984         KASSERT((size & PAGE_MASK) == 0,
985             ("pmap_kremove_device: Mapping is not page-sized"));
986
987         va = sva;
988         while (size != 0) {
989                 l3 = pmap_l3(kernel_pmap, va);
990                 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
991                 pmap_clear(l3);
992
993                 va += PAGE_SIZE;
994                 size -= PAGE_SIZE;
995         }
996
997         pmap_invalidate_range(kernel_pmap, sva, va);
998 }
999
1000 /*
1001  *      Used to map a range of physical addresses into kernel
1002  *      virtual address space.
1003  *
1004  *      The value passed in '*virt' is a suggested virtual address for
1005  *      the mapping. Architectures which can support a direct-mapped
1006  *      physical to virtual region can return the appropriate address
1007  *      within that region, leaving '*virt' unchanged. Other
1008  *      architectures should map the pages starting at '*virt' and
1009  *      update '*virt' with the first usable address after the mapped
1010  *      region.
1011  */
1012 vm_offset_t
1013 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1014 {
1015
1016         return PHYS_TO_DMAP(start);
1017 }
1018
1019
1020 /*
1021  * Add a list of wired pages to the kva
1022  * this routine is only used for temporary
1023  * kernel mappings that do not need to have
1024  * page modification or references recorded.
1025  * Note that old mappings are simply written
1026  * over.  The page *must* be wired.
1027  * Note: SMP coherent.  Uses a ranged shootdown IPI.
1028  */
1029 void
1030 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1031 {
1032         pt_entry_t *l3, pa;
1033         vm_offset_t va;
1034         vm_page_t m;
1035         pt_entry_t entry;
1036         pn_t pn;
1037         int i;
1038
1039         va = sva;
1040         for (i = 0; i < count; i++) {
1041                 m = ma[i];
1042                 pa = VM_PAGE_TO_PHYS(m);
1043                 pn = (pa / PAGE_SIZE);
1044                 l3 = pmap_l3(kernel_pmap, va);
1045
1046                 entry = PTE_KERN;
1047                 entry |= (pn << PTE_PPN0_S);
1048                 pmap_store(l3, entry);
1049
1050                 va += L3_SIZE;
1051         }
1052         pmap_invalidate_range(kernel_pmap, sva, va);
1053 }
1054
1055 /*
1056  * This routine tears out page mappings from the
1057  * kernel -- it is meant only for temporary mappings.
1058  * Note: SMP coherent.  Uses a ranged shootdown IPI.
1059  */
1060 void
1061 pmap_qremove(vm_offset_t sva, int count)
1062 {
1063         pt_entry_t *l3;
1064         vm_offset_t va;
1065
1066         KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1067
1068         for (va = sva; count-- > 0; va += PAGE_SIZE) {
1069                 l3 = pmap_l3(kernel_pmap, va);
1070                 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1071                 pmap_clear(l3);
1072         }
1073         pmap_invalidate_range(kernel_pmap, sva, va);
1074 }
1075
1076 bool
1077 pmap_ps_enabled(pmap_t pmap __unused)
1078 {
1079
1080         return (superpages_enabled);
1081 }
1082
1083 /***************************************************
1084  * Page table page management routines.....
1085  ***************************************************/
1086 /*
1087  * Schedule the specified unused page table page to be freed.  Specifically,
1088  * add the page to the specified list of pages that will be released to the
1089  * physical memory manager after the TLB has been updated.
1090  */
1091 static __inline void
1092 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1093     boolean_t set_PG_ZERO)
1094 {
1095
1096         if (set_PG_ZERO)
1097                 m->flags |= PG_ZERO;
1098         else
1099                 m->flags &= ~PG_ZERO;
1100         SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1101 }
1102
1103 /*
1104  * Inserts the specified page table page into the specified pmap's collection
1105  * of idle page table pages.  Each of a pmap's page table pages is responsible
1106  * for mapping a distinct range of virtual addresses.  The pmap's collection is
1107  * ordered by this virtual address range.
1108  */
1109 static __inline int
1110 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3)
1111 {
1112
1113         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1114         return (vm_radix_insert(&pmap->pm_root, ml3));
1115 }
1116
1117 /*
1118  * Removes the page table page mapping the specified virtual address from the
1119  * specified pmap's collection of idle page table pages, and returns it.
1120  * Otherwise, returns NULL if there is no page table page corresponding to the
1121  * specified virtual address.
1122  */
1123 static __inline vm_page_t
1124 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1125 {
1126
1127         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1128         return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1129 }
1130         
1131 /*
1132  * Decrements a page table page's wire count, which is used to record the
1133  * number of valid page table entries within the page.  If the wire count
1134  * drops to zero, then the page table page is unmapped.  Returns TRUE if the
1135  * page table page was unmapped and FALSE otherwise.
1136  */
1137 static inline boolean_t
1138 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1139 {
1140
1141         --m->wire_count;
1142         if (m->wire_count == 0) {
1143                 _pmap_unwire_ptp(pmap, va, m, free);
1144                 return (TRUE);
1145         } else {
1146                 return (FALSE);
1147         }
1148 }
1149
1150 static void
1151 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1152 {
1153         vm_paddr_t phys;
1154
1155         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1156         if (m->pindex >= NUL1E) {
1157                 pd_entry_t *l1;
1158                 l1 = pmap_l1(pmap, va);
1159                 pmap_clear(l1);
1160                 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1161         } else {
1162                 pd_entry_t *l2;
1163                 l2 = pmap_l2(pmap, va);
1164                 pmap_clear(l2);
1165         }
1166         pmap_resident_count_dec(pmap, 1);
1167         if (m->pindex < NUL1E) {
1168                 pd_entry_t *l1;
1169                 vm_page_t pdpg;
1170
1171                 l1 = pmap_l1(pmap, va);
1172                 phys = PTE_TO_PHYS(pmap_load(l1));
1173                 pdpg = PHYS_TO_VM_PAGE(phys);
1174                 pmap_unwire_ptp(pmap, va, pdpg, free);
1175         }
1176         pmap_invalidate_page(pmap, va);
1177
1178         vm_wire_sub(1);
1179
1180         /* 
1181          * Put page on a list so that it is released after
1182          * *ALL* TLB shootdown is done
1183          */
1184         pmap_add_delayed_free_list(m, free, TRUE);
1185 }
1186
1187 /*
1188  * After removing a page table entry, this routine is used to
1189  * conditionally free the page, and manage the hold/wire counts.
1190  */
1191 static int
1192 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1193     struct spglist *free)
1194 {
1195         vm_page_t mpte;
1196
1197         if (va >= VM_MAXUSER_ADDRESS)
1198                 return (0);
1199         KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1200         mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1201         return (pmap_unwire_ptp(pmap, va, mpte, free));
1202 }
1203
1204 void
1205 pmap_pinit0(pmap_t pmap)
1206 {
1207
1208         PMAP_LOCK_INIT(pmap);
1209         bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1210         pmap->pm_l1 = kernel_pmap->pm_l1;
1211         pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1212         CPU_ZERO(&pmap->pm_active);
1213         pmap_activate_boot(pmap);
1214 }
1215
1216 int
1217 pmap_pinit(pmap_t pmap)
1218 {
1219         vm_paddr_t l1phys;
1220         vm_page_t l1pt;
1221
1222         /*
1223          * allocate the l1 page
1224          */
1225         while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1226             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1227                 vm_wait(NULL);
1228
1229         l1phys = VM_PAGE_TO_PHYS(l1pt);
1230         pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1231         pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1232
1233         if ((l1pt->flags & PG_ZERO) == 0)
1234                 pagezero(pmap->pm_l1);
1235
1236         bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1237
1238         CPU_ZERO(&pmap->pm_active);
1239
1240         /* Install kernel pagetables */
1241         memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1242
1243         /* Add to the list of all user pmaps */
1244         mtx_lock(&allpmaps_lock);
1245         LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1246         mtx_unlock(&allpmaps_lock);
1247
1248         vm_radix_init(&pmap->pm_root);
1249
1250         return (1);
1251 }
1252
1253 /*
1254  * This routine is called if the desired page table page does not exist.
1255  *
1256  * If page table page allocation fails, this routine may sleep before
1257  * returning NULL.  It sleeps only if a lock pointer was given.
1258  *
1259  * Note: If a page allocation fails at page table level two or three,
1260  * one or two pages may be held during the wait, only to be released
1261  * afterwards.  This conservative approach is easily argued to avoid
1262  * race conditions.
1263  */
1264 static vm_page_t
1265 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1266 {
1267         vm_page_t m, /*pdppg, */pdpg;
1268         pt_entry_t entry;
1269         vm_paddr_t phys;
1270         pn_t pn;
1271
1272         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1273
1274         /*
1275          * Allocate a page table page.
1276          */
1277         if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1278             VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1279                 if (lockp != NULL) {
1280                         RELEASE_PV_LIST_LOCK(lockp);
1281                         PMAP_UNLOCK(pmap);
1282                         rw_runlock(&pvh_global_lock);
1283                         vm_wait(NULL);
1284                         rw_rlock(&pvh_global_lock);
1285                         PMAP_LOCK(pmap);
1286                 }
1287
1288                 /*
1289                  * Indicate the need to retry.  While waiting, the page table
1290                  * page may have been allocated.
1291                  */
1292                 return (NULL);
1293         }
1294
1295         if ((m->flags & PG_ZERO) == 0)
1296                 pmap_zero_page(m);
1297
1298         /*
1299          * Map the pagetable page into the process address space, if
1300          * it isn't already there.
1301          */
1302
1303         if (ptepindex >= NUL1E) {
1304                 pd_entry_t *l1;
1305                 vm_pindex_t l1index;
1306
1307                 l1index = ptepindex - NUL1E;
1308                 l1 = &pmap->pm_l1[l1index];
1309
1310                 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1311                 entry = (PTE_V);
1312                 entry |= (pn << PTE_PPN0_S);
1313                 pmap_store(l1, entry);
1314                 pmap_distribute_l1(pmap, l1index, entry);
1315         } else {
1316                 vm_pindex_t l1index;
1317                 pd_entry_t *l1, *l2;
1318
1319                 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1320                 l1 = &pmap->pm_l1[l1index];
1321                 if (pmap_load(l1) == 0) {
1322                         /* recurse for allocating page dir */
1323                         if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1324                             lockp) == NULL) {
1325                                 vm_page_unwire_noq(m);
1326                                 vm_page_free_zero(m);
1327                                 return (NULL);
1328                         }
1329                 } else {
1330                         phys = PTE_TO_PHYS(pmap_load(l1));
1331                         pdpg = PHYS_TO_VM_PAGE(phys);
1332                         pdpg->wire_count++;
1333                 }
1334
1335                 phys = PTE_TO_PHYS(pmap_load(l1));
1336                 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1337                 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1338
1339                 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1340                 entry = (PTE_V);
1341                 entry |= (pn << PTE_PPN0_S);
1342                 pmap_store(l2, entry);
1343         }
1344
1345         pmap_resident_count_inc(pmap, 1);
1346
1347         return (m);
1348 }
1349
1350 static vm_page_t
1351 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1352 {
1353         pd_entry_t *l1;
1354         vm_page_t l2pg;
1355         vm_pindex_t l2pindex;
1356
1357 retry:
1358         l1 = pmap_l1(pmap, va);
1359         if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1360                 /* Add a reference to the L2 page. */
1361                 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1362                 l2pg->wire_count++;
1363         } else {
1364                 /* Allocate a L2 page. */
1365                 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1366                 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1367                 if (l2pg == NULL && lockp != NULL)
1368                         goto retry;
1369         }
1370         return (l2pg);
1371 }
1372
1373 static vm_page_t
1374 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1375 {
1376         vm_pindex_t ptepindex;
1377         pd_entry_t *l2;
1378         vm_paddr_t phys;
1379         vm_page_t m;
1380
1381         /*
1382          * Calculate pagetable page index
1383          */
1384         ptepindex = pmap_l2_pindex(va);
1385 retry:
1386         /*
1387          * Get the page directory entry
1388          */
1389         l2 = pmap_l2(pmap, va);
1390
1391         /*
1392          * If the page table page is mapped, we just increment the
1393          * hold count, and activate it.
1394          */
1395         if (l2 != NULL && pmap_load(l2) != 0) {
1396                 phys = PTE_TO_PHYS(pmap_load(l2));
1397                 m = PHYS_TO_VM_PAGE(phys);
1398                 m->wire_count++;
1399         } else {
1400                 /*
1401                  * Here if the pte page isn't mapped, or if it has been
1402                  * deallocated.
1403                  */
1404                 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1405                 if (m == NULL && lockp != NULL)
1406                         goto retry;
1407         }
1408         return (m);
1409 }
1410
1411
1412 /***************************************************
1413  * Pmap allocation/deallocation routines.
1414  ***************************************************/
1415
1416 /*
1417  * Release any resources held by the given physical map.
1418  * Called when a pmap initialized by pmap_pinit is being released.
1419  * Should only be called if the map contains no valid mappings.
1420  */
1421 void
1422 pmap_release(pmap_t pmap)
1423 {
1424         vm_page_t m;
1425
1426         KASSERT(pmap->pm_stats.resident_count == 0,
1427             ("pmap_release: pmap resident count %ld != 0",
1428             pmap->pm_stats.resident_count));
1429         KASSERT(CPU_EMPTY(&pmap->pm_active),
1430             ("releasing active pmap %p", pmap));
1431
1432         mtx_lock(&allpmaps_lock);
1433         LIST_REMOVE(pmap, pm_list);
1434         mtx_unlock(&allpmaps_lock);
1435
1436         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1437         vm_page_unwire_noq(m);
1438         vm_page_free(m);
1439 }
1440
1441 #if 0
1442 static int
1443 kvm_size(SYSCTL_HANDLER_ARGS)
1444 {
1445         unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1446
1447         return sysctl_handle_long(oidp, &ksize, 0, req);
1448 }
1449 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 
1450     0, 0, kvm_size, "LU", "Size of KVM");
1451
1452 static int
1453 kvm_free(SYSCTL_HANDLER_ARGS)
1454 {
1455         unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1456
1457         return sysctl_handle_long(oidp, &kfree, 0, req);
1458 }
1459 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 
1460     0, 0, kvm_free, "LU", "Amount of KVM free");
1461 #endif /* 0 */
1462
1463 /*
1464  * grow the number of kernel page table entries, if needed
1465  */
1466 void
1467 pmap_growkernel(vm_offset_t addr)
1468 {
1469         vm_paddr_t paddr;
1470         vm_page_t nkpg;
1471         pd_entry_t *l1, *l2;
1472         pt_entry_t entry;
1473         pn_t pn;
1474
1475         mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1476
1477         addr = roundup2(addr, L2_SIZE);
1478         if (addr - 1 >= vm_map_max(kernel_map))
1479                 addr = vm_map_max(kernel_map);
1480         while (kernel_vm_end < addr) {
1481                 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1482                 if (pmap_load(l1) == 0) {
1483                         /* We need a new PDP entry */
1484                         nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1485                             VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1486                             VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1487                         if (nkpg == NULL)
1488                                 panic("pmap_growkernel: no memory to grow kernel");
1489                         if ((nkpg->flags & PG_ZERO) == 0)
1490                                 pmap_zero_page(nkpg);
1491                         paddr = VM_PAGE_TO_PHYS(nkpg);
1492
1493                         pn = (paddr / PAGE_SIZE);
1494                         entry = (PTE_V);
1495                         entry |= (pn << PTE_PPN0_S);
1496                         pmap_store(l1, entry);
1497                         pmap_distribute_l1(kernel_pmap,
1498                             pmap_l1_index(kernel_vm_end), entry);
1499                         continue; /* try again */
1500                 }
1501                 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1502                 if ((pmap_load(l2) & PTE_V) != 0 &&
1503                     (pmap_load(l2) & PTE_RWX) == 0) {
1504                         kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1505                         if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1506                                 kernel_vm_end = vm_map_max(kernel_map);
1507                                 break;
1508                         }
1509                         continue;
1510                 }
1511
1512                 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1513                     VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1514                     VM_ALLOC_ZERO);
1515                 if (nkpg == NULL)
1516                         panic("pmap_growkernel: no memory to grow kernel");
1517                 if ((nkpg->flags & PG_ZERO) == 0) {
1518                         pmap_zero_page(nkpg);
1519                 }
1520                 paddr = VM_PAGE_TO_PHYS(nkpg);
1521
1522                 pn = (paddr / PAGE_SIZE);
1523                 entry = (PTE_V);
1524                 entry |= (pn << PTE_PPN0_S);
1525                 pmap_store(l2, entry);
1526
1527                 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1528
1529                 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1530                 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1531                         kernel_vm_end = vm_map_max(kernel_map);
1532                         break;                       
1533                 }
1534         }
1535 }
1536
1537
1538 /***************************************************
1539  * page management routines.
1540  ***************************************************/
1541
1542 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1543 CTASSERT(_NPCM == 3);
1544 CTASSERT(_NPCPV == 168);
1545
1546 static __inline struct pv_chunk *
1547 pv_to_chunk(pv_entry_t pv)
1548 {
1549
1550         return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1551 }
1552
1553 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1554
1555 #define PC_FREE0        0xfffffffffffffffful
1556 #define PC_FREE1        0xfffffffffffffffful
1557 #define PC_FREE2        0x000000fffffffffful
1558
1559 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1560
1561 #if 0
1562 #ifdef PV_STATS
1563 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1564
1565 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1566         "Current number of pv entry chunks");
1567 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1568         "Current number of pv entry chunks allocated");
1569 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1570         "Current number of pv entry chunks frees");
1571 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1572         "Number of times tried to get a chunk page but failed.");
1573
1574 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1575 static int pv_entry_spare;
1576
1577 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1578         "Current number of pv entry frees");
1579 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1580         "Current number of pv entry allocs");
1581 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1582         "Current number of pv entries");
1583 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1584         "Current number of spare pv entries");
1585 #endif
1586 #endif /* 0 */
1587
1588 /*
1589  * We are in a serious low memory condition.  Resort to
1590  * drastic measures to free some pages so we can allocate
1591  * another pv entry chunk.
1592  *
1593  * Returns NULL if PV entries were reclaimed from the specified pmap.
1594  *
1595  * We do not, however, unmap 2mpages because subsequent accesses will
1596  * allocate per-page pv entries until repromotion occurs, thereby
1597  * exacerbating the shortage of free pv entries.
1598  */
1599 static vm_page_t
1600 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1601 {
1602
1603         panic("RISCVTODO: reclaim_pv_chunk");
1604 }
1605
1606 /*
1607  * free the pv_entry back to the free list
1608  */
1609 static void
1610 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1611 {
1612         struct pv_chunk *pc;
1613         int idx, field, bit;
1614
1615         rw_assert(&pvh_global_lock, RA_LOCKED);
1616         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1617         PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1618         PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1619         PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1620         pc = pv_to_chunk(pv);
1621         idx = pv - &pc->pc_pventry[0];
1622         field = idx / 64;
1623         bit = idx % 64;
1624         pc->pc_map[field] |= 1ul << bit;
1625         if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1626             pc->pc_map[2] != PC_FREE2) {
1627                 /* 98% of the time, pc is already at the head of the list. */
1628                 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1629                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1630                         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1631                 }
1632                 return;
1633         }
1634         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1635         free_pv_chunk(pc);
1636 }
1637
1638 static void
1639 free_pv_chunk(struct pv_chunk *pc)
1640 {
1641         vm_page_t m;
1642
1643         mtx_lock(&pv_chunks_mutex);
1644         TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1645         mtx_unlock(&pv_chunks_mutex);
1646         PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1647         PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1648         PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1649         /* entire chunk is free, return it */
1650         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1651         dump_drop_page(m->phys_addr);
1652         vm_page_unwire_noq(m);
1653         vm_page_free(m);
1654 }
1655
1656 /*
1657  * Returns a new PV entry, allocating a new PV chunk from the system when
1658  * needed.  If this PV chunk allocation fails and a PV list lock pointer was
1659  * given, a PV chunk is reclaimed from an arbitrary pmap.  Otherwise, NULL is
1660  * returned.
1661  *
1662  * The given PV list lock may be released.
1663  */
1664 static pv_entry_t
1665 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1666 {
1667         int bit, field;
1668         pv_entry_t pv;
1669         struct pv_chunk *pc;
1670         vm_page_t m;
1671
1672         rw_assert(&pvh_global_lock, RA_LOCKED);
1673         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1674         PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1675 retry:
1676         pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1677         if (pc != NULL) {
1678                 for (field = 0; field < _NPCM; field++) {
1679                         if (pc->pc_map[field]) {
1680                                 bit = ffsl(pc->pc_map[field]) - 1;
1681                                 break;
1682                         }
1683                 }
1684                 if (field < _NPCM) {
1685                         pv = &pc->pc_pventry[field * 64 + bit];
1686                         pc->pc_map[field] &= ~(1ul << bit);
1687                         /* If this was the last item, move it to tail */
1688                         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1689                             pc->pc_map[2] == 0) {
1690                                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1691                                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1692                                     pc_list);
1693                         }
1694                         PV_STAT(atomic_add_long(&pv_entry_count, 1));
1695                         PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1696                         return (pv);
1697                 }
1698         }
1699         /* No free items, allocate another chunk */
1700         m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1701             VM_ALLOC_WIRED);
1702         if (m == NULL) {
1703                 if (lockp == NULL) {
1704                         PV_STAT(pc_chunk_tryfail++);
1705                         return (NULL);
1706                 }
1707                 m = reclaim_pv_chunk(pmap, lockp);
1708                 if (m == NULL)
1709                         goto retry;
1710         }
1711         PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1712         PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1713         dump_add_page(m->phys_addr);
1714         pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1715         pc->pc_pmap = pmap;
1716         pc->pc_map[0] = PC_FREE0 & ~1ul;        /* preallocated bit 0 */
1717         pc->pc_map[1] = PC_FREE1;
1718         pc->pc_map[2] = PC_FREE2;
1719         mtx_lock(&pv_chunks_mutex);
1720         TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1721         mtx_unlock(&pv_chunks_mutex);
1722         pv = &pc->pc_pventry[0];
1723         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1724         PV_STAT(atomic_add_long(&pv_entry_count, 1));
1725         PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1726         return (pv);
1727 }
1728
1729 /*
1730  * Ensure that the number of spare PV entries in the specified pmap meets or
1731  * exceeds the given count, "needed".
1732  *
1733  * The given PV list lock may be released.
1734  */
1735 static void
1736 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1737 {
1738         struct pch new_tail;
1739         struct pv_chunk *pc;
1740         vm_page_t m;
1741         int avail, free;
1742         bool reclaimed;
1743
1744         rw_assert(&pvh_global_lock, RA_LOCKED);
1745         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1746         KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1747
1748         /*
1749          * Newly allocated PV chunks must be stored in a private list until
1750          * the required number of PV chunks have been allocated.  Otherwise,
1751          * reclaim_pv_chunk() could recycle one of these chunks.  In
1752          * contrast, these chunks must be added to the pmap upon allocation.
1753          */
1754         TAILQ_INIT(&new_tail);
1755 retry:
1756         avail = 0;
1757         TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1758                 bit_count((bitstr_t *)pc->pc_map, 0,
1759                     sizeof(pc->pc_map) * NBBY, &free);
1760                 if (free == 0)
1761                         break;
1762                 avail += free;
1763                 if (avail >= needed)
1764                         break;
1765         }
1766         for (reclaimed = false; avail < needed; avail += _NPCPV) {
1767                 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1768                     VM_ALLOC_WIRED);
1769                 if (m == NULL) {
1770                         m = reclaim_pv_chunk(pmap, lockp);
1771                         if (m == NULL)
1772                                 goto retry;
1773                         reclaimed = true;
1774                 }
1775                 /* XXX PV STATS */
1776 #if 0
1777                 dump_add_page(m->phys_addr);
1778 #endif
1779                 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1780                 pc->pc_pmap = pmap;
1781                 pc->pc_map[0] = PC_FREE0;
1782                 pc->pc_map[1] = PC_FREE1;
1783                 pc->pc_map[2] = PC_FREE2;
1784                 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1785                 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1786
1787                 /*
1788                  * The reclaim might have freed a chunk from the current pmap.
1789                  * If that chunk contained available entries, we need to
1790                  * re-count the number of available entries.
1791                  */
1792                 if (reclaimed)
1793                         goto retry;
1794         }
1795         if (!TAILQ_EMPTY(&new_tail)) {
1796                 mtx_lock(&pv_chunks_mutex);
1797                 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1798                 mtx_unlock(&pv_chunks_mutex);
1799         }
1800 }
1801
1802 /*
1803  * First find and then remove the pv entry for the specified pmap and virtual
1804  * address from the specified pv list.  Returns the pv entry if found and NULL
1805  * otherwise.  This operation can be performed on pv lists for either 4KB or
1806  * 2MB page mappings.
1807  */
1808 static __inline pv_entry_t
1809 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1810 {
1811         pv_entry_t pv;
1812
1813         rw_assert(&pvh_global_lock, RA_LOCKED);
1814         TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1815                 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1816                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1817                         pvh->pv_gen++;
1818                         break;
1819                 }
1820         }
1821         return (pv);
1822 }
1823
1824 /*
1825  * First find and then destroy the pv entry for the specified pmap and virtual
1826  * address.  This operation can be performed on pv lists for either 4KB or 2MB
1827  * page mappings.
1828  */
1829 static void
1830 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1831 {
1832         pv_entry_t pv;
1833
1834         pv = pmap_pvh_remove(pvh, pmap, va);
1835
1836         KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1837         free_pv_entry(pmap, pv);
1838 }
1839
1840 /*
1841  * Conditionally create the PV entry for a 4KB page mapping if the required
1842  * memory can be allocated without resorting to reclamation.
1843  */
1844 static boolean_t
1845 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1846     struct rwlock **lockp)
1847 {
1848         pv_entry_t pv;
1849
1850         rw_assert(&pvh_global_lock, RA_LOCKED);
1851         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1852         /* Pass NULL instead of the lock pointer to disable reclamation. */
1853         if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1854                 pv->pv_va = va;
1855                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1856                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1857                 m->md.pv_gen++;
1858                 return (TRUE);
1859         } else
1860                 return (FALSE);
1861 }
1862
1863 /*
1864  * After demotion from a 2MB page mapping to 512 4KB page mappings,
1865  * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1866  * entries for each of the 4KB page mappings.
1867  */
1868 static void __unused
1869 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1870     struct rwlock **lockp)
1871 {
1872         struct md_page *pvh;
1873         struct pv_chunk *pc;
1874         pv_entry_t pv;
1875         vm_page_t m;
1876         vm_offset_t va_last;
1877         int bit, field;
1878
1879         rw_assert(&pvh_global_lock, RA_LOCKED);
1880         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1881         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1882
1883         /*
1884          * Transfer the 2mpage's pv entry for this mapping to the first
1885          * page's pv list.  Once this transfer begins, the pv list lock
1886          * must not be released until the last pv entry is reinstantiated.
1887          */
1888         pvh = pa_to_pvh(pa);
1889         va &= ~L2_OFFSET;
1890         pv = pmap_pvh_remove(pvh, pmap, va);
1891         KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1892         m = PHYS_TO_VM_PAGE(pa);
1893         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1894         m->md.pv_gen++;
1895         /* Instantiate the remaining 511 pv entries. */
1896         va_last = va + L2_SIZE - PAGE_SIZE;
1897         for (;;) {
1898                 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1899                 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1900                     pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1901                 for (field = 0; field < _NPCM; field++) {
1902                         while (pc->pc_map[field] != 0) {
1903                                 bit = ffsl(pc->pc_map[field]) - 1;
1904                                 pc->pc_map[field] &= ~(1ul << bit);
1905                                 pv = &pc->pc_pventry[field * 64 + bit];
1906                                 va += PAGE_SIZE;
1907                                 pv->pv_va = va;
1908                                 m++;
1909                                 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1910                             ("pmap_pv_demote_l2: page %p is not managed", m));
1911                                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1912                                 m->md.pv_gen++;
1913                                 if (va == va_last)
1914                                         goto out;
1915                         }
1916                 }
1917                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1918                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1919         }
1920 out:
1921         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1922                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1923                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1924         }
1925         /* XXX PV stats */
1926 }
1927
1928 #if VM_NRESERVLEVEL > 0
1929 static void
1930 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1931     struct rwlock **lockp)
1932 {
1933         struct md_page *pvh;
1934         pv_entry_t pv;
1935         vm_page_t m;
1936         vm_offset_t va_last;
1937
1938         rw_assert(&pvh_global_lock, RA_LOCKED);
1939         KASSERT((va & L2_OFFSET) == 0,
1940             ("pmap_pv_promote_l2: misaligned va %#lx", va));
1941
1942         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1943
1944         m = PHYS_TO_VM_PAGE(pa);
1945         pv = pmap_pvh_remove(&m->md, pmap, va);
1946         KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1947         pvh = pa_to_pvh(pa);
1948         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1949         pvh->pv_gen++;
1950
1951         va_last = va + L2_SIZE - PAGE_SIZE;
1952         do {
1953                 m++;
1954                 va += PAGE_SIZE;
1955                 pmap_pvh_free(&m->md, pmap, va);
1956         } while (va < va_last);
1957 }
1958 #endif /* VM_NRESERVLEVEL > 0 */
1959
1960 /*
1961  * Create the PV entry for a 2MB page mapping.  Always returns true unless the
1962  * flag PMAP_ENTER_NORECLAIM is specified.  If that flag is specified, returns
1963  * false if the PV entry cannot be allocated without resorting to reclamation.
1964  */
1965 static bool
1966 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1967     struct rwlock **lockp)
1968 {
1969         struct md_page *pvh;
1970         pv_entry_t pv;
1971         vm_paddr_t pa;
1972
1973         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1974         /* Pass NULL instead of the lock pointer to disable reclamation. */
1975         if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1976             NULL : lockp)) == NULL)
1977                 return (false);
1978         pv->pv_va = va;
1979         pa = PTE_TO_PHYS(l2e);
1980         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1981         pvh = pa_to_pvh(pa);
1982         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1983         pvh->pv_gen++;
1984         return (true);
1985 }
1986
1987 static void
1988 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1989 {
1990         pt_entry_t newl2, oldl2;
1991         vm_page_t ml3;
1992         vm_paddr_t ml3pa;
1993
1994         KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1995         KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1996         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1997
1998         ml3 = pmap_remove_pt_page(pmap, va);
1999         if (ml3 == NULL)
2000                 panic("pmap_remove_kernel_l2: Missing pt page");
2001
2002         ml3pa = VM_PAGE_TO_PHYS(ml3);
2003         newl2 = ml3pa | PTE_V;
2004
2005         /*
2006          * Initialize the page table page.
2007          */
2008         pagezero((void *)PHYS_TO_DMAP(ml3pa));
2009
2010         /*
2011          * Demote the mapping.
2012          */
2013         oldl2 = pmap_load_store(l2, newl2);
2014         KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2015             __func__, l2, oldl2));
2016 }
2017
2018 /*
2019  * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2020  */
2021 static int
2022 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2023     pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2024 {
2025         struct md_page *pvh;
2026         pt_entry_t oldl2;
2027         vm_offset_t eva, va;
2028         vm_page_t m, ml3;
2029
2030         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2031         KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2032         oldl2 = pmap_load_clear(l2);
2033         KASSERT((oldl2 & PTE_RWX) != 0,
2034             ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2035
2036         /*
2037          * The sfence.vma documentation states that it is sufficient to specify
2038          * a single address within a superpage mapping.  However, since we do
2039          * not perform any invalidation upon promotion, TLBs may still be
2040          * caching 4KB mappings within the superpage, so we must invalidate the
2041          * entire range.
2042          */
2043         pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2044         if ((oldl2 & PTE_SW_WIRED) != 0)
2045                 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2046         pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2047         if ((oldl2 & PTE_SW_MANAGED) != 0) {
2048                 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2049                 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2050                 pmap_pvh_free(pvh, pmap, sva);
2051                 eva = sva + L2_SIZE;
2052                 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2053                     va < eva; va += PAGE_SIZE, m++) {
2054                         if ((oldl2 & PTE_D) != 0)
2055                                 vm_page_dirty(m);
2056                         if ((oldl2 & PTE_A) != 0)
2057                                 vm_page_aflag_set(m, PGA_REFERENCED);
2058                         if (TAILQ_EMPTY(&m->md.pv_list) &&
2059                             TAILQ_EMPTY(&pvh->pv_list))
2060                                 vm_page_aflag_clear(m, PGA_WRITEABLE);
2061                 }
2062         }
2063         if (pmap == kernel_pmap) {
2064                 pmap_remove_kernel_l2(pmap, l2, sva);
2065         } else {
2066                 ml3 = pmap_remove_pt_page(pmap, sva);
2067                 if (ml3 != NULL) {
2068                         pmap_resident_count_dec(pmap, 1);
2069                         KASSERT(ml3->wire_count == Ln_ENTRIES,
2070                             ("pmap_remove_l2: l3 page wire count error"));
2071                         ml3->wire_count = 1;
2072                         vm_page_unwire_noq(ml3);
2073                         pmap_add_delayed_free_list(ml3, free, FALSE);
2074                 }
2075         }
2076         return (pmap_unuse_pt(pmap, sva, l1e, free));
2077 }
2078
2079 /*
2080  * pmap_remove_l3: do the things to unmap a page in a process
2081  */
2082 static int
2083 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va, 
2084     pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2085 {
2086         pt_entry_t old_l3;
2087         vm_paddr_t phys;
2088         vm_page_t m;
2089
2090         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2091         old_l3 = pmap_load_clear(l3);
2092         pmap_invalidate_page(pmap, va);
2093         if (old_l3 & PTE_SW_WIRED)
2094                 pmap->pm_stats.wired_count -= 1;
2095         pmap_resident_count_dec(pmap, 1);
2096         if (old_l3 & PTE_SW_MANAGED) {
2097                 phys = PTE_TO_PHYS(old_l3);
2098                 m = PHYS_TO_VM_PAGE(phys);
2099                 if ((old_l3 & PTE_D) != 0)
2100                         vm_page_dirty(m);
2101                 if (old_l3 & PTE_A)
2102                         vm_page_aflag_set(m, PGA_REFERENCED);
2103                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2104                 pmap_pvh_free(&m->md, pmap, va);
2105         }
2106
2107         return (pmap_unuse_pt(pmap, va, l2e, free));
2108 }
2109
2110 /*
2111  *      Remove the given range of addresses from the specified map.
2112  *
2113  *      It is assumed that the start and end are properly
2114  *      rounded to the page size.
2115  */
2116 void
2117 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2118 {
2119         struct spglist free;
2120         struct rwlock *lock;
2121         vm_offset_t va, va_next;
2122         pd_entry_t *l1, *l2, l2e;
2123         pt_entry_t *l3;
2124
2125         /*
2126          * Perform an unsynchronized read.  This is, however, safe.
2127          */
2128         if (pmap->pm_stats.resident_count == 0)
2129                 return;
2130
2131         SLIST_INIT(&free);
2132
2133         rw_rlock(&pvh_global_lock);
2134         PMAP_LOCK(pmap);
2135
2136         lock = NULL;
2137         for (; sva < eva; sva = va_next) {
2138                 if (pmap->pm_stats.resident_count == 0)
2139                         break;
2140
2141                 l1 = pmap_l1(pmap, sva);
2142                 if (pmap_load(l1) == 0) {
2143                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2144                         if (va_next < sva)
2145                                 va_next = eva;
2146                         continue;
2147                 }
2148
2149                 /*
2150                  * Calculate index for next page table.
2151                  */
2152                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2153                 if (va_next < sva)
2154                         va_next = eva;
2155
2156                 l2 = pmap_l1_to_l2(l1, sva);
2157                 if (l2 == NULL)
2158                         continue;
2159                 if ((l2e = pmap_load(l2)) == 0)
2160                         continue;
2161                 if ((l2e & PTE_RWX) != 0) {
2162                         if (sva + L2_SIZE == va_next && eva >= va_next) {
2163                                 (void)pmap_remove_l2(pmap, l2, sva,
2164                                     pmap_load(l1), &free, &lock);
2165                                 continue;
2166                         } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2167                             &lock)) {
2168                                 /*
2169                                  * The large page mapping was destroyed.
2170                                  */
2171                                 continue;
2172                         }
2173                         l2e = pmap_load(l2);
2174                 }
2175
2176                 /*
2177                  * Limit our scan to either the end of the va represented
2178                  * by the current page table page, or to the end of the
2179                  * range being removed.
2180                  */
2181                 if (va_next > eva)
2182                         va_next = eva;
2183
2184                 va = va_next;
2185                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2186                     sva += L3_SIZE) {
2187                         if (pmap_load(l3) == 0) {
2188                                 if (va != va_next) {
2189                                         pmap_invalidate_range(pmap, va, sva);
2190                                         va = va_next;
2191                                 }
2192                                 continue;
2193                         }
2194                         if (va == va_next)
2195                                 va = sva;
2196                         if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2197                                 sva += L3_SIZE;
2198                                 break;
2199                         }
2200                 }
2201                 if (va != va_next)
2202                         pmap_invalidate_range(pmap, va, sva);
2203         }
2204         if (lock != NULL)
2205                 rw_wunlock(lock);
2206         rw_runlock(&pvh_global_lock);
2207         PMAP_UNLOCK(pmap);
2208         vm_page_free_pages_toq(&free, false);
2209 }
2210
2211 /*
2212  *      Routine:        pmap_remove_all
2213  *      Function:
2214  *              Removes this physical page from
2215  *              all physical maps in which it resides.
2216  *              Reflects back modify bits to the pager.
2217  *
2218  *      Notes:
2219  *              Original versions of this routine were very
2220  *              inefficient because they iteratively called
2221  *              pmap_remove (slow...)
2222  */
2223
2224 void
2225 pmap_remove_all(vm_page_t m)
2226 {
2227         struct spglist free;
2228         struct md_page *pvh;
2229         pmap_t pmap;
2230         pt_entry_t *l3, l3e;
2231         pd_entry_t *l2, l2e;
2232         pv_entry_t pv;
2233         vm_offset_t va;
2234
2235         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2236             ("pmap_remove_all: page %p is not managed", m));
2237         SLIST_INIT(&free);
2238         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2239             pa_to_pvh(VM_PAGE_TO_PHYS(m));
2240
2241         rw_wlock(&pvh_global_lock);
2242         while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2243                 pmap = PV_PMAP(pv);
2244                 PMAP_LOCK(pmap);
2245                 va = pv->pv_va;
2246                 l2 = pmap_l2(pmap, va);
2247                 (void)pmap_demote_l2(pmap, l2, va);
2248                 PMAP_UNLOCK(pmap);
2249         }
2250         while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2251                 pmap = PV_PMAP(pv);
2252                 PMAP_LOCK(pmap);
2253                 pmap_resident_count_dec(pmap, 1);
2254                 l2 = pmap_l2(pmap, pv->pv_va);
2255                 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2256                 l2e = pmap_load(l2);
2257
2258                 KASSERT((l2e & PTE_RX) == 0,
2259                     ("pmap_remove_all: found a superpage in %p's pv list", m));
2260
2261                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2262                 l3e = pmap_load_clear(l3);
2263                 pmap_invalidate_page(pmap, pv->pv_va);
2264                 if (l3e & PTE_SW_WIRED)
2265                         pmap->pm_stats.wired_count--;
2266                 if ((l3e & PTE_A) != 0)
2267                         vm_page_aflag_set(m, PGA_REFERENCED);
2268
2269                 /*
2270                  * Update the vm_page_t clean and reference bits.
2271                  */
2272                 if ((l3e & PTE_D) != 0)
2273                         vm_page_dirty(m);
2274                 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2275                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2276                 m->md.pv_gen++;
2277                 free_pv_entry(pmap, pv);
2278                 PMAP_UNLOCK(pmap);
2279         }
2280         vm_page_aflag_clear(m, PGA_WRITEABLE);
2281         rw_wunlock(&pvh_global_lock);
2282         vm_page_free_pages_toq(&free, false);
2283 }
2284
2285 /*
2286  *      Set the physical protection on the
2287  *      specified range of this map as requested.
2288  */
2289 void
2290 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2291 {
2292         pd_entry_t *l1, *l2, l2e;
2293         pt_entry_t *l3, l3e, mask;
2294         vm_page_t m;
2295         vm_paddr_t pa;
2296         vm_offset_t va, va_next;
2297         bool anychanged, pv_lists_locked;
2298
2299         if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2300                 pmap_remove(pmap, sva, eva);
2301                 return;
2302         }
2303
2304         if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2305             (VM_PROT_WRITE | VM_PROT_EXECUTE))
2306                 return;
2307
2308         anychanged = false;
2309         pv_lists_locked = false;
2310         mask = 0;
2311         if ((prot & VM_PROT_WRITE) == 0)
2312                 mask |= PTE_W | PTE_D;
2313         if ((prot & VM_PROT_EXECUTE) == 0)
2314                 mask |= PTE_X;
2315 resume:
2316         PMAP_LOCK(pmap);
2317         for (; sva < eva; sva = va_next) {
2318                 l1 = pmap_l1(pmap, sva);
2319                 if (pmap_load(l1) == 0) {
2320                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2321                         if (va_next < sva)
2322                                 va_next = eva;
2323                         continue;
2324                 }
2325
2326                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2327                 if (va_next < sva)
2328                         va_next = eva;
2329
2330                 l2 = pmap_l1_to_l2(l1, sva);
2331                 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2332                         continue;
2333                 if ((l2e & PTE_RWX) != 0) {
2334                         if (sva + L2_SIZE == va_next && eva >= va_next) {
2335 retryl2:
2336                                 if ((l2e & (PTE_SW_MANAGED | PTE_D)) ==
2337                                     (PTE_SW_MANAGED | PTE_D)) {
2338                                         pa = PTE_TO_PHYS(l2e);
2339                                         for (va = sva, m = PHYS_TO_VM_PAGE(pa);
2340                                             va < va_next; m++, va += PAGE_SIZE)
2341                                                 vm_page_dirty(m);
2342                                 }
2343                                 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2344                                         goto retryl2;
2345                                 anychanged = true;
2346                         } else {
2347                                 if (!pv_lists_locked) {
2348                                         pv_lists_locked = true;
2349                                         if (!rw_try_rlock(&pvh_global_lock)) {
2350                                                 if (anychanged)
2351                                                         pmap_invalidate_all(
2352                                                             pmap);
2353                                                 PMAP_UNLOCK(pmap);
2354                                                 rw_rlock(&pvh_global_lock);
2355                                                 goto resume;
2356                                         }
2357                                 }
2358                                 if (!pmap_demote_l2(pmap, l2, sva)) {
2359                                         /*
2360                                          * The large page mapping was destroyed.
2361                                          */
2362                                         continue;
2363                                 }
2364                         }
2365                 }
2366
2367                 if (va_next > eva)
2368                         va_next = eva;
2369
2370                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2371                     sva += L3_SIZE) {
2372                         l3e = pmap_load(l3);
2373 retryl3:
2374                         if ((l3e & PTE_V) == 0)
2375                                 continue;
2376                         if ((prot & VM_PROT_WRITE) == 0 &&
2377                             (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2378                             (PTE_SW_MANAGED | PTE_D)) {
2379                                 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2380                                 vm_page_dirty(m);
2381                         }
2382                         if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2383                                 goto retryl3;
2384                         anychanged = true;
2385                 }
2386         }
2387         if (anychanged)
2388                 pmap_invalidate_all(pmap);
2389         if (pv_lists_locked)
2390                 rw_runlock(&pvh_global_lock);
2391         PMAP_UNLOCK(pmap);
2392 }
2393
2394 int
2395 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2396 {
2397         pd_entry_t *l2, l2e;
2398         pt_entry_t bits, *pte, oldpte;
2399         int rv;
2400
2401         rv = 0;
2402         PMAP_LOCK(pmap);
2403         l2 = pmap_l2(pmap, va);
2404         if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2405                 goto done;
2406         if ((l2e & PTE_RWX) == 0) {
2407                 pte = pmap_l2_to_l3(l2, va);
2408                 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2409                         goto done;
2410         } else {
2411                 pte = l2;
2412                 oldpte = l2e;
2413         }
2414
2415         if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2416             (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2417             (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2418             (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2419                 goto done;
2420
2421         bits = PTE_A;
2422         if (ftype == VM_PROT_WRITE)
2423                 bits |= PTE_D;
2424
2425         /*
2426          * Spurious faults can occur if the implementation caches invalid
2427          * entries in the TLB, or if simultaneous accesses on multiple CPUs
2428          * race with each other.
2429          */
2430         if ((oldpte & bits) != bits)
2431                 pmap_store_bits(pte, bits);
2432         sfence_vma();
2433         rv = 1;
2434 done:
2435         PMAP_UNLOCK(pmap);
2436         return (rv);
2437 }
2438
2439 static bool
2440 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2441 {
2442         struct rwlock *lock;
2443         bool rv;
2444
2445         lock = NULL;
2446         rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2447         if (lock != NULL)
2448                 rw_wunlock(lock);
2449         return (rv);
2450 }
2451
2452 /*
2453  * Tries to demote a 2MB page mapping.  If demotion fails, the 2MB page
2454  * mapping is invalidated.
2455  */
2456 static bool
2457 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2458     struct rwlock **lockp)
2459 {
2460         struct spglist free;
2461         vm_page_t mpte;
2462         pd_entry_t newl2, oldl2;
2463         pt_entry_t *firstl3, newl3;
2464         vm_paddr_t mptepa;
2465         int i;
2466
2467         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2468
2469         oldl2 = pmap_load(l2);
2470         KASSERT((oldl2 & PTE_RWX) != 0,
2471             ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2472         if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2473             NULL) {
2474                 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2475                     pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2476                     VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2477                     NULL) {
2478                         SLIST_INIT(&free);
2479                         (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2480                             pmap_load(pmap_l1(pmap, va)), &free, lockp);
2481                         vm_page_free_pages_toq(&free, true);
2482                         CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2483                             "failure for va %#lx in pmap %p", va, pmap);
2484                         return (false);
2485                 }
2486                 if (va < VM_MAXUSER_ADDRESS)
2487                         pmap_resident_count_inc(pmap, 1);
2488         }
2489         mptepa = VM_PAGE_TO_PHYS(mpte);
2490         firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2491         newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2492         KASSERT((oldl2 & PTE_A) != 0,
2493             ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2494         KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2495             ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2496         newl3 = oldl2;
2497
2498         /*
2499          * If the page table page is new, initialize it.
2500          */
2501         if (mpte->wire_count == 1) {
2502                 mpte->wire_count = Ln_ENTRIES;
2503                 for (i = 0; i < Ln_ENTRIES; i++)
2504                         pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2505         }
2506         KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2507             ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2508             "addresses"));
2509
2510         /*
2511          * If the mapping has changed attributes, update the page table
2512          * entries.
2513          */
2514         if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2515                 for (i = 0; i < Ln_ENTRIES; i++)
2516                         pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2517
2518         /*
2519          * The spare PV entries must be reserved prior to demoting the
2520          * mapping, that is, prior to changing the L2 entry.  Otherwise, the
2521          * state of the L2 entry and the PV lists will be inconsistent, which
2522          * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2523          * the wrong PV list and pmap_pv_demote_l2() failing to find the
2524          * expected PV entry for the 2MB page mapping that is being demoted.
2525          */
2526         if ((oldl2 & PTE_SW_MANAGED) != 0)
2527                 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2528
2529         /*
2530          * Demote the mapping.
2531          */
2532         pmap_store(l2, newl2);
2533
2534         /*
2535          * Demote the PV entry.
2536          */
2537         if ((oldl2 & PTE_SW_MANAGED) != 0)
2538                 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2539
2540         atomic_add_long(&pmap_l2_demotions, 1);
2541         CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2542             va, pmap);
2543         return (true);
2544 }
2545
2546 #if VM_NRESERVLEVEL > 0
2547 static void
2548 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2549     struct rwlock **lockp)
2550 {
2551         pt_entry_t *firstl3, *l3;
2552         vm_paddr_t pa;
2553         vm_page_t ml3;
2554
2555         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2556
2557         va &= ~L2_OFFSET;
2558         KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2559             ("pmap_promote_l2: invalid l2 entry %p", l2));
2560
2561         firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2562         pa = PTE_TO_PHYS(pmap_load(firstl3));
2563         if ((pa & L2_OFFSET) != 0) {
2564                 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2565                     va, pmap);
2566                 atomic_add_long(&pmap_l2_p_failures, 1);
2567                 return;
2568         }
2569
2570         pa += PAGE_SIZE;
2571         for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2572                 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2573                         CTR2(KTR_PMAP,
2574                             "pmap_promote_l2: failure for va %#lx pmap %p",
2575                             va, pmap);
2576                         atomic_add_long(&pmap_l2_p_failures, 1);
2577                         return;
2578                 }
2579                 if ((pmap_load(l3) & PTE_PROMOTE) !=
2580                     (pmap_load(firstl3) & PTE_PROMOTE)) {
2581                         CTR2(KTR_PMAP,
2582                             "pmap_promote_l2: failure for va %#lx pmap %p",
2583                             va, pmap);
2584                         atomic_add_long(&pmap_l2_p_failures, 1);
2585                         return;
2586                 }
2587                 pa += PAGE_SIZE;
2588         }
2589
2590         ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2591         KASSERT(ml3->pindex == pmap_l2_pindex(va),
2592             ("pmap_promote_l2: page table page's pindex is wrong"));
2593         if (pmap_insert_pt_page(pmap, ml3)) {
2594                 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2595                     va, pmap);
2596                 atomic_add_long(&pmap_l2_p_failures, 1);
2597                 return;
2598         }
2599
2600         if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2601                 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2602                     lockp);
2603
2604         pmap_store(l2, pmap_load(firstl3));
2605
2606         atomic_add_long(&pmap_l2_promotions, 1);
2607         CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2608             pmap);
2609 }
2610 #endif
2611
2612 /*
2613  *      Insert the given physical page (p) at
2614  *      the specified virtual address (v) in the
2615  *      target physical map with the protection requested.
2616  *
2617  *      If specified, the page will be wired down, meaning
2618  *      that the related pte can not be reclaimed.
2619  *
2620  *      NB:  This is the only routine which MAY NOT lazy-evaluate
2621  *      or lose information.  That is, this routine must actually
2622  *      insert this page into the given map NOW.
2623  */
2624 int
2625 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2626     u_int flags, int8_t psind)
2627 {
2628         struct rwlock *lock;
2629         pd_entry_t *l1, *l2, l2e;
2630         pt_entry_t new_l3, orig_l3;
2631         pt_entry_t *l3;
2632         pv_entry_t pv;
2633         vm_paddr_t opa, pa, l2_pa, l3_pa;
2634         vm_page_t mpte, om, l2_m, l3_m;
2635         pt_entry_t entry;
2636         pn_t l2_pn, l3_pn, pn;
2637         int rv;
2638         bool nosleep;
2639
2640         va = trunc_page(va);
2641         if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2642                 VM_OBJECT_ASSERT_LOCKED(m->object);
2643         pa = VM_PAGE_TO_PHYS(m);
2644         pn = (pa / PAGE_SIZE);
2645
2646         new_l3 = PTE_V | PTE_R | PTE_A;
2647         if (prot & VM_PROT_EXECUTE)
2648                 new_l3 |= PTE_X;
2649         if (flags & VM_PROT_WRITE)
2650                 new_l3 |= PTE_D;
2651         if (prot & VM_PROT_WRITE)
2652                 new_l3 |= PTE_W;
2653         if (va < VM_MAX_USER_ADDRESS)
2654                 new_l3 |= PTE_U;
2655
2656         new_l3 |= (pn << PTE_PPN0_S);
2657         if ((flags & PMAP_ENTER_WIRED) != 0)
2658                 new_l3 |= PTE_SW_WIRED;
2659
2660         /*
2661          * Set modified bit gratuitously for writeable mappings if
2662          * the page is unmanaged. We do not want to take a fault
2663          * to do the dirty bit accounting for these mappings.
2664          */
2665         if ((m->oflags & VPO_UNMANAGED) != 0) {
2666                 if (prot & VM_PROT_WRITE)
2667                         new_l3 |= PTE_D;
2668         } else
2669                 new_l3 |= PTE_SW_MANAGED;
2670
2671         CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2672
2673         lock = NULL;
2674         mpte = NULL;
2675         rw_rlock(&pvh_global_lock);
2676         PMAP_LOCK(pmap);
2677         if (psind == 1) {
2678                 /* Assert the required virtual and physical alignment. */
2679                 KASSERT((va & L2_OFFSET) == 0,
2680                     ("pmap_enter: va %#lx unaligned", va));
2681                 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2682                 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2683                 goto out;
2684         }
2685
2686         l2 = pmap_l2(pmap, va);
2687         if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2688             ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2689             va, &lock))) {
2690                 l3 = pmap_l2_to_l3(l2, va);
2691                 if (va < VM_MAXUSER_ADDRESS) {
2692                         mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2693                         mpte->wire_count++;
2694                 }
2695         } else if (va < VM_MAXUSER_ADDRESS) {
2696                 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2697                 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2698                 if (mpte == NULL && nosleep) {
2699                         CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2700                         if (lock != NULL)
2701                                 rw_wunlock(lock);
2702                         rw_runlock(&pvh_global_lock);
2703                         PMAP_UNLOCK(pmap);
2704                         return (KERN_RESOURCE_SHORTAGE);
2705                 }
2706                 l3 = pmap_l3(pmap, va);
2707         } else {
2708                 l3 = pmap_l3(pmap, va);
2709                 /* TODO: This is not optimal, but should mostly work */
2710                 if (l3 == NULL) {
2711                         if (l2 == NULL) {
2712                                 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2713                                     VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2714                                     VM_ALLOC_ZERO);
2715                                 if (l2_m == NULL)
2716                                         panic("pmap_enter: l2 pte_m == NULL");
2717                                 if ((l2_m->flags & PG_ZERO) == 0)
2718                                         pmap_zero_page(l2_m);
2719
2720                                 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2721                                 l2_pn = (l2_pa / PAGE_SIZE);
2722
2723                                 l1 = pmap_l1(pmap, va);
2724                                 entry = (PTE_V);
2725                                 entry |= (l2_pn << PTE_PPN0_S);
2726                                 pmap_store(l1, entry);
2727                                 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2728                                 l2 = pmap_l1_to_l2(l1, va);
2729                         }
2730
2731                         l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2732                             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2733                         if (l3_m == NULL)
2734                                 panic("pmap_enter: l3 pte_m == NULL");
2735                         if ((l3_m->flags & PG_ZERO) == 0)
2736                                 pmap_zero_page(l3_m);
2737
2738                         l3_pa = VM_PAGE_TO_PHYS(l3_m);
2739                         l3_pn = (l3_pa / PAGE_SIZE);
2740                         entry = (PTE_V);
2741                         entry |= (l3_pn << PTE_PPN0_S);
2742                         pmap_store(l2, entry);
2743                         l3 = pmap_l2_to_l3(l2, va);
2744                 }
2745                 pmap_invalidate_page(pmap, va);
2746         }
2747
2748         orig_l3 = pmap_load(l3);
2749         opa = PTE_TO_PHYS(orig_l3);
2750         pv = NULL;
2751
2752         /*
2753          * Is the specified virtual address already mapped?
2754          */
2755         if ((orig_l3 & PTE_V) != 0) {
2756                 /*
2757                  * Wiring change, just update stats. We don't worry about
2758                  * wiring PT pages as they remain resident as long as there
2759                  * are valid mappings in them. Hence, if a user page is wired,
2760                  * the PT page will be also.
2761                  */
2762                 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2763                     (orig_l3 & PTE_SW_WIRED) == 0)
2764                         pmap->pm_stats.wired_count++;
2765                 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2766                     (orig_l3 & PTE_SW_WIRED) != 0)
2767                         pmap->pm_stats.wired_count--;
2768
2769                 /*
2770                  * Remove the extra PT page reference.
2771                  */
2772                 if (mpte != NULL) {
2773                         mpte->wire_count--;
2774                         KASSERT(mpte->wire_count > 0,
2775                             ("pmap_enter: missing reference to page table page,"
2776                              " va: 0x%lx", va));
2777                 }
2778
2779                 /*
2780                  * Has the physical page changed?
2781                  */
2782                 if (opa == pa) {
2783                         /*
2784                          * No, might be a protection or wiring change.
2785                          */
2786                         if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2787                             (new_l3 & PTE_W) != 0)
2788                                 vm_page_aflag_set(m, PGA_WRITEABLE);
2789                         goto validate;
2790                 }
2791
2792                 /*
2793                  * The physical page has changed.  Temporarily invalidate
2794                  * the mapping.  This ensures that all threads sharing the
2795                  * pmap keep a consistent view of the mapping, which is
2796                  * necessary for the correct handling of COW faults.  It
2797                  * also permits reuse of the old mapping's PV entry,
2798                  * avoiding an allocation.
2799                  *
2800                  * For consistency, handle unmanaged mappings the same way.
2801                  */
2802                 orig_l3 = pmap_load_clear(l3);
2803                 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2804                     ("pmap_enter: unexpected pa update for %#lx", va));
2805                 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2806                         om = PHYS_TO_VM_PAGE(opa);
2807
2808                         /*
2809                          * The pmap lock is sufficient to synchronize with
2810                          * concurrent calls to pmap_page_test_mappings() and
2811                          * pmap_ts_referenced().
2812                          */
2813                         if ((orig_l3 & PTE_D) != 0)
2814                                 vm_page_dirty(om);
2815                         if ((orig_l3 & PTE_A) != 0)
2816                                 vm_page_aflag_set(om, PGA_REFERENCED);
2817                         CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2818                         pv = pmap_pvh_remove(&om->md, pmap, va);
2819                         KASSERT(pv != NULL,
2820                             ("pmap_enter: no PV entry for %#lx", va));
2821                         if ((new_l3 & PTE_SW_MANAGED) == 0)
2822                                 free_pv_entry(pmap, pv);
2823                         if ((om->aflags & PGA_WRITEABLE) != 0 &&
2824                             TAILQ_EMPTY(&om->md.pv_list))
2825                                 vm_page_aflag_clear(om, PGA_WRITEABLE);
2826                 }
2827                 pmap_invalidate_page(pmap, va);
2828                 orig_l3 = 0;
2829         } else {
2830                 /*
2831                  * Increment the counters.
2832                  */
2833                 if ((new_l3 & PTE_SW_WIRED) != 0)
2834                         pmap->pm_stats.wired_count++;
2835                 pmap_resident_count_inc(pmap, 1);
2836         }
2837         /*
2838          * Enter on the PV list if part of our managed memory.
2839          */
2840         if ((new_l3 & PTE_SW_MANAGED) != 0) {
2841                 if (pv == NULL) {
2842                         pv = get_pv_entry(pmap, &lock);
2843                         pv->pv_va = va;
2844                 }
2845                 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2846                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2847                 m->md.pv_gen++;
2848                 if ((new_l3 & PTE_W) != 0)
2849                         vm_page_aflag_set(m, PGA_WRITEABLE);
2850         }
2851
2852 validate:
2853         /*
2854          * Sync the i-cache on all harts before updating the PTE
2855          * if the new PTE is executable.
2856          */
2857         if (prot & VM_PROT_EXECUTE)
2858                 pmap_sync_icache(pmap, va, PAGE_SIZE);
2859
2860         /*
2861          * Update the L3 entry.
2862          */
2863         if (orig_l3 != 0) {
2864                 orig_l3 = pmap_load_store(l3, new_l3);
2865                 pmap_invalidate_page(pmap, va);
2866                 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2867                     ("pmap_enter: invalid update"));
2868                 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2869                     (PTE_D | PTE_SW_MANAGED))
2870                         vm_page_dirty(m);
2871         } else {
2872                 pmap_store(l3, new_l3);
2873         }
2874
2875 #if VM_NRESERVLEVEL > 0
2876         if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2877             pmap_ps_enabled(pmap) &&
2878             (m->flags & PG_FICTITIOUS) == 0 &&
2879             vm_reserv_level_iffullpop(m) == 0)
2880                 pmap_promote_l2(pmap, l2, va, &lock);
2881 #endif
2882
2883         rv = KERN_SUCCESS;
2884 out:
2885         if (lock != NULL)
2886                 rw_wunlock(lock);
2887         rw_runlock(&pvh_global_lock);
2888         PMAP_UNLOCK(pmap);
2889         return (rv);
2890 }
2891
2892 /*
2893  * Tries to create a read- and/or execute-only 2MB page mapping.  Returns true
2894  * if successful.  Returns false if (1) a page table page cannot be allocated
2895  * without sleeping, (2) a mapping already exists at the specified virtual
2896  * address, or (3) a PV entry cannot be allocated without reclaiming another
2897  * PV entry.
2898  */
2899 static bool
2900 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2901     struct rwlock **lockp)
2902 {
2903         pd_entry_t new_l2;
2904         pn_t pn;
2905
2906         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2907
2908         pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2909         new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2910         if ((m->oflags & VPO_UNMANAGED) == 0)
2911                 new_l2 |= PTE_SW_MANAGED;
2912         if ((prot & VM_PROT_EXECUTE) != 0)
2913                 new_l2 |= PTE_X;
2914         if (va < VM_MAXUSER_ADDRESS)
2915                 new_l2 |= PTE_U;
2916         return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2917             PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2918             KERN_SUCCESS);
2919 }
2920
2921 /*
2922  * Tries to create the specified 2MB page mapping.  Returns KERN_SUCCESS if
2923  * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2924  * otherwise.  Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2925  * a mapping already exists at the specified virtual address.  Returns
2926  * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2927  * page allocation failed.  Returns KERN_RESOURCE_SHORTAGE if
2928  * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2929  *
2930  * The parameter "m" is only used when creating a managed, writeable mapping.
2931  */
2932 static int
2933 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2934     vm_page_t m, struct rwlock **lockp)
2935 {
2936         struct spglist free;
2937         pd_entry_t *l2, *l3, oldl2;
2938         vm_offset_t sva;
2939         vm_page_t l2pg, mt;
2940
2941         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2942
2943         if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2944             NULL : lockp)) == NULL) {
2945                 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2946                     va, pmap);
2947                 return (KERN_RESOURCE_SHORTAGE);
2948         }
2949
2950         l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2951         l2 = &l2[pmap_l2_index(va)];
2952         if ((oldl2 = pmap_load(l2)) != 0) {
2953                 KASSERT(l2pg->wire_count > 1,
2954                     ("pmap_enter_l2: l2pg's wire count is too low"));
2955                 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2956                         l2pg->wire_count--;
2957                         CTR2(KTR_PMAP,
2958                             "pmap_enter_l2: failure for va %#lx in pmap %p",
2959                             va, pmap);
2960                         return (KERN_FAILURE);
2961                 }
2962                 SLIST_INIT(&free);
2963                 if ((oldl2 & PTE_RWX) != 0)
2964                         (void)pmap_remove_l2(pmap, l2, va,
2965                             pmap_load(pmap_l1(pmap, va)), &free, lockp);
2966                 else
2967                         for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2968                                 l3 = pmap_l2_to_l3(l2, sva);
2969                                 if ((pmap_load(l3) & PTE_V) != 0 &&
2970                                     pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2971                                     lockp) != 0)
2972                                         break;
2973                         }
2974                 vm_page_free_pages_toq(&free, true);
2975                 if (va >= VM_MAXUSER_ADDRESS) {
2976                         mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2977                         if (pmap_insert_pt_page(pmap, mt)) {
2978                                 /*
2979                                  * XXX Currently, this can't happen bacuse
2980                                  * we do not perform pmap_enter(psind == 1)
2981                                  * on the kernel pmap.
2982                                  */
2983                                 panic("pmap_enter_l2: trie insert failed");
2984                         }
2985                 } else
2986                         KASSERT(pmap_load(l2) == 0,
2987                             ("pmap_enter_l2: non-zero L2 entry %p", l2));
2988         }
2989
2990         if ((new_l2 & PTE_SW_MANAGED) != 0) {
2991                 /*
2992                  * Abort this mapping if its PV entry could not be created.
2993                  */
2994                 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2995                         SLIST_INIT(&free);
2996                         if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2997                                 /*
2998                                  * Although "va" is not mapped, paging-structure
2999                                  * caches could nonetheless have entries that
3000                                  * refer to the freed page table pages.
3001                                  * Invalidate those entries.
3002                                  */
3003                                 pmap_invalidate_page(pmap, va);
3004                                 vm_page_free_pages_toq(&free, true);
3005                         }
3006                         CTR2(KTR_PMAP,
3007                             "pmap_enter_l2: failure for va %#lx in pmap %p",
3008                             va, pmap);
3009                         return (KERN_RESOURCE_SHORTAGE);
3010                 }
3011                 if ((new_l2 & PTE_W) != 0)
3012                         for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3013                                 vm_page_aflag_set(mt, PGA_WRITEABLE);
3014         }
3015
3016         /*
3017          * Increment counters.
3018          */
3019         if ((new_l2 & PTE_SW_WIRED) != 0)
3020                 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3021         pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3022
3023         /*
3024          * Map the superpage.
3025          */
3026         pmap_store(l2, new_l2);
3027
3028         atomic_add_long(&pmap_l2_mappings, 1);
3029         CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3030             va, pmap);
3031
3032         return (KERN_SUCCESS);
3033 }
3034
3035 /*
3036  * Maps a sequence of resident pages belonging to the same object.
3037  * The sequence begins with the given page m_start.  This page is
3038  * mapped at the given virtual address start.  Each subsequent page is
3039  * mapped at a virtual address that is offset from start by the same
3040  * amount as the page is offset from m_start within the object.  The
3041  * last page in the sequence is the page with the largest offset from
3042  * m_start that can be mapped at a virtual address less than the given
3043  * virtual address end.  Not every virtual page between start and end
3044  * is mapped; only those for which a resident page exists with the
3045  * corresponding offset from m_start are mapped.
3046  */
3047 void
3048 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3049     vm_page_t m_start, vm_prot_t prot)
3050 {
3051         struct rwlock *lock;
3052         vm_offset_t va;
3053         vm_page_t m, mpte;
3054         vm_pindex_t diff, psize;
3055
3056         VM_OBJECT_ASSERT_LOCKED(m_start->object);
3057
3058         psize = atop(end - start);
3059         mpte = NULL;
3060         m = m_start;
3061         lock = NULL;
3062         rw_rlock(&pvh_global_lock);
3063         PMAP_LOCK(pmap);
3064         while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3065                 va = start + ptoa(diff);
3066                 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3067                     m->psind == 1 && pmap_ps_enabled(pmap) &&
3068                     pmap_enter_2mpage(pmap, va, m, prot, &lock))
3069                         m = &m[L2_SIZE / PAGE_SIZE - 1];
3070                 else
3071                         mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3072                             &lock);
3073                 m = TAILQ_NEXT(m, listq);
3074         }
3075         if (lock != NULL)
3076                 rw_wunlock(lock);
3077         rw_runlock(&pvh_global_lock);
3078         PMAP_UNLOCK(pmap);
3079 }
3080
3081 /*
3082  * this code makes some *MAJOR* assumptions:
3083  * 1. Current pmap & pmap exists.
3084  * 2. Not wired.
3085  * 3. Read access.
3086  * 4. No page table pages.
3087  * but is *MUCH* faster than pmap_enter...
3088  */
3089
3090 void
3091 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3092 {
3093         struct rwlock *lock;
3094
3095         lock = NULL;
3096         rw_rlock(&pvh_global_lock);
3097         PMAP_LOCK(pmap);
3098         (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3099         if (lock != NULL)
3100                 rw_wunlock(lock);
3101         rw_runlock(&pvh_global_lock);
3102         PMAP_UNLOCK(pmap);
3103 }
3104
3105 static vm_page_t
3106 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3107     vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3108 {
3109         struct spglist free;
3110         vm_paddr_t phys;
3111         pd_entry_t *l2;
3112         pt_entry_t *l3, newl3;
3113
3114         KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3115             (m->oflags & VPO_UNMANAGED) != 0,
3116             ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3117         rw_assert(&pvh_global_lock, RA_LOCKED);
3118         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3119
3120         CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3121         /*
3122          * In the case that a page table page is not
3123          * resident, we are creating it here.
3124          */
3125         if (va < VM_MAXUSER_ADDRESS) {
3126                 vm_pindex_t l2pindex;
3127
3128                 /*
3129                  * Calculate pagetable page index
3130                  */
3131                 l2pindex = pmap_l2_pindex(va);
3132                 if (mpte && (mpte->pindex == l2pindex)) {
3133                         mpte->wire_count++;
3134                 } else {
3135                         /*
3136                          * Get the l2 entry
3137                          */
3138                         l2 = pmap_l2(pmap, va);
3139
3140                         /*
3141                          * If the page table page is mapped, we just increment
3142                          * the hold count, and activate it.  Otherwise, we
3143                          * attempt to allocate a page table page.  If this
3144                          * attempt fails, we don't retry.  Instead, we give up.
3145                          */
3146                         if (l2 != NULL && pmap_load(l2) != 0) {
3147                                 phys = PTE_TO_PHYS(pmap_load(l2));
3148                                 mpte = PHYS_TO_VM_PAGE(phys);
3149                                 mpte->wire_count++;
3150                         } else {
3151                                 /*
3152                                  * Pass NULL instead of the PV list lock
3153                                  * pointer, because we don't intend to sleep.
3154                                  */
3155                                 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3156                                 if (mpte == NULL)
3157                                         return (mpte);
3158                         }
3159                 }
3160                 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3161                 l3 = &l3[pmap_l3_index(va)];
3162         } else {
3163                 mpte = NULL;
3164                 l3 = pmap_l3(kernel_pmap, va);
3165         }
3166         if (l3 == NULL)
3167                 panic("pmap_enter_quick_locked: No l3");
3168         if (pmap_load(l3) != 0) {
3169                 if (mpte != NULL) {
3170                         mpte->wire_count--;
3171                         mpte = NULL;
3172                 }
3173                 return (mpte);
3174         }
3175
3176         /*
3177          * Enter on the PV list if part of our managed memory.
3178          */
3179         if ((m->oflags & VPO_UNMANAGED) == 0 &&
3180             !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3181                 if (mpte != NULL) {
3182                         SLIST_INIT(&free);
3183                         if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3184                                 pmap_invalidate_page(pmap, va);
3185                                 vm_page_free_pages_toq(&free, false);
3186                         }
3187                         mpte = NULL;
3188                 }
3189                 return (mpte);
3190         }
3191
3192         /*
3193          * Increment counters
3194          */
3195         pmap_resident_count_inc(pmap, 1);
3196
3197         newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3198             PTE_V | PTE_R;
3199         if ((prot & VM_PROT_EXECUTE) != 0)
3200                 newl3 |= PTE_X;
3201         if ((m->oflags & VPO_UNMANAGED) == 0)
3202                 newl3 |= PTE_SW_MANAGED;
3203         if (va < VM_MAX_USER_ADDRESS)
3204                 newl3 |= PTE_U;
3205
3206         /*
3207          * Sync the i-cache on all harts before updating the PTE
3208          * if the new PTE is executable.
3209          */
3210         if (prot & VM_PROT_EXECUTE)
3211                 pmap_sync_icache(pmap, va, PAGE_SIZE);
3212
3213         pmap_store(l3, newl3);
3214
3215         pmap_invalidate_page(pmap, va);
3216         return (mpte);
3217 }
3218
3219 /*
3220  * This code maps large physical mmap regions into the
3221  * processor address space.  Note that some shortcuts
3222  * are taken, but the code works.
3223  */
3224 void
3225 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3226     vm_pindex_t pindex, vm_size_t size)
3227 {
3228
3229         VM_OBJECT_ASSERT_WLOCKED(object);
3230         KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3231             ("pmap_object_init_pt: non-device object"));
3232 }
3233
3234 /*
3235  *      Clear the wired attribute from the mappings for the specified range of
3236  *      addresses in the given pmap.  Every valid mapping within that range
3237  *      must have the wired attribute set.  In contrast, invalid mappings
3238  *      cannot have the wired attribute set, so they are ignored.
3239  *
3240  *      The wired attribute of the page table entry is not a hardware feature,
3241  *      so there is no need to invalidate any TLB entries.
3242  */
3243 void
3244 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3245 {
3246         vm_offset_t va_next;
3247         pd_entry_t *l1, *l2, l2e;
3248         pt_entry_t *l3, l3e;
3249         bool pv_lists_locked;
3250
3251         pv_lists_locked = false;
3252 retry:
3253         PMAP_LOCK(pmap);
3254         for (; sva < eva; sva = va_next) {
3255                 l1 = pmap_l1(pmap, sva);
3256                 if (pmap_load(l1) == 0) {
3257                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3258                         if (va_next < sva)
3259                                 va_next = eva;
3260                         continue;
3261                 }
3262
3263                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3264                 if (va_next < sva)
3265                         va_next = eva;
3266
3267                 l2 = pmap_l1_to_l2(l1, sva);
3268                 if ((l2e = pmap_load(l2)) == 0)
3269                         continue;
3270                 if ((l2e & PTE_RWX) != 0) {
3271                         if (sva + L2_SIZE == va_next && eva >= va_next) {
3272                                 if ((l2e & PTE_SW_WIRED) == 0)
3273                                         panic("pmap_unwire: l2 %#jx is missing "
3274                                             "PTE_SW_WIRED", (uintmax_t)l2e);
3275                                 pmap_clear_bits(l2, PTE_SW_WIRED);
3276                                 continue;
3277                         } else {
3278                                 if (!pv_lists_locked) {
3279                                         pv_lists_locked = true;
3280                                         if (!rw_try_rlock(&pvh_global_lock)) {
3281                                                 PMAP_UNLOCK(pmap);
3282                                                 rw_rlock(&pvh_global_lock);
3283                                                 /* Repeat sva. */
3284                                                 goto retry;
3285                                         }
3286                                 }
3287                                 if (!pmap_demote_l2(pmap, l2, sva))
3288                                         panic("pmap_unwire: demotion failed");
3289                         }
3290                 }
3291
3292                 if (va_next > eva)
3293                         va_next = eva;
3294                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3295                     sva += L3_SIZE) {
3296                         if ((l3e = pmap_load(l3)) == 0)
3297                                 continue;
3298                         if ((l3e & PTE_SW_WIRED) == 0)
3299                                 panic("pmap_unwire: l3 %#jx is missing "
3300                                     "PTE_SW_WIRED", (uintmax_t)l3e);
3301
3302                         /*
3303                          * PG_W must be cleared atomically.  Although the pmap
3304                          * lock synchronizes access to PG_W, another processor
3305                          * could be setting PG_M and/or PG_A concurrently.
3306                          */
3307                         pmap_clear_bits(l3, PTE_SW_WIRED);
3308                         pmap->pm_stats.wired_count--;
3309                 }
3310         }
3311         if (pv_lists_locked)
3312                 rw_runlock(&pvh_global_lock);
3313         PMAP_UNLOCK(pmap);
3314 }
3315
3316 /*
3317  *      Copy the range specified by src_addr/len
3318  *      from the source map to the range dst_addr/len
3319  *      in the destination map.
3320  *
3321  *      This routine is only advisory and need not do anything.
3322  */
3323
3324 void
3325 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3326     vm_offset_t src_addr)
3327 {
3328
3329 }
3330
3331 /*
3332  *      pmap_zero_page zeros the specified hardware page by mapping
3333  *      the page into KVM and using bzero to clear its contents.
3334  */
3335 void
3336 pmap_zero_page(vm_page_t m)
3337 {
3338         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3339
3340         pagezero((void *)va);
3341 }
3342
3343 /*
3344  *      pmap_zero_page_area zeros the specified hardware page by mapping 
3345  *      the page into KVM and using bzero to clear its contents.
3346  *
3347  *      off and size may not cover an area beyond a single hardware page.
3348  */
3349 void
3350 pmap_zero_page_area(vm_page_t m, int off, int size)
3351 {
3352         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3353
3354         if (off == 0 && size == PAGE_SIZE)
3355                 pagezero((void *)va);
3356         else
3357                 bzero((char *)va + off, size);
3358 }
3359
3360 /*
3361  *      pmap_copy_page copies the specified (machine independent)
3362  *      page by mapping the page into virtual memory and using
3363  *      bcopy to copy the page, one machine dependent page at a
3364  *      time.
3365  */
3366 void
3367 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3368 {
3369         vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3370         vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3371
3372         pagecopy((void *)src, (void *)dst);
3373 }
3374
3375 int unmapped_buf_allowed = 1;
3376
3377 void
3378 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3379     vm_offset_t b_offset, int xfersize)
3380 {
3381         void *a_cp, *b_cp;
3382         vm_page_t m_a, m_b;
3383         vm_paddr_t p_a, p_b;
3384         vm_offset_t a_pg_offset, b_pg_offset;
3385         int cnt;
3386
3387         while (xfersize > 0) {
3388                 a_pg_offset = a_offset & PAGE_MASK;
3389                 m_a = ma[a_offset >> PAGE_SHIFT];
3390                 p_a = m_a->phys_addr;
3391                 b_pg_offset = b_offset & PAGE_MASK;
3392                 m_b = mb[b_offset >> PAGE_SHIFT];
3393                 p_b = m_b->phys_addr;
3394                 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3395                 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3396                 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3397                         panic("!DMAP a %lx", p_a);
3398                 } else {
3399                         a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3400                 }
3401                 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3402                         panic("!DMAP b %lx", p_b);
3403                 } else {
3404                         b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3405                 }
3406                 bcopy(a_cp, b_cp, cnt);
3407                 a_offset += cnt;
3408                 b_offset += cnt;
3409                 xfersize -= cnt;
3410         }
3411 }
3412
3413 vm_offset_t
3414 pmap_quick_enter_page(vm_page_t m)
3415 {
3416
3417         return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3418 }
3419
3420 void
3421 pmap_quick_remove_page(vm_offset_t addr)
3422 {
3423 }
3424
3425 /*
3426  * Returns true if the pmap's pv is one of the first
3427  * 16 pvs linked to from this page.  This count may
3428  * be changed upwards or downwards in the future; it
3429  * is only necessary that true be returned for a small
3430  * subset of pmaps for proper page aging.
3431  */
3432 boolean_t
3433 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3434 {
3435         struct md_page *pvh;
3436         struct rwlock *lock;
3437         pv_entry_t pv;
3438         int loops = 0;
3439         boolean_t rv;
3440
3441         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3442             ("pmap_page_exists_quick: page %p is not managed", m));
3443         rv = FALSE;
3444         rw_rlock(&pvh_global_lock);
3445         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3446         rw_rlock(lock);
3447         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3448                 if (PV_PMAP(pv) == pmap) {
3449                         rv = TRUE;
3450                         break;
3451                 }
3452                 loops++;
3453                 if (loops >= 16)
3454                         break;
3455         }
3456         if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3457                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3458                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3459                         if (PV_PMAP(pv) == pmap) {
3460                                 rv = TRUE;
3461                                 break;
3462                         }
3463                         loops++;
3464                         if (loops >= 16)
3465                                 break;
3466                 }
3467         }
3468         rw_runlock(lock);
3469         rw_runlock(&pvh_global_lock);
3470         return (rv);
3471 }
3472
3473 /*
3474  *      pmap_page_wired_mappings:
3475  *
3476  *      Return the number of managed mappings to the given physical page
3477  *      that are wired.
3478  */
3479 int
3480 pmap_page_wired_mappings(vm_page_t m)
3481 {
3482         struct md_page *pvh;
3483         struct rwlock *lock;
3484         pmap_t pmap;
3485         pd_entry_t *l2;
3486         pt_entry_t *l3;
3487         pv_entry_t pv;
3488         int count, md_gen, pvh_gen;
3489
3490         if ((m->oflags & VPO_UNMANAGED) != 0)
3491                 return (0);
3492         rw_rlock(&pvh_global_lock);
3493         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3494         rw_rlock(lock);
3495 restart:
3496         count = 0;
3497         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3498                 pmap = PV_PMAP(pv);
3499                 if (!PMAP_TRYLOCK(pmap)) {
3500                         md_gen = m->md.pv_gen;
3501                         rw_runlock(lock);
3502                         PMAP_LOCK(pmap);
3503                         rw_rlock(lock);
3504                         if (md_gen != m->md.pv_gen) {
3505                                 PMAP_UNLOCK(pmap);
3506                                 goto restart;
3507                         }
3508                 }
3509                 l3 = pmap_l3(pmap, pv->pv_va);
3510                 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3511                         count++;
3512                 PMAP_UNLOCK(pmap);
3513         }
3514         if ((m->flags & PG_FICTITIOUS) == 0) {
3515                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3516                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3517                         pmap = PV_PMAP(pv);
3518                         if (!PMAP_TRYLOCK(pmap)) {
3519                                 md_gen = m->md.pv_gen;
3520                                 pvh_gen = pvh->pv_gen;
3521                                 rw_runlock(lock);
3522                                 PMAP_LOCK(pmap);
3523                                 rw_rlock(lock);
3524                                 if (md_gen != m->md.pv_gen ||
3525                                     pvh_gen != pvh->pv_gen) {
3526                                         PMAP_UNLOCK(pmap);
3527                                         goto restart;
3528                                 }
3529                         }
3530                         l2 = pmap_l2(pmap, pv->pv_va);
3531                         if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3532                                 count++;
3533                         PMAP_UNLOCK(pmap);
3534                 }
3535         }
3536         rw_runlock(lock);
3537         rw_runlock(&pvh_global_lock);
3538         return (count);
3539 }
3540
3541 static void
3542 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3543     struct spglist *free, bool superpage)
3544 {
3545         struct md_page *pvh;
3546         vm_page_t mpte, mt;
3547
3548         if (superpage) {
3549                 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3550                 pvh = pa_to_pvh(m->phys_addr);
3551                 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3552                 pvh->pv_gen++;
3553                 if (TAILQ_EMPTY(&pvh->pv_list)) {
3554                         for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3555                                 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3556                                     (mt->aflags & PGA_WRITEABLE) != 0)
3557                                         vm_page_aflag_clear(mt, PGA_WRITEABLE);
3558                 }
3559                 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3560                 if (mpte != NULL) {
3561                         pmap_resident_count_dec(pmap, 1);
3562                         KASSERT(mpte->wire_count == Ln_ENTRIES,
3563                             ("pmap_remove_pages: pte page wire count error"));
3564                         mpte->wire_count = 0;
3565                         pmap_add_delayed_free_list(mpte, free, FALSE);
3566                 }
3567         } else {
3568                 pmap_resident_count_dec(pmap, 1);
3569                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3570                 m->md.pv_gen++;
3571                 if (TAILQ_EMPTY(&m->md.pv_list) &&
3572                     (m->aflags & PGA_WRITEABLE) != 0) {
3573                         pvh = pa_to_pvh(m->phys_addr);
3574                         if (TAILQ_EMPTY(&pvh->pv_list))
3575                                 vm_page_aflag_clear(m, PGA_WRITEABLE);
3576                 }
3577         }
3578 }
3579
3580 /*
3581  * Destroy all managed, non-wired mappings in the given user-space
3582  * pmap.  This pmap cannot be active on any processor besides the
3583  * caller.
3584  *
3585  * This function cannot be applied to the kernel pmap.  Moreover, it
3586  * is not intended for general use.  It is only to be used during
3587  * process termination.  Consequently, it can be implemented in ways
3588  * that make it faster than pmap_remove().  First, it can more quickly
3589  * destroy mappings by iterating over the pmap's collection of PV
3590  * entries, rather than searching the page table.  Second, it doesn't
3591  * have to test and clear the page table entries atomically, because
3592  * no processor is currently accessing the user address space.  In
3593  * particular, a page table entry's dirty bit won't change state once
3594  * this function starts.
3595  */
3596 void
3597 pmap_remove_pages(pmap_t pmap)
3598 {
3599         struct spglist free;
3600         pd_entry_t ptepde;
3601         pt_entry_t *pte, tpte;
3602         vm_page_t m, mt;
3603         pv_entry_t pv;
3604         struct pv_chunk *pc, *npc;
3605         struct rwlock *lock;
3606         int64_t bit;
3607         uint64_t inuse, bitmask;
3608         int allfree, field, freed, idx;
3609         bool superpage;
3610
3611         lock = NULL;
3612
3613         SLIST_INIT(&free);
3614         rw_rlock(&pvh_global_lock);
3615         PMAP_LOCK(pmap);
3616         TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3617                 allfree = 1;
3618                 freed = 0;
3619                 for (field = 0; field < _NPCM; field++) {
3620                         inuse = ~pc->pc_map[field] & pc_freemask[field];
3621                         while (inuse != 0) {
3622                                 bit = ffsl(inuse) - 1;
3623                                 bitmask = 1UL << bit;
3624                                 idx = field * 64 + bit;
3625                                 pv = &pc->pc_pventry[idx];
3626                                 inuse &= ~bitmask;
3627
3628                                 pte = pmap_l1(pmap, pv->pv_va);
3629                                 ptepde = pmap_load(pte);
3630                                 pte = pmap_l1_to_l2(pte, pv->pv_va);
3631                                 tpte = pmap_load(pte);
3632                                 if ((tpte & PTE_RWX) != 0) {
3633                                         superpage = true;
3634                                 } else {
3635                                         ptepde = tpte;
3636                                         pte = pmap_l2_to_l3(pte, pv->pv_va);
3637                                         tpte = pmap_load(pte);
3638                                         superpage = false;
3639                                 }
3640
3641                                 /*
3642                                  * We cannot remove wired pages from a
3643                                  * process' mapping at this time.
3644                                  */
3645                                 if (tpte & PTE_SW_WIRED) {
3646                                         allfree = 0;
3647                                         continue;
3648                                 }
3649
3650                                 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3651                                 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3652                                     m < &vm_page_array[vm_page_array_size],
3653                                     ("pmap_remove_pages: bad pte %#jx",
3654                                     (uintmax_t)tpte));
3655
3656                                 pmap_clear(pte);
3657
3658                                 /*
3659                                  * Update the vm_page_t clean/reference bits.
3660                                  */
3661                                 if ((tpte & (PTE_D | PTE_W)) ==
3662                                     (PTE_D | PTE_W)) {
3663                                         if (superpage)
3664                                                 for (mt = m;
3665                                                     mt < &m[Ln_ENTRIES]; mt++)
3666                                                         vm_page_dirty(mt);
3667                                         else
3668                                                 vm_page_dirty(m);
3669                                 }
3670
3671                                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3672
3673                                 /* Mark free */
3674                                 pc->pc_map[field] |= bitmask;
3675
3676                                 pmap_remove_pages_pv(pmap, m, pv, &free,
3677                                     superpage);
3678                                 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3679                                 freed++;
3680                         }
3681                 }
3682                 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3683                 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3684                 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3685                 if (allfree) {
3686                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3687                         free_pv_chunk(pc);
3688                 }
3689         }
3690         if (lock != NULL)
3691                 rw_wunlock(lock);
3692         pmap_invalidate_all(pmap);
3693         rw_runlock(&pvh_global_lock);
3694         PMAP_UNLOCK(pmap);
3695         vm_page_free_pages_toq(&free, false);
3696 }
3697
3698 static bool
3699 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3700 {
3701         struct md_page *pvh;
3702         struct rwlock *lock;
3703         pd_entry_t *l2;
3704         pt_entry_t *l3, mask;
3705         pv_entry_t pv;
3706         pmap_t pmap;
3707         int md_gen, pvh_gen;
3708         bool rv;
3709
3710         mask = 0;
3711         if (modified)
3712                 mask |= PTE_D;
3713         if (accessed)
3714                 mask |= PTE_A;
3715
3716         rv = FALSE;
3717         rw_rlock(&pvh_global_lock);
3718         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3719         rw_rlock(lock);
3720 restart:
3721         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3722                 pmap = PV_PMAP(pv);
3723                 if (!PMAP_TRYLOCK(pmap)) {
3724                         md_gen = m->md.pv_gen;
3725                         rw_runlock(lock);
3726                         PMAP_LOCK(pmap);
3727                         rw_rlock(lock);
3728                         if (md_gen != m->md.pv_gen) {
3729                                 PMAP_UNLOCK(pmap);
3730                                 goto restart;
3731                         }
3732                 }
3733                 l3 = pmap_l3(pmap, pv->pv_va);
3734                 rv = (pmap_load(l3) & mask) == mask;
3735                 PMAP_UNLOCK(pmap);
3736                 if (rv)
3737                         goto out;
3738         }
3739         if ((m->flags & PG_FICTITIOUS) == 0) {
3740                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3741                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3742                         pmap = PV_PMAP(pv);
3743                         if (!PMAP_TRYLOCK(pmap)) {
3744                                 md_gen = m->md.pv_gen;
3745                                 pvh_gen = pvh->pv_gen;
3746                                 rw_runlock(lock);
3747                                 PMAP_LOCK(pmap);
3748                                 rw_rlock(lock);
3749                                 if (md_gen != m->md.pv_gen ||
3750                                     pvh_gen != pvh->pv_gen) {
3751                                         PMAP_UNLOCK(pmap);
3752                                         goto restart;
3753                                 }
3754                         }
3755                         l2 = pmap_l2(pmap, pv->pv_va);
3756                         rv = (pmap_load(l2) & mask) == mask;
3757                         PMAP_UNLOCK(pmap);
3758                         if (rv)
3759                                 goto out;
3760                 }
3761         }
3762 out:
3763         rw_runlock(lock);
3764         rw_runlock(&pvh_global_lock);
3765         return (rv);
3766 }
3767
3768 /*
3769  *      pmap_is_modified:
3770  *
3771  *      Return whether or not the specified physical page was modified
3772  *      in any physical maps.
3773  */
3774 boolean_t
3775 pmap_is_modified(vm_page_t m)
3776 {
3777
3778         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3779             ("pmap_is_modified: page %p is not managed", m));
3780
3781         /*
3782          * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3783          * concurrently set while the object is locked.  Thus, if PGA_WRITEABLE
3784          * is clear, no PTEs can have PG_M set.
3785          */
3786         VM_OBJECT_ASSERT_WLOCKED(m->object);
3787         if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3788                 return (FALSE);
3789         return (pmap_page_test_mappings(m, FALSE, TRUE));
3790 }
3791
3792 /*
3793  *      pmap_is_prefaultable:
3794  *
3795  *      Return whether or not the specified virtual address is eligible
3796  *      for prefault.
3797  */
3798 boolean_t
3799 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3800 {
3801         pt_entry_t *l3;
3802         boolean_t rv;
3803
3804         rv = FALSE;
3805         PMAP_LOCK(pmap);
3806         l3 = pmap_l3(pmap, addr);
3807         if (l3 != NULL && pmap_load(l3) != 0) {
3808                 rv = TRUE;
3809         }
3810         PMAP_UNLOCK(pmap);
3811         return (rv);
3812 }
3813
3814 /*
3815  *      pmap_is_referenced:
3816  *
3817  *      Return whether or not the specified physical page was referenced
3818  *      in any physical maps.
3819  */
3820 boolean_t
3821 pmap_is_referenced(vm_page_t m)
3822 {
3823
3824         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3825             ("pmap_is_referenced: page %p is not managed", m));
3826         return (pmap_page_test_mappings(m, TRUE, FALSE));
3827 }
3828
3829 /*
3830  * Clear the write and modified bits in each of the given page's mappings.
3831  */
3832 void
3833 pmap_remove_write(vm_page_t m)
3834 {
3835         struct md_page *pvh;
3836         struct rwlock *lock;
3837         pmap_t pmap;
3838         pd_entry_t *l2;
3839         pt_entry_t *l3, oldl3, newl3;
3840         pv_entry_t next_pv, pv;
3841         vm_offset_t va;
3842         int md_gen, pvh_gen;
3843
3844         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3845             ("pmap_remove_write: page %p is not managed", m));
3846
3847         /*
3848          * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3849          * set by another thread while the object is locked.  Thus,
3850          * if PGA_WRITEABLE is clear, no page table entries need updating.
3851          */
3852         VM_OBJECT_ASSERT_WLOCKED(m->object);
3853         if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3854                 return;
3855         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3856         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3857             pa_to_pvh(VM_PAGE_TO_PHYS(m));
3858         rw_rlock(&pvh_global_lock);
3859 retry_pv_loop:
3860         rw_wlock(lock);
3861         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3862                 pmap = PV_PMAP(pv);
3863                 if (!PMAP_TRYLOCK(pmap)) {
3864                         pvh_gen = pvh->pv_gen;
3865                         rw_wunlock(lock);
3866                         PMAP_LOCK(pmap);
3867                         rw_wlock(lock);
3868                         if (pvh_gen != pvh->pv_gen) {
3869                                 PMAP_UNLOCK(pmap);
3870                                 rw_wunlock(lock);
3871                                 goto retry_pv_loop;
3872                         }
3873                 }
3874                 va = pv->pv_va;
3875                 l2 = pmap_l2(pmap, va);
3876                 if ((pmap_load(l2) & PTE_W) != 0)
3877                         (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3878                 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3879                     ("inconsistent pv lock %p %p for page %p",
3880                     lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3881                 PMAP_UNLOCK(pmap);
3882         }
3883         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3884                 pmap = PV_PMAP(pv);
3885                 if (!PMAP_TRYLOCK(pmap)) {
3886                         pvh_gen = pvh->pv_gen;
3887                         md_gen = m->md.pv_gen;
3888                         rw_wunlock(lock);
3889                         PMAP_LOCK(pmap);
3890                         rw_wlock(lock);
3891                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3892                                 PMAP_UNLOCK(pmap);
3893                                 rw_wunlock(lock);
3894                                 goto retry_pv_loop;
3895                         }
3896                 }
3897                 l3 = pmap_l3(pmap, pv->pv_va);
3898                 oldl3 = pmap_load(l3);
3899 retry:
3900                 if ((oldl3 & PTE_W) != 0) {
3901                         newl3 = oldl3 & ~(PTE_D | PTE_W);
3902                         if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3903                                 goto retry;
3904                         if ((oldl3 & PTE_D) != 0)
3905                                 vm_page_dirty(m);
3906                         pmap_invalidate_page(pmap, pv->pv_va);
3907                 }
3908                 PMAP_UNLOCK(pmap);
3909         }
3910         rw_wunlock(lock);
3911         vm_page_aflag_clear(m, PGA_WRITEABLE);
3912         rw_runlock(&pvh_global_lock);
3913 }
3914
3915 /*
3916  *      pmap_ts_referenced:
3917  *
3918  *      Return a count of reference bits for a page, clearing those bits.
3919  *      It is not necessary for every reference bit to be cleared, but it
3920  *      is necessary that 0 only be returned when there are truly no
3921  *      reference bits set.
3922  *
3923  *      As an optimization, update the page's dirty field if a modified bit is
3924  *      found while counting reference bits.  This opportunistic update can be
3925  *      performed at low cost and can eliminate the need for some future calls
3926  *      to pmap_is_modified().  However, since this function stops after
3927  *      finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3928  *      dirty pages.  Those dirty pages will only be detected by a future call
3929  *      to pmap_is_modified().
3930  */
3931 int
3932 pmap_ts_referenced(vm_page_t m)
3933 {
3934         struct spglist free;
3935         struct md_page *pvh;
3936         struct rwlock *lock;
3937         pv_entry_t pv, pvf;
3938         pmap_t pmap;
3939         pd_entry_t *l2, l2e;
3940         pt_entry_t *l3, l3e;
3941         vm_paddr_t pa;
3942         vm_offset_t va;
3943         int md_gen, pvh_gen, ret;
3944
3945         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3946             ("pmap_ts_referenced: page %p is not managed", m));
3947         SLIST_INIT(&free);
3948         ret = 0;
3949         pa = VM_PAGE_TO_PHYS(m);
3950         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3951
3952         lock = PHYS_TO_PV_LIST_LOCK(pa);
3953         rw_rlock(&pvh_global_lock);
3954         rw_wlock(lock);
3955 retry:
3956         if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3957                 goto small_mappings;
3958         pv = pvf;
3959         do {
3960                 pmap = PV_PMAP(pv);
3961                 if (!PMAP_TRYLOCK(pmap)) {
3962                         pvh_gen = pvh->pv_gen;
3963                         rw_wunlock(lock);
3964                         PMAP_LOCK(pmap);
3965                         rw_wlock(lock);
3966                         if (pvh_gen != pvh->pv_gen) {
3967                                 PMAP_UNLOCK(pmap);
3968                                 goto retry;
3969                         }
3970                 }
3971                 va = pv->pv_va;
3972                 l2 = pmap_l2(pmap, va);
3973                 l2e = pmap_load(l2);
3974                 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3975                         /*
3976                          * Although l2e is mapping a 2MB page, because
3977                          * this function is called at a 4KB page granularity,
3978                          * we only update the 4KB page under test.
3979                          */
3980                         vm_page_dirty(m);
3981                 }
3982                 if ((l2e & PTE_A) != 0) {
3983                         /*
3984                          * Since this reference bit is shared by 512 4KB
3985                          * pages, it should not be cleared every time it is
3986                          * tested.  Apply a simple "hash" function on the
3987                          * physical page number, the virtual superpage number,
3988                          * and the pmap address to select one 4KB page out of
3989                          * the 512 on which testing the reference bit will
3990                          * result in clearing that reference bit.  This
3991                          * function is designed to avoid the selection of the
3992                          * same 4KB page for every 2MB page mapping.
3993                          *
3994                          * On demotion, a mapping that hasn't been referenced
3995                          * is simply destroyed.  To avoid the possibility of a
3996                          * subsequent page fault on a demoted wired mapping,
3997                          * always leave its reference bit set.  Moreover,
3998                          * since the superpage is wired, the current state of
3999                          * its reference bit won't affect page replacement.
4000                          */
4001                         if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4002                             (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4003                             (l2e & PTE_SW_WIRED) == 0) {
4004                                 pmap_clear_bits(l2, PTE_A);
4005                                 pmap_invalidate_page(pmap, va);
4006                         }
4007                         ret++;
4008                 }
4009                 PMAP_UNLOCK(pmap);
4010                 /* Rotate the PV list if it has more than one entry. */
4011                 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4012                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4013                         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4014                         pvh->pv_gen++;
4015                 }
4016                 if (ret >= PMAP_TS_REFERENCED_MAX)
4017                         goto out;
4018         } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4019 small_mappings:
4020         if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4021                 goto out;
4022         pv = pvf;
4023         do {
4024                 pmap = PV_PMAP(pv);
4025                 if (!PMAP_TRYLOCK(pmap)) {
4026                         pvh_gen = pvh->pv_gen;
4027                         md_gen = m->md.pv_gen;
4028                         rw_wunlock(lock);
4029                         PMAP_LOCK(pmap);
4030                         rw_wlock(lock);
4031                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4032                                 PMAP_UNLOCK(pmap);
4033                                 goto retry;
4034                         }
4035                 }
4036                 l2 = pmap_l2(pmap, pv->pv_va);
4037
4038                 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4039                     ("pmap_ts_referenced: found an invalid l2 table"));
4040
4041                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4042                 l3e = pmap_load(l3);
4043                 if ((l3e & PTE_D) != 0)
4044                         vm_page_dirty(m);
4045                 if ((l3e & PTE_A) != 0) {
4046                         if ((l3e & PTE_SW_WIRED) == 0) {
4047                                 /*
4048                                  * Wired pages cannot be paged out so
4049                                  * doing accessed bit emulation for
4050                                  * them is wasted effort. We do the
4051                                  * hard work for unwired pages only.
4052                                  */
4053                                 pmap_clear_bits(l3, PTE_A);
4054                                 pmap_invalidate_page(pmap, pv->pv_va);
4055                         }
4056                         ret++;
4057                 }
4058                 PMAP_UNLOCK(pmap);
4059                 /* Rotate the PV list if it has more than one entry. */
4060                 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4061                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4062                         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4063                         m->md.pv_gen++;
4064                 }
4065         } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && ret <
4066             PMAP_TS_REFERENCED_MAX);
4067 out:
4068         rw_wunlock(lock);
4069         rw_runlock(&pvh_global_lock);
4070         vm_page_free_pages_toq(&free, false);
4071         return (ret);
4072 }
4073
4074 /*
4075  *      Apply the given advice to the specified range of addresses within the
4076  *      given pmap.  Depending on the advice, clear the referenced and/or
4077  *      modified flags in each mapping and set the mapped page's dirty field.
4078  */
4079 void
4080 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4081 {
4082 }
4083
4084 /*
4085  *      Clear the modify bits on the specified physical page.
4086  */
4087 void
4088 pmap_clear_modify(vm_page_t m)
4089 {
4090         struct md_page *pvh;
4091         struct rwlock *lock;
4092         pmap_t pmap;
4093         pv_entry_t next_pv, pv;
4094         pd_entry_t *l2, oldl2;
4095         pt_entry_t *l3, oldl3;
4096         vm_offset_t va;
4097         int md_gen, pvh_gen;
4098
4099         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4100             ("pmap_clear_modify: page %p is not managed", m));
4101         VM_OBJECT_ASSERT_WLOCKED(m->object);
4102         KASSERT(!vm_page_xbusied(m),
4103             ("pmap_clear_modify: page %p is exclusive busied", m));
4104
4105         /*
4106          * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4107          * If the object containing the page is locked and the page is not
4108          * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4109          */
4110         if ((m->aflags & PGA_WRITEABLE) == 0)
4111                 return;
4112         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4113             pa_to_pvh(VM_PAGE_TO_PHYS(m));
4114         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4115         rw_rlock(&pvh_global_lock);
4116         rw_wlock(lock);
4117 restart:
4118         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4119                 pmap = PV_PMAP(pv);
4120                 if (!PMAP_TRYLOCK(pmap)) {
4121                         pvh_gen = pvh->pv_gen;
4122                         rw_wunlock(lock);
4123                         PMAP_LOCK(pmap);
4124                         rw_wlock(lock);
4125                         if (pvh_gen != pvh->pv_gen) {
4126                                 PMAP_UNLOCK(pmap);
4127                                 goto restart;
4128                         }
4129                 }
4130                 va = pv->pv_va;
4131                 l2 = pmap_l2(pmap, va);
4132                 oldl2 = pmap_load(l2);
4133                 if ((oldl2 & PTE_W) != 0) {
4134                         if (pmap_demote_l2_locked(pmap, l2, va, &lock)) {
4135                                 if ((oldl2 & PTE_SW_WIRED) == 0) {
4136                                         /*
4137                                          * Write protect the mapping to a
4138                                          * single page so that a subsequent
4139                                          * write access may repromote.
4140                                          */
4141                                         va += VM_PAGE_TO_PHYS(m) -
4142                                             PTE_TO_PHYS(oldl2);
4143                                         l3 = pmap_l2_to_l3(l2, va);
4144                                         oldl3 = pmap_load(l3);
4145                                         if ((oldl3 & PTE_V) != 0) {
4146                                                 while (!atomic_fcmpset_long(l3,
4147                                                     &oldl3, oldl3 & ~(PTE_D |
4148                                                     PTE_W)))
4149                                                         cpu_spinwait();
4150                                                 vm_page_dirty(m);
4151                                                 pmap_invalidate_page(pmap, va);
4152                                         }
4153                                 }
4154                         }
4155                 }
4156                 PMAP_UNLOCK(pmap);
4157         }
4158         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4159                 pmap = PV_PMAP(pv);
4160                 if (!PMAP_TRYLOCK(pmap)) {
4161                         md_gen = m->md.pv_gen;
4162                         pvh_gen = pvh->pv_gen;
4163                         rw_wunlock(lock);
4164                         PMAP_LOCK(pmap);
4165                         rw_wlock(lock);
4166                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4167                                 PMAP_UNLOCK(pmap);
4168                                 goto restart;
4169                         }
4170                 }
4171                 l2 = pmap_l2(pmap, pv->pv_va);
4172                 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4173                     ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4174                     m));
4175                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4176                 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4177                         pmap_clear_bits(l3, PTE_D);
4178                         pmap_invalidate_page(pmap, pv->pv_va);
4179                 }
4180                 PMAP_UNLOCK(pmap);
4181         }
4182         rw_wunlock(lock);
4183         rw_runlock(&pvh_global_lock);
4184 }
4185
4186 void *
4187 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4188 {
4189
4190         return ((void *)PHYS_TO_DMAP(pa));
4191 }
4192
4193 void
4194 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4195 {
4196 }
4197
4198 /*
4199  * Sets the memory attribute for the specified page.
4200  */
4201 void
4202 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4203 {
4204
4205         m->md.pv_memattr = ma;
4206 }
4207
4208 /*
4209  * perform the pmap work for mincore
4210  */
4211 int
4212 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4213 {
4214         pt_entry_t *l2, *l3, tpte;
4215         vm_paddr_t pa;
4216         int val;
4217         bool managed;
4218
4219         PMAP_LOCK(pmap);
4220 retry:
4221         managed = false;
4222         val = 0;
4223
4224         l2 = pmap_l2(pmap, addr);
4225         if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4226                 if ((tpte & PTE_RWX) != 0) {
4227                         pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4228                         val = MINCORE_INCORE | MINCORE_SUPER;
4229                 } else {
4230                         l3 = pmap_l2_to_l3(l2, addr);
4231                         tpte = pmap_load(l3);
4232                         if ((tpte & PTE_V) == 0)
4233                                 goto done;
4234                         pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4235                         val = MINCORE_INCORE;
4236                 }
4237
4238                 if ((tpte & PTE_D) != 0)
4239                         val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4240                 if ((tpte & PTE_A) != 0)
4241                         val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4242                 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4243         }
4244
4245 done:
4246         if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4247             (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4248                 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4249                 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4250                         goto retry;
4251         } else
4252                 PA_UNLOCK_COND(*locked_pa);
4253         PMAP_UNLOCK(pmap);
4254         return (val);
4255 }
4256
4257 void
4258 pmap_activate_sw(struct thread *td)
4259 {
4260         pmap_t oldpmap, pmap;
4261         u_int hart;
4262
4263         oldpmap = PCPU_GET(curpmap);
4264         pmap = vmspace_pmap(td->td_proc->p_vmspace);
4265         if (pmap == oldpmap)
4266                 return;
4267         load_satp(pmap->pm_satp);
4268
4269         hart = PCPU_GET(hart);
4270 #ifdef SMP
4271         CPU_SET_ATOMIC(hart, &pmap->pm_active);
4272         CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4273 #else
4274         CPU_SET(hart, &pmap->pm_active);
4275         CPU_CLR(hart, &oldpmap->pm_active);
4276 #endif
4277         PCPU_SET(curpmap, pmap);
4278
4279         sfence_vma();
4280 }
4281
4282 void
4283 pmap_activate(struct thread *td)
4284 {
4285
4286         critical_enter();
4287         pmap_activate_sw(td);
4288         critical_exit();
4289 }
4290
4291 void
4292 pmap_activate_boot(pmap_t pmap)
4293 {
4294         u_int hart;
4295
4296         hart = PCPU_GET(hart);
4297 #ifdef SMP
4298         CPU_SET_ATOMIC(hart, &pmap->pm_active);
4299 #else
4300         CPU_SET(hart, &pmap->pm_active);
4301 #endif
4302         PCPU_SET(curpmap, pmap);
4303 }
4304
4305 void
4306 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4307 {
4308         cpuset_t mask;
4309
4310         /*
4311          * From the RISC-V User-Level ISA V2.2:
4312          *
4313          * "To make a store to instruction memory visible to all
4314          * RISC-V harts, the writing hart has to execute a data FENCE
4315          * before requesting that all remote RISC-V harts execute a
4316          * FENCE.I."
4317          */
4318         sched_pin();
4319         mask = all_harts;
4320         CPU_CLR(PCPU_GET(hart), &mask);
4321         fence();
4322         if (!CPU_EMPTY(&mask) && smp_started)
4323                 sbi_remote_fence_i(mask.__bits);
4324         sched_unpin();
4325 }
4326
4327 /*
4328  *      Increase the starting virtual address of the given mapping if a
4329  *      different alignment might result in more superpage mappings.
4330  */
4331 void
4332 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4333     vm_offset_t *addr, vm_size_t size)
4334 {
4335         vm_offset_t superpage_offset;
4336
4337         if (size < L2_SIZE)
4338                 return;
4339         if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4340                 offset += ptoa(object->pg_color);
4341         superpage_offset = offset & L2_OFFSET;
4342         if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4343             (*addr & L2_OFFSET) == superpage_offset)
4344                 return;
4345         if ((*addr & L2_OFFSET) < superpage_offset)
4346                 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4347         else
4348                 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4349 }
4350
4351 /**
4352  * Get the kernel virtual address of a set of physical pages. If there are
4353  * physical addresses not covered by the DMAP perform a transient mapping
4354  * that will be removed when calling pmap_unmap_io_transient.
4355  *
4356  * \param page        The pages the caller wishes to obtain the virtual
4357  *                    address on the kernel memory map.
4358  * \param vaddr       On return contains the kernel virtual memory address
4359  *                    of the pages passed in the page parameter.
4360  * \param count       Number of pages passed in.
4361  * \param can_fault   TRUE if the thread using the mapped pages can take
4362  *                    page faults, FALSE otherwise.
4363  *
4364  * \returns TRUE if the caller must call pmap_unmap_io_transient when
4365  *          finished or FALSE otherwise.
4366  *
4367  */
4368 boolean_t
4369 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4370     boolean_t can_fault)
4371 {
4372         vm_paddr_t paddr;
4373         boolean_t needs_mapping;
4374         int error, i;
4375
4376         /*
4377          * Allocate any KVA space that we need, this is done in a separate
4378          * loop to prevent calling vmem_alloc while pinned.
4379          */
4380         needs_mapping = FALSE;
4381         for (i = 0; i < count; i++) {
4382                 paddr = VM_PAGE_TO_PHYS(page[i]);
4383                 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4384                         error = vmem_alloc(kernel_arena, PAGE_SIZE,
4385                             M_BESTFIT | M_WAITOK, &vaddr[i]);
4386                         KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4387                         needs_mapping = TRUE;
4388                 } else {
4389                         vaddr[i] = PHYS_TO_DMAP(paddr);
4390                 }
4391         }
4392
4393         /* Exit early if everything is covered by the DMAP */
4394         if (!needs_mapping)
4395                 return (FALSE);
4396
4397         if (!can_fault)
4398                 sched_pin();
4399         for (i = 0; i < count; i++) {
4400                 paddr = VM_PAGE_TO_PHYS(page[i]);
4401                 if (paddr >= DMAP_MAX_PHYSADDR) {
4402                         panic(
4403                            "pmap_map_io_transient: TODO: Map out of DMAP data");
4404                 }
4405         }
4406
4407         return (needs_mapping);
4408 }
4409
4410 void
4411 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4412     boolean_t can_fault)
4413 {
4414         vm_paddr_t paddr;
4415         int i;
4416
4417         if (!can_fault)
4418                 sched_unpin();
4419         for (i = 0; i < count; i++) {
4420                 paddr = VM_PAGE_TO_PHYS(page[i]);
4421                 if (paddr >= DMAP_MAX_PHYSADDR) {
4422                         panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4423                 }
4424         }
4425 }
4426
4427 boolean_t
4428 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4429 {
4430
4431         return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4432 }
4433
4434 bool
4435 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4436     pt_entry_t **l3)
4437 {
4438         pd_entry_t *l1p, *l2p;
4439
4440         /* Get l1 directory entry. */
4441         l1p = pmap_l1(pmap, va);
4442         *l1 = l1p;
4443
4444         if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4445                 return (false);
4446
4447         if ((pmap_load(l1p) & PTE_RX) != 0) {
4448                 *l2 = NULL;
4449                 *l3 = NULL;
4450                 return (true);
4451         }
4452
4453         /* Get l2 directory entry. */
4454         l2p = pmap_l1_to_l2(l1p, va);
4455         *l2 = l2p;
4456
4457         if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4458                 return (false);
4459
4460         if ((pmap_load(l2p) & PTE_RX) != 0) {
4461                 *l3 = NULL;
4462                 return (true);
4463         }
4464
4465         /* Get l3 page table entry. */
4466         *l3 = pmap_l2_to_l3(l2p, va);
4467
4468         return (true);
4469 }