2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/proc.h>
133 #include <sys/rwlock.h>
135 #include <sys/vmem.h>
136 #include <sys/vmmeter.h>
137 #include <sys/sched.h>
138 #include <sys/sysctl.h>
142 #include <vm/vm_param.h>
143 #include <vm/vm_kern.h>
144 #include <vm/vm_page.h>
145 #include <vm/vm_map.h>
146 #include <vm/vm_object.h>
147 #include <vm/vm_extern.h>
148 #include <vm/vm_pageout.h>
149 #include <vm/vm_pager.h>
150 #include <vm/vm_phys.h>
151 #include <vm/vm_radix.h>
152 #include <vm/vm_reserv.h>
155 #include <machine/machdep.h>
156 #include <machine/md_var.h>
157 #include <machine/pcb.h>
158 #include <machine/sbi.h>
160 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
161 #define NUL2E (Ln_ENTRIES * NUL1E)
163 #if !defined(DIAGNOSTIC)
164 #ifdef __GNUC_GNU_INLINE__
165 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
167 #define PMAP_INLINE extern inline
174 #define PV_STAT(x) do { x ; } while (0)
176 #define PV_STAT(x) do { } while (0)
179 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
180 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
182 #define NPV_LIST_LOCKS MAXCPU
184 #define PHYS_TO_PV_LIST_LOCK(pa) \
185 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
187 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
188 struct rwlock **_lockp = (lockp); \
189 struct rwlock *_new_lock; \
191 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
192 if (_new_lock != *_lockp) { \
193 if (*_lockp != NULL) \
194 rw_wunlock(*_lockp); \
195 *_lockp = _new_lock; \
200 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
201 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
203 #define RELEASE_PV_LIST_LOCK(lockp) do { \
204 struct rwlock **_lockp = (lockp); \
206 if (*_lockp != NULL) { \
207 rw_wunlock(*_lockp); \
212 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
213 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
215 /* The list of all the user pmaps */
216 LIST_HEAD(pmaplist, pmap);
217 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
219 struct pmap kernel_pmap_store;
221 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
222 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
223 vm_offset_t kernel_vm_end = 0;
225 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
226 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
227 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
229 /* This code assumes all L1 DMAP entries will be used */
230 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
231 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
233 static struct rwlock_padalign pvh_global_lock;
234 static struct mtx_padalign allpmaps_lock;
236 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
237 "VM/pmap parameters");
239 static int superpages_enabled = 1;
240 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
241 CTLFLAG_RDTUN, &superpages_enabled, 0,
242 "Enable support for transparent superpages");
244 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
245 "2MB page mapping counters");
247 static u_long pmap_l2_demotions;
248 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
249 &pmap_l2_demotions, 0,
250 "2MB page demotions");
252 static u_long pmap_l2_mappings;
253 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
254 &pmap_l2_mappings, 0,
255 "2MB page mappings");
257 static u_long pmap_l2_p_failures;
258 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
259 &pmap_l2_p_failures, 0,
260 "2MB page promotion failures");
262 static u_long pmap_l2_promotions;
263 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
264 &pmap_l2_promotions, 0,
265 "2MB page promotions");
268 * Data for the pv entry allocation mechanism
270 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
271 static struct mtx pv_chunks_mutex;
272 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
273 static struct md_page *pv_table;
274 static struct md_page pv_dummy;
276 extern cpuset_t all_harts;
279 * Internal flags for pmap_enter()'s helper functions.
281 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
282 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
284 static void free_pv_chunk(struct pv_chunk *pc);
285 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
286 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
287 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
288 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
289 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
291 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
292 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
293 vm_offset_t va, struct rwlock **lockp);
294 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
295 u_int flags, vm_page_t m, struct rwlock **lockp);
296 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
297 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
298 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
299 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
300 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
301 vm_page_t m, struct rwlock **lockp);
303 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
304 struct rwlock **lockp);
306 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
307 struct spglist *free);
308 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
310 #define pmap_clear(pte) pmap_store(pte, 0)
311 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
312 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
313 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
314 #define pmap_load(pte) atomic_load_64(pte)
315 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
316 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
318 /********************/
319 /* Inline functions */
320 /********************/
323 pagecopy(void *s, void *d)
326 memcpy(d, s, PAGE_SIZE);
336 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
337 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
338 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
340 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
342 static __inline pd_entry_t *
343 pmap_l1(pmap_t pmap, vm_offset_t va)
346 return (&pmap->pm_l1[pmap_l1_index(va)]);
349 static __inline pd_entry_t *
350 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
355 phys = PTE_TO_PHYS(pmap_load(l1));
356 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
358 return (&l2[pmap_l2_index(va)]);
361 static __inline pd_entry_t *
362 pmap_l2(pmap_t pmap, vm_offset_t va)
366 l1 = pmap_l1(pmap, va);
367 if ((pmap_load(l1) & PTE_V) == 0)
369 if ((pmap_load(l1) & PTE_RX) != 0)
372 return (pmap_l1_to_l2(l1, va));
375 static __inline pt_entry_t *
376 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
381 phys = PTE_TO_PHYS(pmap_load(l2));
382 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
384 return (&l3[pmap_l3_index(va)]);
387 static __inline pt_entry_t *
388 pmap_l3(pmap_t pmap, vm_offset_t va)
392 l2 = pmap_l2(pmap, va);
395 if ((pmap_load(l2) & PTE_V) == 0)
397 if ((pmap_load(l2) & PTE_RX) != 0)
400 return (pmap_l2_to_l3(l2, va));
404 pmap_resident_count_inc(pmap_t pmap, int count)
407 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
408 pmap->pm_stats.resident_count += count;
412 pmap_resident_count_dec(pmap_t pmap, int count)
415 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
416 KASSERT(pmap->pm_stats.resident_count >= count,
417 ("pmap %p resident count underflow %ld %d", pmap,
418 pmap->pm_stats.resident_count, count));
419 pmap->pm_stats.resident_count -= count;
423 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
426 struct pmap *user_pmap;
429 /* Distribute new kernel L1 entry to all the user pmaps */
430 if (pmap != kernel_pmap)
433 mtx_lock(&allpmaps_lock);
434 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
435 l1 = &user_pmap->pm_l1[l1index];
436 pmap_store(l1, entry);
438 mtx_unlock(&allpmaps_lock);
442 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
448 l1 = (pd_entry_t *)l1pt;
449 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
451 /* Check locore has used a table L1 map */
452 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
453 ("Invalid bootstrap L1 table"));
455 /* Find the address of the L2 table */
456 l2 = (pt_entry_t *)init_pt_va;
457 *l2_slot = pmap_l2_index(va);
463 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
465 u_int l1_slot, l2_slot;
469 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
471 /* Check locore has used L2 superpages */
472 KASSERT((l2[l2_slot] & PTE_RX) != 0,
473 ("Invalid bootstrap L2 table"));
475 /* L2 is superpages */
476 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
477 ret += (va & L2_OFFSET);
483 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
492 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
493 va = DMAP_MIN_ADDRESS;
494 l1 = (pd_entry_t *)kern_l1;
495 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
497 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
498 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
499 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
502 pn = (pa / PAGE_SIZE);
504 entry |= (pn << PTE_PPN0_S);
505 pmap_store(&l1[l1_slot], entry);
508 /* Set the upper limit of the DMAP region */
516 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
525 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
527 l2 = pmap_l2(kernel_pmap, va);
528 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
529 l2_slot = pmap_l2_index(va);
532 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
533 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
535 pa = pmap_early_vtophys(l1pt, l3pt);
536 pn = (pa / PAGE_SIZE);
538 entry |= (pn << PTE_PPN0_S);
539 pmap_store(&l2[l2_slot], entry);
544 /* Clean the L2 page table */
545 memset((void *)l3_start, 0, l3pt - l3_start);
551 * Bootstrap the system enough to run with virtual memory.
554 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
556 u_int l1_slot, l2_slot, avail_slot, map_slot;
557 vm_offset_t freemempos;
558 vm_offset_t dpcpu, msgbufpv;
559 vm_paddr_t end, max_pa, min_pa, pa, start;
562 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
563 printf("%lx\n", l1pt);
564 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
566 /* Set this early so we can use the pagetable walking functions */
567 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
568 PMAP_LOCK_INIT(kernel_pmap);
570 rw_init(&pvh_global_lock, "pmap pv global");
572 CPU_FILL(&kernel_pmap->pm_active);
574 /* Assume the address we were loaded to is a valid physical address. */
575 min_pa = max_pa = kernstart;
578 * Find the minimum physical address. physmap is sorted,
579 * but may contain empty ranges.
581 for (i = 0; i < physmap_idx * 2; i += 2) {
582 if (physmap[i] == physmap[i + 1])
584 if (physmap[i] <= min_pa)
586 if (physmap[i + 1] > max_pa)
587 max_pa = physmap[i + 1];
589 printf("physmap_idx %lx\n", physmap_idx);
590 printf("min_pa %lx\n", min_pa);
591 printf("max_pa %lx\n", max_pa);
593 /* Create a direct map region early so we can use it for pa -> va */
594 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
597 * Read the page table to find out what is already mapped.
598 * This assumes we have mapped a block of memory from KERNBASE
599 * using a single L1 entry.
601 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
603 /* Sanity check the index, KERNBASE should be the first VA */
604 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
606 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
608 /* Create the l3 tables for the early devmap */
609 freemempos = pmap_bootstrap_l3(l1pt,
610 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
614 #define alloc_pages(var, np) \
615 (var) = freemempos; \
616 freemempos += (np * PAGE_SIZE); \
617 memset((char *)(var), 0, ((np) * PAGE_SIZE));
619 /* Allocate dynamic per-cpu area. */
620 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
621 dpcpu_init((void *)dpcpu, 0);
623 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
624 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
625 msgbufp = (void *)msgbufpv;
627 virtual_avail = roundup2(freemempos, L2_SIZE);
628 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
629 kernel_vm_end = virtual_avail;
631 pa = pmap_early_vtophys(l1pt, freemempos);
633 /* Initialize phys_avail and dump_avail. */
634 for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
636 start = physmap[map_slot];
637 end = physmap[map_slot + 1];
641 dump_avail[map_slot] = start;
642 dump_avail[map_slot + 1] = end;
643 realmem += atop((vm_offset_t)(end - start));
645 if (start >= kernstart && end <= pa)
648 if (start < kernstart && end > kernstart)
650 else if (start < pa && end > pa)
652 phys_avail[avail_slot] = start;
653 phys_avail[avail_slot + 1] = end;
654 physmem += (end - start) >> PAGE_SHIFT;
657 if (end != physmap[map_slot + 1] && end > pa) {
658 phys_avail[avail_slot] = pa;
659 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
660 physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
664 phys_avail[avail_slot] = 0;
665 phys_avail[avail_slot + 1] = 0;
668 * Maxmem isn't the "maximum memory", it's one larger than the
669 * highest page of the physical address space. It should be
670 * called something like "Maxphyspage".
672 Maxmem = atop(phys_avail[avail_slot - 1]);
676 * Initialize a vm_page's machine-dependent fields.
679 pmap_page_init(vm_page_t m)
682 TAILQ_INIT(&m->md.pv_list);
683 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
687 * Initialize the pmap module.
688 * Called by vm_init, to initialize any structures that the pmap
689 * system needs to map virtual memory.
698 * Initialize the pv chunk and pmap list mutexes.
700 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
701 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
704 * Initialize the pool of pv list locks.
706 for (i = 0; i < NPV_LIST_LOCKS; i++)
707 rw_init(&pv_list_locks[i], "pmap pv list");
710 * Calculate the size of the pv head table for superpages.
712 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
715 * Allocate memory for the pv head table for superpages.
717 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
719 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
720 for (i = 0; i < pv_npg; i++)
721 TAILQ_INIT(&pv_table[i].pv_list);
722 TAILQ_INIT(&pv_dummy.pv_list);
724 if (superpages_enabled)
725 pagesizes[1] = L2_SIZE;
730 * For SMP, these functions have to use IPIs for coherence.
732 * In general, the calling thread uses a plain fence to order the
733 * writes to the page tables before invoking an SBI callback to invoke
734 * sfence_vma() on remote CPUs.
737 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
742 mask = pmap->pm_active;
743 CPU_CLR(PCPU_GET(hart), &mask);
745 if (!CPU_EMPTY(&mask) && smp_started)
746 sbi_remote_sfence_vma(mask.__bits, va, 1);
752 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
757 mask = pmap->pm_active;
758 CPU_CLR(PCPU_GET(hart), &mask);
760 if (!CPU_EMPTY(&mask) && smp_started)
761 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
764 * Might consider a loop of sfence_vma_page() for a small
765 * number of pages in the future.
772 pmap_invalidate_all(pmap_t pmap)
777 mask = pmap->pm_active;
778 CPU_CLR(PCPU_GET(hart), &mask);
781 * XXX: The SBI doc doesn't detail how to specify x0 as the
782 * address to perform a global fence. BBL currently treats
783 * all sfence_vma requests as global however.
786 if (!CPU_EMPTY(&mask) && smp_started)
787 sbi_remote_sfence_vma(mask.__bits, 0, 0);
793 * Normal, non-SMP, invalidation functions.
794 * We inline these within pmap.c for speed.
797 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
804 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
808 * Might consider a loop of sfence_vma_page() for a small
809 * number of pages in the future.
815 pmap_invalidate_all(pmap_t pmap)
823 * Routine: pmap_extract
825 * Extract the physical page address associated
826 * with the given map/virtual_address pair.
829 pmap_extract(pmap_t pmap, vm_offset_t va)
838 * Start with the l2 tabel. We are unable to allocate
839 * pages in the l1 table.
841 l2p = pmap_l2(pmap, va);
844 if ((l2 & PTE_RX) == 0) {
845 l3p = pmap_l2_to_l3(l2p, va);
848 pa = PTE_TO_PHYS(l3);
849 pa |= (va & L3_OFFSET);
852 /* L2 is superpages */
853 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
854 pa |= (va & L2_OFFSET);
862 * Routine: pmap_extract_and_hold
864 * Atomically extract and hold the physical page
865 * with the given pmap and virtual address pair
866 * if that mapping permits the given protection.
869 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
880 l3p = pmap_l3(pmap, va);
881 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
882 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
883 phys = PTE_TO_PHYS(l3);
884 if (vm_page_pa_tryrelock(pmap, phys, &pa))
886 m = PHYS_TO_VM_PAGE(phys);
896 pmap_kextract(vm_offset_t va)
902 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
903 pa = DMAP_TO_PHYS(va);
905 l2 = pmap_l2(kernel_pmap, va);
907 panic("pmap_kextract: No l2");
908 if ((pmap_load(l2) & PTE_RX) != 0) {
910 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
911 pa |= (va & L2_OFFSET);
915 l3 = pmap_l2_to_l3(l2, va);
917 panic("pmap_kextract: No l3...");
918 pa = PTE_TO_PHYS(pmap_load(l3));
919 pa |= (va & PAGE_MASK);
924 /***************************************************
925 * Low level mapping routines.....
926 ***************************************************/
929 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
936 KASSERT((pa & L3_OFFSET) == 0,
937 ("pmap_kenter_device: Invalid physical address"));
938 KASSERT((sva & L3_OFFSET) == 0,
939 ("pmap_kenter_device: Invalid virtual address"));
940 KASSERT((size & PAGE_MASK) == 0,
941 ("pmap_kenter_device: Mapping is not page-sized"));
945 l3 = pmap_l3(kernel_pmap, va);
946 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
948 pn = (pa / PAGE_SIZE);
950 entry |= (pn << PTE_PPN0_S);
951 pmap_store(l3, entry);
957 pmap_invalidate_range(kernel_pmap, sva, va);
961 * Remove a page from the kernel pagetables.
962 * Note: not SMP coherent.
965 pmap_kremove(vm_offset_t va)
969 l3 = pmap_l3(kernel_pmap, va);
970 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
977 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
982 KASSERT((sva & L3_OFFSET) == 0,
983 ("pmap_kremove_device: Invalid virtual address"));
984 KASSERT((size & PAGE_MASK) == 0,
985 ("pmap_kremove_device: Mapping is not page-sized"));
989 l3 = pmap_l3(kernel_pmap, va);
990 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
997 pmap_invalidate_range(kernel_pmap, sva, va);
1001 * Used to map a range of physical addresses into kernel
1002 * virtual address space.
1004 * The value passed in '*virt' is a suggested virtual address for
1005 * the mapping. Architectures which can support a direct-mapped
1006 * physical to virtual region can return the appropriate address
1007 * within that region, leaving '*virt' unchanged. Other
1008 * architectures should map the pages starting at '*virt' and
1009 * update '*virt' with the first usable address after the mapped
1013 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1016 return PHYS_TO_DMAP(start);
1021 * Add a list of wired pages to the kva
1022 * this routine is only used for temporary
1023 * kernel mappings that do not need to have
1024 * page modification or references recorded.
1025 * Note that old mappings are simply written
1026 * over. The page *must* be wired.
1027 * Note: SMP coherent. Uses a ranged shootdown IPI.
1030 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1040 for (i = 0; i < count; i++) {
1042 pa = VM_PAGE_TO_PHYS(m);
1043 pn = (pa / PAGE_SIZE);
1044 l3 = pmap_l3(kernel_pmap, va);
1047 entry |= (pn << PTE_PPN0_S);
1048 pmap_store(l3, entry);
1052 pmap_invalidate_range(kernel_pmap, sva, va);
1056 * This routine tears out page mappings from the
1057 * kernel -- it is meant only for temporary mappings.
1058 * Note: SMP coherent. Uses a ranged shootdown IPI.
1061 pmap_qremove(vm_offset_t sva, int count)
1066 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1068 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1069 l3 = pmap_l3(kernel_pmap, va);
1070 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1073 pmap_invalidate_range(kernel_pmap, sva, va);
1077 pmap_ps_enabled(pmap_t pmap __unused)
1080 return (superpages_enabled);
1083 /***************************************************
1084 * Page table page management routines.....
1085 ***************************************************/
1087 * Schedule the specified unused page table page to be freed. Specifically,
1088 * add the page to the specified list of pages that will be released to the
1089 * physical memory manager after the TLB has been updated.
1091 static __inline void
1092 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1093 boolean_t set_PG_ZERO)
1097 m->flags |= PG_ZERO;
1099 m->flags &= ~PG_ZERO;
1100 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1104 * Inserts the specified page table page into the specified pmap's collection
1105 * of idle page table pages. Each of a pmap's page table pages is responsible
1106 * for mapping a distinct range of virtual addresses. The pmap's collection is
1107 * ordered by this virtual address range.
1110 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3)
1113 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1114 return (vm_radix_insert(&pmap->pm_root, ml3));
1118 * Removes the page table page mapping the specified virtual address from the
1119 * specified pmap's collection of idle page table pages, and returns it.
1120 * Otherwise, returns NULL if there is no page table page corresponding to the
1121 * specified virtual address.
1123 static __inline vm_page_t
1124 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1127 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1128 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1132 * Decrements a page table page's wire count, which is used to record the
1133 * number of valid page table entries within the page. If the wire count
1134 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1135 * page table page was unmapped and FALSE otherwise.
1137 static inline boolean_t
1138 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1142 if (m->wire_count == 0) {
1143 _pmap_unwire_ptp(pmap, va, m, free);
1151 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1155 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1156 if (m->pindex >= NUL1E) {
1158 l1 = pmap_l1(pmap, va);
1160 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1163 l2 = pmap_l2(pmap, va);
1166 pmap_resident_count_dec(pmap, 1);
1167 if (m->pindex < NUL1E) {
1171 l1 = pmap_l1(pmap, va);
1172 phys = PTE_TO_PHYS(pmap_load(l1));
1173 pdpg = PHYS_TO_VM_PAGE(phys);
1174 pmap_unwire_ptp(pmap, va, pdpg, free);
1176 pmap_invalidate_page(pmap, va);
1181 * Put page on a list so that it is released after
1182 * *ALL* TLB shootdown is done
1184 pmap_add_delayed_free_list(m, free, TRUE);
1188 * After removing a page table entry, this routine is used to
1189 * conditionally free the page, and manage the hold/wire counts.
1192 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1193 struct spglist *free)
1197 if (va >= VM_MAXUSER_ADDRESS)
1199 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1200 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1201 return (pmap_unwire_ptp(pmap, va, mpte, free));
1205 pmap_pinit0(pmap_t pmap)
1208 PMAP_LOCK_INIT(pmap);
1209 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1210 pmap->pm_l1 = kernel_pmap->pm_l1;
1211 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1212 CPU_ZERO(&pmap->pm_active);
1213 pmap_activate_boot(pmap);
1217 pmap_pinit(pmap_t pmap)
1223 * allocate the l1 page
1225 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1226 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1229 l1phys = VM_PAGE_TO_PHYS(l1pt);
1230 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1231 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1233 if ((l1pt->flags & PG_ZERO) == 0)
1234 pagezero(pmap->pm_l1);
1236 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1238 CPU_ZERO(&pmap->pm_active);
1240 /* Install kernel pagetables */
1241 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1243 /* Add to the list of all user pmaps */
1244 mtx_lock(&allpmaps_lock);
1245 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1246 mtx_unlock(&allpmaps_lock);
1248 vm_radix_init(&pmap->pm_root);
1254 * This routine is called if the desired page table page does not exist.
1256 * If page table page allocation fails, this routine may sleep before
1257 * returning NULL. It sleeps only if a lock pointer was given.
1259 * Note: If a page allocation fails at page table level two or three,
1260 * one or two pages may be held during the wait, only to be released
1261 * afterwards. This conservative approach is easily argued to avoid
1265 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1267 vm_page_t m, /*pdppg, */pdpg;
1272 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1275 * Allocate a page table page.
1277 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1278 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1279 if (lockp != NULL) {
1280 RELEASE_PV_LIST_LOCK(lockp);
1282 rw_runlock(&pvh_global_lock);
1284 rw_rlock(&pvh_global_lock);
1289 * Indicate the need to retry. While waiting, the page table
1290 * page may have been allocated.
1295 if ((m->flags & PG_ZERO) == 0)
1299 * Map the pagetable page into the process address space, if
1300 * it isn't already there.
1303 if (ptepindex >= NUL1E) {
1305 vm_pindex_t l1index;
1307 l1index = ptepindex - NUL1E;
1308 l1 = &pmap->pm_l1[l1index];
1310 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1312 entry |= (pn << PTE_PPN0_S);
1313 pmap_store(l1, entry);
1314 pmap_distribute_l1(pmap, l1index, entry);
1316 vm_pindex_t l1index;
1317 pd_entry_t *l1, *l2;
1319 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1320 l1 = &pmap->pm_l1[l1index];
1321 if (pmap_load(l1) == 0) {
1322 /* recurse for allocating page dir */
1323 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1325 vm_page_unwire_noq(m);
1326 vm_page_free_zero(m);
1330 phys = PTE_TO_PHYS(pmap_load(l1));
1331 pdpg = PHYS_TO_VM_PAGE(phys);
1335 phys = PTE_TO_PHYS(pmap_load(l1));
1336 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1337 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1339 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1341 entry |= (pn << PTE_PPN0_S);
1342 pmap_store(l2, entry);
1345 pmap_resident_count_inc(pmap, 1);
1351 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1355 vm_pindex_t l2pindex;
1358 l1 = pmap_l1(pmap, va);
1359 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1360 /* Add a reference to the L2 page. */
1361 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1364 /* Allocate a L2 page. */
1365 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1366 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1367 if (l2pg == NULL && lockp != NULL)
1374 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1376 vm_pindex_t ptepindex;
1382 * Calculate pagetable page index
1384 ptepindex = pmap_l2_pindex(va);
1387 * Get the page directory entry
1389 l2 = pmap_l2(pmap, va);
1392 * If the page table page is mapped, we just increment the
1393 * hold count, and activate it.
1395 if (l2 != NULL && pmap_load(l2) != 0) {
1396 phys = PTE_TO_PHYS(pmap_load(l2));
1397 m = PHYS_TO_VM_PAGE(phys);
1401 * Here if the pte page isn't mapped, or if it has been
1404 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1405 if (m == NULL && lockp != NULL)
1412 /***************************************************
1413 * Pmap allocation/deallocation routines.
1414 ***************************************************/
1417 * Release any resources held by the given physical map.
1418 * Called when a pmap initialized by pmap_pinit is being released.
1419 * Should only be called if the map contains no valid mappings.
1422 pmap_release(pmap_t pmap)
1426 KASSERT(pmap->pm_stats.resident_count == 0,
1427 ("pmap_release: pmap resident count %ld != 0",
1428 pmap->pm_stats.resident_count));
1429 KASSERT(CPU_EMPTY(&pmap->pm_active),
1430 ("releasing active pmap %p", pmap));
1432 mtx_lock(&allpmaps_lock);
1433 LIST_REMOVE(pmap, pm_list);
1434 mtx_unlock(&allpmaps_lock);
1436 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1437 vm_page_unwire_noq(m);
1443 kvm_size(SYSCTL_HANDLER_ARGS)
1445 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1447 return sysctl_handle_long(oidp, &ksize, 0, req);
1449 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1450 0, 0, kvm_size, "LU", "Size of KVM");
1453 kvm_free(SYSCTL_HANDLER_ARGS)
1455 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1457 return sysctl_handle_long(oidp, &kfree, 0, req);
1459 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1460 0, 0, kvm_free, "LU", "Amount of KVM free");
1464 * grow the number of kernel page table entries, if needed
1467 pmap_growkernel(vm_offset_t addr)
1471 pd_entry_t *l1, *l2;
1475 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1477 addr = roundup2(addr, L2_SIZE);
1478 if (addr - 1 >= vm_map_max(kernel_map))
1479 addr = vm_map_max(kernel_map);
1480 while (kernel_vm_end < addr) {
1481 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1482 if (pmap_load(l1) == 0) {
1483 /* We need a new PDP entry */
1484 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1485 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1486 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1488 panic("pmap_growkernel: no memory to grow kernel");
1489 if ((nkpg->flags & PG_ZERO) == 0)
1490 pmap_zero_page(nkpg);
1491 paddr = VM_PAGE_TO_PHYS(nkpg);
1493 pn = (paddr / PAGE_SIZE);
1495 entry |= (pn << PTE_PPN0_S);
1496 pmap_store(l1, entry);
1497 pmap_distribute_l1(kernel_pmap,
1498 pmap_l1_index(kernel_vm_end), entry);
1499 continue; /* try again */
1501 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1502 if ((pmap_load(l2) & PTE_V) != 0 &&
1503 (pmap_load(l2) & PTE_RWX) == 0) {
1504 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1505 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1506 kernel_vm_end = vm_map_max(kernel_map);
1512 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1513 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1516 panic("pmap_growkernel: no memory to grow kernel");
1517 if ((nkpg->flags & PG_ZERO) == 0) {
1518 pmap_zero_page(nkpg);
1520 paddr = VM_PAGE_TO_PHYS(nkpg);
1522 pn = (paddr / PAGE_SIZE);
1524 entry |= (pn << PTE_PPN0_S);
1525 pmap_store(l2, entry);
1527 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1529 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1530 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1531 kernel_vm_end = vm_map_max(kernel_map);
1538 /***************************************************
1539 * page management routines.
1540 ***************************************************/
1542 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1543 CTASSERT(_NPCM == 3);
1544 CTASSERT(_NPCPV == 168);
1546 static __inline struct pv_chunk *
1547 pv_to_chunk(pv_entry_t pv)
1550 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1553 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1555 #define PC_FREE0 0xfffffffffffffffful
1556 #define PC_FREE1 0xfffffffffffffffful
1557 #define PC_FREE2 0x000000fffffffffful
1559 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1563 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1565 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1566 "Current number of pv entry chunks");
1567 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1568 "Current number of pv entry chunks allocated");
1569 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1570 "Current number of pv entry chunks frees");
1571 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1572 "Number of times tried to get a chunk page but failed.");
1574 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1575 static int pv_entry_spare;
1577 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1578 "Current number of pv entry frees");
1579 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1580 "Current number of pv entry allocs");
1581 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1582 "Current number of pv entries");
1583 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1584 "Current number of spare pv entries");
1589 * We are in a serious low memory condition. Resort to
1590 * drastic measures to free some pages so we can allocate
1591 * another pv entry chunk.
1593 * Returns NULL if PV entries were reclaimed from the specified pmap.
1595 * We do not, however, unmap 2mpages because subsequent accesses will
1596 * allocate per-page pv entries until repromotion occurs, thereby
1597 * exacerbating the shortage of free pv entries.
1600 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1603 panic("RISCVTODO: reclaim_pv_chunk");
1607 * free the pv_entry back to the free list
1610 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1612 struct pv_chunk *pc;
1613 int idx, field, bit;
1615 rw_assert(&pvh_global_lock, RA_LOCKED);
1616 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1617 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1618 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1619 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1620 pc = pv_to_chunk(pv);
1621 idx = pv - &pc->pc_pventry[0];
1624 pc->pc_map[field] |= 1ul << bit;
1625 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1626 pc->pc_map[2] != PC_FREE2) {
1627 /* 98% of the time, pc is already at the head of the list. */
1628 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1629 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1630 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1634 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1639 free_pv_chunk(struct pv_chunk *pc)
1643 mtx_lock(&pv_chunks_mutex);
1644 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1645 mtx_unlock(&pv_chunks_mutex);
1646 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1647 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1648 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1649 /* entire chunk is free, return it */
1650 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1651 dump_drop_page(m->phys_addr);
1652 vm_page_unwire_noq(m);
1657 * Returns a new PV entry, allocating a new PV chunk from the system when
1658 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1659 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1662 * The given PV list lock may be released.
1665 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1669 struct pv_chunk *pc;
1672 rw_assert(&pvh_global_lock, RA_LOCKED);
1673 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1674 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1676 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1678 for (field = 0; field < _NPCM; field++) {
1679 if (pc->pc_map[field]) {
1680 bit = ffsl(pc->pc_map[field]) - 1;
1684 if (field < _NPCM) {
1685 pv = &pc->pc_pventry[field * 64 + bit];
1686 pc->pc_map[field] &= ~(1ul << bit);
1687 /* If this was the last item, move it to tail */
1688 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1689 pc->pc_map[2] == 0) {
1690 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1691 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1694 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1695 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1699 /* No free items, allocate another chunk */
1700 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1703 if (lockp == NULL) {
1704 PV_STAT(pc_chunk_tryfail++);
1707 m = reclaim_pv_chunk(pmap, lockp);
1711 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1712 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1713 dump_add_page(m->phys_addr);
1714 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1716 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1717 pc->pc_map[1] = PC_FREE1;
1718 pc->pc_map[2] = PC_FREE2;
1719 mtx_lock(&pv_chunks_mutex);
1720 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1721 mtx_unlock(&pv_chunks_mutex);
1722 pv = &pc->pc_pventry[0];
1723 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1724 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1725 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1730 * Ensure that the number of spare PV entries in the specified pmap meets or
1731 * exceeds the given count, "needed".
1733 * The given PV list lock may be released.
1736 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1738 struct pch new_tail;
1739 struct pv_chunk *pc;
1744 rw_assert(&pvh_global_lock, RA_LOCKED);
1745 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1746 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1749 * Newly allocated PV chunks must be stored in a private list until
1750 * the required number of PV chunks have been allocated. Otherwise,
1751 * reclaim_pv_chunk() could recycle one of these chunks. In
1752 * contrast, these chunks must be added to the pmap upon allocation.
1754 TAILQ_INIT(&new_tail);
1757 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1758 bit_count((bitstr_t *)pc->pc_map, 0,
1759 sizeof(pc->pc_map) * NBBY, &free);
1763 if (avail >= needed)
1766 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1767 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1770 m = reclaim_pv_chunk(pmap, lockp);
1777 dump_add_page(m->phys_addr);
1779 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1781 pc->pc_map[0] = PC_FREE0;
1782 pc->pc_map[1] = PC_FREE1;
1783 pc->pc_map[2] = PC_FREE2;
1784 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1785 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1788 * The reclaim might have freed a chunk from the current pmap.
1789 * If that chunk contained available entries, we need to
1790 * re-count the number of available entries.
1795 if (!TAILQ_EMPTY(&new_tail)) {
1796 mtx_lock(&pv_chunks_mutex);
1797 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1798 mtx_unlock(&pv_chunks_mutex);
1803 * First find and then remove the pv entry for the specified pmap and virtual
1804 * address from the specified pv list. Returns the pv entry if found and NULL
1805 * otherwise. This operation can be performed on pv lists for either 4KB or
1806 * 2MB page mappings.
1808 static __inline pv_entry_t
1809 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1813 rw_assert(&pvh_global_lock, RA_LOCKED);
1814 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1815 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1816 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1825 * First find and then destroy the pv entry for the specified pmap and virtual
1826 * address. This operation can be performed on pv lists for either 4KB or 2MB
1830 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1834 pv = pmap_pvh_remove(pvh, pmap, va);
1836 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1837 free_pv_entry(pmap, pv);
1841 * Conditionally create the PV entry for a 4KB page mapping if the required
1842 * memory can be allocated without resorting to reclamation.
1845 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1846 struct rwlock **lockp)
1850 rw_assert(&pvh_global_lock, RA_LOCKED);
1851 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1852 /* Pass NULL instead of the lock pointer to disable reclamation. */
1853 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1855 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1856 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1864 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1865 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1866 * entries for each of the 4KB page mappings.
1868 static void __unused
1869 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1870 struct rwlock **lockp)
1872 struct md_page *pvh;
1873 struct pv_chunk *pc;
1876 vm_offset_t va_last;
1879 rw_assert(&pvh_global_lock, RA_LOCKED);
1880 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1881 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1884 * Transfer the 2mpage's pv entry for this mapping to the first
1885 * page's pv list. Once this transfer begins, the pv list lock
1886 * must not be released until the last pv entry is reinstantiated.
1888 pvh = pa_to_pvh(pa);
1890 pv = pmap_pvh_remove(pvh, pmap, va);
1891 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1892 m = PHYS_TO_VM_PAGE(pa);
1893 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1895 /* Instantiate the remaining 511 pv entries. */
1896 va_last = va + L2_SIZE - PAGE_SIZE;
1898 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1899 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1900 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1901 for (field = 0; field < _NPCM; field++) {
1902 while (pc->pc_map[field] != 0) {
1903 bit = ffsl(pc->pc_map[field]) - 1;
1904 pc->pc_map[field] &= ~(1ul << bit);
1905 pv = &pc->pc_pventry[field * 64 + bit];
1909 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1910 ("pmap_pv_demote_l2: page %p is not managed", m));
1911 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1917 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1918 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1921 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1922 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1923 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1928 #if VM_NRESERVLEVEL > 0
1930 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1931 struct rwlock **lockp)
1933 struct md_page *pvh;
1936 vm_offset_t va_last;
1938 rw_assert(&pvh_global_lock, RA_LOCKED);
1939 KASSERT((va & L2_OFFSET) == 0,
1940 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1942 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1944 m = PHYS_TO_VM_PAGE(pa);
1945 pv = pmap_pvh_remove(&m->md, pmap, va);
1946 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1947 pvh = pa_to_pvh(pa);
1948 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1951 va_last = va + L2_SIZE - PAGE_SIZE;
1955 pmap_pvh_free(&m->md, pmap, va);
1956 } while (va < va_last);
1958 #endif /* VM_NRESERVLEVEL > 0 */
1961 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1962 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1963 * false if the PV entry cannot be allocated without resorting to reclamation.
1966 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1967 struct rwlock **lockp)
1969 struct md_page *pvh;
1973 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1974 /* Pass NULL instead of the lock pointer to disable reclamation. */
1975 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1976 NULL : lockp)) == NULL)
1979 pa = PTE_TO_PHYS(l2e);
1980 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1981 pvh = pa_to_pvh(pa);
1982 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1988 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1990 pt_entry_t newl2, oldl2;
1994 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1995 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1996 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1998 ml3 = pmap_remove_pt_page(pmap, va);
2000 panic("pmap_remove_kernel_l2: Missing pt page");
2002 ml3pa = VM_PAGE_TO_PHYS(ml3);
2003 newl2 = ml3pa | PTE_V;
2006 * Initialize the page table page.
2008 pagezero((void *)PHYS_TO_DMAP(ml3pa));
2011 * Demote the mapping.
2013 oldl2 = pmap_load_store(l2, newl2);
2014 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2015 __func__, l2, oldl2));
2019 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2022 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2023 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2025 struct md_page *pvh;
2027 vm_offset_t eva, va;
2030 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2031 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2032 oldl2 = pmap_load_clear(l2);
2033 KASSERT((oldl2 & PTE_RWX) != 0,
2034 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2037 * The sfence.vma documentation states that it is sufficient to specify
2038 * a single address within a superpage mapping. However, since we do
2039 * not perform any invalidation upon promotion, TLBs may still be
2040 * caching 4KB mappings within the superpage, so we must invalidate the
2043 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2044 if ((oldl2 & PTE_SW_WIRED) != 0)
2045 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2046 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2047 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2048 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2049 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2050 pmap_pvh_free(pvh, pmap, sva);
2051 eva = sva + L2_SIZE;
2052 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2053 va < eva; va += PAGE_SIZE, m++) {
2054 if ((oldl2 & PTE_D) != 0)
2056 if ((oldl2 & PTE_A) != 0)
2057 vm_page_aflag_set(m, PGA_REFERENCED);
2058 if (TAILQ_EMPTY(&m->md.pv_list) &&
2059 TAILQ_EMPTY(&pvh->pv_list))
2060 vm_page_aflag_clear(m, PGA_WRITEABLE);
2063 if (pmap == kernel_pmap) {
2064 pmap_remove_kernel_l2(pmap, l2, sva);
2066 ml3 = pmap_remove_pt_page(pmap, sva);
2068 pmap_resident_count_dec(pmap, 1);
2069 KASSERT(ml3->wire_count == Ln_ENTRIES,
2070 ("pmap_remove_l2: l3 page wire count error"));
2071 ml3->wire_count = 1;
2072 vm_page_unwire_noq(ml3);
2073 pmap_add_delayed_free_list(ml3, free, FALSE);
2076 return (pmap_unuse_pt(pmap, sva, l1e, free));
2080 * pmap_remove_l3: do the things to unmap a page in a process
2083 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2084 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2090 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2091 old_l3 = pmap_load_clear(l3);
2092 pmap_invalidate_page(pmap, va);
2093 if (old_l3 & PTE_SW_WIRED)
2094 pmap->pm_stats.wired_count -= 1;
2095 pmap_resident_count_dec(pmap, 1);
2096 if (old_l3 & PTE_SW_MANAGED) {
2097 phys = PTE_TO_PHYS(old_l3);
2098 m = PHYS_TO_VM_PAGE(phys);
2099 if ((old_l3 & PTE_D) != 0)
2102 vm_page_aflag_set(m, PGA_REFERENCED);
2103 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2104 pmap_pvh_free(&m->md, pmap, va);
2107 return (pmap_unuse_pt(pmap, va, l2e, free));
2111 * Remove the given range of addresses from the specified map.
2113 * It is assumed that the start and end are properly
2114 * rounded to the page size.
2117 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2119 struct spglist free;
2120 struct rwlock *lock;
2121 vm_offset_t va, va_next;
2122 pd_entry_t *l1, *l2, l2e;
2126 * Perform an unsynchronized read. This is, however, safe.
2128 if (pmap->pm_stats.resident_count == 0)
2133 rw_rlock(&pvh_global_lock);
2137 for (; sva < eva; sva = va_next) {
2138 if (pmap->pm_stats.resident_count == 0)
2141 l1 = pmap_l1(pmap, sva);
2142 if (pmap_load(l1) == 0) {
2143 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2150 * Calculate index for next page table.
2152 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2156 l2 = pmap_l1_to_l2(l1, sva);
2159 if ((l2e = pmap_load(l2)) == 0)
2161 if ((l2e & PTE_RWX) != 0) {
2162 if (sva + L2_SIZE == va_next && eva >= va_next) {
2163 (void)pmap_remove_l2(pmap, l2, sva,
2164 pmap_load(l1), &free, &lock);
2166 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2169 * The large page mapping was destroyed.
2173 l2e = pmap_load(l2);
2177 * Limit our scan to either the end of the va represented
2178 * by the current page table page, or to the end of the
2179 * range being removed.
2185 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2187 if (pmap_load(l3) == 0) {
2188 if (va != va_next) {
2189 pmap_invalidate_range(pmap, va, sva);
2196 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2202 pmap_invalidate_range(pmap, va, sva);
2206 rw_runlock(&pvh_global_lock);
2208 vm_page_free_pages_toq(&free, false);
2212 * Routine: pmap_remove_all
2214 * Removes this physical page from
2215 * all physical maps in which it resides.
2216 * Reflects back modify bits to the pager.
2219 * Original versions of this routine were very
2220 * inefficient because they iteratively called
2221 * pmap_remove (slow...)
2225 pmap_remove_all(vm_page_t m)
2227 struct spglist free;
2228 struct md_page *pvh;
2230 pt_entry_t *l3, l3e;
2231 pd_entry_t *l2, l2e;
2235 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2236 ("pmap_remove_all: page %p is not managed", m));
2238 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2239 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2241 rw_wlock(&pvh_global_lock);
2242 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2246 l2 = pmap_l2(pmap, va);
2247 (void)pmap_demote_l2(pmap, l2, va);
2250 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2253 pmap_resident_count_dec(pmap, 1);
2254 l2 = pmap_l2(pmap, pv->pv_va);
2255 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2256 l2e = pmap_load(l2);
2258 KASSERT((l2e & PTE_RX) == 0,
2259 ("pmap_remove_all: found a superpage in %p's pv list", m));
2261 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2262 l3e = pmap_load_clear(l3);
2263 pmap_invalidate_page(pmap, pv->pv_va);
2264 if (l3e & PTE_SW_WIRED)
2265 pmap->pm_stats.wired_count--;
2266 if ((l3e & PTE_A) != 0)
2267 vm_page_aflag_set(m, PGA_REFERENCED);
2270 * Update the vm_page_t clean and reference bits.
2272 if ((l3e & PTE_D) != 0)
2274 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2275 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2277 free_pv_entry(pmap, pv);
2280 vm_page_aflag_clear(m, PGA_WRITEABLE);
2281 rw_wunlock(&pvh_global_lock);
2282 vm_page_free_pages_toq(&free, false);
2286 * Set the physical protection on the
2287 * specified range of this map as requested.
2290 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2292 pd_entry_t *l1, *l2, l2e;
2293 pt_entry_t *l3, l3e, mask;
2296 vm_offset_t va, va_next;
2297 bool anychanged, pv_lists_locked;
2299 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2300 pmap_remove(pmap, sva, eva);
2304 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2305 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2309 pv_lists_locked = false;
2311 if ((prot & VM_PROT_WRITE) == 0)
2312 mask |= PTE_W | PTE_D;
2313 if ((prot & VM_PROT_EXECUTE) == 0)
2317 for (; sva < eva; sva = va_next) {
2318 l1 = pmap_l1(pmap, sva);
2319 if (pmap_load(l1) == 0) {
2320 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2326 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2330 l2 = pmap_l1_to_l2(l1, sva);
2331 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2333 if ((l2e & PTE_RWX) != 0) {
2334 if (sva + L2_SIZE == va_next && eva >= va_next) {
2336 if ((l2e & (PTE_SW_MANAGED | PTE_D)) ==
2337 (PTE_SW_MANAGED | PTE_D)) {
2338 pa = PTE_TO_PHYS(l2e);
2339 for (va = sva, m = PHYS_TO_VM_PAGE(pa);
2340 va < va_next; m++, va += PAGE_SIZE)
2343 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2347 if (!pv_lists_locked) {
2348 pv_lists_locked = true;
2349 if (!rw_try_rlock(&pvh_global_lock)) {
2351 pmap_invalidate_all(
2354 rw_rlock(&pvh_global_lock);
2358 if (!pmap_demote_l2(pmap, l2, sva)) {
2360 * The large page mapping was destroyed.
2370 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2372 l3e = pmap_load(l3);
2374 if ((l3e & PTE_V) == 0)
2376 if ((prot & VM_PROT_WRITE) == 0 &&
2377 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2378 (PTE_SW_MANAGED | PTE_D)) {
2379 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2382 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2388 pmap_invalidate_all(pmap);
2389 if (pv_lists_locked)
2390 rw_runlock(&pvh_global_lock);
2395 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2397 pd_entry_t *l2, l2e;
2398 pt_entry_t bits, *pte, oldpte;
2403 l2 = pmap_l2(pmap, va);
2404 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2406 if ((l2e & PTE_RWX) == 0) {
2407 pte = pmap_l2_to_l3(l2, va);
2408 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2415 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2416 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2417 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2418 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2422 if (ftype == VM_PROT_WRITE)
2426 * Spurious faults can occur if the implementation caches invalid
2427 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2428 * race with each other.
2430 if ((oldpte & bits) != bits)
2431 pmap_store_bits(pte, bits);
2440 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2442 struct rwlock *lock;
2446 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2453 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2454 * mapping is invalidated.
2457 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2458 struct rwlock **lockp)
2460 struct spglist free;
2462 pd_entry_t newl2, oldl2;
2463 pt_entry_t *firstl3, newl3;
2467 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2469 oldl2 = pmap_load(l2);
2470 KASSERT((oldl2 & PTE_RWX) != 0,
2471 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2472 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2474 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2475 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2476 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2479 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2480 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2481 vm_page_free_pages_toq(&free, true);
2482 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2483 "failure for va %#lx in pmap %p", va, pmap);
2486 if (va < VM_MAXUSER_ADDRESS)
2487 pmap_resident_count_inc(pmap, 1);
2489 mptepa = VM_PAGE_TO_PHYS(mpte);
2490 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2491 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2492 KASSERT((oldl2 & PTE_A) != 0,
2493 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2494 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2495 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2499 * If the page table page is new, initialize it.
2501 if (mpte->wire_count == 1) {
2502 mpte->wire_count = Ln_ENTRIES;
2503 for (i = 0; i < Ln_ENTRIES; i++)
2504 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2506 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2507 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2511 * If the mapping has changed attributes, update the page table
2514 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2515 for (i = 0; i < Ln_ENTRIES; i++)
2516 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2519 * The spare PV entries must be reserved prior to demoting the
2520 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2521 * state of the L2 entry and the PV lists will be inconsistent, which
2522 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2523 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2524 * expected PV entry for the 2MB page mapping that is being demoted.
2526 if ((oldl2 & PTE_SW_MANAGED) != 0)
2527 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2530 * Demote the mapping.
2532 pmap_store(l2, newl2);
2535 * Demote the PV entry.
2537 if ((oldl2 & PTE_SW_MANAGED) != 0)
2538 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2540 atomic_add_long(&pmap_l2_demotions, 1);
2541 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2546 #if VM_NRESERVLEVEL > 0
2548 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2549 struct rwlock **lockp)
2551 pt_entry_t *firstl3, *l3;
2555 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2558 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2559 ("pmap_promote_l2: invalid l2 entry %p", l2));
2561 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2562 pa = PTE_TO_PHYS(pmap_load(firstl3));
2563 if ((pa & L2_OFFSET) != 0) {
2564 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2566 atomic_add_long(&pmap_l2_p_failures, 1);
2571 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2572 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2574 "pmap_promote_l2: failure for va %#lx pmap %p",
2576 atomic_add_long(&pmap_l2_p_failures, 1);
2579 if ((pmap_load(l3) & PTE_PROMOTE) !=
2580 (pmap_load(firstl3) & PTE_PROMOTE)) {
2582 "pmap_promote_l2: failure for va %#lx pmap %p",
2584 atomic_add_long(&pmap_l2_p_failures, 1);
2590 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2591 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2592 ("pmap_promote_l2: page table page's pindex is wrong"));
2593 if (pmap_insert_pt_page(pmap, ml3)) {
2594 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2596 atomic_add_long(&pmap_l2_p_failures, 1);
2600 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2601 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2604 pmap_store(l2, pmap_load(firstl3));
2606 atomic_add_long(&pmap_l2_promotions, 1);
2607 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2613 * Insert the given physical page (p) at
2614 * the specified virtual address (v) in the
2615 * target physical map with the protection requested.
2617 * If specified, the page will be wired down, meaning
2618 * that the related pte can not be reclaimed.
2620 * NB: This is the only routine which MAY NOT lazy-evaluate
2621 * or lose information. That is, this routine must actually
2622 * insert this page into the given map NOW.
2625 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2626 u_int flags, int8_t psind)
2628 struct rwlock *lock;
2629 pd_entry_t *l1, *l2, l2e;
2630 pt_entry_t new_l3, orig_l3;
2633 vm_paddr_t opa, pa, l2_pa, l3_pa;
2634 vm_page_t mpte, om, l2_m, l3_m;
2636 pn_t l2_pn, l3_pn, pn;
2640 va = trunc_page(va);
2641 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2642 VM_OBJECT_ASSERT_LOCKED(m->object);
2643 pa = VM_PAGE_TO_PHYS(m);
2644 pn = (pa / PAGE_SIZE);
2646 new_l3 = PTE_V | PTE_R | PTE_A;
2647 if (prot & VM_PROT_EXECUTE)
2649 if (flags & VM_PROT_WRITE)
2651 if (prot & VM_PROT_WRITE)
2653 if (va < VM_MAX_USER_ADDRESS)
2656 new_l3 |= (pn << PTE_PPN0_S);
2657 if ((flags & PMAP_ENTER_WIRED) != 0)
2658 new_l3 |= PTE_SW_WIRED;
2661 * Set modified bit gratuitously for writeable mappings if
2662 * the page is unmanaged. We do not want to take a fault
2663 * to do the dirty bit accounting for these mappings.
2665 if ((m->oflags & VPO_UNMANAGED) != 0) {
2666 if (prot & VM_PROT_WRITE)
2669 new_l3 |= PTE_SW_MANAGED;
2671 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2675 rw_rlock(&pvh_global_lock);
2678 /* Assert the required virtual and physical alignment. */
2679 KASSERT((va & L2_OFFSET) == 0,
2680 ("pmap_enter: va %#lx unaligned", va));
2681 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2682 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2686 l2 = pmap_l2(pmap, va);
2687 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2688 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2690 l3 = pmap_l2_to_l3(l2, va);
2691 if (va < VM_MAXUSER_ADDRESS) {
2692 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2695 } else if (va < VM_MAXUSER_ADDRESS) {
2696 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2697 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2698 if (mpte == NULL && nosleep) {
2699 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2702 rw_runlock(&pvh_global_lock);
2704 return (KERN_RESOURCE_SHORTAGE);
2706 l3 = pmap_l3(pmap, va);
2708 l3 = pmap_l3(pmap, va);
2709 /* TODO: This is not optimal, but should mostly work */
2712 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2713 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2716 panic("pmap_enter: l2 pte_m == NULL");
2717 if ((l2_m->flags & PG_ZERO) == 0)
2718 pmap_zero_page(l2_m);
2720 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2721 l2_pn = (l2_pa / PAGE_SIZE);
2723 l1 = pmap_l1(pmap, va);
2725 entry |= (l2_pn << PTE_PPN0_S);
2726 pmap_store(l1, entry);
2727 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2728 l2 = pmap_l1_to_l2(l1, va);
2731 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2732 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2734 panic("pmap_enter: l3 pte_m == NULL");
2735 if ((l3_m->flags & PG_ZERO) == 0)
2736 pmap_zero_page(l3_m);
2738 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2739 l3_pn = (l3_pa / PAGE_SIZE);
2741 entry |= (l3_pn << PTE_PPN0_S);
2742 pmap_store(l2, entry);
2743 l3 = pmap_l2_to_l3(l2, va);
2745 pmap_invalidate_page(pmap, va);
2748 orig_l3 = pmap_load(l3);
2749 opa = PTE_TO_PHYS(orig_l3);
2753 * Is the specified virtual address already mapped?
2755 if ((orig_l3 & PTE_V) != 0) {
2757 * Wiring change, just update stats. We don't worry about
2758 * wiring PT pages as they remain resident as long as there
2759 * are valid mappings in them. Hence, if a user page is wired,
2760 * the PT page will be also.
2762 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2763 (orig_l3 & PTE_SW_WIRED) == 0)
2764 pmap->pm_stats.wired_count++;
2765 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2766 (orig_l3 & PTE_SW_WIRED) != 0)
2767 pmap->pm_stats.wired_count--;
2770 * Remove the extra PT page reference.
2774 KASSERT(mpte->wire_count > 0,
2775 ("pmap_enter: missing reference to page table page,"
2780 * Has the physical page changed?
2784 * No, might be a protection or wiring change.
2786 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2787 (new_l3 & PTE_W) != 0)
2788 vm_page_aflag_set(m, PGA_WRITEABLE);
2793 * The physical page has changed. Temporarily invalidate
2794 * the mapping. This ensures that all threads sharing the
2795 * pmap keep a consistent view of the mapping, which is
2796 * necessary for the correct handling of COW faults. It
2797 * also permits reuse of the old mapping's PV entry,
2798 * avoiding an allocation.
2800 * For consistency, handle unmanaged mappings the same way.
2802 orig_l3 = pmap_load_clear(l3);
2803 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2804 ("pmap_enter: unexpected pa update for %#lx", va));
2805 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2806 om = PHYS_TO_VM_PAGE(opa);
2809 * The pmap lock is sufficient to synchronize with
2810 * concurrent calls to pmap_page_test_mappings() and
2811 * pmap_ts_referenced().
2813 if ((orig_l3 & PTE_D) != 0)
2815 if ((orig_l3 & PTE_A) != 0)
2816 vm_page_aflag_set(om, PGA_REFERENCED);
2817 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2818 pv = pmap_pvh_remove(&om->md, pmap, va);
2820 ("pmap_enter: no PV entry for %#lx", va));
2821 if ((new_l3 & PTE_SW_MANAGED) == 0)
2822 free_pv_entry(pmap, pv);
2823 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2824 TAILQ_EMPTY(&om->md.pv_list))
2825 vm_page_aflag_clear(om, PGA_WRITEABLE);
2827 pmap_invalidate_page(pmap, va);
2831 * Increment the counters.
2833 if ((new_l3 & PTE_SW_WIRED) != 0)
2834 pmap->pm_stats.wired_count++;
2835 pmap_resident_count_inc(pmap, 1);
2838 * Enter on the PV list if part of our managed memory.
2840 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2842 pv = get_pv_entry(pmap, &lock);
2845 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2846 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2848 if ((new_l3 & PTE_W) != 0)
2849 vm_page_aflag_set(m, PGA_WRITEABLE);
2854 * Sync the i-cache on all harts before updating the PTE
2855 * if the new PTE is executable.
2857 if (prot & VM_PROT_EXECUTE)
2858 pmap_sync_icache(pmap, va, PAGE_SIZE);
2861 * Update the L3 entry.
2864 orig_l3 = pmap_load_store(l3, new_l3);
2865 pmap_invalidate_page(pmap, va);
2866 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2867 ("pmap_enter: invalid update"));
2868 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2869 (PTE_D | PTE_SW_MANAGED))
2872 pmap_store(l3, new_l3);
2875 #if VM_NRESERVLEVEL > 0
2876 if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2877 pmap_ps_enabled(pmap) &&
2878 (m->flags & PG_FICTITIOUS) == 0 &&
2879 vm_reserv_level_iffullpop(m) == 0)
2880 pmap_promote_l2(pmap, l2, va, &lock);
2887 rw_runlock(&pvh_global_lock);
2893 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2894 * if successful. Returns false if (1) a page table page cannot be allocated
2895 * without sleeping, (2) a mapping already exists at the specified virtual
2896 * address, or (3) a PV entry cannot be allocated without reclaiming another
2900 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2901 struct rwlock **lockp)
2906 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2908 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2909 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2910 if ((m->oflags & VPO_UNMANAGED) == 0)
2911 new_l2 |= PTE_SW_MANAGED;
2912 if ((prot & VM_PROT_EXECUTE) != 0)
2914 if (va < VM_MAXUSER_ADDRESS)
2916 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2917 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2922 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2923 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2924 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2925 * a mapping already exists at the specified virtual address. Returns
2926 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2927 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2928 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2930 * The parameter "m" is only used when creating a managed, writeable mapping.
2933 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2934 vm_page_t m, struct rwlock **lockp)
2936 struct spglist free;
2937 pd_entry_t *l2, *l3, oldl2;
2941 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2943 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2944 NULL : lockp)) == NULL) {
2945 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2947 return (KERN_RESOURCE_SHORTAGE);
2950 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2951 l2 = &l2[pmap_l2_index(va)];
2952 if ((oldl2 = pmap_load(l2)) != 0) {
2953 KASSERT(l2pg->wire_count > 1,
2954 ("pmap_enter_l2: l2pg's wire count is too low"));
2955 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2958 "pmap_enter_l2: failure for va %#lx in pmap %p",
2960 return (KERN_FAILURE);
2963 if ((oldl2 & PTE_RWX) != 0)
2964 (void)pmap_remove_l2(pmap, l2, va,
2965 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2967 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2968 l3 = pmap_l2_to_l3(l2, sva);
2969 if ((pmap_load(l3) & PTE_V) != 0 &&
2970 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2974 vm_page_free_pages_toq(&free, true);
2975 if (va >= VM_MAXUSER_ADDRESS) {
2976 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2977 if (pmap_insert_pt_page(pmap, mt)) {
2979 * XXX Currently, this can't happen bacuse
2980 * we do not perform pmap_enter(psind == 1)
2981 * on the kernel pmap.
2983 panic("pmap_enter_l2: trie insert failed");
2986 KASSERT(pmap_load(l2) == 0,
2987 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2990 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2992 * Abort this mapping if its PV entry could not be created.
2994 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2996 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2998 * Although "va" is not mapped, paging-structure
2999 * caches could nonetheless have entries that
3000 * refer to the freed page table pages.
3001 * Invalidate those entries.
3003 pmap_invalidate_page(pmap, va);
3004 vm_page_free_pages_toq(&free, true);
3007 "pmap_enter_l2: failure for va %#lx in pmap %p",
3009 return (KERN_RESOURCE_SHORTAGE);
3011 if ((new_l2 & PTE_W) != 0)
3012 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3013 vm_page_aflag_set(mt, PGA_WRITEABLE);
3017 * Increment counters.
3019 if ((new_l2 & PTE_SW_WIRED) != 0)
3020 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3021 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3024 * Map the superpage.
3026 pmap_store(l2, new_l2);
3028 atomic_add_long(&pmap_l2_mappings, 1);
3029 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3032 return (KERN_SUCCESS);
3036 * Maps a sequence of resident pages belonging to the same object.
3037 * The sequence begins with the given page m_start. This page is
3038 * mapped at the given virtual address start. Each subsequent page is
3039 * mapped at a virtual address that is offset from start by the same
3040 * amount as the page is offset from m_start within the object. The
3041 * last page in the sequence is the page with the largest offset from
3042 * m_start that can be mapped at a virtual address less than the given
3043 * virtual address end. Not every virtual page between start and end
3044 * is mapped; only those for which a resident page exists with the
3045 * corresponding offset from m_start are mapped.
3048 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3049 vm_page_t m_start, vm_prot_t prot)
3051 struct rwlock *lock;
3054 vm_pindex_t diff, psize;
3056 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3058 psize = atop(end - start);
3062 rw_rlock(&pvh_global_lock);
3064 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3065 va = start + ptoa(diff);
3066 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3067 m->psind == 1 && pmap_ps_enabled(pmap) &&
3068 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3069 m = &m[L2_SIZE / PAGE_SIZE - 1];
3071 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3073 m = TAILQ_NEXT(m, listq);
3077 rw_runlock(&pvh_global_lock);
3082 * this code makes some *MAJOR* assumptions:
3083 * 1. Current pmap & pmap exists.
3086 * 4. No page table pages.
3087 * but is *MUCH* faster than pmap_enter...
3091 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3093 struct rwlock *lock;
3096 rw_rlock(&pvh_global_lock);
3098 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3101 rw_runlock(&pvh_global_lock);
3106 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3107 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3109 struct spglist free;
3112 pt_entry_t *l3, newl3;
3114 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3115 (m->oflags & VPO_UNMANAGED) != 0,
3116 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3117 rw_assert(&pvh_global_lock, RA_LOCKED);
3118 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3120 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3122 * In the case that a page table page is not
3123 * resident, we are creating it here.
3125 if (va < VM_MAXUSER_ADDRESS) {
3126 vm_pindex_t l2pindex;
3129 * Calculate pagetable page index
3131 l2pindex = pmap_l2_pindex(va);
3132 if (mpte && (mpte->pindex == l2pindex)) {
3138 l2 = pmap_l2(pmap, va);
3141 * If the page table page is mapped, we just increment
3142 * the hold count, and activate it. Otherwise, we
3143 * attempt to allocate a page table page. If this
3144 * attempt fails, we don't retry. Instead, we give up.
3146 if (l2 != NULL && pmap_load(l2) != 0) {
3147 phys = PTE_TO_PHYS(pmap_load(l2));
3148 mpte = PHYS_TO_VM_PAGE(phys);
3152 * Pass NULL instead of the PV list lock
3153 * pointer, because we don't intend to sleep.
3155 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3160 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3161 l3 = &l3[pmap_l3_index(va)];
3164 l3 = pmap_l3(kernel_pmap, va);
3167 panic("pmap_enter_quick_locked: No l3");
3168 if (pmap_load(l3) != 0) {
3177 * Enter on the PV list if part of our managed memory.
3179 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3180 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3183 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3184 pmap_invalidate_page(pmap, va);
3185 vm_page_free_pages_toq(&free, false);
3193 * Increment counters
3195 pmap_resident_count_inc(pmap, 1);
3197 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3199 if ((prot & VM_PROT_EXECUTE) != 0)
3201 if ((m->oflags & VPO_UNMANAGED) == 0)
3202 newl3 |= PTE_SW_MANAGED;
3203 if (va < VM_MAX_USER_ADDRESS)
3207 * Sync the i-cache on all harts before updating the PTE
3208 * if the new PTE is executable.
3210 if (prot & VM_PROT_EXECUTE)
3211 pmap_sync_icache(pmap, va, PAGE_SIZE);
3213 pmap_store(l3, newl3);
3215 pmap_invalidate_page(pmap, va);
3220 * This code maps large physical mmap regions into the
3221 * processor address space. Note that some shortcuts
3222 * are taken, but the code works.
3225 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3226 vm_pindex_t pindex, vm_size_t size)
3229 VM_OBJECT_ASSERT_WLOCKED(object);
3230 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3231 ("pmap_object_init_pt: non-device object"));
3235 * Clear the wired attribute from the mappings for the specified range of
3236 * addresses in the given pmap. Every valid mapping within that range
3237 * must have the wired attribute set. In contrast, invalid mappings
3238 * cannot have the wired attribute set, so they are ignored.
3240 * The wired attribute of the page table entry is not a hardware feature,
3241 * so there is no need to invalidate any TLB entries.
3244 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3246 vm_offset_t va_next;
3247 pd_entry_t *l1, *l2, l2e;
3248 pt_entry_t *l3, l3e;
3249 bool pv_lists_locked;
3251 pv_lists_locked = false;
3254 for (; sva < eva; sva = va_next) {
3255 l1 = pmap_l1(pmap, sva);
3256 if (pmap_load(l1) == 0) {
3257 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3263 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3267 l2 = pmap_l1_to_l2(l1, sva);
3268 if ((l2e = pmap_load(l2)) == 0)
3270 if ((l2e & PTE_RWX) != 0) {
3271 if (sva + L2_SIZE == va_next && eva >= va_next) {
3272 if ((l2e & PTE_SW_WIRED) == 0)
3273 panic("pmap_unwire: l2 %#jx is missing "
3274 "PTE_SW_WIRED", (uintmax_t)l2e);
3275 pmap_clear_bits(l2, PTE_SW_WIRED);
3278 if (!pv_lists_locked) {
3279 pv_lists_locked = true;
3280 if (!rw_try_rlock(&pvh_global_lock)) {
3282 rw_rlock(&pvh_global_lock);
3287 if (!pmap_demote_l2(pmap, l2, sva))
3288 panic("pmap_unwire: demotion failed");
3294 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3296 if ((l3e = pmap_load(l3)) == 0)
3298 if ((l3e & PTE_SW_WIRED) == 0)
3299 panic("pmap_unwire: l3 %#jx is missing "
3300 "PTE_SW_WIRED", (uintmax_t)l3e);
3303 * PG_W must be cleared atomically. Although the pmap
3304 * lock synchronizes access to PG_W, another processor
3305 * could be setting PG_M and/or PG_A concurrently.
3307 pmap_clear_bits(l3, PTE_SW_WIRED);
3308 pmap->pm_stats.wired_count--;
3311 if (pv_lists_locked)
3312 rw_runlock(&pvh_global_lock);
3317 * Copy the range specified by src_addr/len
3318 * from the source map to the range dst_addr/len
3319 * in the destination map.
3321 * This routine is only advisory and need not do anything.
3325 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3326 vm_offset_t src_addr)
3332 * pmap_zero_page zeros the specified hardware page by mapping
3333 * the page into KVM and using bzero to clear its contents.
3336 pmap_zero_page(vm_page_t m)
3338 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3340 pagezero((void *)va);
3344 * pmap_zero_page_area zeros the specified hardware page by mapping
3345 * the page into KVM and using bzero to clear its contents.
3347 * off and size may not cover an area beyond a single hardware page.
3350 pmap_zero_page_area(vm_page_t m, int off, int size)
3352 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3354 if (off == 0 && size == PAGE_SIZE)
3355 pagezero((void *)va);
3357 bzero((char *)va + off, size);
3361 * pmap_copy_page copies the specified (machine independent)
3362 * page by mapping the page into virtual memory and using
3363 * bcopy to copy the page, one machine dependent page at a
3367 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3369 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3370 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3372 pagecopy((void *)src, (void *)dst);
3375 int unmapped_buf_allowed = 1;
3378 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3379 vm_offset_t b_offset, int xfersize)
3383 vm_paddr_t p_a, p_b;
3384 vm_offset_t a_pg_offset, b_pg_offset;
3387 while (xfersize > 0) {
3388 a_pg_offset = a_offset & PAGE_MASK;
3389 m_a = ma[a_offset >> PAGE_SHIFT];
3390 p_a = m_a->phys_addr;
3391 b_pg_offset = b_offset & PAGE_MASK;
3392 m_b = mb[b_offset >> PAGE_SHIFT];
3393 p_b = m_b->phys_addr;
3394 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3395 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3396 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3397 panic("!DMAP a %lx", p_a);
3399 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3401 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3402 panic("!DMAP b %lx", p_b);
3404 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3406 bcopy(a_cp, b_cp, cnt);
3414 pmap_quick_enter_page(vm_page_t m)
3417 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3421 pmap_quick_remove_page(vm_offset_t addr)
3426 * Returns true if the pmap's pv is one of the first
3427 * 16 pvs linked to from this page. This count may
3428 * be changed upwards or downwards in the future; it
3429 * is only necessary that true be returned for a small
3430 * subset of pmaps for proper page aging.
3433 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3435 struct md_page *pvh;
3436 struct rwlock *lock;
3441 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3442 ("pmap_page_exists_quick: page %p is not managed", m));
3444 rw_rlock(&pvh_global_lock);
3445 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3447 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3448 if (PV_PMAP(pv) == pmap) {
3456 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3457 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3458 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3459 if (PV_PMAP(pv) == pmap) {
3469 rw_runlock(&pvh_global_lock);
3474 * pmap_page_wired_mappings:
3476 * Return the number of managed mappings to the given physical page
3480 pmap_page_wired_mappings(vm_page_t m)
3482 struct md_page *pvh;
3483 struct rwlock *lock;
3488 int count, md_gen, pvh_gen;
3490 if ((m->oflags & VPO_UNMANAGED) != 0)
3492 rw_rlock(&pvh_global_lock);
3493 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3497 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3499 if (!PMAP_TRYLOCK(pmap)) {
3500 md_gen = m->md.pv_gen;
3504 if (md_gen != m->md.pv_gen) {
3509 l3 = pmap_l3(pmap, pv->pv_va);
3510 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3514 if ((m->flags & PG_FICTITIOUS) == 0) {
3515 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3516 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3518 if (!PMAP_TRYLOCK(pmap)) {
3519 md_gen = m->md.pv_gen;
3520 pvh_gen = pvh->pv_gen;
3524 if (md_gen != m->md.pv_gen ||
3525 pvh_gen != pvh->pv_gen) {
3530 l2 = pmap_l2(pmap, pv->pv_va);
3531 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3537 rw_runlock(&pvh_global_lock);
3542 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3543 struct spglist *free, bool superpage)
3545 struct md_page *pvh;
3549 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3550 pvh = pa_to_pvh(m->phys_addr);
3551 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3553 if (TAILQ_EMPTY(&pvh->pv_list)) {
3554 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3555 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3556 (mt->aflags & PGA_WRITEABLE) != 0)
3557 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3559 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3561 pmap_resident_count_dec(pmap, 1);
3562 KASSERT(mpte->wire_count == Ln_ENTRIES,
3563 ("pmap_remove_pages: pte page wire count error"));
3564 mpte->wire_count = 0;
3565 pmap_add_delayed_free_list(mpte, free, FALSE);
3568 pmap_resident_count_dec(pmap, 1);
3569 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3571 if (TAILQ_EMPTY(&m->md.pv_list) &&
3572 (m->aflags & PGA_WRITEABLE) != 0) {
3573 pvh = pa_to_pvh(m->phys_addr);
3574 if (TAILQ_EMPTY(&pvh->pv_list))
3575 vm_page_aflag_clear(m, PGA_WRITEABLE);
3581 * Destroy all managed, non-wired mappings in the given user-space
3582 * pmap. This pmap cannot be active on any processor besides the
3585 * This function cannot be applied to the kernel pmap. Moreover, it
3586 * is not intended for general use. It is only to be used during
3587 * process termination. Consequently, it can be implemented in ways
3588 * that make it faster than pmap_remove(). First, it can more quickly
3589 * destroy mappings by iterating over the pmap's collection of PV
3590 * entries, rather than searching the page table. Second, it doesn't
3591 * have to test and clear the page table entries atomically, because
3592 * no processor is currently accessing the user address space. In
3593 * particular, a page table entry's dirty bit won't change state once
3594 * this function starts.
3597 pmap_remove_pages(pmap_t pmap)
3599 struct spglist free;
3601 pt_entry_t *pte, tpte;
3604 struct pv_chunk *pc, *npc;
3605 struct rwlock *lock;
3607 uint64_t inuse, bitmask;
3608 int allfree, field, freed, idx;
3614 rw_rlock(&pvh_global_lock);
3616 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3619 for (field = 0; field < _NPCM; field++) {
3620 inuse = ~pc->pc_map[field] & pc_freemask[field];
3621 while (inuse != 0) {
3622 bit = ffsl(inuse) - 1;
3623 bitmask = 1UL << bit;
3624 idx = field * 64 + bit;
3625 pv = &pc->pc_pventry[idx];
3628 pte = pmap_l1(pmap, pv->pv_va);
3629 ptepde = pmap_load(pte);
3630 pte = pmap_l1_to_l2(pte, pv->pv_va);
3631 tpte = pmap_load(pte);
3632 if ((tpte & PTE_RWX) != 0) {
3636 pte = pmap_l2_to_l3(pte, pv->pv_va);
3637 tpte = pmap_load(pte);
3642 * We cannot remove wired pages from a
3643 * process' mapping at this time.
3645 if (tpte & PTE_SW_WIRED) {
3650 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3651 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3652 m < &vm_page_array[vm_page_array_size],
3653 ("pmap_remove_pages: bad pte %#jx",
3659 * Update the vm_page_t clean/reference bits.
3661 if ((tpte & (PTE_D | PTE_W)) ==
3665 mt < &m[Ln_ENTRIES]; mt++)
3671 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3674 pc->pc_map[field] |= bitmask;
3676 pmap_remove_pages_pv(pmap, m, pv, &free,
3678 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3682 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3683 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3684 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3686 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3692 pmap_invalidate_all(pmap);
3693 rw_runlock(&pvh_global_lock);
3695 vm_page_free_pages_toq(&free, false);
3699 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3701 struct md_page *pvh;
3702 struct rwlock *lock;
3704 pt_entry_t *l3, mask;
3707 int md_gen, pvh_gen;
3717 rw_rlock(&pvh_global_lock);
3718 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3721 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3723 if (!PMAP_TRYLOCK(pmap)) {
3724 md_gen = m->md.pv_gen;
3728 if (md_gen != m->md.pv_gen) {
3733 l3 = pmap_l3(pmap, pv->pv_va);
3734 rv = (pmap_load(l3) & mask) == mask;
3739 if ((m->flags & PG_FICTITIOUS) == 0) {
3740 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3741 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3743 if (!PMAP_TRYLOCK(pmap)) {
3744 md_gen = m->md.pv_gen;
3745 pvh_gen = pvh->pv_gen;
3749 if (md_gen != m->md.pv_gen ||
3750 pvh_gen != pvh->pv_gen) {
3755 l2 = pmap_l2(pmap, pv->pv_va);
3756 rv = (pmap_load(l2) & mask) == mask;
3764 rw_runlock(&pvh_global_lock);
3771 * Return whether or not the specified physical page was modified
3772 * in any physical maps.
3775 pmap_is_modified(vm_page_t m)
3778 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3779 ("pmap_is_modified: page %p is not managed", m));
3782 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3783 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
3784 * is clear, no PTEs can have PG_M set.
3786 VM_OBJECT_ASSERT_WLOCKED(m->object);
3787 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3789 return (pmap_page_test_mappings(m, FALSE, TRUE));
3793 * pmap_is_prefaultable:
3795 * Return whether or not the specified virtual address is eligible
3799 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3806 l3 = pmap_l3(pmap, addr);
3807 if (l3 != NULL && pmap_load(l3) != 0) {
3815 * pmap_is_referenced:
3817 * Return whether or not the specified physical page was referenced
3818 * in any physical maps.
3821 pmap_is_referenced(vm_page_t m)
3824 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3825 ("pmap_is_referenced: page %p is not managed", m));
3826 return (pmap_page_test_mappings(m, TRUE, FALSE));
3830 * Clear the write and modified bits in each of the given page's mappings.
3833 pmap_remove_write(vm_page_t m)
3835 struct md_page *pvh;
3836 struct rwlock *lock;
3839 pt_entry_t *l3, oldl3, newl3;
3840 pv_entry_t next_pv, pv;
3842 int md_gen, pvh_gen;
3844 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3845 ("pmap_remove_write: page %p is not managed", m));
3848 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3849 * set by another thread while the object is locked. Thus,
3850 * if PGA_WRITEABLE is clear, no page table entries need updating.
3852 VM_OBJECT_ASSERT_WLOCKED(m->object);
3853 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3855 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3856 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3857 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3858 rw_rlock(&pvh_global_lock);
3861 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3863 if (!PMAP_TRYLOCK(pmap)) {
3864 pvh_gen = pvh->pv_gen;
3868 if (pvh_gen != pvh->pv_gen) {
3875 l2 = pmap_l2(pmap, va);
3876 if ((pmap_load(l2) & PTE_W) != 0)
3877 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3878 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3879 ("inconsistent pv lock %p %p for page %p",
3880 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3883 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3885 if (!PMAP_TRYLOCK(pmap)) {
3886 pvh_gen = pvh->pv_gen;
3887 md_gen = m->md.pv_gen;
3891 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3897 l3 = pmap_l3(pmap, pv->pv_va);
3898 oldl3 = pmap_load(l3);
3900 if ((oldl3 & PTE_W) != 0) {
3901 newl3 = oldl3 & ~(PTE_D | PTE_W);
3902 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3904 if ((oldl3 & PTE_D) != 0)
3906 pmap_invalidate_page(pmap, pv->pv_va);
3911 vm_page_aflag_clear(m, PGA_WRITEABLE);
3912 rw_runlock(&pvh_global_lock);
3916 * pmap_ts_referenced:
3918 * Return a count of reference bits for a page, clearing those bits.
3919 * It is not necessary for every reference bit to be cleared, but it
3920 * is necessary that 0 only be returned when there are truly no
3921 * reference bits set.
3923 * As an optimization, update the page's dirty field if a modified bit is
3924 * found while counting reference bits. This opportunistic update can be
3925 * performed at low cost and can eliminate the need for some future calls
3926 * to pmap_is_modified(). However, since this function stops after
3927 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3928 * dirty pages. Those dirty pages will only be detected by a future call
3929 * to pmap_is_modified().
3932 pmap_ts_referenced(vm_page_t m)
3934 struct spglist free;
3935 struct md_page *pvh;
3936 struct rwlock *lock;
3939 pd_entry_t *l2, l2e;
3940 pt_entry_t *l3, l3e;
3943 int md_gen, pvh_gen, ret;
3945 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3946 ("pmap_ts_referenced: page %p is not managed", m));
3949 pa = VM_PAGE_TO_PHYS(m);
3950 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3952 lock = PHYS_TO_PV_LIST_LOCK(pa);
3953 rw_rlock(&pvh_global_lock);
3956 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3957 goto small_mappings;
3961 if (!PMAP_TRYLOCK(pmap)) {
3962 pvh_gen = pvh->pv_gen;
3966 if (pvh_gen != pvh->pv_gen) {
3972 l2 = pmap_l2(pmap, va);
3973 l2e = pmap_load(l2);
3974 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3976 * Although l2e is mapping a 2MB page, because
3977 * this function is called at a 4KB page granularity,
3978 * we only update the 4KB page under test.
3982 if ((l2e & PTE_A) != 0) {
3984 * Since this reference bit is shared by 512 4KB
3985 * pages, it should not be cleared every time it is
3986 * tested. Apply a simple "hash" function on the
3987 * physical page number, the virtual superpage number,
3988 * and the pmap address to select one 4KB page out of
3989 * the 512 on which testing the reference bit will
3990 * result in clearing that reference bit. This
3991 * function is designed to avoid the selection of the
3992 * same 4KB page for every 2MB page mapping.
3994 * On demotion, a mapping that hasn't been referenced
3995 * is simply destroyed. To avoid the possibility of a
3996 * subsequent page fault on a demoted wired mapping,
3997 * always leave its reference bit set. Moreover,
3998 * since the superpage is wired, the current state of
3999 * its reference bit won't affect page replacement.
4001 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4002 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4003 (l2e & PTE_SW_WIRED) == 0) {
4004 pmap_clear_bits(l2, PTE_A);
4005 pmap_invalidate_page(pmap, va);
4010 /* Rotate the PV list if it has more than one entry. */
4011 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4012 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4013 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4016 if (ret >= PMAP_TS_REFERENCED_MAX)
4018 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4020 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4025 if (!PMAP_TRYLOCK(pmap)) {
4026 pvh_gen = pvh->pv_gen;
4027 md_gen = m->md.pv_gen;
4031 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4036 l2 = pmap_l2(pmap, pv->pv_va);
4038 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4039 ("pmap_ts_referenced: found an invalid l2 table"));
4041 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4042 l3e = pmap_load(l3);
4043 if ((l3e & PTE_D) != 0)
4045 if ((l3e & PTE_A) != 0) {
4046 if ((l3e & PTE_SW_WIRED) == 0) {
4048 * Wired pages cannot be paged out so
4049 * doing accessed bit emulation for
4050 * them is wasted effort. We do the
4051 * hard work for unwired pages only.
4053 pmap_clear_bits(l3, PTE_A);
4054 pmap_invalidate_page(pmap, pv->pv_va);
4059 /* Rotate the PV list if it has more than one entry. */
4060 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4061 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4062 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4065 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && ret <
4066 PMAP_TS_REFERENCED_MAX);
4069 rw_runlock(&pvh_global_lock);
4070 vm_page_free_pages_toq(&free, false);
4075 * Apply the given advice to the specified range of addresses within the
4076 * given pmap. Depending on the advice, clear the referenced and/or
4077 * modified flags in each mapping and set the mapped page's dirty field.
4080 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4085 * Clear the modify bits on the specified physical page.
4088 pmap_clear_modify(vm_page_t m)
4090 struct md_page *pvh;
4091 struct rwlock *lock;
4093 pv_entry_t next_pv, pv;
4094 pd_entry_t *l2, oldl2;
4095 pt_entry_t *l3, oldl3;
4097 int md_gen, pvh_gen;
4099 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4100 ("pmap_clear_modify: page %p is not managed", m));
4101 VM_OBJECT_ASSERT_WLOCKED(m->object);
4102 KASSERT(!vm_page_xbusied(m),
4103 ("pmap_clear_modify: page %p is exclusive busied", m));
4106 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4107 * If the object containing the page is locked and the page is not
4108 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4110 if ((m->aflags & PGA_WRITEABLE) == 0)
4112 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4113 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4114 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4115 rw_rlock(&pvh_global_lock);
4118 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4120 if (!PMAP_TRYLOCK(pmap)) {
4121 pvh_gen = pvh->pv_gen;
4125 if (pvh_gen != pvh->pv_gen) {
4131 l2 = pmap_l2(pmap, va);
4132 oldl2 = pmap_load(l2);
4133 if ((oldl2 & PTE_W) != 0) {
4134 if (pmap_demote_l2_locked(pmap, l2, va, &lock)) {
4135 if ((oldl2 & PTE_SW_WIRED) == 0) {
4137 * Write protect the mapping to a
4138 * single page so that a subsequent
4139 * write access may repromote.
4141 va += VM_PAGE_TO_PHYS(m) -
4143 l3 = pmap_l2_to_l3(l2, va);
4144 oldl3 = pmap_load(l3);
4145 if ((oldl3 & PTE_V) != 0) {
4146 while (!atomic_fcmpset_long(l3,
4147 &oldl3, oldl3 & ~(PTE_D |
4151 pmap_invalidate_page(pmap, va);
4158 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4160 if (!PMAP_TRYLOCK(pmap)) {
4161 md_gen = m->md.pv_gen;
4162 pvh_gen = pvh->pv_gen;
4166 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4171 l2 = pmap_l2(pmap, pv->pv_va);
4172 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4173 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4175 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4176 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4177 pmap_clear_bits(l3, PTE_D);
4178 pmap_invalidate_page(pmap, pv->pv_va);
4183 rw_runlock(&pvh_global_lock);
4187 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4190 return ((void *)PHYS_TO_DMAP(pa));
4194 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4199 * Sets the memory attribute for the specified page.
4202 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4205 m->md.pv_memattr = ma;
4209 * perform the pmap work for mincore
4212 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4214 pt_entry_t *l2, *l3, tpte;
4224 l2 = pmap_l2(pmap, addr);
4225 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4226 if ((tpte & PTE_RWX) != 0) {
4227 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4228 val = MINCORE_INCORE | MINCORE_SUPER;
4230 l3 = pmap_l2_to_l3(l2, addr);
4231 tpte = pmap_load(l3);
4232 if ((tpte & PTE_V) == 0)
4234 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4235 val = MINCORE_INCORE;
4238 if ((tpte & PTE_D) != 0)
4239 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4240 if ((tpte & PTE_A) != 0)
4241 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4242 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4246 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4247 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4248 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4249 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4252 PA_UNLOCK_COND(*locked_pa);
4258 pmap_activate_sw(struct thread *td)
4260 pmap_t oldpmap, pmap;
4263 oldpmap = PCPU_GET(curpmap);
4264 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4265 if (pmap == oldpmap)
4267 load_satp(pmap->pm_satp);
4269 hart = PCPU_GET(hart);
4271 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4272 CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4274 CPU_SET(hart, &pmap->pm_active);
4275 CPU_CLR(hart, &oldpmap->pm_active);
4277 PCPU_SET(curpmap, pmap);
4283 pmap_activate(struct thread *td)
4287 pmap_activate_sw(td);
4292 pmap_activate_boot(pmap_t pmap)
4296 hart = PCPU_GET(hart);
4298 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4300 CPU_SET(hart, &pmap->pm_active);
4302 PCPU_SET(curpmap, pmap);
4306 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4311 * From the RISC-V User-Level ISA V2.2:
4313 * "To make a store to instruction memory visible to all
4314 * RISC-V harts, the writing hart has to execute a data FENCE
4315 * before requesting that all remote RISC-V harts execute a
4320 CPU_CLR(PCPU_GET(hart), &mask);
4322 if (!CPU_EMPTY(&mask) && smp_started)
4323 sbi_remote_fence_i(mask.__bits);
4328 * Increase the starting virtual address of the given mapping if a
4329 * different alignment might result in more superpage mappings.
4332 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4333 vm_offset_t *addr, vm_size_t size)
4335 vm_offset_t superpage_offset;
4339 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4340 offset += ptoa(object->pg_color);
4341 superpage_offset = offset & L2_OFFSET;
4342 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4343 (*addr & L2_OFFSET) == superpage_offset)
4345 if ((*addr & L2_OFFSET) < superpage_offset)
4346 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4348 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4352 * Get the kernel virtual address of a set of physical pages. If there are
4353 * physical addresses not covered by the DMAP perform a transient mapping
4354 * that will be removed when calling pmap_unmap_io_transient.
4356 * \param page The pages the caller wishes to obtain the virtual
4357 * address on the kernel memory map.
4358 * \param vaddr On return contains the kernel virtual memory address
4359 * of the pages passed in the page parameter.
4360 * \param count Number of pages passed in.
4361 * \param can_fault TRUE if the thread using the mapped pages can take
4362 * page faults, FALSE otherwise.
4364 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4365 * finished or FALSE otherwise.
4369 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4370 boolean_t can_fault)
4373 boolean_t needs_mapping;
4377 * Allocate any KVA space that we need, this is done in a separate
4378 * loop to prevent calling vmem_alloc while pinned.
4380 needs_mapping = FALSE;
4381 for (i = 0; i < count; i++) {
4382 paddr = VM_PAGE_TO_PHYS(page[i]);
4383 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4384 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4385 M_BESTFIT | M_WAITOK, &vaddr[i]);
4386 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4387 needs_mapping = TRUE;
4389 vaddr[i] = PHYS_TO_DMAP(paddr);
4393 /* Exit early if everything is covered by the DMAP */
4399 for (i = 0; i < count; i++) {
4400 paddr = VM_PAGE_TO_PHYS(page[i]);
4401 if (paddr >= DMAP_MAX_PHYSADDR) {
4403 "pmap_map_io_transient: TODO: Map out of DMAP data");
4407 return (needs_mapping);
4411 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4412 boolean_t can_fault)
4419 for (i = 0; i < count; i++) {
4420 paddr = VM_PAGE_TO_PHYS(page[i]);
4421 if (paddr >= DMAP_MAX_PHYSADDR) {
4422 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4428 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4431 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4435 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4438 pd_entry_t *l1p, *l2p;
4440 /* Get l1 directory entry. */
4441 l1p = pmap_l1(pmap, va);
4444 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4447 if ((pmap_load(l1p) & PTE_RX) != 0) {
4453 /* Get l2 directory entry. */
4454 l2p = pmap_l1_to_l2(l1p, va);
4457 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4460 if ((pmap_load(l2p) & PTE_RX) != 0) {
4465 /* Get l3 page table entry. */
4466 *l3 = pmap_l2_to_l3(l2p, va);