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1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
3  *
4  * Copyright (c) 1991 Regents of the University of California.
5  * All rights reserved.
6  * Copyright (c) 1994 John S. Dyson
7  * All rights reserved.
8  * Copyright (c) 1994 David Greenman
9  * All rights reserved.
10  * Copyright (c) 2003 Peter Wemm
11  * All rights reserved.
12  * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13  * All rights reserved.
14  * Copyright (c) 2014 Andrew Turner
15  * All rights reserved.
16  * Copyright (c) 2014 The FreeBSD Foundation
17  * All rights reserved.
18  * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19  * All rights reserved.
20  *
21  * This code is derived from software contributed to Berkeley by
22  * the Systems Programming Group of the University of Utah Computer
23  * Science Department and William Jolitz of UUNET Technologies Inc.
24  *
25  * Portions of this software were developed by Andrew Turner under
26  * sponsorship from The FreeBSD Foundation.
27  *
28  * Portions of this software were developed by SRI International and the
29  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
31  *
32  * Portions of this software were developed by the University of Cambridge
33  * Computer Laboratory as part of the CTSRD Project, with support from the
34  * UK Higher Education Innovation Fund (HEIF).
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  * 3. All advertising materials mentioning features or use of this software
45  *    must display the following acknowledgement:
46  *      This product includes software developed by the University of
47  *      California, Berkeley and its contributors.
48  * 4. Neither the name of the University nor the names of its contributors
49  *    may be used to endorse or promote products derived from this software
50  *    without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62  * SUCH DAMAGE.
63  *
64  *      from:   @(#)pmap.c      7.7 (Berkeley)  5/12/91
65  */
66 /*-
67  * Copyright (c) 2003 Networks Associates Technology, Inc.
68  * All rights reserved.
69  *
70  * This software was developed for the FreeBSD Project by Jake Burkholder,
71  * Safeport Network Services, and Network Associates Laboratories, the
72  * Security Research Division of Network Associates, Inc. under
73  * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74  * CHATS research program.
75  *
76  * Redistribution and use in source and binary forms, with or without
77  * modification, are permitted provided that the following conditions
78  * are met:
79  * 1. Redistributions of source code must retain the above copyright
80  *    notice, this list of conditions and the following disclaimer.
81  * 2. Redistributions in binary form must reproduce the above copyright
82  *    notice, this list of conditions and the following disclaimer in the
83  *    documentation and/or other materials provided with the distribution.
84  *
85  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95  * SUCH DAMAGE.
96  */
97
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
100
101 /*
102  *      Manages physical address maps.
103  *
104  *      Since the information managed by this module is
105  *      also stored by the logical address mapping module,
106  *      this module may throw away valid virtual-to-physical
107  *      mappings at almost any time.  However, invalidations
108  *      of virtual-to-physical mappings must be done as
109  *      requested.
110  *
111  *      In order to cope with hardware architectures which
112  *      make virtual-to-physical map invalidates expensive,
113  *      this module may delay invalidate or reduced protection
114  *      operations until such time as they are actually
115  *      necessary.  This module is given full information as
116  *      to which processors are currently using which maps,
117  *      and to when physical maps must be made correct.
118  */
119
120 #include <sys/param.h>
121 #include <sys/bitstring.h>
122 #include <sys/bus.h>
123 #include <sys/systm.h>
124 #include <sys/kernel.h>
125 #include <sys/ktr.h>
126 #include <sys/lock.h>
127 #include <sys/malloc.h>
128 #include <sys/mman.h>
129 #include <sys/msgbuf.h>
130 #include <sys/mutex.h>
131 #include <sys/proc.h>
132 #include <sys/rwlock.h>
133 #include <sys/sx.h>
134 #include <sys/vmem.h>
135 #include <sys/vmmeter.h>
136 #include <sys/sched.h>
137 #include <sys/sysctl.h>
138 #include <sys/smp.h>
139
140 #include <vm/vm.h>
141 #include <vm/vm_param.h>
142 #include <vm/vm_kern.h>
143 #include <vm/vm_page.h>
144 #include <vm/vm_map.h>
145 #include <vm/vm_object.h>
146 #include <vm/vm_extern.h>
147 #include <vm/vm_pageout.h>
148 #include <vm/vm_pager.h>
149 #include <vm/vm_phys.h>
150 #include <vm/vm_radix.h>
151 #include <vm/vm_reserv.h>
152 #include <vm/uma.h>
153
154 #include <machine/machdep.h>
155 #include <machine/md_var.h>
156 #include <machine/pcb.h>
157 #include <machine/sbi.h>
158
159 #define NUL1E           (Ln_ENTRIES * Ln_ENTRIES)
160 #define NUL2E           (Ln_ENTRIES * NUL1E)
161
162 #if !defined(DIAGNOSTIC)
163 #ifdef __GNUC_GNU_INLINE__
164 #define PMAP_INLINE     __attribute__((__gnu_inline__)) inline
165 #else
166 #define PMAP_INLINE     extern inline
167 #endif
168 #else
169 #define PMAP_INLINE
170 #endif
171
172 #ifdef PV_STATS
173 #define PV_STAT(x)      do { x ; } while (0)
174 #else
175 #define PV_STAT(x)      do { } while (0)
176 #endif
177
178 #define pmap_l2_pindex(v)       ((v) >> L2_SHIFT)
179 #define pa_to_pvh(pa)           (&pv_table[pa_index(pa)])
180
181 #define NPV_LIST_LOCKS  MAXCPU
182
183 #define PHYS_TO_PV_LIST_LOCK(pa)        \
184                         (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
185
186 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa)  do {    \
187         struct rwlock **_lockp = (lockp);               \
188         struct rwlock *_new_lock;                       \
189                                                         \
190         _new_lock = PHYS_TO_PV_LIST_LOCK(pa);           \
191         if (_new_lock != *_lockp) {                     \
192                 if (*_lockp != NULL)                    \
193                         rw_wunlock(*_lockp);            \
194                 *_lockp = _new_lock;                    \
195                 rw_wlock(*_lockp);                      \
196         }                                               \
197 } while (0)
198
199 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m)        \
200                         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
201
202 #define RELEASE_PV_LIST_LOCK(lockp)             do {    \
203         struct rwlock **_lockp = (lockp);               \
204                                                         \
205         if (*_lockp != NULL) {                          \
206                 rw_wunlock(*_lockp);                    \
207                 *_lockp = NULL;                         \
208         }                                               \
209 } while (0)
210
211 #define VM_PAGE_TO_PV_LIST_LOCK(m)      \
212                         PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
213
214 /* The list of all the user pmaps */
215 LIST_HEAD(pmaplist, pmap);
216 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
217
218 struct pmap kernel_pmap_store;
219
220 vm_offset_t virtual_avail;      /* VA of first avail page (after kernel bss) */
221 vm_offset_t virtual_end;        /* VA of last avail page (end of kernel AS) */
222 vm_offset_t kernel_vm_end = 0;
223
224 vm_paddr_t dmap_phys_base;      /* The start of the dmap region */
225 vm_paddr_t dmap_phys_max;       /* The limit of the dmap region */
226 vm_offset_t dmap_max_addr;      /* The virtual address limit of the dmap */
227
228 /* This code assumes all L1 DMAP entries will be used */
229 CTASSERT((DMAP_MIN_ADDRESS  & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
230 CTASSERT((DMAP_MAX_ADDRESS  & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
231
232 static struct rwlock_padalign pvh_global_lock;
233 static struct mtx_padalign allpmaps_lock;
234
235 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
236     "VM/pmap parameters");
237
238 static int superpages_enabled = 1;
239 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
240     CTLFLAG_RDTUN, &superpages_enabled, 0,
241     "Enable support for transparent superpages");
242
243 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
244     "2MB page mapping counters");
245
246 static u_long pmap_l2_demotions;
247 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
248     &pmap_l2_demotions, 0,
249     "2MB page demotions");
250
251 static u_long pmap_l2_mappings;
252 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
253     &pmap_l2_mappings, 0,
254     "2MB page mappings");
255
256 static u_long pmap_l2_p_failures;
257 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
258     &pmap_l2_p_failures, 0,
259     "2MB page promotion failures");
260
261 static u_long pmap_l2_promotions;
262 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
263     &pmap_l2_promotions, 0,
264     "2MB page promotions");
265
266 /*
267  * Data for the pv entry allocation mechanism
268  */
269 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
270 static struct mtx pv_chunks_mutex;
271 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
272 static struct md_page *pv_table;
273 static struct md_page pv_dummy;
274
275 /*
276  * Internal flags for pmap_enter()'s helper functions.
277  */
278 #define PMAP_ENTER_NORECLAIM    0x1000000       /* Don't reclaim PV entries. */
279 #define PMAP_ENTER_NOREPLACE    0x2000000       /* Don't replace mappings. */
280
281 static void     free_pv_chunk(struct pv_chunk *pc);
282 static void     free_pv_entry(pmap_t pmap, pv_entry_t pv);
283 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
284 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
285 static void     pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
286 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
287                     vm_offset_t va);
288 static bool     pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
289 static bool     pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
290                     vm_offset_t va, struct rwlock **lockp);
291 static int      pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
292                     u_int flags, vm_page_t m, struct rwlock **lockp);
293 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
294     vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
295 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
296     pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
297 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
298     vm_page_t m, struct rwlock **lockp);
299
300 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
301                 struct rwlock **lockp);
302
303 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
304     struct spglist *free);
305 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
306
307 #define pmap_clear(pte)                 pmap_store(pte, 0)
308 #define pmap_clear_bits(pte, bits)      atomic_clear_64(pte, bits)
309 #define pmap_load_store(pte, entry)     atomic_swap_64(pte, entry)
310 #define pmap_load_clear(pte)            pmap_load_store(pte, 0)
311 #define pmap_load(pte)                  atomic_load_64(pte)
312 #define pmap_store(pte, entry)          atomic_store_64(pte, entry)
313 #define pmap_store_bits(pte, bits)      atomic_set_64(pte, bits)
314
315 /********************/
316 /* Inline functions */
317 /********************/
318
319 static __inline void
320 pagecopy(void *s, void *d)
321 {
322
323         memcpy(d, s, PAGE_SIZE);
324 }
325
326 static __inline void
327 pagezero(void *p)
328 {
329
330         bzero(p, PAGE_SIZE);
331 }
332
333 #define pmap_l1_index(va)       (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
334 #define pmap_l2_index(va)       (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
335 #define pmap_l3_index(va)       (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
336
337 #define PTE_TO_PHYS(pte)        ((pte >> PTE_PPN0_S) * PAGE_SIZE)
338
339 static __inline pd_entry_t *
340 pmap_l1(pmap_t pmap, vm_offset_t va)
341 {
342
343         return (&pmap->pm_l1[pmap_l1_index(va)]);
344 }
345
346 static __inline pd_entry_t *
347 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
348 {
349         vm_paddr_t phys;
350         pd_entry_t *l2;
351
352         phys = PTE_TO_PHYS(pmap_load(l1));
353         l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
354
355         return (&l2[pmap_l2_index(va)]);
356 }
357
358 static __inline pd_entry_t *
359 pmap_l2(pmap_t pmap, vm_offset_t va)
360 {
361         pd_entry_t *l1;
362
363         l1 = pmap_l1(pmap, va);
364         if ((pmap_load(l1) & PTE_V) == 0)
365                 return (NULL);
366         if ((pmap_load(l1) & PTE_RX) != 0)
367                 return (NULL);
368
369         return (pmap_l1_to_l2(l1, va));
370 }
371
372 static __inline pt_entry_t *
373 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
374 {
375         vm_paddr_t phys;
376         pt_entry_t *l3;
377
378         phys = PTE_TO_PHYS(pmap_load(l2));
379         l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
380
381         return (&l3[pmap_l3_index(va)]);
382 }
383
384 static __inline pt_entry_t *
385 pmap_l3(pmap_t pmap, vm_offset_t va)
386 {
387         pd_entry_t *l2;
388
389         l2 = pmap_l2(pmap, va);
390         if (l2 == NULL)
391                 return (NULL);
392         if ((pmap_load(l2) & PTE_V) == 0)
393                 return (NULL);
394         if ((pmap_load(l2) & PTE_RX) != 0)
395                 return (NULL);
396
397         return (pmap_l2_to_l3(l2, va));
398 }
399
400 static __inline void
401 pmap_resident_count_inc(pmap_t pmap, int count)
402 {
403
404         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
405         pmap->pm_stats.resident_count += count;
406 }
407
408 static __inline void
409 pmap_resident_count_dec(pmap_t pmap, int count)
410 {
411
412         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
413         KASSERT(pmap->pm_stats.resident_count >= count,
414             ("pmap %p resident count underflow %ld %d", pmap,
415             pmap->pm_stats.resident_count, count));
416         pmap->pm_stats.resident_count -= count;
417 }
418
419 static void
420 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
421     pt_entry_t entry)
422 {
423         struct pmap *user_pmap;
424         pd_entry_t *l1;
425
426         /* Distribute new kernel L1 entry to all the user pmaps */
427         if (pmap != kernel_pmap)
428                 return;
429
430         mtx_lock(&allpmaps_lock);
431         LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
432                 l1 = &user_pmap->pm_l1[l1index];
433                 pmap_store(l1, entry);
434         }
435         mtx_unlock(&allpmaps_lock);
436 }
437
438 static pt_entry_t *
439 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
440     u_int *l2_slot)
441 {
442         pt_entry_t *l2;
443         pd_entry_t *l1;
444
445         l1 = (pd_entry_t *)l1pt;
446         *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
447
448         /* Check locore has used a table L1 map */
449         KASSERT((l1[*l1_slot] & PTE_RX) == 0,
450                 ("Invalid bootstrap L1 table"));
451
452         /* Find the address of the L2 table */
453         l2 = (pt_entry_t *)init_pt_va;
454         *l2_slot = pmap_l2_index(va);
455
456         return (l2);
457 }
458
459 static vm_paddr_t
460 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
461 {
462         u_int l1_slot, l2_slot;
463         pt_entry_t *l2;
464         u_int ret;
465
466         l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
467
468         /* Check locore has used L2 superpages */
469         KASSERT((l2[l2_slot] & PTE_RX) != 0,
470                 ("Invalid bootstrap L2 table"));
471
472         /* L2 is superpages */
473         ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
474         ret += (va & L2_OFFSET);
475
476         return (ret);
477 }
478
479 static void
480 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
481 {
482         vm_offset_t va;
483         vm_paddr_t pa;
484         pd_entry_t *l1;
485         u_int l1_slot;
486         pt_entry_t entry;
487         pn_t pn;
488
489         pa = dmap_phys_base = min_pa & ~L1_OFFSET;
490         va = DMAP_MIN_ADDRESS;
491         l1 = (pd_entry_t *)kern_l1;
492         l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
493
494         for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
495             pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
496                 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
497
498                 /* superpages */
499                 pn = (pa / PAGE_SIZE);
500                 entry = PTE_KERN;
501                 entry |= (pn << PTE_PPN0_S);
502                 pmap_store(&l1[l1_slot], entry);
503         }
504
505         /* Set the upper limit of the DMAP region */
506         dmap_phys_max = pa;
507         dmap_max_addr = va;
508
509         sfence_vma();
510 }
511
512 static vm_offset_t
513 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
514 {
515         vm_offset_t l3pt;
516         pt_entry_t entry;
517         pd_entry_t *l2;
518         vm_paddr_t pa;
519         u_int l2_slot;
520         pn_t pn;
521
522         KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
523
524         l2 = pmap_l2(kernel_pmap, va);
525         l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
526         l2_slot = pmap_l2_index(va);
527         l3pt = l3_start;
528
529         for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
530                 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
531
532                 pa = pmap_early_vtophys(l1pt, l3pt);
533                 pn = (pa / PAGE_SIZE);
534                 entry = (PTE_V);
535                 entry |= (pn << PTE_PPN0_S);
536                 pmap_store(&l2[l2_slot], entry);
537                 l3pt += PAGE_SIZE;
538         }
539
540
541         /* Clean the L2 page table */
542         memset((void *)l3_start, 0, l3pt - l3_start);
543
544         return (l3pt);
545 }
546
547 /*
548  *      Bootstrap the system enough to run with virtual memory.
549  */
550 void
551 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
552 {
553         u_int l1_slot, l2_slot, avail_slot, map_slot;
554         vm_offset_t freemempos;
555         vm_offset_t dpcpu, msgbufpv;
556         vm_paddr_t end, max_pa, min_pa, pa, start;
557         int i;
558
559         printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
560         printf("%lx\n", l1pt);
561         printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
562
563         /* Set this early so we can use the pagetable walking functions */
564         kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
565         PMAP_LOCK_INIT(kernel_pmap);
566
567         rw_init(&pvh_global_lock, "pmap pv global");
568
569         /* Assume the address we were loaded to is a valid physical address. */
570         min_pa = max_pa = kernstart;
571
572         /*
573          * Find the minimum physical address. physmap is sorted,
574          * but may contain empty ranges.
575          */
576         for (i = 0; i < physmap_idx * 2; i += 2) {
577                 if (physmap[i] == physmap[i + 1])
578                         continue;
579                 if (physmap[i] <= min_pa)
580                         min_pa = physmap[i];
581                 if (physmap[i + 1] > max_pa)
582                         max_pa = physmap[i + 1];
583         }
584         printf("physmap_idx %lx\n", physmap_idx);
585         printf("min_pa %lx\n", min_pa);
586         printf("max_pa %lx\n", max_pa);
587
588         /* Create a direct map region early so we can use it for pa -> va */
589         pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
590
591         /*
592          * Read the page table to find out what is already mapped.
593          * This assumes we have mapped a block of memory from KERNBASE
594          * using a single L1 entry.
595          */
596         (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
597
598         /* Sanity check the index, KERNBASE should be the first VA */
599         KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
600
601         freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
602
603         /* Create the l3 tables for the early devmap */
604         freemempos = pmap_bootstrap_l3(l1pt,
605             VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
606
607         sfence_vma();
608
609 #define alloc_pages(var, np)                                            \
610         (var) = freemempos;                                             \
611         freemempos += (np * PAGE_SIZE);                                 \
612         memset((char *)(var), 0, ((np) * PAGE_SIZE));
613
614         /* Allocate dynamic per-cpu area. */
615         alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
616         dpcpu_init((void *)dpcpu, 0);
617
618         /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
619         alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
620         msgbufp = (void *)msgbufpv;
621
622         virtual_avail = roundup2(freemempos, L2_SIZE);
623         virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
624         kernel_vm_end = virtual_avail;
625         
626         pa = pmap_early_vtophys(l1pt, freemempos);
627
628         /* Initialize phys_avail. */
629         for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
630             map_slot += 2) {
631                 start = physmap[map_slot];
632                 end = physmap[map_slot + 1];
633
634                 if (start == end)
635                         continue;
636                 if (start >= kernstart && end <= pa)
637                         continue;
638
639                 if (start < kernstart && end > kernstart)
640                         end = kernstart;
641                 else if (start < pa && end > pa)
642                         start = pa;
643                 phys_avail[avail_slot] = start;
644                 phys_avail[avail_slot + 1] = end;
645                 physmem += (end - start) >> PAGE_SHIFT;
646                 avail_slot += 2;
647
648                 if (end != physmap[map_slot + 1] && end > pa) {
649                         phys_avail[avail_slot] = pa;
650                         phys_avail[avail_slot + 1] = physmap[map_slot + 1];
651                         physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
652                         avail_slot += 2;
653                 }
654         }
655         phys_avail[avail_slot] = 0;
656         phys_avail[avail_slot + 1] = 0;
657
658         /*
659          * Maxmem isn't the "maximum memory", it's one larger than the
660          * highest page of the physical address space.  It should be
661          * called something like "Maxphyspage".
662          */
663         Maxmem = atop(phys_avail[avail_slot - 1]);
664 }
665
666 /*
667  *      Initialize a vm_page's machine-dependent fields.
668  */
669 void
670 pmap_page_init(vm_page_t m)
671 {
672
673         TAILQ_INIT(&m->md.pv_list);
674         m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
675 }
676
677 /*
678  *      Initialize the pmap module.
679  *      Called by vm_init, to initialize any structures that the pmap
680  *      system needs to map virtual memory.
681  */
682 void
683 pmap_init(void)
684 {
685         vm_size_t s;
686         int i, pv_npg;
687
688         /*
689          * Initialize the pv chunk and pmap list mutexes.
690          */
691         mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
692         mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
693
694         /*
695          * Initialize the pool of pv list locks.
696          */
697         for (i = 0; i < NPV_LIST_LOCKS; i++)
698                 rw_init(&pv_list_locks[i], "pmap pv list");
699
700         /*
701          * Calculate the size of the pv head table for superpages.
702          */
703         pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
704
705         /*
706          * Allocate memory for the pv head table for superpages.
707          */
708         s = (vm_size_t)(pv_npg * sizeof(struct md_page));
709         s = round_page(s);
710         pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
711         for (i = 0; i < pv_npg; i++)
712                 TAILQ_INIT(&pv_table[i].pv_list);
713         TAILQ_INIT(&pv_dummy.pv_list);
714
715         if (superpages_enabled)
716                 pagesizes[1] = L2_SIZE;
717 }
718
719 #ifdef SMP
720 /*
721  * For SMP, these functions have to use IPIs for coherence.
722  *
723  * In general, the calling thread uses a plain fence to order the
724  * writes to the page tables before invoking an SBI callback to invoke
725  * sfence_vma() on remote CPUs.
726  *
727  * Since the riscv pmap does not yet have a pm_active field, IPIs are
728  * sent to all CPUs in the system.
729  */
730 static void
731 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
732 {
733         cpuset_t mask;
734
735         sched_pin();
736         mask = all_cpus;
737         CPU_CLR(PCPU_GET(cpuid), &mask);
738         fence();
739         sbi_remote_sfence_vma(mask.__bits, va, 1);
740         sfence_vma_page(va);
741         sched_unpin();
742 }
743
744 static void
745 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
746 {
747         cpuset_t mask;
748
749         sched_pin();
750         mask = all_cpus;
751         CPU_CLR(PCPU_GET(cpuid), &mask);
752         fence();
753         sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
754
755         /*
756          * Might consider a loop of sfence_vma_page() for a small
757          * number of pages in the future.
758          */
759         sfence_vma();
760         sched_unpin();
761 }
762
763 static void
764 pmap_invalidate_all(pmap_t pmap)
765 {
766         cpuset_t mask;
767
768         sched_pin();
769         mask = all_cpus;
770         CPU_CLR(PCPU_GET(cpuid), &mask);
771         fence();
772
773         /*
774          * XXX: The SBI doc doesn't detail how to specify x0 as the
775          * address to perform a global fence.  BBL currently treats
776          * all sfence_vma requests as global however.
777          */
778         sbi_remote_sfence_vma(mask.__bits, 0, 0);
779         sfence_vma();
780         sched_unpin();
781 }
782 #else
783 /*
784  * Normal, non-SMP, invalidation functions.
785  * We inline these within pmap.c for speed.
786  */
787 static __inline void
788 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
789 {
790
791         sfence_vma_page(va);
792 }
793
794 static __inline void
795 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
796 {
797
798         /*
799          * Might consider a loop of sfence_vma_page() for a small
800          * number of pages in the future.
801          */
802         sfence_vma();
803 }
804
805 static __inline void
806 pmap_invalidate_all(pmap_t pmap)
807 {
808
809         sfence_vma();
810 }
811 #endif
812
813 /*
814  *      Routine:        pmap_extract
815  *      Function:
816  *              Extract the physical page address associated
817  *              with the given map/virtual_address pair.
818  */
819 vm_paddr_t 
820 pmap_extract(pmap_t pmap, vm_offset_t va)
821 {
822         pd_entry_t *l2p, l2;
823         pt_entry_t *l3p, l3;
824         vm_paddr_t pa;
825
826         pa = 0;
827         PMAP_LOCK(pmap);
828         /*
829          * Start with the l2 tabel. We are unable to allocate
830          * pages in the l1 table.
831          */
832         l2p = pmap_l2(pmap, va);
833         if (l2p != NULL) {
834                 l2 = pmap_load(l2p);
835                 if ((l2 & PTE_RX) == 0) {
836                         l3p = pmap_l2_to_l3(l2p, va);
837                         if (l3p != NULL) {
838                                 l3 = pmap_load(l3p);
839                                 pa = PTE_TO_PHYS(l3);
840                                 pa |= (va & L3_OFFSET);
841                         }
842                 } else {
843                         /* L2 is superpages */
844                         pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
845                         pa |= (va & L2_OFFSET);
846                 }
847         }
848         PMAP_UNLOCK(pmap);
849         return (pa);
850 }
851
852 /*
853  *      Routine:        pmap_extract_and_hold
854  *      Function:
855  *              Atomically extract and hold the physical page
856  *              with the given pmap and virtual address pair
857  *              if that mapping permits the given protection.
858  */
859 vm_page_t
860 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
861 {
862         pt_entry_t *l3p, l3;
863         vm_paddr_t phys;
864         vm_paddr_t pa;
865         vm_page_t m;
866
867         pa = 0;
868         m = NULL;
869         PMAP_LOCK(pmap);
870 retry:
871         l3p = pmap_l3(pmap, va);
872         if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
873                 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
874                         phys = PTE_TO_PHYS(l3);
875                         if (vm_page_pa_tryrelock(pmap, phys, &pa))
876                                 goto retry;
877                         m = PHYS_TO_VM_PAGE(phys);
878                         vm_page_hold(m);
879                 }
880         }
881         PA_UNLOCK_COND(pa);
882         PMAP_UNLOCK(pmap);
883         return (m);
884 }
885
886 vm_paddr_t
887 pmap_kextract(vm_offset_t va)
888 {
889         pd_entry_t *l2;
890         pt_entry_t *l3;
891         vm_paddr_t pa;
892
893         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
894                 pa = DMAP_TO_PHYS(va);
895         } else {
896                 l2 = pmap_l2(kernel_pmap, va);
897                 if (l2 == NULL)
898                         panic("pmap_kextract: No l2");
899                 if ((pmap_load(l2) & PTE_RX) != 0) {
900                         /* superpages */
901                         pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
902                         pa |= (va & L2_OFFSET);
903                         return (pa);
904                 }
905
906                 l3 = pmap_l2_to_l3(l2, va);
907                 if (l3 == NULL)
908                         panic("pmap_kextract: No l3...");
909                 pa = PTE_TO_PHYS(pmap_load(l3));
910                 pa |= (va & PAGE_MASK);
911         }
912         return (pa);
913 }
914
915 /***************************************************
916  * Low level mapping routines.....
917  ***************************************************/
918
919 void
920 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
921 {
922         pt_entry_t entry;
923         pt_entry_t *l3;
924         vm_offset_t va;
925         pn_t pn;
926
927         KASSERT((pa & L3_OFFSET) == 0,
928            ("pmap_kenter_device: Invalid physical address"));
929         KASSERT((sva & L3_OFFSET) == 0,
930            ("pmap_kenter_device: Invalid virtual address"));
931         KASSERT((size & PAGE_MASK) == 0,
932             ("pmap_kenter_device: Mapping is not page-sized"));
933
934         va = sva;
935         while (size != 0) {
936                 l3 = pmap_l3(kernel_pmap, va);
937                 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
938
939                 pn = (pa / PAGE_SIZE);
940                 entry = PTE_KERN;
941                 entry |= (pn << PTE_PPN0_S);
942                 pmap_store(l3, entry);
943
944                 va += PAGE_SIZE;
945                 pa += PAGE_SIZE;
946                 size -= PAGE_SIZE;
947         }
948         pmap_invalidate_range(kernel_pmap, sva, va);
949 }
950
951 /*
952  * Remove a page from the kernel pagetables.
953  * Note: not SMP coherent.
954  */
955 PMAP_INLINE void
956 pmap_kremove(vm_offset_t va)
957 {
958         pt_entry_t *l3;
959
960         l3 = pmap_l3(kernel_pmap, va);
961         KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
962
963         pmap_clear(l3);
964         sfence_vma();
965 }
966
967 void
968 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
969 {
970         pt_entry_t *l3;
971         vm_offset_t va;
972
973         KASSERT((sva & L3_OFFSET) == 0,
974            ("pmap_kremove_device: Invalid virtual address"));
975         KASSERT((size & PAGE_MASK) == 0,
976             ("pmap_kremove_device: Mapping is not page-sized"));
977
978         va = sva;
979         while (size != 0) {
980                 l3 = pmap_l3(kernel_pmap, va);
981                 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
982                 pmap_clear(l3);
983
984                 va += PAGE_SIZE;
985                 size -= PAGE_SIZE;
986         }
987
988         pmap_invalidate_range(kernel_pmap, sva, va);
989 }
990
991 /*
992  *      Used to map a range of physical addresses into kernel
993  *      virtual address space.
994  *
995  *      The value passed in '*virt' is a suggested virtual address for
996  *      the mapping. Architectures which can support a direct-mapped
997  *      physical to virtual region can return the appropriate address
998  *      within that region, leaving '*virt' unchanged. Other
999  *      architectures should map the pages starting at '*virt' and
1000  *      update '*virt' with the first usable address after the mapped
1001  *      region.
1002  */
1003 vm_offset_t
1004 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1005 {
1006
1007         return PHYS_TO_DMAP(start);
1008 }
1009
1010
1011 /*
1012  * Add a list of wired pages to the kva
1013  * this routine is only used for temporary
1014  * kernel mappings that do not need to have
1015  * page modification or references recorded.
1016  * Note that old mappings are simply written
1017  * over.  The page *must* be wired.
1018  * Note: SMP coherent.  Uses a ranged shootdown IPI.
1019  */
1020 void
1021 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1022 {
1023         pt_entry_t *l3, pa;
1024         vm_offset_t va;
1025         vm_page_t m;
1026         pt_entry_t entry;
1027         pn_t pn;
1028         int i;
1029
1030         va = sva;
1031         for (i = 0; i < count; i++) {
1032                 m = ma[i];
1033                 pa = VM_PAGE_TO_PHYS(m);
1034                 pn = (pa / PAGE_SIZE);
1035                 l3 = pmap_l3(kernel_pmap, va);
1036
1037                 entry = PTE_KERN;
1038                 entry |= (pn << PTE_PPN0_S);
1039                 pmap_store(l3, entry);
1040
1041                 va += L3_SIZE;
1042         }
1043         pmap_invalidate_range(kernel_pmap, sva, va);
1044 }
1045
1046 /*
1047  * This routine tears out page mappings from the
1048  * kernel -- it is meant only for temporary mappings.
1049  * Note: SMP coherent.  Uses a ranged shootdown IPI.
1050  */
1051 void
1052 pmap_qremove(vm_offset_t sva, int count)
1053 {
1054         pt_entry_t *l3;
1055         vm_offset_t va;
1056
1057         KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1058
1059         for (va = sva; count-- > 0; va += PAGE_SIZE) {
1060                 l3 = pmap_l3(kernel_pmap, va);
1061                 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1062                 pmap_clear(l3);
1063         }
1064         pmap_invalidate_range(kernel_pmap, sva, va);
1065 }
1066
1067 bool
1068 pmap_ps_enabled(pmap_t pmap __unused)
1069 {
1070
1071         return (superpages_enabled);
1072 }
1073
1074 /***************************************************
1075  * Page table page management routines.....
1076  ***************************************************/
1077 /*
1078  * Schedule the specified unused page table page to be freed.  Specifically,
1079  * add the page to the specified list of pages that will be released to the
1080  * physical memory manager after the TLB has been updated.
1081  */
1082 static __inline void
1083 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1084     boolean_t set_PG_ZERO)
1085 {
1086
1087         if (set_PG_ZERO)
1088                 m->flags |= PG_ZERO;
1089         else
1090                 m->flags &= ~PG_ZERO;
1091         SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1092 }
1093
1094 /*
1095  * Inserts the specified page table page into the specified pmap's collection
1096  * of idle page table pages.  Each of a pmap's page table pages is responsible
1097  * for mapping a distinct range of virtual addresses.  The pmap's collection is
1098  * ordered by this virtual address range.
1099  */
1100 static __inline int
1101 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3)
1102 {
1103
1104         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1105         return (vm_radix_insert(&pmap->pm_root, ml3));
1106 }
1107
1108 /*
1109  * Removes the page table page mapping the specified virtual address from the
1110  * specified pmap's collection of idle page table pages, and returns it.
1111  * Otherwise, returns NULL if there is no page table page corresponding to the
1112  * specified virtual address.
1113  */
1114 static __inline vm_page_t
1115 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1116 {
1117
1118         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1119         return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1120 }
1121         
1122 /*
1123  * Decrements a page table page's wire count, which is used to record the
1124  * number of valid page table entries within the page.  If the wire count
1125  * drops to zero, then the page table page is unmapped.  Returns TRUE if the
1126  * page table page was unmapped and FALSE otherwise.
1127  */
1128 static inline boolean_t
1129 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1130 {
1131
1132         --m->wire_count;
1133         if (m->wire_count == 0) {
1134                 _pmap_unwire_ptp(pmap, va, m, free);
1135                 return (TRUE);
1136         } else {
1137                 return (FALSE);
1138         }
1139 }
1140
1141 static void
1142 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1143 {
1144         vm_paddr_t phys;
1145
1146         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1147         if (m->pindex >= NUL1E) {
1148                 pd_entry_t *l1;
1149                 l1 = pmap_l1(pmap, va);
1150                 pmap_clear(l1);
1151                 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1152         } else {
1153                 pd_entry_t *l2;
1154                 l2 = pmap_l2(pmap, va);
1155                 pmap_clear(l2);
1156         }
1157         pmap_resident_count_dec(pmap, 1);
1158         if (m->pindex < NUL1E) {
1159                 pd_entry_t *l1;
1160                 vm_page_t pdpg;
1161
1162                 l1 = pmap_l1(pmap, va);
1163                 phys = PTE_TO_PHYS(pmap_load(l1));
1164                 pdpg = PHYS_TO_VM_PAGE(phys);
1165                 pmap_unwire_ptp(pmap, va, pdpg, free);
1166         }
1167         pmap_invalidate_page(pmap, va);
1168
1169         vm_wire_sub(1);
1170
1171         /* 
1172          * Put page on a list so that it is released after
1173          * *ALL* TLB shootdown is done
1174          */
1175         pmap_add_delayed_free_list(m, free, TRUE);
1176 }
1177
1178 /*
1179  * After removing a page table entry, this routine is used to
1180  * conditionally free the page, and manage the hold/wire counts.
1181  */
1182 static int
1183 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1184     struct spglist *free)
1185 {
1186         vm_page_t mpte;
1187
1188         if (va >= VM_MAXUSER_ADDRESS)
1189                 return (0);
1190         KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1191         mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1192         return (pmap_unwire_ptp(pmap, va, mpte, free));
1193 }
1194
1195 void
1196 pmap_pinit0(pmap_t pmap)
1197 {
1198
1199         PMAP_LOCK_INIT(pmap);
1200         bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1201         pmap->pm_l1 = kernel_pmap->pm_l1;
1202 }
1203
1204 int
1205 pmap_pinit(pmap_t pmap)
1206 {
1207         vm_paddr_t l1phys;
1208         vm_page_t l1pt;
1209
1210         /*
1211          * allocate the l1 page
1212          */
1213         while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1214             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1215                 vm_wait(NULL);
1216
1217         l1phys = VM_PAGE_TO_PHYS(l1pt);
1218         pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1219
1220         if ((l1pt->flags & PG_ZERO) == 0)
1221                 pagezero(pmap->pm_l1);
1222
1223         bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1224
1225         /* Install kernel pagetables */
1226         memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1227
1228         /* Add to the list of all user pmaps */
1229         mtx_lock(&allpmaps_lock);
1230         LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1231         mtx_unlock(&allpmaps_lock);
1232
1233         vm_radix_init(&pmap->pm_root);
1234
1235         return (1);
1236 }
1237
1238 /*
1239  * This routine is called if the desired page table page does not exist.
1240  *
1241  * If page table page allocation fails, this routine may sleep before
1242  * returning NULL.  It sleeps only if a lock pointer was given.
1243  *
1244  * Note: If a page allocation fails at page table level two or three,
1245  * one or two pages may be held during the wait, only to be released
1246  * afterwards.  This conservative approach is easily argued to avoid
1247  * race conditions.
1248  */
1249 static vm_page_t
1250 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1251 {
1252         vm_page_t m, /*pdppg, */pdpg;
1253         pt_entry_t entry;
1254         vm_paddr_t phys;
1255         pn_t pn;
1256
1257         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1258
1259         /*
1260          * Allocate a page table page.
1261          */
1262         if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1263             VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1264                 if (lockp != NULL) {
1265                         RELEASE_PV_LIST_LOCK(lockp);
1266                         PMAP_UNLOCK(pmap);
1267                         rw_runlock(&pvh_global_lock);
1268                         vm_wait(NULL);
1269                         rw_rlock(&pvh_global_lock);
1270                         PMAP_LOCK(pmap);
1271                 }
1272
1273                 /*
1274                  * Indicate the need to retry.  While waiting, the page table
1275                  * page may have been allocated.
1276                  */
1277                 return (NULL);
1278         }
1279
1280         if ((m->flags & PG_ZERO) == 0)
1281                 pmap_zero_page(m);
1282
1283         /*
1284          * Map the pagetable page into the process address space, if
1285          * it isn't already there.
1286          */
1287
1288         if (ptepindex >= NUL1E) {
1289                 pd_entry_t *l1;
1290                 vm_pindex_t l1index;
1291
1292                 l1index = ptepindex - NUL1E;
1293                 l1 = &pmap->pm_l1[l1index];
1294
1295                 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1296                 entry = (PTE_V);
1297                 entry |= (pn << PTE_PPN0_S);
1298                 pmap_store(l1, entry);
1299                 pmap_distribute_l1(pmap, l1index, entry);
1300         } else {
1301                 vm_pindex_t l1index;
1302                 pd_entry_t *l1, *l2;
1303
1304                 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1305                 l1 = &pmap->pm_l1[l1index];
1306                 if (pmap_load(l1) == 0) {
1307                         /* recurse for allocating page dir */
1308                         if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1309                             lockp) == NULL) {
1310                                 vm_page_unwire_noq(m);
1311                                 vm_page_free_zero(m);
1312                                 return (NULL);
1313                         }
1314                 } else {
1315                         phys = PTE_TO_PHYS(pmap_load(l1));
1316                         pdpg = PHYS_TO_VM_PAGE(phys);
1317                         pdpg->wire_count++;
1318                 }
1319
1320                 phys = PTE_TO_PHYS(pmap_load(l1));
1321                 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1322                 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1323
1324                 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1325                 entry = (PTE_V);
1326                 entry |= (pn << PTE_PPN0_S);
1327                 pmap_store(l2, entry);
1328         }
1329
1330         pmap_resident_count_inc(pmap, 1);
1331
1332         return (m);
1333 }
1334
1335 static vm_page_t
1336 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1337 {
1338         pd_entry_t *l1;
1339         vm_page_t l2pg;
1340         vm_pindex_t l2pindex;
1341
1342 retry:
1343         l1 = pmap_l1(pmap, va);
1344         if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1345                 /* Add a reference to the L2 page. */
1346                 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1347                 l2pg->wire_count++;
1348         } else {
1349                 /* Allocate a L2 page. */
1350                 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1351                 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1352                 if (l2pg == NULL && lockp != NULL)
1353                         goto retry;
1354         }
1355         return (l2pg);
1356 }
1357
1358 static vm_page_t
1359 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1360 {
1361         vm_pindex_t ptepindex;
1362         pd_entry_t *l2;
1363         vm_paddr_t phys;
1364         vm_page_t m;
1365
1366         /*
1367          * Calculate pagetable page index
1368          */
1369         ptepindex = pmap_l2_pindex(va);
1370 retry:
1371         /*
1372          * Get the page directory entry
1373          */
1374         l2 = pmap_l2(pmap, va);
1375
1376         /*
1377          * If the page table page is mapped, we just increment the
1378          * hold count, and activate it.
1379          */
1380         if (l2 != NULL && pmap_load(l2) != 0) {
1381                 phys = PTE_TO_PHYS(pmap_load(l2));
1382                 m = PHYS_TO_VM_PAGE(phys);
1383                 m->wire_count++;
1384         } else {
1385                 /*
1386                  * Here if the pte page isn't mapped, or if it has been
1387                  * deallocated.
1388                  */
1389                 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1390                 if (m == NULL && lockp != NULL)
1391                         goto retry;
1392         }
1393         return (m);
1394 }
1395
1396
1397 /***************************************************
1398  * Pmap allocation/deallocation routines.
1399  ***************************************************/
1400
1401 /*
1402  * Release any resources held by the given physical map.
1403  * Called when a pmap initialized by pmap_pinit is being released.
1404  * Should only be called if the map contains no valid mappings.
1405  */
1406 void
1407 pmap_release(pmap_t pmap)
1408 {
1409         vm_page_t m;
1410
1411         KASSERT(pmap->pm_stats.resident_count == 0,
1412             ("pmap_release: pmap resident count %ld != 0",
1413             pmap->pm_stats.resident_count));
1414
1415         mtx_lock(&allpmaps_lock);
1416         LIST_REMOVE(pmap, pm_list);
1417         mtx_unlock(&allpmaps_lock);
1418
1419         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1420         vm_page_unwire_noq(m);
1421         vm_page_free(m);
1422 }
1423
1424 #if 0
1425 static int
1426 kvm_size(SYSCTL_HANDLER_ARGS)
1427 {
1428         unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1429
1430         return sysctl_handle_long(oidp, &ksize, 0, req);
1431 }
1432 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 
1433     0, 0, kvm_size, "LU", "Size of KVM");
1434
1435 static int
1436 kvm_free(SYSCTL_HANDLER_ARGS)
1437 {
1438         unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1439
1440         return sysctl_handle_long(oidp, &kfree, 0, req);
1441 }
1442 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 
1443     0, 0, kvm_free, "LU", "Amount of KVM free");
1444 #endif /* 0 */
1445
1446 /*
1447  * grow the number of kernel page table entries, if needed
1448  */
1449 void
1450 pmap_growkernel(vm_offset_t addr)
1451 {
1452         vm_paddr_t paddr;
1453         vm_page_t nkpg;
1454         pd_entry_t *l1, *l2;
1455         pt_entry_t entry;
1456         pn_t pn;
1457
1458         mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1459
1460         addr = roundup2(addr, L2_SIZE);
1461         if (addr - 1 >= vm_map_max(kernel_map))
1462                 addr = vm_map_max(kernel_map);
1463         while (kernel_vm_end < addr) {
1464                 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1465                 if (pmap_load(l1) == 0) {
1466                         /* We need a new PDP entry */
1467                         nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1468                             VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1469                             VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1470                         if (nkpg == NULL)
1471                                 panic("pmap_growkernel: no memory to grow kernel");
1472                         if ((nkpg->flags & PG_ZERO) == 0)
1473                                 pmap_zero_page(nkpg);
1474                         paddr = VM_PAGE_TO_PHYS(nkpg);
1475
1476                         pn = (paddr / PAGE_SIZE);
1477                         entry = (PTE_V);
1478                         entry |= (pn << PTE_PPN0_S);
1479                         pmap_store(l1, entry);
1480                         pmap_distribute_l1(kernel_pmap,
1481                             pmap_l1_index(kernel_vm_end), entry);
1482                         continue; /* try again */
1483                 }
1484                 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1485                 if ((pmap_load(l2) & PTE_V) != 0 &&
1486                     (pmap_load(l2) & PTE_RWX) == 0) {
1487                         kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1488                         if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1489                                 kernel_vm_end = vm_map_max(kernel_map);
1490                                 break;
1491                         }
1492                         continue;
1493                 }
1494
1495                 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1496                     VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1497                     VM_ALLOC_ZERO);
1498                 if (nkpg == NULL)
1499                         panic("pmap_growkernel: no memory to grow kernel");
1500                 if ((nkpg->flags & PG_ZERO) == 0) {
1501                         pmap_zero_page(nkpg);
1502                 }
1503                 paddr = VM_PAGE_TO_PHYS(nkpg);
1504
1505                 pn = (paddr / PAGE_SIZE);
1506                 entry = (PTE_V);
1507                 entry |= (pn << PTE_PPN0_S);
1508                 pmap_store(l2, entry);
1509
1510                 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1511
1512                 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1513                 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1514                         kernel_vm_end = vm_map_max(kernel_map);
1515                         break;                       
1516                 }
1517         }
1518 }
1519
1520
1521 /***************************************************
1522  * page management routines.
1523  ***************************************************/
1524
1525 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1526 CTASSERT(_NPCM == 3);
1527 CTASSERT(_NPCPV == 168);
1528
1529 static __inline struct pv_chunk *
1530 pv_to_chunk(pv_entry_t pv)
1531 {
1532
1533         return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1534 }
1535
1536 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1537
1538 #define PC_FREE0        0xfffffffffffffffful
1539 #define PC_FREE1        0xfffffffffffffffful
1540 #define PC_FREE2        0x000000fffffffffful
1541
1542 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1543
1544 #if 0
1545 #ifdef PV_STATS
1546 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1547
1548 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1549         "Current number of pv entry chunks");
1550 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1551         "Current number of pv entry chunks allocated");
1552 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1553         "Current number of pv entry chunks frees");
1554 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1555         "Number of times tried to get a chunk page but failed.");
1556
1557 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1558 static int pv_entry_spare;
1559
1560 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1561         "Current number of pv entry frees");
1562 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1563         "Current number of pv entry allocs");
1564 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1565         "Current number of pv entries");
1566 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1567         "Current number of spare pv entries");
1568 #endif
1569 #endif /* 0 */
1570
1571 /*
1572  * We are in a serious low memory condition.  Resort to
1573  * drastic measures to free some pages so we can allocate
1574  * another pv entry chunk.
1575  *
1576  * Returns NULL if PV entries were reclaimed from the specified pmap.
1577  *
1578  * We do not, however, unmap 2mpages because subsequent accesses will
1579  * allocate per-page pv entries until repromotion occurs, thereby
1580  * exacerbating the shortage of free pv entries.
1581  */
1582 static vm_page_t
1583 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1584 {
1585
1586         panic("RISCVTODO: reclaim_pv_chunk");
1587 }
1588
1589 /*
1590  * free the pv_entry back to the free list
1591  */
1592 static void
1593 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1594 {
1595         struct pv_chunk *pc;
1596         int idx, field, bit;
1597
1598         rw_assert(&pvh_global_lock, RA_LOCKED);
1599         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1600         PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1601         PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1602         PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1603         pc = pv_to_chunk(pv);
1604         idx = pv - &pc->pc_pventry[0];
1605         field = idx / 64;
1606         bit = idx % 64;
1607         pc->pc_map[field] |= 1ul << bit;
1608         if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1609             pc->pc_map[2] != PC_FREE2) {
1610                 /* 98% of the time, pc is already at the head of the list. */
1611                 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1612                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1613                         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1614                 }
1615                 return;
1616         }
1617         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1618         free_pv_chunk(pc);
1619 }
1620
1621 static void
1622 free_pv_chunk(struct pv_chunk *pc)
1623 {
1624         vm_page_t m;
1625
1626         mtx_lock(&pv_chunks_mutex);
1627         TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1628         mtx_unlock(&pv_chunks_mutex);
1629         PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1630         PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1631         PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1632         /* entire chunk is free, return it */
1633         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1634 #if 0 /* TODO: For minidump */
1635         dump_drop_page(m->phys_addr);
1636 #endif
1637         vm_page_unwire(m, PQ_NONE);
1638         vm_page_free(m);
1639 }
1640
1641 /*
1642  * Returns a new PV entry, allocating a new PV chunk from the system when
1643  * needed.  If this PV chunk allocation fails and a PV list lock pointer was
1644  * given, a PV chunk is reclaimed from an arbitrary pmap.  Otherwise, NULL is
1645  * returned.
1646  *
1647  * The given PV list lock may be released.
1648  */
1649 static pv_entry_t
1650 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1651 {
1652         int bit, field;
1653         pv_entry_t pv;
1654         struct pv_chunk *pc;
1655         vm_page_t m;
1656
1657         rw_assert(&pvh_global_lock, RA_LOCKED);
1658         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1659         PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1660 retry:
1661         pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1662         if (pc != NULL) {
1663                 for (field = 0; field < _NPCM; field++) {
1664                         if (pc->pc_map[field]) {
1665                                 bit = ffsl(pc->pc_map[field]) - 1;
1666                                 break;
1667                         }
1668                 }
1669                 if (field < _NPCM) {
1670                         pv = &pc->pc_pventry[field * 64 + bit];
1671                         pc->pc_map[field] &= ~(1ul << bit);
1672                         /* If this was the last item, move it to tail */
1673                         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1674                             pc->pc_map[2] == 0) {
1675                                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1676                                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1677                                     pc_list);
1678                         }
1679                         PV_STAT(atomic_add_long(&pv_entry_count, 1));
1680                         PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1681                         return (pv);
1682                 }
1683         }
1684         /* No free items, allocate another chunk */
1685         m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1686             VM_ALLOC_WIRED);
1687         if (m == NULL) {
1688                 if (lockp == NULL) {
1689                         PV_STAT(pc_chunk_tryfail++);
1690                         return (NULL);
1691                 }
1692                 m = reclaim_pv_chunk(pmap, lockp);
1693                 if (m == NULL)
1694                         goto retry;
1695         }
1696         PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1697         PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1698 #if 0 /* TODO: This is for minidump */
1699         dump_add_page(m->phys_addr);
1700 #endif
1701         pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1702         pc->pc_pmap = pmap;
1703         pc->pc_map[0] = PC_FREE0 & ~1ul;        /* preallocated bit 0 */
1704         pc->pc_map[1] = PC_FREE1;
1705         pc->pc_map[2] = PC_FREE2;
1706         mtx_lock(&pv_chunks_mutex);
1707         TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1708         mtx_unlock(&pv_chunks_mutex);
1709         pv = &pc->pc_pventry[0];
1710         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1711         PV_STAT(atomic_add_long(&pv_entry_count, 1));
1712         PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1713         return (pv);
1714 }
1715
1716 /*
1717  * Ensure that the number of spare PV entries in the specified pmap meets or
1718  * exceeds the given count, "needed".
1719  *
1720  * The given PV list lock may be released.
1721  */
1722 static void
1723 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1724 {
1725         struct pch new_tail;
1726         struct pv_chunk *pc;
1727         vm_page_t m;
1728         int avail, free;
1729         bool reclaimed;
1730
1731         rw_assert(&pvh_global_lock, RA_LOCKED);
1732         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1733         KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1734
1735         /*
1736          * Newly allocated PV chunks must be stored in a private list until
1737          * the required number of PV chunks have been allocated.  Otherwise,
1738          * reclaim_pv_chunk() could recycle one of these chunks.  In
1739          * contrast, these chunks must be added to the pmap upon allocation.
1740          */
1741         TAILQ_INIT(&new_tail);
1742 retry:
1743         avail = 0;
1744         TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1745                 bit_count((bitstr_t *)pc->pc_map, 0,
1746                     sizeof(pc->pc_map) * NBBY, &free);
1747                 if (free == 0)
1748                         break;
1749                 avail += free;
1750                 if (avail >= needed)
1751                         break;
1752         }
1753         for (reclaimed = false; avail < needed; avail += _NPCPV) {
1754                 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1755                     VM_ALLOC_WIRED);
1756                 if (m == NULL) {
1757                         m = reclaim_pv_chunk(pmap, lockp);
1758                         if (m == NULL)
1759                                 goto retry;
1760                         reclaimed = true;
1761                 }
1762                 /* XXX PV STATS */
1763 #if 0
1764                 dump_add_page(m->phys_addr);
1765 #endif
1766                 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1767                 pc->pc_pmap = pmap;
1768                 pc->pc_map[0] = PC_FREE0;
1769                 pc->pc_map[1] = PC_FREE1;
1770                 pc->pc_map[2] = PC_FREE2;
1771                 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1772                 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1773
1774                 /*
1775                  * The reclaim might have freed a chunk from the current pmap.
1776                  * If that chunk contained available entries, we need to
1777                  * re-count the number of available entries.
1778                  */
1779                 if (reclaimed)
1780                         goto retry;
1781         }
1782         if (!TAILQ_EMPTY(&new_tail)) {
1783                 mtx_lock(&pv_chunks_mutex);
1784                 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1785                 mtx_unlock(&pv_chunks_mutex);
1786         }
1787 }
1788
1789 /*
1790  * First find and then remove the pv entry for the specified pmap and virtual
1791  * address from the specified pv list.  Returns the pv entry if found and NULL
1792  * otherwise.  This operation can be performed on pv lists for either 4KB or
1793  * 2MB page mappings.
1794  */
1795 static __inline pv_entry_t
1796 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1797 {
1798         pv_entry_t pv;
1799
1800         rw_assert(&pvh_global_lock, RA_LOCKED);
1801         TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1802                 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1803                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1804                         pvh->pv_gen++;
1805                         break;
1806                 }
1807         }
1808         return (pv);
1809 }
1810
1811 /*
1812  * First find and then destroy the pv entry for the specified pmap and virtual
1813  * address.  This operation can be performed on pv lists for either 4KB or 2MB
1814  * page mappings.
1815  */
1816 static void
1817 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1818 {
1819         pv_entry_t pv;
1820
1821         pv = pmap_pvh_remove(pvh, pmap, va);
1822
1823         KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1824         free_pv_entry(pmap, pv);
1825 }
1826
1827 /*
1828  * Conditionally create the PV entry for a 4KB page mapping if the required
1829  * memory can be allocated without resorting to reclamation.
1830  */
1831 static boolean_t
1832 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1833     struct rwlock **lockp)
1834 {
1835         pv_entry_t pv;
1836
1837         rw_assert(&pvh_global_lock, RA_LOCKED);
1838         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1839         /* Pass NULL instead of the lock pointer to disable reclamation. */
1840         if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1841                 pv->pv_va = va;
1842                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1843                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1844                 m->md.pv_gen++;
1845                 return (TRUE);
1846         } else
1847                 return (FALSE);
1848 }
1849
1850 /*
1851  * After demotion from a 2MB page mapping to 512 4KB page mappings,
1852  * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1853  * entries for each of the 4KB page mappings.
1854  */
1855 static void __unused
1856 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1857     struct rwlock **lockp)
1858 {
1859         struct md_page *pvh;
1860         struct pv_chunk *pc;
1861         pv_entry_t pv;
1862         vm_page_t m;
1863         vm_offset_t va_last;
1864         int bit, field;
1865
1866         rw_assert(&pvh_global_lock, RA_LOCKED);
1867         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1868         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1869
1870         /*
1871          * Transfer the 2mpage's pv entry for this mapping to the first
1872          * page's pv list.  Once this transfer begins, the pv list lock
1873          * must not be released until the last pv entry is reinstantiated.
1874          */
1875         pvh = pa_to_pvh(pa);
1876         va &= ~L2_OFFSET;
1877         pv = pmap_pvh_remove(pvh, pmap, va);
1878         KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1879         m = PHYS_TO_VM_PAGE(pa);
1880         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1881         m->md.pv_gen++;
1882         /* Instantiate the remaining 511 pv entries. */
1883         va_last = va + L2_SIZE - PAGE_SIZE;
1884         for (;;) {
1885                 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1886                 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1887                     pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1888                 for (field = 0; field < _NPCM; field++) {
1889                         while (pc->pc_map[field] != 0) {
1890                                 bit = ffsl(pc->pc_map[field]) - 1;
1891                                 pc->pc_map[field] &= ~(1ul << bit);
1892                                 pv = &pc->pc_pventry[field * 64 + bit];
1893                                 va += PAGE_SIZE;
1894                                 pv->pv_va = va;
1895                                 m++;
1896                                 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1897                             ("pmap_pv_demote_l2: page %p is not managed", m));
1898                                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1899                                 m->md.pv_gen++;
1900                                 if (va == va_last)
1901                                         goto out;
1902                         }
1903                 }
1904                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1905                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1906         }
1907 out:
1908         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1909                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1910                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1911         }
1912         /* XXX PV stats */
1913 }
1914
1915 #if VM_NRESERVLEVEL > 0
1916 static void
1917 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1918     struct rwlock **lockp)
1919 {
1920         struct md_page *pvh;
1921         pv_entry_t pv;
1922         vm_page_t m;
1923         vm_offset_t va_last;
1924
1925         rw_assert(&pvh_global_lock, RA_LOCKED);
1926         KASSERT((va & L2_OFFSET) == 0,
1927             ("pmap_pv_promote_l2: misaligned va %#lx", va));
1928
1929         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1930
1931         m = PHYS_TO_VM_PAGE(pa);
1932         pv = pmap_pvh_remove(&m->md, pmap, va);
1933         KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1934         pvh = pa_to_pvh(pa);
1935         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1936         pvh->pv_gen++;
1937
1938         va_last = va + L2_SIZE - PAGE_SIZE;
1939         do {
1940                 m++;
1941                 va += PAGE_SIZE;
1942                 pmap_pvh_free(&m->md, pmap, va);
1943         } while (va < va_last);
1944 }
1945 #endif /* VM_NRESERVLEVEL > 0 */
1946
1947 /*
1948  * Create the PV entry for a 2MB page mapping.  Always returns true unless the
1949  * flag PMAP_ENTER_NORECLAIM is specified.  If that flag is specified, returns
1950  * false if the PV entry cannot be allocated without resorting to reclamation.
1951  */
1952 static bool
1953 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1954     struct rwlock **lockp)
1955 {
1956         struct md_page *pvh;
1957         pv_entry_t pv;
1958         vm_paddr_t pa;
1959
1960         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1961         /* Pass NULL instead of the lock pointer to disable reclamation. */
1962         if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1963             NULL : lockp)) == NULL)
1964                 return (false);
1965         pv->pv_va = va;
1966         pa = PTE_TO_PHYS(l2e);
1967         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1968         pvh = pa_to_pvh(pa);
1969         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1970         pvh->pv_gen++;
1971         return (true);
1972 }
1973
1974 static void
1975 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1976 {
1977         pt_entry_t newl2, oldl2;
1978         vm_page_t ml3;
1979         vm_paddr_t ml3pa;
1980
1981         KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1982         KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1983         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1984
1985         ml3 = pmap_remove_pt_page(pmap, va);
1986         if (ml3 == NULL)
1987                 panic("pmap_remove_kernel_l2: Missing pt page");
1988
1989         ml3pa = VM_PAGE_TO_PHYS(ml3);
1990         newl2 = ml3pa | PTE_V;
1991
1992         /*
1993          * Initialize the page table page.
1994          */
1995         pagezero((void *)PHYS_TO_DMAP(ml3pa));
1996
1997         /*
1998          * Demote the mapping.
1999          */
2000         oldl2 = pmap_load_store(l2, newl2);
2001         KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2002             __func__, l2, oldl2));
2003 }
2004
2005 /*
2006  * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2007  */
2008 static int
2009 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2010     pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2011 {
2012         struct md_page *pvh;
2013         pt_entry_t oldl2;
2014         vm_offset_t eva, va;
2015         vm_page_t m, ml3;
2016
2017         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2018         KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2019         oldl2 = pmap_load_clear(l2);
2020         KASSERT((oldl2 & PTE_RWX) != 0,
2021             ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2022
2023         /*
2024          * The sfence.vma documentation states that it is sufficient to specify
2025          * a single address within a superpage mapping.  However, since we do
2026          * not perform any invalidation upon promotion, TLBs may still be
2027          * caching 4KB mappings within the superpage, so we must invalidate the
2028          * entire range.
2029          */
2030         pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2031         if ((oldl2 & PTE_SW_WIRED) != 0)
2032                 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2033         pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2034         if ((oldl2 & PTE_SW_MANAGED) != 0) {
2035                 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2036                 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2037                 pmap_pvh_free(pvh, pmap, sva);
2038                 eva = sva + L2_SIZE;
2039                 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2040                     va < eva; va += PAGE_SIZE, m++) {
2041                         if ((oldl2 & PTE_D) != 0)
2042                                 vm_page_dirty(m);
2043                         if ((oldl2 & PTE_A) != 0)
2044                                 vm_page_aflag_set(m, PGA_REFERENCED);
2045                         if (TAILQ_EMPTY(&m->md.pv_list) &&
2046                             TAILQ_EMPTY(&pvh->pv_list))
2047                                 vm_page_aflag_clear(m, PGA_WRITEABLE);
2048                 }
2049         }
2050         if (pmap == kernel_pmap) {
2051                 pmap_remove_kernel_l2(pmap, l2, sva);
2052         } else {
2053                 ml3 = pmap_remove_pt_page(pmap, sva);
2054                 if (ml3 != NULL) {
2055                         pmap_resident_count_dec(pmap, 1);
2056                         KASSERT(ml3->wire_count == Ln_ENTRIES,
2057                             ("pmap_remove_l2: l3 page wire count error"));
2058                         ml3->wire_count = 1;
2059                         vm_page_unwire_noq(ml3);
2060                         pmap_add_delayed_free_list(ml3, free, FALSE);
2061                 }
2062         }
2063         return (pmap_unuse_pt(pmap, sva, l1e, free));
2064 }
2065
2066 /*
2067  * pmap_remove_l3: do the things to unmap a page in a process
2068  */
2069 static int
2070 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va, 
2071     pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2072 {
2073         pt_entry_t old_l3;
2074         vm_paddr_t phys;
2075         vm_page_t m;
2076
2077         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2078         old_l3 = pmap_load_clear(l3);
2079         pmap_invalidate_page(pmap, va);
2080         if (old_l3 & PTE_SW_WIRED)
2081                 pmap->pm_stats.wired_count -= 1;
2082         pmap_resident_count_dec(pmap, 1);
2083         if (old_l3 & PTE_SW_MANAGED) {
2084                 phys = PTE_TO_PHYS(old_l3);
2085                 m = PHYS_TO_VM_PAGE(phys);
2086                 if ((old_l3 & PTE_D) != 0)
2087                         vm_page_dirty(m);
2088                 if (old_l3 & PTE_A)
2089                         vm_page_aflag_set(m, PGA_REFERENCED);
2090                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2091                 pmap_pvh_free(&m->md, pmap, va);
2092         }
2093
2094         return (pmap_unuse_pt(pmap, va, l2e, free));
2095 }
2096
2097 /*
2098  *      Remove the given range of addresses from the specified map.
2099  *
2100  *      It is assumed that the start and end are properly
2101  *      rounded to the page size.
2102  */
2103 void
2104 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2105 {
2106         struct spglist free;
2107         struct rwlock *lock;
2108         vm_offset_t va, va_next;
2109         pd_entry_t *l1, *l2, l2e;
2110         pt_entry_t *l3;
2111
2112         /*
2113          * Perform an unsynchronized read.  This is, however, safe.
2114          */
2115         if (pmap->pm_stats.resident_count == 0)
2116                 return;
2117
2118         SLIST_INIT(&free);
2119
2120         rw_rlock(&pvh_global_lock);
2121         PMAP_LOCK(pmap);
2122
2123         lock = NULL;
2124         for (; sva < eva; sva = va_next) {
2125                 if (pmap->pm_stats.resident_count == 0)
2126                         break;
2127
2128                 l1 = pmap_l1(pmap, sva);
2129                 if (pmap_load(l1) == 0) {
2130                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2131                         if (va_next < sva)
2132                                 va_next = eva;
2133                         continue;
2134                 }
2135
2136                 /*
2137                  * Calculate index for next page table.
2138                  */
2139                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2140                 if (va_next < sva)
2141                         va_next = eva;
2142
2143                 l2 = pmap_l1_to_l2(l1, sva);
2144                 if (l2 == NULL)
2145                         continue;
2146                 if ((l2e = pmap_load(l2)) == 0)
2147                         continue;
2148                 if ((l2e & PTE_RWX) != 0) {
2149                         if (sva + L2_SIZE == va_next && eva >= va_next) {
2150                                 (void)pmap_remove_l2(pmap, l2, sva,
2151                                     pmap_load(l1), &free, &lock);
2152                                 continue;
2153                         } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2154                             &lock)) {
2155                                 /*
2156                                  * The large page mapping was destroyed.
2157                                  */
2158                                 continue;
2159                         }
2160                         l2e = pmap_load(l2);
2161                 }
2162
2163                 /*
2164                  * Limit our scan to either the end of the va represented
2165                  * by the current page table page, or to the end of the
2166                  * range being removed.
2167                  */
2168                 if (va_next > eva)
2169                         va_next = eva;
2170
2171                 va = va_next;
2172                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2173                     sva += L3_SIZE) {
2174                         if (pmap_load(l3) == 0) {
2175                                 if (va != va_next) {
2176                                         pmap_invalidate_range(pmap, va, sva);
2177                                         va = va_next;
2178                                 }
2179                                 continue;
2180                         }
2181                         if (va == va_next)
2182                                 va = sva;
2183                         if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2184                                 sva += L3_SIZE;
2185                                 break;
2186                         }
2187                 }
2188                 if (va != va_next)
2189                         pmap_invalidate_range(pmap, va, sva);
2190         }
2191         if (lock != NULL)
2192                 rw_wunlock(lock);
2193         rw_runlock(&pvh_global_lock);
2194         PMAP_UNLOCK(pmap);
2195         vm_page_free_pages_toq(&free, false);
2196 }
2197
2198 /*
2199  *      Routine:        pmap_remove_all
2200  *      Function:
2201  *              Removes this physical page from
2202  *              all physical maps in which it resides.
2203  *              Reflects back modify bits to the pager.
2204  *
2205  *      Notes:
2206  *              Original versions of this routine were very
2207  *              inefficient because they iteratively called
2208  *              pmap_remove (slow...)
2209  */
2210
2211 void
2212 pmap_remove_all(vm_page_t m)
2213 {
2214         struct spglist free;
2215         struct md_page *pvh;
2216         pmap_t pmap;
2217         pt_entry_t *l3, l3e;
2218         pd_entry_t *l2, l2e;
2219         pv_entry_t pv;
2220         vm_offset_t va;
2221
2222         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2223             ("pmap_remove_all: page %p is not managed", m));
2224         SLIST_INIT(&free);
2225         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2226             pa_to_pvh(VM_PAGE_TO_PHYS(m));
2227
2228         rw_wlock(&pvh_global_lock);
2229         while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2230                 pmap = PV_PMAP(pv);
2231                 PMAP_LOCK(pmap);
2232                 va = pv->pv_va;
2233                 l2 = pmap_l2(pmap, va);
2234                 (void)pmap_demote_l2(pmap, l2, va);
2235                 PMAP_UNLOCK(pmap);
2236         }
2237         while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2238                 pmap = PV_PMAP(pv);
2239                 PMAP_LOCK(pmap);
2240                 pmap_resident_count_dec(pmap, 1);
2241                 l2 = pmap_l2(pmap, pv->pv_va);
2242                 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2243                 l2e = pmap_load(l2);
2244
2245                 KASSERT((l2e & PTE_RX) == 0,
2246                     ("pmap_remove_all: found a superpage in %p's pv list", m));
2247
2248                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2249                 l3e = pmap_load_clear(l3);
2250                 pmap_invalidate_page(pmap, pv->pv_va);
2251                 if (l3e & PTE_SW_WIRED)
2252                         pmap->pm_stats.wired_count--;
2253                 if ((l3e & PTE_A) != 0)
2254                         vm_page_aflag_set(m, PGA_REFERENCED);
2255
2256                 /*
2257                  * Update the vm_page_t clean and reference bits.
2258                  */
2259                 if ((l3e & PTE_D) != 0)
2260                         vm_page_dirty(m);
2261                 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2262                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2263                 m->md.pv_gen++;
2264                 free_pv_entry(pmap, pv);
2265                 PMAP_UNLOCK(pmap);
2266         }
2267         vm_page_aflag_clear(m, PGA_WRITEABLE);
2268         rw_wunlock(&pvh_global_lock);
2269         vm_page_free_pages_toq(&free, false);
2270 }
2271
2272 /*
2273  *      Set the physical protection on the
2274  *      specified range of this map as requested.
2275  */
2276 void
2277 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2278 {
2279         pd_entry_t *l1, *l2, l2e;
2280         pt_entry_t *l3, l3e, mask;
2281         vm_page_t m;
2282         vm_paddr_t pa;
2283         vm_offset_t va, va_next;
2284         bool anychanged, pv_lists_locked;
2285
2286         if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2287                 pmap_remove(pmap, sva, eva);
2288                 return;
2289         }
2290
2291         if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2292             (VM_PROT_WRITE | VM_PROT_EXECUTE))
2293                 return;
2294
2295         anychanged = false;
2296         pv_lists_locked = false;
2297         mask = 0;
2298         if ((prot & VM_PROT_WRITE) == 0)
2299                 mask |= PTE_W | PTE_D;
2300         if ((prot & VM_PROT_EXECUTE) == 0)
2301                 mask |= PTE_X;
2302 resume:
2303         PMAP_LOCK(pmap);
2304         for (; sva < eva; sva = va_next) {
2305                 l1 = pmap_l1(pmap, sva);
2306                 if (pmap_load(l1) == 0) {
2307                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2308                         if (va_next < sva)
2309                                 va_next = eva;
2310                         continue;
2311                 }
2312
2313                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2314                 if (va_next < sva)
2315                         va_next = eva;
2316
2317                 l2 = pmap_l1_to_l2(l1, sva);
2318                 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2319                         continue;
2320                 if ((l2e & PTE_RWX) != 0) {
2321                         if (sva + L2_SIZE == va_next && eva >= va_next) {
2322 retryl2:
2323                                 if ((l2e & (PTE_SW_MANAGED | PTE_D)) ==
2324                                     (PTE_SW_MANAGED | PTE_D)) {
2325                                         pa = PTE_TO_PHYS(l2e);
2326                                         for (va = sva, m = PHYS_TO_VM_PAGE(pa);
2327                                             va < va_next; m++, va += PAGE_SIZE)
2328                                                 vm_page_dirty(m);
2329                                 }
2330                                 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2331                                         goto retryl2;
2332                                 anychanged = true;
2333                         } else {
2334                                 if (!pv_lists_locked) {
2335                                         pv_lists_locked = true;
2336                                         if (!rw_try_rlock(&pvh_global_lock)) {
2337                                                 if (anychanged)
2338                                                         pmap_invalidate_all(
2339                                                             pmap);
2340                                                 PMAP_UNLOCK(pmap);
2341                                                 rw_rlock(&pvh_global_lock);
2342                                                 goto resume;
2343                                         }
2344                                 }
2345                                 if (!pmap_demote_l2(pmap, l2, sva)) {
2346                                         /*
2347                                          * The large page mapping was destroyed.
2348                                          */
2349                                         continue;
2350                                 }
2351                         }
2352                 }
2353
2354                 if (va_next > eva)
2355                         va_next = eva;
2356
2357                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2358                     sva += L3_SIZE) {
2359                         l3e = pmap_load(l3);
2360 retryl3:
2361                         if ((l3e & PTE_V) == 0)
2362                                 continue;
2363                         if ((prot & VM_PROT_WRITE) == 0 &&
2364                             (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2365                             (PTE_SW_MANAGED | PTE_D)) {
2366                                 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2367                                 vm_page_dirty(m);
2368                         }
2369                         if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2370                                 goto retryl3;
2371                         anychanged = true;
2372                 }
2373         }
2374         if (anychanged)
2375                 pmap_invalidate_all(pmap);
2376         if (pv_lists_locked)
2377                 rw_runlock(&pvh_global_lock);
2378         PMAP_UNLOCK(pmap);
2379 }
2380
2381 int
2382 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2383 {
2384         pd_entry_t *l2, l2e;
2385         pt_entry_t bits, *pte, oldpte;
2386         int rv;
2387
2388         rv = 0;
2389         PMAP_LOCK(pmap);
2390         l2 = pmap_l2(pmap, va);
2391         if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2392                 goto done;
2393         if ((l2e & PTE_RWX) == 0) {
2394                 pte = pmap_l2_to_l3(l2, va);
2395                 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2396                         goto done;
2397         } else {
2398                 pte = l2;
2399                 oldpte = l2e;
2400         }
2401
2402         if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2403             (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2404             (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2405             (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2406                 goto done;
2407
2408         bits = PTE_A;
2409         if (ftype == VM_PROT_WRITE)
2410                 bits |= PTE_D;
2411
2412         /*
2413          * Spurious faults can occur if the implementation caches invalid
2414          * entries in the TLB, or if simultaneous accesses on multiple CPUs
2415          * race with each other.
2416          */
2417         if ((oldpte & bits) != bits)
2418                 pmap_store_bits(pte, bits);
2419         sfence_vma();
2420         rv = 1;
2421 done:
2422         PMAP_UNLOCK(pmap);
2423         return (rv);
2424 }
2425
2426 static bool
2427 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2428 {
2429         struct rwlock *lock;
2430         bool rv;
2431
2432         lock = NULL;
2433         rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2434         if (lock != NULL)
2435                 rw_wunlock(lock);
2436         return (rv);
2437 }
2438
2439 /*
2440  * Tries to demote a 2MB page mapping.  If demotion fails, the 2MB page
2441  * mapping is invalidated.
2442  */
2443 static bool
2444 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2445     struct rwlock **lockp)
2446 {
2447         struct spglist free;
2448         vm_page_t mpte;
2449         pd_entry_t newl2, oldl2;
2450         pt_entry_t *firstl3, newl3;
2451         vm_paddr_t mptepa;
2452         int i;
2453
2454         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2455
2456         oldl2 = pmap_load(l2);
2457         KASSERT((oldl2 & PTE_RWX) != 0,
2458             ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2459         if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2460             NULL) {
2461                 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2462                     pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2463                     VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2464                     NULL) {
2465                         SLIST_INIT(&free);
2466                         (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2467                             pmap_load(pmap_l1(pmap, va)), &free, lockp);
2468                         vm_page_free_pages_toq(&free, true);
2469                         CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2470                             "failure for va %#lx in pmap %p", va, pmap);
2471                         return (false);
2472                 }
2473                 if (va < VM_MAXUSER_ADDRESS)
2474                         pmap_resident_count_inc(pmap, 1);
2475         }
2476         mptepa = VM_PAGE_TO_PHYS(mpte);
2477         firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2478         newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2479         KASSERT((oldl2 & PTE_A) != 0,
2480             ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2481         KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2482             ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2483         newl3 = oldl2;
2484
2485         /*
2486          * If the page table page is new, initialize it.
2487          */
2488         if (mpte->wire_count == 1) {
2489                 mpte->wire_count = Ln_ENTRIES;
2490                 for (i = 0; i < Ln_ENTRIES; i++)
2491                         pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2492         }
2493         KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2494             ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2495             "addresses"));
2496
2497         /*
2498          * If the mapping has changed attributes, update the page table
2499          * entries.
2500          */
2501         if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2502                 for (i = 0; i < Ln_ENTRIES; i++)
2503                         pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2504
2505         /*
2506          * The spare PV entries must be reserved prior to demoting the
2507          * mapping, that is, prior to changing the L2 entry.  Otherwise, the
2508          * state of the L2 entry and the PV lists will be inconsistent, which
2509          * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2510          * the wrong PV list and pmap_pv_demote_l2() failing to find the
2511          * expected PV entry for the 2MB page mapping that is being demoted.
2512          */
2513         if ((oldl2 & PTE_SW_MANAGED) != 0)
2514                 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2515
2516         /*
2517          * Demote the mapping.
2518          */
2519         pmap_store(l2, newl2);
2520
2521         /*
2522          * Demote the PV entry.
2523          */
2524         if ((oldl2 & PTE_SW_MANAGED) != 0)
2525                 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2526
2527         atomic_add_long(&pmap_l2_demotions, 1);
2528         CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2529             va, pmap);
2530         return (true);
2531 }
2532
2533 #if VM_NRESERVLEVEL > 0
2534 static void
2535 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2536     struct rwlock **lockp)
2537 {
2538         pt_entry_t *firstl3, *l3;
2539         vm_paddr_t pa;
2540         vm_page_t ml3;
2541
2542         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2543
2544         va &= ~L2_OFFSET;
2545         KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2546             ("pmap_promote_l2: invalid l2 entry %p", l2));
2547
2548         firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2549         pa = PTE_TO_PHYS(pmap_load(firstl3));
2550         if ((pa & L2_OFFSET) != 0) {
2551                 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2552                     va, pmap);
2553                 atomic_add_long(&pmap_l2_p_failures, 1);
2554                 return;
2555         }
2556
2557         pa += PAGE_SIZE;
2558         for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2559                 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2560                         CTR2(KTR_PMAP,
2561                             "pmap_promote_l2: failure for va %#lx pmap %p",
2562                             va, pmap);
2563                         atomic_add_long(&pmap_l2_p_failures, 1);
2564                         return;
2565                 }
2566                 if ((pmap_load(l3) & PTE_PROMOTE) !=
2567                     (pmap_load(firstl3) & PTE_PROMOTE)) {
2568                         CTR2(KTR_PMAP,
2569                             "pmap_promote_l2: failure for va %#lx pmap %p",
2570                             va, pmap);
2571                         atomic_add_long(&pmap_l2_p_failures, 1);
2572                         return;
2573                 }
2574                 pa += PAGE_SIZE;
2575         }
2576
2577         ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2578         KASSERT(ml3->pindex == pmap_l2_pindex(va),
2579             ("pmap_promote_l2: page table page's pindex is wrong"));
2580         if (pmap_insert_pt_page(pmap, ml3)) {
2581                 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2582                     va, pmap);
2583                 atomic_add_long(&pmap_l2_p_failures, 1);
2584                 return;
2585         }
2586
2587         if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2588                 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2589                     lockp);
2590
2591         pmap_store(l2, pmap_load(firstl3));
2592
2593         atomic_add_long(&pmap_l2_promotions, 1);
2594         CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2595             pmap);
2596 }
2597 #endif
2598
2599 /*
2600  *      Insert the given physical page (p) at
2601  *      the specified virtual address (v) in the
2602  *      target physical map with the protection requested.
2603  *
2604  *      If specified, the page will be wired down, meaning
2605  *      that the related pte can not be reclaimed.
2606  *
2607  *      NB:  This is the only routine which MAY NOT lazy-evaluate
2608  *      or lose information.  That is, this routine must actually
2609  *      insert this page into the given map NOW.
2610  */
2611 int
2612 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2613     u_int flags, int8_t psind)
2614 {
2615         struct rwlock *lock;
2616         pd_entry_t *l1, *l2, l2e;
2617         pt_entry_t new_l3, orig_l3;
2618         pt_entry_t *l3;
2619         pv_entry_t pv;
2620         vm_paddr_t opa, pa, l2_pa, l3_pa;
2621         vm_page_t mpte, om, l2_m, l3_m;
2622         pt_entry_t entry;
2623         pn_t l2_pn, l3_pn, pn;
2624         int rv;
2625         bool nosleep;
2626
2627         va = trunc_page(va);
2628         if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2629                 VM_OBJECT_ASSERT_LOCKED(m->object);
2630         pa = VM_PAGE_TO_PHYS(m);
2631         pn = (pa / PAGE_SIZE);
2632
2633         new_l3 = PTE_V | PTE_R | PTE_A;
2634         if (prot & VM_PROT_EXECUTE)
2635                 new_l3 |= PTE_X;
2636         if (flags & VM_PROT_WRITE)
2637                 new_l3 |= PTE_D;
2638         if (prot & VM_PROT_WRITE)
2639                 new_l3 |= PTE_W;
2640         if (va < VM_MAX_USER_ADDRESS)
2641                 new_l3 |= PTE_U;
2642
2643         new_l3 |= (pn << PTE_PPN0_S);
2644         if ((flags & PMAP_ENTER_WIRED) != 0)
2645                 new_l3 |= PTE_SW_WIRED;
2646
2647         /*
2648          * Set modified bit gratuitously for writeable mappings if
2649          * the page is unmanaged. We do not want to take a fault
2650          * to do the dirty bit accounting for these mappings.
2651          */
2652         if ((m->oflags & VPO_UNMANAGED) != 0) {
2653                 if (prot & VM_PROT_WRITE)
2654                         new_l3 |= PTE_D;
2655         } else
2656                 new_l3 |= PTE_SW_MANAGED;
2657
2658         CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2659
2660         lock = NULL;
2661         mpte = NULL;
2662         rw_rlock(&pvh_global_lock);
2663         PMAP_LOCK(pmap);
2664         if (psind == 1) {
2665                 /* Assert the required virtual and physical alignment. */
2666                 KASSERT((va & L2_OFFSET) == 0,
2667                     ("pmap_enter: va %#lx unaligned", va));
2668                 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2669                 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2670                 goto out;
2671         }
2672
2673         l2 = pmap_l2(pmap, va);
2674         if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2675             ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2676             va, &lock))) {
2677                 l3 = pmap_l2_to_l3(l2, va);
2678                 if (va < VM_MAXUSER_ADDRESS) {
2679                         mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2680                         mpte->wire_count++;
2681                 }
2682         } else if (va < VM_MAXUSER_ADDRESS) {
2683                 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2684                 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2685                 if (mpte == NULL && nosleep) {
2686                         CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2687                         if (lock != NULL)
2688                                 rw_wunlock(lock);
2689                         rw_runlock(&pvh_global_lock);
2690                         PMAP_UNLOCK(pmap);
2691                         return (KERN_RESOURCE_SHORTAGE);
2692                 }
2693                 l3 = pmap_l3(pmap, va);
2694         } else {
2695                 l3 = pmap_l3(pmap, va);
2696                 /* TODO: This is not optimal, but should mostly work */
2697                 if (l3 == NULL) {
2698                         if (l2 == NULL) {
2699                                 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2700                                     VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2701                                     VM_ALLOC_ZERO);
2702                                 if (l2_m == NULL)
2703                                         panic("pmap_enter: l2 pte_m == NULL");
2704                                 if ((l2_m->flags & PG_ZERO) == 0)
2705                                         pmap_zero_page(l2_m);
2706
2707                                 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2708                                 l2_pn = (l2_pa / PAGE_SIZE);
2709
2710                                 l1 = pmap_l1(pmap, va);
2711                                 entry = (PTE_V);
2712                                 entry |= (l2_pn << PTE_PPN0_S);
2713                                 pmap_store(l1, entry);
2714                                 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2715                                 l2 = pmap_l1_to_l2(l1, va);
2716                         }
2717
2718                         l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2719                             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2720                         if (l3_m == NULL)
2721                                 panic("pmap_enter: l3 pte_m == NULL");
2722                         if ((l3_m->flags & PG_ZERO) == 0)
2723                                 pmap_zero_page(l3_m);
2724
2725                         l3_pa = VM_PAGE_TO_PHYS(l3_m);
2726                         l3_pn = (l3_pa / PAGE_SIZE);
2727                         entry = (PTE_V);
2728                         entry |= (l3_pn << PTE_PPN0_S);
2729                         pmap_store(l2, entry);
2730                         l3 = pmap_l2_to_l3(l2, va);
2731                 }
2732                 pmap_invalidate_page(pmap, va);
2733         }
2734
2735         orig_l3 = pmap_load(l3);
2736         opa = PTE_TO_PHYS(orig_l3);
2737         pv = NULL;
2738
2739         /*
2740          * Is the specified virtual address already mapped?
2741          */
2742         if ((orig_l3 & PTE_V) != 0) {
2743                 /*
2744                  * Wiring change, just update stats. We don't worry about
2745                  * wiring PT pages as they remain resident as long as there
2746                  * are valid mappings in them. Hence, if a user page is wired,
2747                  * the PT page will be also.
2748                  */
2749                 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2750                     (orig_l3 & PTE_SW_WIRED) == 0)
2751                         pmap->pm_stats.wired_count++;
2752                 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2753                     (orig_l3 & PTE_SW_WIRED) != 0)
2754                         pmap->pm_stats.wired_count--;
2755
2756                 /*
2757                  * Remove the extra PT page reference.
2758                  */
2759                 if (mpte != NULL) {
2760                         mpte->wire_count--;
2761                         KASSERT(mpte->wire_count > 0,
2762                             ("pmap_enter: missing reference to page table page,"
2763                              " va: 0x%lx", va));
2764                 }
2765
2766                 /*
2767                  * Has the physical page changed?
2768                  */
2769                 if (opa == pa) {
2770                         /*
2771                          * No, might be a protection or wiring change.
2772                          */
2773                         if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2774                             (new_l3 & PTE_W) != 0)
2775                                 vm_page_aflag_set(m, PGA_WRITEABLE);
2776                         goto validate;
2777                 }
2778
2779                 /*
2780                  * The physical page has changed.  Temporarily invalidate
2781                  * the mapping.  This ensures that all threads sharing the
2782                  * pmap keep a consistent view of the mapping, which is
2783                  * necessary for the correct handling of COW faults.  It
2784                  * also permits reuse of the old mapping's PV entry,
2785                  * avoiding an allocation.
2786                  *
2787                  * For consistency, handle unmanaged mappings the same way.
2788                  */
2789                 orig_l3 = pmap_load_clear(l3);
2790                 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2791                     ("pmap_enter: unexpected pa update for %#lx", va));
2792                 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2793                         om = PHYS_TO_VM_PAGE(opa);
2794
2795                         /*
2796                          * The pmap lock is sufficient to synchronize with
2797                          * concurrent calls to pmap_page_test_mappings() and
2798                          * pmap_ts_referenced().
2799                          */
2800                         if ((orig_l3 & PTE_D) != 0)
2801                                 vm_page_dirty(om);
2802                         if ((orig_l3 & PTE_A) != 0)
2803                                 vm_page_aflag_set(om, PGA_REFERENCED);
2804                         CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2805                         pv = pmap_pvh_remove(&om->md, pmap, va);
2806                         KASSERT(pv != NULL,
2807                             ("pmap_enter: no PV entry for %#lx", va));
2808                         if ((new_l3 & PTE_SW_MANAGED) == 0)
2809                                 free_pv_entry(pmap, pv);
2810                         if ((om->aflags & PGA_WRITEABLE) != 0 &&
2811                             TAILQ_EMPTY(&om->md.pv_list))
2812                                 vm_page_aflag_clear(om, PGA_WRITEABLE);
2813                 }
2814                 pmap_invalidate_page(pmap, va);
2815                 orig_l3 = 0;
2816         } else {
2817                 /*
2818                  * Increment the counters.
2819                  */
2820                 if ((new_l3 & PTE_SW_WIRED) != 0)
2821                         pmap->pm_stats.wired_count++;
2822                 pmap_resident_count_inc(pmap, 1);
2823         }
2824         /*
2825          * Enter on the PV list if part of our managed memory.
2826          */
2827         if ((new_l3 & PTE_SW_MANAGED) != 0) {
2828                 if (pv == NULL) {
2829                         pv = get_pv_entry(pmap, &lock);
2830                         pv->pv_va = va;
2831                 }
2832                 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2833                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2834                 m->md.pv_gen++;
2835                 if ((new_l3 & PTE_W) != 0)
2836                         vm_page_aflag_set(m, PGA_WRITEABLE);
2837         }
2838
2839 validate:
2840         /*
2841          * Sync the i-cache on all harts before updating the PTE
2842          * if the new PTE is executable.
2843          */
2844         if (prot & VM_PROT_EXECUTE)
2845                 pmap_sync_icache(pmap, va, PAGE_SIZE);
2846
2847         /*
2848          * Update the L3 entry.
2849          */
2850         if (orig_l3 != 0) {
2851                 orig_l3 = pmap_load_store(l3, new_l3);
2852                 pmap_invalidate_page(pmap, va);
2853                 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2854                     ("pmap_enter: invalid update"));
2855                 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2856                     (PTE_D | PTE_SW_MANAGED))
2857                         vm_page_dirty(m);
2858         } else {
2859                 pmap_store(l3, new_l3);
2860         }
2861
2862 #if VM_NRESERVLEVEL > 0
2863         if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2864             pmap_ps_enabled(pmap) &&
2865             (m->flags & PG_FICTITIOUS) == 0 &&
2866             vm_reserv_level_iffullpop(m) == 0)
2867                 pmap_promote_l2(pmap, l2, va, &lock);
2868 #endif
2869
2870         rv = KERN_SUCCESS;
2871 out:
2872         if (lock != NULL)
2873                 rw_wunlock(lock);
2874         rw_runlock(&pvh_global_lock);
2875         PMAP_UNLOCK(pmap);
2876         return (rv);
2877 }
2878
2879 /*
2880  * Tries to create a read- and/or execute-only 2MB page mapping.  Returns true
2881  * if successful.  Returns false if (1) a page table page cannot be allocated
2882  * without sleeping, (2) a mapping already exists at the specified virtual
2883  * address, or (3) a PV entry cannot be allocated without reclaiming another
2884  * PV entry.
2885  */
2886 static bool
2887 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2888     struct rwlock **lockp)
2889 {
2890         pd_entry_t new_l2;
2891         pn_t pn;
2892
2893         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2894
2895         pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2896         new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2897         if ((m->oflags & VPO_UNMANAGED) == 0)
2898                 new_l2 |= PTE_SW_MANAGED;
2899         if ((prot & VM_PROT_EXECUTE) != 0)
2900                 new_l2 |= PTE_X;
2901         if (va < VM_MAXUSER_ADDRESS)
2902                 new_l2 |= PTE_U;
2903         return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2904             PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2905             KERN_SUCCESS);
2906 }
2907
2908 /*
2909  * Tries to create the specified 2MB page mapping.  Returns KERN_SUCCESS if
2910  * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2911  * otherwise.  Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2912  * a mapping already exists at the specified virtual address.  Returns
2913  * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2914  * page allocation failed.  Returns KERN_RESOURCE_SHORTAGE if
2915  * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2916  *
2917  * The parameter "m" is only used when creating a managed, writeable mapping.
2918  */
2919 static int
2920 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2921     vm_page_t m, struct rwlock **lockp)
2922 {
2923         struct spglist free;
2924         pd_entry_t *l2, *l3, oldl2;
2925         vm_offset_t sva;
2926         vm_page_t l2pg, mt;
2927
2928         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2929
2930         if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2931             NULL : lockp)) == NULL) {
2932                 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2933                     va, pmap);
2934                 return (KERN_RESOURCE_SHORTAGE);
2935         }
2936
2937         l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2938         l2 = &l2[pmap_l2_index(va)];
2939         if ((oldl2 = pmap_load(l2)) != 0) {
2940                 KASSERT(l2pg->wire_count > 1,
2941                     ("pmap_enter_l2: l2pg's wire count is too low"));
2942                 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2943                         l2pg->wire_count--;
2944                         CTR2(KTR_PMAP,
2945                             "pmap_enter_l2: failure for va %#lx in pmap %p",
2946                             va, pmap);
2947                         return (KERN_FAILURE);
2948                 }
2949                 SLIST_INIT(&free);
2950                 if ((oldl2 & PTE_RWX) != 0)
2951                         (void)pmap_remove_l2(pmap, l2, va,
2952                             pmap_load(pmap_l1(pmap, va)), &free, lockp);
2953                 else
2954                         for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2955                                 l3 = pmap_l2_to_l3(l2, sva);
2956                                 if ((pmap_load(l3) & PTE_V) != 0 &&
2957                                     pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2958                                     lockp) != 0)
2959                                         break;
2960                         }
2961                 vm_page_free_pages_toq(&free, true);
2962                 if (va >= VM_MAXUSER_ADDRESS) {
2963                         mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2964                         if (pmap_insert_pt_page(pmap, mt)) {
2965                                 /*
2966                                  * XXX Currently, this can't happen bacuse
2967                                  * we do not perform pmap_enter(psind == 1)
2968                                  * on the kernel pmap.
2969                                  */
2970                                 panic("pmap_enter_l2: trie insert failed");
2971                         }
2972                 } else
2973                         KASSERT(pmap_load(l2) == 0,
2974                             ("pmap_enter_l2: non-zero L2 entry %p", l2));
2975         }
2976
2977         if ((new_l2 & PTE_SW_MANAGED) != 0) {
2978                 /*
2979                  * Abort this mapping if its PV entry could not be created.
2980                  */
2981                 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2982                         SLIST_INIT(&free);
2983                         if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2984                                 /*
2985                                  * Although "va" is not mapped, paging-structure
2986                                  * caches could nonetheless have entries that
2987                                  * refer to the freed page table pages.
2988                                  * Invalidate those entries.
2989                                  */
2990                                 pmap_invalidate_page(pmap, va);
2991                                 vm_page_free_pages_toq(&free, true);
2992                         }
2993                         CTR2(KTR_PMAP,
2994                             "pmap_enter_l2: failure for va %#lx in pmap %p",
2995                             va, pmap);
2996                         return (KERN_RESOURCE_SHORTAGE);
2997                 }
2998                 if ((new_l2 & PTE_W) != 0)
2999                         for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3000                                 vm_page_aflag_set(mt, PGA_WRITEABLE);
3001         }
3002
3003         /*
3004          * Increment counters.
3005          */
3006         if ((new_l2 & PTE_SW_WIRED) != 0)
3007                 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3008         pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3009
3010         /*
3011          * Map the superpage.
3012          */
3013         pmap_store(l2, new_l2);
3014
3015         atomic_add_long(&pmap_l2_mappings, 1);
3016         CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3017             va, pmap);
3018
3019         return (KERN_SUCCESS);
3020 }
3021
3022 /*
3023  * Maps a sequence of resident pages belonging to the same object.
3024  * The sequence begins with the given page m_start.  This page is
3025  * mapped at the given virtual address start.  Each subsequent page is
3026  * mapped at a virtual address that is offset from start by the same
3027  * amount as the page is offset from m_start within the object.  The
3028  * last page in the sequence is the page with the largest offset from
3029  * m_start that can be mapped at a virtual address less than the given
3030  * virtual address end.  Not every virtual page between start and end
3031  * is mapped; only those for which a resident page exists with the
3032  * corresponding offset from m_start are mapped.
3033  */
3034 void
3035 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3036     vm_page_t m_start, vm_prot_t prot)
3037 {
3038         struct rwlock *lock;
3039         vm_offset_t va;
3040         vm_page_t m, mpte;
3041         vm_pindex_t diff, psize;
3042
3043         VM_OBJECT_ASSERT_LOCKED(m_start->object);
3044
3045         psize = atop(end - start);
3046         mpte = NULL;
3047         m = m_start;
3048         lock = NULL;
3049         rw_rlock(&pvh_global_lock);
3050         PMAP_LOCK(pmap);
3051         while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3052                 va = start + ptoa(diff);
3053                 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3054                     m->psind == 1 && pmap_ps_enabled(pmap) &&
3055                     pmap_enter_2mpage(pmap, va, m, prot, &lock))
3056                         m = &m[L2_SIZE / PAGE_SIZE - 1];
3057                 else
3058                         mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3059                             &lock);
3060                 m = TAILQ_NEXT(m, listq);
3061         }
3062         if (lock != NULL)
3063                 rw_wunlock(lock);
3064         rw_runlock(&pvh_global_lock);
3065         PMAP_UNLOCK(pmap);
3066 }
3067
3068 /*
3069  * this code makes some *MAJOR* assumptions:
3070  * 1. Current pmap & pmap exists.
3071  * 2. Not wired.
3072  * 3. Read access.
3073  * 4. No page table pages.
3074  * but is *MUCH* faster than pmap_enter...
3075  */
3076
3077 void
3078 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3079 {
3080         struct rwlock *lock;
3081
3082         lock = NULL;
3083         rw_rlock(&pvh_global_lock);
3084         PMAP_LOCK(pmap);
3085         (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3086         if (lock != NULL)
3087                 rw_wunlock(lock);
3088         rw_runlock(&pvh_global_lock);
3089         PMAP_UNLOCK(pmap);
3090 }
3091
3092 static vm_page_t
3093 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3094     vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3095 {
3096         struct spglist free;
3097         vm_paddr_t phys;
3098         pd_entry_t *l2;
3099         pt_entry_t *l3, newl3;
3100
3101         KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3102             (m->oflags & VPO_UNMANAGED) != 0,
3103             ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3104         rw_assert(&pvh_global_lock, RA_LOCKED);
3105         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3106
3107         CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3108         /*
3109          * In the case that a page table page is not
3110          * resident, we are creating it here.
3111          */
3112         if (va < VM_MAXUSER_ADDRESS) {
3113                 vm_pindex_t l2pindex;
3114
3115                 /*
3116                  * Calculate pagetable page index
3117                  */
3118                 l2pindex = pmap_l2_pindex(va);
3119                 if (mpte && (mpte->pindex == l2pindex)) {
3120                         mpte->wire_count++;
3121                 } else {
3122                         /*
3123                          * Get the l2 entry
3124                          */
3125                         l2 = pmap_l2(pmap, va);
3126
3127                         /*
3128                          * If the page table page is mapped, we just increment
3129                          * the hold count, and activate it.  Otherwise, we
3130                          * attempt to allocate a page table page.  If this
3131                          * attempt fails, we don't retry.  Instead, we give up.
3132                          */
3133                         if (l2 != NULL && pmap_load(l2) != 0) {
3134                                 phys = PTE_TO_PHYS(pmap_load(l2));
3135                                 mpte = PHYS_TO_VM_PAGE(phys);
3136                                 mpte->wire_count++;
3137                         } else {
3138                                 /*
3139                                  * Pass NULL instead of the PV list lock
3140                                  * pointer, because we don't intend to sleep.
3141                                  */
3142                                 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3143                                 if (mpte == NULL)
3144                                         return (mpte);
3145                         }
3146                 }
3147                 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3148                 l3 = &l3[pmap_l3_index(va)];
3149         } else {
3150                 mpte = NULL;
3151                 l3 = pmap_l3(kernel_pmap, va);
3152         }
3153         if (l3 == NULL)
3154                 panic("pmap_enter_quick_locked: No l3");
3155         if (pmap_load(l3) != 0) {
3156                 if (mpte != NULL) {
3157                         mpte->wire_count--;
3158                         mpte = NULL;
3159                 }
3160                 return (mpte);
3161         }
3162
3163         /*
3164          * Enter on the PV list if part of our managed memory.
3165          */
3166         if ((m->oflags & VPO_UNMANAGED) == 0 &&
3167             !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3168                 if (mpte != NULL) {
3169                         SLIST_INIT(&free);
3170                         if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3171                                 pmap_invalidate_page(pmap, va);
3172                                 vm_page_free_pages_toq(&free, false);
3173                         }
3174                         mpte = NULL;
3175                 }
3176                 return (mpte);
3177         }
3178
3179         /*
3180          * Increment counters
3181          */
3182         pmap_resident_count_inc(pmap, 1);
3183
3184         newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3185             PTE_V | PTE_R;
3186         if ((prot & VM_PROT_EXECUTE) != 0)
3187                 newl3 |= PTE_X;
3188         if ((m->oflags & VPO_UNMANAGED) == 0)
3189                 newl3 |= PTE_SW_MANAGED;
3190         if (va < VM_MAX_USER_ADDRESS)
3191                 newl3 |= PTE_U;
3192
3193         /*
3194          * Sync the i-cache on all harts before updating the PTE
3195          * if the new PTE is executable.
3196          */
3197         if (prot & VM_PROT_EXECUTE)
3198                 pmap_sync_icache(pmap, va, PAGE_SIZE);
3199
3200         pmap_store(l3, newl3);
3201
3202         pmap_invalidate_page(pmap, va);
3203         return (mpte);
3204 }
3205
3206 /*
3207  * This code maps large physical mmap regions into the
3208  * processor address space.  Note that some shortcuts
3209  * are taken, but the code works.
3210  */
3211 void
3212 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3213     vm_pindex_t pindex, vm_size_t size)
3214 {
3215
3216         VM_OBJECT_ASSERT_WLOCKED(object);
3217         KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3218             ("pmap_object_init_pt: non-device object"));
3219 }
3220
3221 /*
3222  *      Clear the wired attribute from the mappings for the specified range of
3223  *      addresses in the given pmap.  Every valid mapping within that range
3224  *      must have the wired attribute set.  In contrast, invalid mappings
3225  *      cannot have the wired attribute set, so they are ignored.
3226  *
3227  *      The wired attribute of the page table entry is not a hardware feature,
3228  *      so there is no need to invalidate any TLB entries.
3229  */
3230 void
3231 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3232 {
3233         vm_offset_t va_next;
3234         pd_entry_t *l1, *l2, l2e;
3235         pt_entry_t *l3, l3e;
3236         bool pv_lists_locked;
3237
3238         pv_lists_locked = false;
3239 retry:
3240         PMAP_LOCK(pmap);
3241         for (; sva < eva; sva = va_next) {
3242                 l1 = pmap_l1(pmap, sva);
3243                 if (pmap_load(l1) == 0) {
3244                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3245                         if (va_next < sva)
3246                                 va_next = eva;
3247                         continue;
3248                 }
3249
3250                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3251                 if (va_next < sva)
3252                         va_next = eva;
3253
3254                 l2 = pmap_l1_to_l2(l1, sva);
3255                 if ((l2e = pmap_load(l2)) == 0)
3256                         continue;
3257                 if ((l2e & PTE_RWX) != 0) {
3258                         if (sva + L2_SIZE == va_next && eva >= va_next) {
3259                                 if ((l2e & PTE_SW_WIRED) == 0)
3260                                         panic("pmap_unwire: l2 %#jx is missing "
3261                                             "PTE_SW_WIRED", (uintmax_t)l2e);
3262                                 pmap_clear_bits(l2, PTE_SW_WIRED);
3263                                 continue;
3264                         } else {
3265                                 if (!pv_lists_locked) {
3266                                         pv_lists_locked = true;
3267                                         if (!rw_try_rlock(&pvh_global_lock)) {
3268                                                 PMAP_UNLOCK(pmap);
3269                                                 rw_rlock(&pvh_global_lock);
3270                                                 /* Repeat sva. */
3271                                                 goto retry;
3272                                         }
3273                                 }
3274                                 if (!pmap_demote_l2(pmap, l2, sva))
3275                                         panic("pmap_unwire: demotion failed");
3276                         }
3277                 }
3278
3279                 if (va_next > eva)
3280                         va_next = eva;
3281                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3282                     sva += L3_SIZE) {
3283                         if ((l3e = pmap_load(l3)) == 0)
3284                                 continue;
3285                         if ((l3e & PTE_SW_WIRED) == 0)
3286                                 panic("pmap_unwire: l3 %#jx is missing "
3287                                     "PTE_SW_WIRED", (uintmax_t)l3e);
3288
3289                         /*
3290                          * PG_W must be cleared atomically.  Although the pmap
3291                          * lock synchronizes access to PG_W, another processor
3292                          * could be setting PG_M and/or PG_A concurrently.
3293                          */
3294                         pmap_clear_bits(l3, PTE_SW_WIRED);
3295                         pmap->pm_stats.wired_count--;
3296                 }
3297         }
3298         if (pv_lists_locked)
3299                 rw_runlock(&pvh_global_lock);
3300         PMAP_UNLOCK(pmap);
3301 }
3302
3303 /*
3304  *      Copy the range specified by src_addr/len
3305  *      from the source map to the range dst_addr/len
3306  *      in the destination map.
3307  *
3308  *      This routine is only advisory and need not do anything.
3309  */
3310
3311 void
3312 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3313     vm_offset_t src_addr)
3314 {
3315
3316 }
3317
3318 /*
3319  *      pmap_zero_page zeros the specified hardware page by mapping
3320  *      the page into KVM and using bzero to clear its contents.
3321  */
3322 void
3323 pmap_zero_page(vm_page_t m)
3324 {
3325         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3326
3327         pagezero((void *)va);
3328 }
3329
3330 /*
3331  *      pmap_zero_page_area zeros the specified hardware page by mapping 
3332  *      the page into KVM and using bzero to clear its contents.
3333  *
3334  *      off and size may not cover an area beyond a single hardware page.
3335  */
3336 void
3337 pmap_zero_page_area(vm_page_t m, int off, int size)
3338 {
3339         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3340
3341         if (off == 0 && size == PAGE_SIZE)
3342                 pagezero((void *)va);
3343         else
3344                 bzero((char *)va + off, size);
3345 }
3346
3347 /*
3348  *      pmap_copy_page copies the specified (machine independent)
3349  *      page by mapping the page into virtual memory and using
3350  *      bcopy to copy the page, one machine dependent page at a
3351  *      time.
3352  */
3353 void
3354 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3355 {
3356         vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3357         vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3358
3359         pagecopy((void *)src, (void *)dst);
3360 }
3361
3362 int unmapped_buf_allowed = 1;
3363
3364 void
3365 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3366     vm_offset_t b_offset, int xfersize)
3367 {
3368         void *a_cp, *b_cp;
3369         vm_page_t m_a, m_b;
3370         vm_paddr_t p_a, p_b;
3371         vm_offset_t a_pg_offset, b_pg_offset;
3372         int cnt;
3373
3374         while (xfersize > 0) {
3375                 a_pg_offset = a_offset & PAGE_MASK;
3376                 m_a = ma[a_offset >> PAGE_SHIFT];
3377                 p_a = m_a->phys_addr;
3378                 b_pg_offset = b_offset & PAGE_MASK;
3379                 m_b = mb[b_offset >> PAGE_SHIFT];
3380                 p_b = m_b->phys_addr;
3381                 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3382                 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3383                 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3384                         panic("!DMAP a %lx", p_a);
3385                 } else {
3386                         a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3387                 }
3388                 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3389                         panic("!DMAP b %lx", p_b);
3390                 } else {
3391                         b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3392                 }
3393                 bcopy(a_cp, b_cp, cnt);
3394                 a_offset += cnt;
3395                 b_offset += cnt;
3396                 xfersize -= cnt;
3397         }
3398 }
3399
3400 vm_offset_t
3401 pmap_quick_enter_page(vm_page_t m)
3402 {
3403
3404         return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3405 }
3406
3407 void
3408 pmap_quick_remove_page(vm_offset_t addr)
3409 {
3410 }
3411
3412 /*
3413  * Returns true if the pmap's pv is one of the first
3414  * 16 pvs linked to from this page.  This count may
3415  * be changed upwards or downwards in the future; it
3416  * is only necessary that true be returned for a small
3417  * subset of pmaps for proper page aging.
3418  */
3419 boolean_t
3420 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3421 {
3422         struct md_page *pvh;
3423         struct rwlock *lock;
3424         pv_entry_t pv;
3425         int loops = 0;
3426         boolean_t rv;
3427
3428         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3429             ("pmap_page_exists_quick: page %p is not managed", m));
3430         rv = FALSE;
3431         rw_rlock(&pvh_global_lock);
3432         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3433         rw_rlock(lock);
3434         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3435                 if (PV_PMAP(pv) == pmap) {
3436                         rv = TRUE;
3437                         break;
3438                 }
3439                 loops++;
3440                 if (loops >= 16)
3441                         break;
3442         }
3443         if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3444                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3445                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3446                         if (PV_PMAP(pv) == pmap) {
3447                                 rv = TRUE;
3448                                 break;
3449                         }
3450                         loops++;
3451                         if (loops >= 16)
3452                                 break;
3453                 }
3454         }
3455         rw_runlock(lock);
3456         rw_runlock(&pvh_global_lock);
3457         return (rv);
3458 }
3459
3460 /*
3461  *      pmap_page_wired_mappings:
3462  *
3463  *      Return the number of managed mappings to the given physical page
3464  *      that are wired.
3465  */
3466 int
3467 pmap_page_wired_mappings(vm_page_t m)
3468 {
3469         struct md_page *pvh;
3470         struct rwlock *lock;
3471         pmap_t pmap;
3472         pd_entry_t *l2;
3473         pt_entry_t *l3;
3474         pv_entry_t pv;
3475         int count, md_gen, pvh_gen;
3476
3477         if ((m->oflags & VPO_UNMANAGED) != 0)
3478                 return (0);
3479         rw_rlock(&pvh_global_lock);
3480         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3481         rw_rlock(lock);
3482 restart:
3483         count = 0;
3484         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3485                 pmap = PV_PMAP(pv);
3486                 if (!PMAP_TRYLOCK(pmap)) {
3487                         md_gen = m->md.pv_gen;
3488                         rw_runlock(lock);
3489                         PMAP_LOCK(pmap);
3490                         rw_rlock(lock);
3491                         if (md_gen != m->md.pv_gen) {
3492                                 PMAP_UNLOCK(pmap);
3493                                 goto restart;
3494                         }
3495                 }
3496                 l3 = pmap_l3(pmap, pv->pv_va);
3497                 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3498                         count++;
3499                 PMAP_UNLOCK(pmap);
3500         }
3501         if ((m->flags & PG_FICTITIOUS) == 0) {
3502                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3503                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3504                         pmap = PV_PMAP(pv);
3505                         if (!PMAP_TRYLOCK(pmap)) {
3506                                 md_gen = m->md.pv_gen;
3507                                 pvh_gen = pvh->pv_gen;
3508                                 rw_runlock(lock);
3509                                 PMAP_LOCK(pmap);
3510                                 rw_rlock(lock);
3511                                 if (md_gen != m->md.pv_gen ||
3512                                     pvh_gen != pvh->pv_gen) {
3513                                         PMAP_UNLOCK(pmap);
3514                                         goto restart;
3515                                 }
3516                         }
3517                         l2 = pmap_l2(pmap, pv->pv_va);
3518                         if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3519                                 count++;
3520                         PMAP_UNLOCK(pmap);
3521                 }
3522         }
3523         rw_runlock(lock);
3524         rw_runlock(&pvh_global_lock);
3525         return (count);
3526 }
3527
3528 static void
3529 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3530     struct spglist *free, bool superpage)
3531 {
3532         struct md_page *pvh;
3533         vm_page_t mpte, mt;
3534
3535         if (superpage) {
3536                 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3537                 pvh = pa_to_pvh(m->phys_addr);
3538                 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3539                 pvh->pv_gen++;
3540                 if (TAILQ_EMPTY(&pvh->pv_list)) {
3541                         for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3542                                 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3543                                     (mt->aflags & PGA_WRITEABLE) != 0)
3544                                         vm_page_aflag_clear(mt, PGA_WRITEABLE);
3545                 }
3546                 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3547                 if (mpte != NULL) {
3548                         pmap_resident_count_dec(pmap, 1);
3549                         KASSERT(mpte->wire_count == Ln_ENTRIES,
3550                             ("pmap_remove_pages: pte page wire count error"));
3551                         mpte->wire_count = 0;
3552                         pmap_add_delayed_free_list(mpte, free, FALSE);
3553                 }
3554         } else {
3555                 pmap_resident_count_dec(pmap, 1);
3556                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3557                 m->md.pv_gen++;
3558                 if (TAILQ_EMPTY(&m->md.pv_list) &&
3559                     (m->aflags & PGA_WRITEABLE) != 0) {
3560                         pvh = pa_to_pvh(m->phys_addr);
3561                         if (TAILQ_EMPTY(&pvh->pv_list))
3562                                 vm_page_aflag_clear(m, PGA_WRITEABLE);
3563                 }
3564         }
3565 }
3566
3567 /*
3568  * Destroy all managed, non-wired mappings in the given user-space
3569  * pmap.  This pmap cannot be active on any processor besides the
3570  * caller.
3571  *
3572  * This function cannot be applied to the kernel pmap.  Moreover, it
3573  * is not intended for general use.  It is only to be used during
3574  * process termination.  Consequently, it can be implemented in ways
3575  * that make it faster than pmap_remove().  First, it can more quickly
3576  * destroy mappings by iterating over the pmap's collection of PV
3577  * entries, rather than searching the page table.  Second, it doesn't
3578  * have to test and clear the page table entries atomically, because
3579  * no processor is currently accessing the user address space.  In
3580  * particular, a page table entry's dirty bit won't change state once
3581  * this function starts.
3582  */
3583 void
3584 pmap_remove_pages(pmap_t pmap)
3585 {
3586         struct spglist free;
3587         pd_entry_t ptepde;
3588         pt_entry_t *pte, tpte;
3589         vm_page_t m, mt;
3590         pv_entry_t pv;
3591         struct pv_chunk *pc, *npc;
3592         struct rwlock *lock;
3593         int64_t bit;
3594         uint64_t inuse, bitmask;
3595         int allfree, field, freed, idx;
3596         bool superpage;
3597
3598         lock = NULL;
3599
3600         SLIST_INIT(&free);
3601         rw_rlock(&pvh_global_lock);
3602         PMAP_LOCK(pmap);
3603         TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3604                 allfree = 1;
3605                 freed = 0;
3606                 for (field = 0; field < _NPCM; field++) {
3607                         inuse = ~pc->pc_map[field] & pc_freemask[field];
3608                         while (inuse != 0) {
3609                                 bit = ffsl(inuse) - 1;
3610                                 bitmask = 1UL << bit;
3611                                 idx = field * 64 + bit;
3612                                 pv = &pc->pc_pventry[idx];
3613                                 inuse &= ~bitmask;
3614
3615                                 pte = pmap_l1(pmap, pv->pv_va);
3616                                 ptepde = pmap_load(pte);
3617                                 pte = pmap_l1_to_l2(pte, pv->pv_va);
3618                                 tpte = pmap_load(pte);
3619                                 if ((tpte & PTE_RWX) != 0) {
3620                                         superpage = true;
3621                                 } else {
3622                                         ptepde = tpte;
3623                                         pte = pmap_l2_to_l3(pte, pv->pv_va);
3624                                         tpte = pmap_load(pte);
3625                                         superpage = false;
3626                                 }
3627
3628                                 /*
3629                                  * We cannot remove wired pages from a
3630                                  * process' mapping at this time.
3631                                  */
3632                                 if (tpte & PTE_SW_WIRED) {
3633                                         allfree = 0;
3634                                         continue;
3635                                 }
3636
3637                                 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3638                                 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3639                                     m < &vm_page_array[vm_page_array_size],
3640                                     ("pmap_remove_pages: bad pte %#jx",
3641                                     (uintmax_t)tpte));
3642
3643                                 pmap_clear(pte);
3644
3645                                 /*
3646                                  * Update the vm_page_t clean/reference bits.
3647                                  */
3648                                 if ((tpte & (PTE_D | PTE_W)) ==
3649                                     (PTE_D | PTE_W)) {
3650                                         if (superpage)
3651                                                 for (mt = m;
3652                                                     mt < &m[Ln_ENTRIES]; mt++)
3653                                                         vm_page_dirty(mt);
3654                                         else
3655                                                 vm_page_dirty(m);
3656                                 }
3657
3658                                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3659
3660                                 /* Mark free */
3661                                 pc->pc_map[field] |= bitmask;
3662
3663                                 pmap_remove_pages_pv(pmap, m, pv, &free,
3664                                     superpage);
3665                                 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3666                                 freed++;
3667                         }
3668                 }
3669                 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3670                 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3671                 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3672                 if (allfree) {
3673                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3674                         free_pv_chunk(pc);
3675                 }
3676         }
3677         if (lock != NULL)
3678                 rw_wunlock(lock);
3679         pmap_invalidate_all(pmap);
3680         rw_runlock(&pvh_global_lock);
3681         PMAP_UNLOCK(pmap);
3682         vm_page_free_pages_toq(&free, false);
3683 }
3684
3685 static bool
3686 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3687 {
3688         struct md_page *pvh;
3689         struct rwlock *lock;
3690         pd_entry_t *l2;
3691         pt_entry_t *l3, mask;
3692         pv_entry_t pv;
3693         pmap_t pmap;
3694         int md_gen, pvh_gen;
3695         bool rv;
3696
3697         mask = 0;
3698         if (modified)
3699                 mask |= PTE_D;
3700         if (accessed)
3701                 mask |= PTE_A;
3702
3703         rv = FALSE;
3704         rw_rlock(&pvh_global_lock);
3705         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3706         rw_rlock(lock);
3707 restart:
3708         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3709                 pmap = PV_PMAP(pv);
3710                 if (!PMAP_TRYLOCK(pmap)) {
3711                         md_gen = m->md.pv_gen;
3712                         rw_runlock(lock);
3713                         PMAP_LOCK(pmap);
3714                         rw_rlock(lock);
3715                         if (md_gen != m->md.pv_gen) {
3716                                 PMAP_UNLOCK(pmap);
3717                                 goto restart;
3718                         }
3719                 }
3720                 l3 = pmap_l3(pmap, pv->pv_va);
3721                 rv = (pmap_load(l3) & mask) == mask;
3722                 PMAP_UNLOCK(pmap);
3723                 if (rv)
3724                         goto out;
3725         }
3726         if ((m->flags & PG_FICTITIOUS) == 0) {
3727                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3728                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3729                         pmap = PV_PMAP(pv);
3730                         if (!PMAP_TRYLOCK(pmap)) {
3731                                 md_gen = m->md.pv_gen;
3732                                 pvh_gen = pvh->pv_gen;
3733                                 rw_runlock(lock);
3734                                 PMAP_LOCK(pmap);
3735                                 rw_rlock(lock);
3736                                 if (md_gen != m->md.pv_gen ||
3737                                     pvh_gen != pvh->pv_gen) {
3738                                         PMAP_UNLOCK(pmap);
3739                                         goto restart;
3740                                 }
3741                         }
3742                         l2 = pmap_l2(pmap, pv->pv_va);
3743                         rv = (pmap_load(l2) & mask) == mask;
3744                         PMAP_UNLOCK(pmap);
3745                         if (rv)
3746                                 goto out;
3747                 }
3748         }
3749 out:
3750         rw_runlock(lock);
3751         rw_runlock(&pvh_global_lock);
3752         return (rv);
3753 }
3754
3755 /*
3756  *      pmap_is_modified:
3757  *
3758  *      Return whether or not the specified physical page was modified
3759  *      in any physical maps.
3760  */
3761 boolean_t
3762 pmap_is_modified(vm_page_t m)
3763 {
3764
3765         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3766             ("pmap_is_modified: page %p is not managed", m));
3767
3768         /*
3769          * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3770          * concurrently set while the object is locked.  Thus, if PGA_WRITEABLE
3771          * is clear, no PTEs can have PG_M set.
3772          */
3773         VM_OBJECT_ASSERT_WLOCKED(m->object);
3774         if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3775                 return (FALSE);
3776         return (pmap_page_test_mappings(m, FALSE, TRUE));
3777 }
3778
3779 /*
3780  *      pmap_is_prefaultable:
3781  *
3782  *      Return whether or not the specified virtual address is eligible
3783  *      for prefault.
3784  */
3785 boolean_t
3786 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3787 {
3788         pt_entry_t *l3;
3789         boolean_t rv;
3790
3791         rv = FALSE;
3792         PMAP_LOCK(pmap);
3793         l3 = pmap_l3(pmap, addr);
3794         if (l3 != NULL && pmap_load(l3) != 0) {
3795                 rv = TRUE;
3796         }
3797         PMAP_UNLOCK(pmap);
3798         return (rv);
3799 }
3800
3801 /*
3802  *      pmap_is_referenced:
3803  *
3804  *      Return whether or not the specified physical page was referenced
3805  *      in any physical maps.
3806  */
3807 boolean_t
3808 pmap_is_referenced(vm_page_t m)
3809 {
3810
3811         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3812             ("pmap_is_referenced: page %p is not managed", m));
3813         return (pmap_page_test_mappings(m, TRUE, FALSE));
3814 }
3815
3816 /*
3817  * Clear the write and modified bits in each of the given page's mappings.
3818  */
3819 void
3820 pmap_remove_write(vm_page_t m)
3821 {
3822         struct md_page *pvh;
3823         struct rwlock *lock;
3824         pmap_t pmap;
3825         pd_entry_t *l2;
3826         pt_entry_t *l3, oldl3, newl3;
3827         pv_entry_t next_pv, pv;
3828         vm_offset_t va;
3829         int md_gen, pvh_gen;
3830
3831         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3832             ("pmap_remove_write: page %p is not managed", m));
3833
3834         /*
3835          * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3836          * set by another thread while the object is locked.  Thus,
3837          * if PGA_WRITEABLE is clear, no page table entries need updating.
3838          */
3839         VM_OBJECT_ASSERT_WLOCKED(m->object);
3840         if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3841                 return;
3842         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3843         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3844             pa_to_pvh(VM_PAGE_TO_PHYS(m));
3845         rw_rlock(&pvh_global_lock);
3846 retry_pv_loop:
3847         rw_wlock(lock);
3848         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3849                 pmap = PV_PMAP(pv);
3850                 if (!PMAP_TRYLOCK(pmap)) {
3851                         pvh_gen = pvh->pv_gen;
3852                         rw_wunlock(lock);
3853                         PMAP_LOCK(pmap);
3854                         rw_wlock(lock);
3855                         if (pvh_gen != pvh->pv_gen) {
3856                                 PMAP_UNLOCK(pmap);
3857                                 rw_wunlock(lock);
3858                                 goto retry_pv_loop;
3859                         }
3860                 }
3861                 va = pv->pv_va;
3862                 l2 = pmap_l2(pmap, va);
3863                 if ((pmap_load(l2) & PTE_W) != 0)
3864                         (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3865                 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3866                     ("inconsistent pv lock %p %p for page %p",
3867                     lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3868                 PMAP_UNLOCK(pmap);
3869         }
3870         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3871                 pmap = PV_PMAP(pv);
3872                 if (!PMAP_TRYLOCK(pmap)) {
3873                         pvh_gen = pvh->pv_gen;
3874                         md_gen = m->md.pv_gen;
3875                         rw_wunlock(lock);
3876                         PMAP_LOCK(pmap);
3877                         rw_wlock(lock);
3878                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3879                                 PMAP_UNLOCK(pmap);
3880                                 rw_wunlock(lock);
3881                                 goto retry_pv_loop;
3882                         }
3883                 }
3884                 l3 = pmap_l3(pmap, pv->pv_va);
3885                 oldl3 = pmap_load(l3);
3886 retry:
3887                 if ((oldl3 & PTE_W) != 0) {
3888                         newl3 = oldl3 & ~(PTE_D | PTE_W);
3889                         if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3890                                 goto retry;
3891                         if ((oldl3 & PTE_D) != 0)
3892                                 vm_page_dirty(m);
3893                         pmap_invalidate_page(pmap, pv->pv_va);
3894                 }
3895                 PMAP_UNLOCK(pmap);
3896         }
3897         rw_wunlock(lock);
3898         vm_page_aflag_clear(m, PGA_WRITEABLE);
3899         rw_runlock(&pvh_global_lock);
3900 }
3901
3902 /*
3903  *      pmap_ts_referenced:
3904  *
3905  *      Return a count of reference bits for a page, clearing those bits.
3906  *      It is not necessary for every reference bit to be cleared, but it
3907  *      is necessary that 0 only be returned when there are truly no
3908  *      reference bits set.
3909  *
3910  *      As an optimization, update the page's dirty field if a modified bit is
3911  *      found while counting reference bits.  This opportunistic update can be
3912  *      performed at low cost and can eliminate the need for some future calls
3913  *      to pmap_is_modified().  However, since this function stops after
3914  *      finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3915  *      dirty pages.  Those dirty pages will only be detected by a future call
3916  *      to pmap_is_modified().
3917  */
3918 int
3919 pmap_ts_referenced(vm_page_t m)
3920 {
3921         struct spglist free;
3922         struct md_page *pvh;
3923         struct rwlock *lock;
3924         pv_entry_t pv, pvf;
3925         pmap_t pmap;
3926         pd_entry_t *l2, l2e;
3927         pt_entry_t *l3, l3e;
3928         vm_paddr_t pa;
3929         vm_offset_t va;
3930         int md_gen, pvh_gen, ret;
3931
3932         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3933             ("pmap_ts_referenced: page %p is not managed", m));
3934         SLIST_INIT(&free);
3935         ret = 0;
3936         pa = VM_PAGE_TO_PHYS(m);
3937         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3938
3939         lock = PHYS_TO_PV_LIST_LOCK(pa);
3940         rw_rlock(&pvh_global_lock);
3941         rw_wlock(lock);
3942 retry:
3943         if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3944                 goto small_mappings;
3945         pv = pvf;
3946         do {
3947                 pmap = PV_PMAP(pv);
3948                 if (!PMAP_TRYLOCK(pmap)) {
3949                         pvh_gen = pvh->pv_gen;
3950                         rw_wunlock(lock);
3951                         PMAP_LOCK(pmap);
3952                         rw_wlock(lock);
3953                         if (pvh_gen != pvh->pv_gen) {
3954                                 PMAP_UNLOCK(pmap);
3955                                 goto retry;
3956                         }
3957                 }
3958                 va = pv->pv_va;
3959                 l2 = pmap_l2(pmap, va);
3960                 l2e = pmap_load(l2);
3961                 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3962                         /*
3963                          * Although l2e is mapping a 2MB page, because
3964                          * this function is called at a 4KB page granularity,
3965                          * we only update the 4KB page under test.
3966                          */
3967                         vm_page_dirty(m);
3968                 }
3969                 if ((l2e & PTE_A) != 0) {
3970                         /*
3971                          * Since this reference bit is shared by 512 4KB
3972                          * pages, it should not be cleared every time it is
3973                          * tested.  Apply a simple "hash" function on the
3974                          * physical page number, the virtual superpage number,
3975                          * and the pmap address to select one 4KB page out of
3976                          * the 512 on which testing the reference bit will
3977                          * result in clearing that reference bit.  This
3978                          * function is designed to avoid the selection of the
3979                          * same 4KB page for every 2MB page mapping.
3980                          *
3981                          * On demotion, a mapping that hasn't been referenced
3982                          * is simply destroyed.  To avoid the possibility of a
3983                          * subsequent page fault on a demoted wired mapping,
3984                          * always leave its reference bit set.  Moreover,
3985                          * since the superpage is wired, the current state of
3986                          * its reference bit won't affect page replacement.
3987                          */
3988                         if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
3989                             (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
3990                             (l2e & PTE_SW_WIRED) == 0) {
3991                                 pmap_clear_bits(l2, PTE_A);
3992                                 pmap_invalidate_page(pmap, va);
3993                         }
3994                         ret++;
3995                 }
3996                 PMAP_UNLOCK(pmap);
3997                 /* Rotate the PV list if it has more than one entry. */
3998                 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3999                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4000                         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4001                         pvh->pv_gen++;
4002                 }
4003                 if (ret >= PMAP_TS_REFERENCED_MAX)
4004                         goto out;
4005         } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4006 small_mappings:
4007         if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4008                 goto out;
4009         pv = pvf;
4010         do {
4011                 pmap = PV_PMAP(pv);
4012                 if (!PMAP_TRYLOCK(pmap)) {
4013                         pvh_gen = pvh->pv_gen;
4014                         md_gen = m->md.pv_gen;
4015                         rw_wunlock(lock);
4016                         PMAP_LOCK(pmap);
4017                         rw_wlock(lock);
4018                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4019                                 PMAP_UNLOCK(pmap);
4020                                 goto retry;
4021                         }
4022                 }
4023                 l2 = pmap_l2(pmap, pv->pv_va);
4024
4025                 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4026                     ("pmap_ts_referenced: found an invalid l2 table"));
4027
4028                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4029                 l3e = pmap_load(l3);
4030                 if ((l3e & PTE_D) != 0)
4031                         vm_page_dirty(m);
4032                 if ((l3e & PTE_A) != 0) {
4033                         if ((l3e & PTE_SW_WIRED) == 0) {
4034                                 /*
4035                                  * Wired pages cannot be paged out so
4036                                  * doing accessed bit emulation for
4037                                  * them is wasted effort. We do the
4038                                  * hard work for unwired pages only.
4039                                  */
4040                                 pmap_clear_bits(l3, PTE_A);
4041                                 pmap_invalidate_page(pmap, pv->pv_va);
4042                         }
4043                         ret++;
4044                 }
4045                 PMAP_UNLOCK(pmap);
4046                 /* Rotate the PV list if it has more than one entry. */
4047                 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4048                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4049                         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4050                         m->md.pv_gen++;
4051                 }
4052         } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && ret <
4053             PMAP_TS_REFERENCED_MAX);
4054 out:
4055         rw_wunlock(lock);
4056         rw_runlock(&pvh_global_lock);
4057         vm_page_free_pages_toq(&free, false);
4058         return (ret);
4059 }
4060
4061 /*
4062  *      Apply the given advice to the specified range of addresses within the
4063  *      given pmap.  Depending on the advice, clear the referenced and/or
4064  *      modified flags in each mapping and set the mapped page's dirty field.
4065  */
4066 void
4067 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4068 {
4069 }
4070
4071 /*
4072  *      Clear the modify bits on the specified physical page.
4073  */
4074 void
4075 pmap_clear_modify(vm_page_t m)
4076 {
4077         struct md_page *pvh;
4078         struct rwlock *lock;
4079         pmap_t pmap;
4080         pv_entry_t next_pv, pv;
4081         pd_entry_t *l2, oldl2;
4082         pt_entry_t *l3, oldl3;
4083         vm_offset_t va;
4084         int md_gen, pvh_gen;
4085
4086         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4087             ("pmap_clear_modify: page %p is not managed", m));
4088         VM_OBJECT_ASSERT_WLOCKED(m->object);
4089         KASSERT(!vm_page_xbusied(m),
4090             ("pmap_clear_modify: page %p is exclusive busied", m));
4091
4092         /*
4093          * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4094          * If the object containing the page is locked and the page is not
4095          * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4096          */
4097         if ((m->aflags & PGA_WRITEABLE) == 0)
4098                 return;
4099         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4100             pa_to_pvh(VM_PAGE_TO_PHYS(m));
4101         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4102         rw_rlock(&pvh_global_lock);
4103         rw_wlock(lock);
4104 restart:
4105         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4106                 pmap = PV_PMAP(pv);
4107                 if (!PMAP_TRYLOCK(pmap)) {
4108                         pvh_gen = pvh->pv_gen;
4109                         rw_wunlock(lock);
4110                         PMAP_LOCK(pmap);
4111                         rw_wlock(lock);
4112                         if (pvh_gen != pvh->pv_gen) {
4113                                 PMAP_UNLOCK(pmap);
4114                                 goto restart;
4115                         }
4116                 }
4117                 va = pv->pv_va;
4118                 l2 = pmap_l2(pmap, va);
4119                 oldl2 = pmap_load(l2);
4120                 if ((oldl2 & PTE_W) != 0) {
4121                         if (pmap_demote_l2_locked(pmap, l2, va, &lock)) {
4122                                 if ((oldl2 & PTE_SW_WIRED) == 0) {
4123                                         /*
4124                                          * Write protect the mapping to a
4125                                          * single page so that a subsequent
4126                                          * write access may repromote.
4127                                          */
4128                                         va += VM_PAGE_TO_PHYS(m) -
4129                                             PTE_TO_PHYS(oldl2);
4130                                         l3 = pmap_l2_to_l3(l2, va);
4131                                         oldl3 = pmap_load(l3);
4132                                         if ((oldl3 & PTE_V) != 0) {
4133                                                 while (!atomic_fcmpset_long(l3,
4134                                                     &oldl3, oldl3 & ~(PTE_D |
4135                                                     PTE_W)))
4136                                                         cpu_spinwait();
4137                                                 vm_page_dirty(m);
4138                                                 pmap_invalidate_page(pmap, va);
4139                                         }
4140                                 }
4141                         }
4142                 }
4143                 PMAP_UNLOCK(pmap);
4144         }
4145         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4146                 pmap = PV_PMAP(pv);
4147                 if (!PMAP_TRYLOCK(pmap)) {
4148                         md_gen = m->md.pv_gen;
4149                         pvh_gen = pvh->pv_gen;
4150                         rw_wunlock(lock);
4151                         PMAP_LOCK(pmap);
4152                         rw_wlock(lock);
4153                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4154                                 PMAP_UNLOCK(pmap);
4155                                 goto restart;
4156                         }
4157                 }
4158                 l2 = pmap_l2(pmap, pv->pv_va);
4159                 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4160                     ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4161                     m));
4162                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4163                 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4164                         pmap_clear_bits(l3, PTE_D);
4165                         pmap_invalidate_page(pmap, pv->pv_va);
4166                 }
4167                 PMAP_UNLOCK(pmap);
4168         }
4169         rw_wunlock(lock);
4170         rw_runlock(&pvh_global_lock);
4171 }
4172
4173 void *
4174 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4175 {
4176
4177         return ((void *)PHYS_TO_DMAP(pa));
4178 }
4179
4180 void
4181 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4182 {
4183 }
4184
4185 /*
4186  * Sets the memory attribute for the specified page.
4187  */
4188 void
4189 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4190 {
4191
4192         m->md.pv_memattr = ma;
4193 }
4194
4195 /*
4196  * perform the pmap work for mincore
4197  */
4198 int
4199 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4200 {
4201         pt_entry_t *l2, *l3, tpte;
4202         vm_paddr_t pa;
4203         int val;
4204         bool managed;
4205
4206         PMAP_LOCK(pmap);
4207 retry:
4208         managed = false;
4209         val = 0;
4210
4211         l2 = pmap_l2(pmap, addr);
4212         if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4213                 if ((tpte & PTE_RWX) != 0) {
4214                         pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4215                         val = MINCORE_INCORE | MINCORE_SUPER;
4216                 } else {
4217                         l3 = pmap_l2_to_l3(l2, addr);
4218                         tpte = pmap_load(l3);
4219                         if ((tpte & PTE_V) == 0)
4220                                 goto done;
4221                         pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4222                         val = MINCORE_INCORE;
4223                 }
4224
4225                 if ((tpte & PTE_D) != 0)
4226                         val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4227                 if ((tpte & PTE_A) != 0)
4228                         val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4229                 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4230         }
4231
4232 done:
4233         if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4234             (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4235                 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4236                 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4237                         goto retry;
4238         } else
4239                 PA_UNLOCK_COND(*locked_pa);
4240         PMAP_UNLOCK(pmap);
4241         return (val);
4242 }
4243
4244 void
4245 pmap_activate(struct thread *td)
4246 {
4247         pmap_t pmap;
4248         uint64_t reg;
4249
4250         critical_enter();
4251         pmap = vmspace_pmap(td->td_proc->p_vmspace);
4252         td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
4253
4254         reg = SATP_MODE_SV39;
4255         reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
4256         load_satp(reg);
4257
4258         pmap_invalidate_all(pmap);
4259         critical_exit();
4260 }
4261
4262 void
4263 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
4264 {
4265         cpuset_t mask;
4266
4267         /*
4268          * From the RISC-V User-Level ISA V2.2:
4269          *
4270          * "To make a store to instruction memory visible to all
4271          * RISC-V harts, the writing hart has to execute a data FENCE
4272          * before requesting that all remote RISC-V harts execute a
4273          * FENCE.I."
4274          */
4275         sched_pin();
4276         mask = all_cpus;
4277         CPU_CLR(PCPU_GET(cpuid), &mask);
4278         fence();
4279         sbi_remote_fence_i(mask.__bits);
4280         sched_unpin();
4281 }
4282
4283 /*
4284  *      Increase the starting virtual address of the given mapping if a
4285  *      different alignment might result in more superpage mappings.
4286  */
4287 void
4288 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4289     vm_offset_t *addr, vm_size_t size)
4290 {
4291         vm_offset_t superpage_offset;
4292
4293         if (size < L2_SIZE)
4294                 return;
4295         if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4296                 offset += ptoa(object->pg_color);
4297         superpage_offset = offset & L2_OFFSET;
4298         if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4299             (*addr & L2_OFFSET) == superpage_offset)
4300                 return;
4301         if ((*addr & L2_OFFSET) < superpage_offset)
4302                 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4303         else
4304                 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4305 }
4306
4307 /**
4308  * Get the kernel virtual address of a set of physical pages. If there are
4309  * physical addresses not covered by the DMAP perform a transient mapping
4310  * that will be removed when calling pmap_unmap_io_transient.
4311  *
4312  * \param page        The pages the caller wishes to obtain the virtual
4313  *                    address on the kernel memory map.
4314  * \param vaddr       On return contains the kernel virtual memory address
4315  *                    of the pages passed in the page parameter.
4316  * \param count       Number of pages passed in.
4317  * \param can_fault   TRUE if the thread using the mapped pages can take
4318  *                    page faults, FALSE otherwise.
4319  *
4320  * \returns TRUE if the caller must call pmap_unmap_io_transient when
4321  *          finished or FALSE otherwise.
4322  *
4323  */
4324 boolean_t
4325 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4326     boolean_t can_fault)
4327 {
4328         vm_paddr_t paddr;
4329         boolean_t needs_mapping;
4330         int error, i;
4331
4332         /*
4333          * Allocate any KVA space that we need, this is done in a separate
4334          * loop to prevent calling vmem_alloc while pinned.
4335          */
4336         needs_mapping = FALSE;
4337         for (i = 0; i < count; i++) {
4338                 paddr = VM_PAGE_TO_PHYS(page[i]);
4339                 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4340                         error = vmem_alloc(kernel_arena, PAGE_SIZE,
4341                             M_BESTFIT | M_WAITOK, &vaddr[i]);
4342                         KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4343                         needs_mapping = TRUE;
4344                 } else {
4345                         vaddr[i] = PHYS_TO_DMAP(paddr);
4346                 }
4347         }
4348
4349         /* Exit early if everything is covered by the DMAP */
4350         if (!needs_mapping)
4351                 return (FALSE);
4352
4353         if (!can_fault)
4354                 sched_pin();
4355         for (i = 0; i < count; i++) {
4356                 paddr = VM_PAGE_TO_PHYS(page[i]);
4357                 if (paddr >= DMAP_MAX_PHYSADDR) {
4358                         panic(
4359                            "pmap_map_io_transient: TODO: Map out of DMAP data");
4360                 }
4361         }
4362
4363         return (needs_mapping);
4364 }
4365
4366 void
4367 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4368     boolean_t can_fault)
4369 {
4370         vm_paddr_t paddr;
4371         int i;
4372
4373         if (!can_fault)
4374                 sched_unpin();
4375         for (i = 0; i < count; i++) {
4376                 paddr = VM_PAGE_TO_PHYS(page[i]);
4377                 if (paddr >= DMAP_MAX_PHYSADDR) {
4378                         panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4379                 }
4380         }
4381 }
4382
4383 boolean_t
4384 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4385 {
4386
4387         return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4388 }