2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/bitstring.h>
123 #include <sys/systm.h>
124 #include <sys/kernel.h>
126 #include <sys/lock.h>
127 #include <sys/malloc.h>
128 #include <sys/mman.h>
129 #include <sys/msgbuf.h>
130 #include <sys/mutex.h>
131 #include <sys/proc.h>
132 #include <sys/rwlock.h>
134 #include <sys/vmem.h>
135 #include <sys/vmmeter.h>
136 #include <sys/sched.h>
137 #include <sys/sysctl.h>
141 #include <vm/vm_param.h>
142 #include <vm/vm_kern.h>
143 #include <vm/vm_page.h>
144 #include <vm/vm_map.h>
145 #include <vm/vm_object.h>
146 #include <vm/vm_extern.h>
147 #include <vm/vm_pageout.h>
148 #include <vm/vm_pager.h>
149 #include <vm/vm_phys.h>
150 #include <vm/vm_radix.h>
151 #include <vm/vm_reserv.h>
154 #include <machine/machdep.h>
155 #include <machine/md_var.h>
156 #include <machine/pcb.h>
157 #include <machine/sbi.h>
159 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
160 #define NUL2E (Ln_ENTRIES * NUL1E)
162 #if !defined(DIAGNOSTIC)
163 #ifdef __GNUC_GNU_INLINE__
164 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
166 #define PMAP_INLINE extern inline
173 #define PV_STAT(x) do { x ; } while (0)
175 #define PV_STAT(x) do { } while (0)
178 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
179 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
181 #define NPV_LIST_LOCKS MAXCPU
183 #define PHYS_TO_PV_LIST_LOCK(pa) \
184 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
186 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
187 struct rwlock **_lockp = (lockp); \
188 struct rwlock *_new_lock; \
190 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
191 if (_new_lock != *_lockp) { \
192 if (*_lockp != NULL) \
193 rw_wunlock(*_lockp); \
194 *_lockp = _new_lock; \
199 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
200 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
202 #define RELEASE_PV_LIST_LOCK(lockp) do { \
203 struct rwlock **_lockp = (lockp); \
205 if (*_lockp != NULL) { \
206 rw_wunlock(*_lockp); \
211 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
212 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
214 /* The list of all the user pmaps */
215 LIST_HEAD(pmaplist, pmap);
216 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
218 struct pmap kernel_pmap_store;
220 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
221 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
222 vm_offset_t kernel_vm_end = 0;
224 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
225 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
226 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
228 /* This code assumes all L1 DMAP entries will be used */
229 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
230 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
232 static struct rwlock_padalign pvh_global_lock;
233 static struct mtx_padalign allpmaps_lock;
235 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
236 "VM/pmap parameters");
238 static int superpages_enabled = 1;
239 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
240 CTLFLAG_RDTUN, &superpages_enabled, 0,
241 "Enable support for transparent superpages");
243 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
244 "2MB page mapping counters");
246 static u_long pmap_l2_demotions;
247 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
248 &pmap_l2_demotions, 0,
249 "2MB page demotions");
251 static u_long pmap_l2_mappings;
252 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
253 &pmap_l2_mappings, 0,
254 "2MB page mappings");
256 static u_long pmap_l2_p_failures;
257 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
258 &pmap_l2_p_failures, 0,
259 "2MB page promotion failures");
261 static u_long pmap_l2_promotions;
262 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
263 &pmap_l2_promotions, 0,
264 "2MB page promotions");
267 * Data for the pv entry allocation mechanism
269 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
270 static struct mtx pv_chunks_mutex;
271 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
272 static struct md_page *pv_table;
273 static struct md_page pv_dummy;
276 * Internal flags for pmap_enter()'s helper functions.
278 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
279 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
281 static void free_pv_chunk(struct pv_chunk *pc);
282 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
283 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
284 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
285 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
286 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
288 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
289 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
290 vm_offset_t va, struct rwlock **lockp);
291 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
292 u_int flags, vm_page_t m, struct rwlock **lockp);
293 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
294 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
295 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
296 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
297 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
298 vm_page_t m, struct rwlock **lockp);
300 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
301 struct rwlock **lockp);
303 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
304 struct spglist *free);
305 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
307 #define pmap_clear(pte) pmap_store(pte, 0)
308 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
309 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
310 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
311 #define pmap_load(pte) atomic_load_64(pte)
312 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
313 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
315 /********************/
316 /* Inline functions */
317 /********************/
320 pagecopy(void *s, void *d)
323 memcpy(d, s, PAGE_SIZE);
333 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
334 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
335 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
337 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
339 static __inline pd_entry_t *
340 pmap_l1(pmap_t pmap, vm_offset_t va)
343 return (&pmap->pm_l1[pmap_l1_index(va)]);
346 static __inline pd_entry_t *
347 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
352 phys = PTE_TO_PHYS(pmap_load(l1));
353 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
355 return (&l2[pmap_l2_index(va)]);
358 static __inline pd_entry_t *
359 pmap_l2(pmap_t pmap, vm_offset_t va)
363 l1 = pmap_l1(pmap, va);
364 if ((pmap_load(l1) & PTE_V) == 0)
366 if ((pmap_load(l1) & PTE_RX) != 0)
369 return (pmap_l1_to_l2(l1, va));
372 static __inline pt_entry_t *
373 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
378 phys = PTE_TO_PHYS(pmap_load(l2));
379 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
381 return (&l3[pmap_l3_index(va)]);
384 static __inline pt_entry_t *
385 pmap_l3(pmap_t pmap, vm_offset_t va)
389 l2 = pmap_l2(pmap, va);
392 if ((pmap_load(l2) & PTE_V) == 0)
394 if ((pmap_load(l2) & PTE_RX) != 0)
397 return (pmap_l2_to_l3(l2, va));
401 pmap_resident_count_inc(pmap_t pmap, int count)
404 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
405 pmap->pm_stats.resident_count += count;
409 pmap_resident_count_dec(pmap_t pmap, int count)
412 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
413 KASSERT(pmap->pm_stats.resident_count >= count,
414 ("pmap %p resident count underflow %ld %d", pmap,
415 pmap->pm_stats.resident_count, count));
416 pmap->pm_stats.resident_count -= count;
420 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
423 struct pmap *user_pmap;
426 /* Distribute new kernel L1 entry to all the user pmaps */
427 if (pmap != kernel_pmap)
430 mtx_lock(&allpmaps_lock);
431 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
432 l1 = &user_pmap->pm_l1[l1index];
433 pmap_store(l1, entry);
435 mtx_unlock(&allpmaps_lock);
439 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
445 l1 = (pd_entry_t *)l1pt;
446 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
448 /* Check locore has used a table L1 map */
449 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
450 ("Invalid bootstrap L1 table"));
452 /* Find the address of the L2 table */
453 l2 = (pt_entry_t *)init_pt_va;
454 *l2_slot = pmap_l2_index(va);
460 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
462 u_int l1_slot, l2_slot;
466 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
468 /* Check locore has used L2 superpages */
469 KASSERT((l2[l2_slot] & PTE_RX) != 0,
470 ("Invalid bootstrap L2 table"));
472 /* L2 is superpages */
473 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
474 ret += (va & L2_OFFSET);
480 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
489 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
490 va = DMAP_MIN_ADDRESS;
491 l1 = (pd_entry_t *)kern_l1;
492 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
494 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
495 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
496 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
499 pn = (pa / PAGE_SIZE);
501 entry |= (pn << PTE_PPN0_S);
502 pmap_store(&l1[l1_slot], entry);
505 /* Set the upper limit of the DMAP region */
513 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
522 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
524 l2 = pmap_l2(kernel_pmap, va);
525 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
526 l2_slot = pmap_l2_index(va);
529 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
530 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
532 pa = pmap_early_vtophys(l1pt, l3pt);
533 pn = (pa / PAGE_SIZE);
535 entry |= (pn << PTE_PPN0_S);
536 pmap_store(&l2[l2_slot], entry);
541 /* Clean the L2 page table */
542 memset((void *)l3_start, 0, l3pt - l3_start);
548 * Bootstrap the system enough to run with virtual memory.
551 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
553 u_int l1_slot, l2_slot, avail_slot, map_slot;
554 vm_offset_t freemempos;
555 vm_offset_t dpcpu, msgbufpv;
556 vm_paddr_t end, max_pa, min_pa, pa, start;
559 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
560 printf("%lx\n", l1pt);
561 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
563 /* Set this early so we can use the pagetable walking functions */
564 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
565 PMAP_LOCK_INIT(kernel_pmap);
567 rw_init(&pvh_global_lock, "pmap pv global");
569 /* Assume the address we were loaded to is a valid physical address. */
570 min_pa = max_pa = kernstart;
573 * Find the minimum physical address. physmap is sorted,
574 * but may contain empty ranges.
576 for (i = 0; i < physmap_idx * 2; i += 2) {
577 if (physmap[i] == physmap[i + 1])
579 if (physmap[i] <= min_pa)
581 if (physmap[i + 1] > max_pa)
582 max_pa = physmap[i + 1];
584 printf("physmap_idx %lx\n", physmap_idx);
585 printf("min_pa %lx\n", min_pa);
586 printf("max_pa %lx\n", max_pa);
588 /* Create a direct map region early so we can use it for pa -> va */
589 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
592 * Read the page table to find out what is already mapped.
593 * This assumes we have mapped a block of memory from KERNBASE
594 * using a single L1 entry.
596 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
598 /* Sanity check the index, KERNBASE should be the first VA */
599 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
601 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
603 /* Create the l3 tables for the early devmap */
604 freemempos = pmap_bootstrap_l3(l1pt,
605 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
609 #define alloc_pages(var, np) \
610 (var) = freemempos; \
611 freemempos += (np * PAGE_SIZE); \
612 memset((char *)(var), 0, ((np) * PAGE_SIZE));
614 /* Allocate dynamic per-cpu area. */
615 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
616 dpcpu_init((void *)dpcpu, 0);
618 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
619 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
620 msgbufp = (void *)msgbufpv;
622 virtual_avail = roundup2(freemempos, L2_SIZE);
623 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
624 kernel_vm_end = virtual_avail;
626 pa = pmap_early_vtophys(l1pt, freemempos);
628 /* Initialize phys_avail. */
629 for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
631 start = physmap[map_slot];
632 end = physmap[map_slot + 1];
636 if (start >= kernstart && end <= pa)
639 if (start < kernstart && end > kernstart)
641 else if (start < pa && end > pa)
643 phys_avail[avail_slot] = start;
644 phys_avail[avail_slot + 1] = end;
645 physmem += (end - start) >> PAGE_SHIFT;
648 if (end != physmap[map_slot + 1] && end > pa) {
649 phys_avail[avail_slot] = pa;
650 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
651 physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
655 phys_avail[avail_slot] = 0;
656 phys_avail[avail_slot + 1] = 0;
659 * Maxmem isn't the "maximum memory", it's one larger than the
660 * highest page of the physical address space. It should be
661 * called something like "Maxphyspage".
663 Maxmem = atop(phys_avail[avail_slot - 1]);
667 * Initialize a vm_page's machine-dependent fields.
670 pmap_page_init(vm_page_t m)
673 TAILQ_INIT(&m->md.pv_list);
674 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
678 * Initialize the pmap module.
679 * Called by vm_init, to initialize any structures that the pmap
680 * system needs to map virtual memory.
689 * Initialize the pv chunk and pmap list mutexes.
691 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
692 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
695 * Initialize the pool of pv list locks.
697 for (i = 0; i < NPV_LIST_LOCKS; i++)
698 rw_init(&pv_list_locks[i], "pmap pv list");
701 * Calculate the size of the pv head table for superpages.
703 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
706 * Allocate memory for the pv head table for superpages.
708 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
710 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
711 for (i = 0; i < pv_npg; i++)
712 TAILQ_INIT(&pv_table[i].pv_list);
713 TAILQ_INIT(&pv_dummy.pv_list);
715 if (superpages_enabled)
716 pagesizes[1] = L2_SIZE;
721 * For SMP, these functions have to use IPIs for coherence.
723 * In general, the calling thread uses a plain fence to order the
724 * writes to the page tables before invoking an SBI callback to invoke
725 * sfence_vma() on remote CPUs.
727 * Since the riscv pmap does not yet have a pm_active field, IPIs are
728 * sent to all CPUs in the system.
731 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
737 CPU_CLR(PCPU_GET(cpuid), &mask);
739 sbi_remote_sfence_vma(mask.__bits, va, 1);
745 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
751 CPU_CLR(PCPU_GET(cpuid), &mask);
753 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
756 * Might consider a loop of sfence_vma_page() for a small
757 * number of pages in the future.
764 pmap_invalidate_all(pmap_t pmap)
770 CPU_CLR(PCPU_GET(cpuid), &mask);
774 * XXX: The SBI doc doesn't detail how to specify x0 as the
775 * address to perform a global fence. BBL currently treats
776 * all sfence_vma requests as global however.
778 sbi_remote_sfence_vma(mask.__bits, 0, 0);
784 * Normal, non-SMP, invalidation functions.
785 * We inline these within pmap.c for speed.
788 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
795 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
799 * Might consider a loop of sfence_vma_page() for a small
800 * number of pages in the future.
806 pmap_invalidate_all(pmap_t pmap)
814 * Routine: pmap_extract
816 * Extract the physical page address associated
817 * with the given map/virtual_address pair.
820 pmap_extract(pmap_t pmap, vm_offset_t va)
829 * Start with the l2 tabel. We are unable to allocate
830 * pages in the l1 table.
832 l2p = pmap_l2(pmap, va);
835 if ((l2 & PTE_RX) == 0) {
836 l3p = pmap_l2_to_l3(l2p, va);
839 pa = PTE_TO_PHYS(l3);
840 pa |= (va & L3_OFFSET);
843 /* L2 is superpages */
844 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
845 pa |= (va & L2_OFFSET);
853 * Routine: pmap_extract_and_hold
855 * Atomically extract and hold the physical page
856 * with the given pmap and virtual address pair
857 * if that mapping permits the given protection.
860 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
871 l3p = pmap_l3(pmap, va);
872 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
873 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
874 phys = PTE_TO_PHYS(l3);
875 if (vm_page_pa_tryrelock(pmap, phys, &pa))
877 m = PHYS_TO_VM_PAGE(phys);
887 pmap_kextract(vm_offset_t va)
893 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
894 pa = DMAP_TO_PHYS(va);
896 l2 = pmap_l2(kernel_pmap, va);
898 panic("pmap_kextract: No l2");
899 if ((pmap_load(l2) & PTE_RX) != 0) {
901 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
902 pa |= (va & L2_OFFSET);
906 l3 = pmap_l2_to_l3(l2, va);
908 panic("pmap_kextract: No l3...");
909 pa = PTE_TO_PHYS(pmap_load(l3));
910 pa |= (va & PAGE_MASK);
915 /***************************************************
916 * Low level mapping routines.....
917 ***************************************************/
920 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
927 KASSERT((pa & L3_OFFSET) == 0,
928 ("pmap_kenter_device: Invalid physical address"));
929 KASSERT((sva & L3_OFFSET) == 0,
930 ("pmap_kenter_device: Invalid virtual address"));
931 KASSERT((size & PAGE_MASK) == 0,
932 ("pmap_kenter_device: Mapping is not page-sized"));
936 l3 = pmap_l3(kernel_pmap, va);
937 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
939 pn = (pa / PAGE_SIZE);
941 entry |= (pn << PTE_PPN0_S);
942 pmap_store(l3, entry);
948 pmap_invalidate_range(kernel_pmap, sva, va);
952 * Remove a page from the kernel pagetables.
953 * Note: not SMP coherent.
956 pmap_kremove(vm_offset_t va)
960 l3 = pmap_l3(kernel_pmap, va);
961 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
968 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
973 KASSERT((sva & L3_OFFSET) == 0,
974 ("pmap_kremove_device: Invalid virtual address"));
975 KASSERT((size & PAGE_MASK) == 0,
976 ("pmap_kremove_device: Mapping is not page-sized"));
980 l3 = pmap_l3(kernel_pmap, va);
981 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
988 pmap_invalidate_range(kernel_pmap, sva, va);
992 * Used to map a range of physical addresses into kernel
993 * virtual address space.
995 * The value passed in '*virt' is a suggested virtual address for
996 * the mapping. Architectures which can support a direct-mapped
997 * physical to virtual region can return the appropriate address
998 * within that region, leaving '*virt' unchanged. Other
999 * architectures should map the pages starting at '*virt' and
1000 * update '*virt' with the first usable address after the mapped
1004 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1007 return PHYS_TO_DMAP(start);
1012 * Add a list of wired pages to the kva
1013 * this routine is only used for temporary
1014 * kernel mappings that do not need to have
1015 * page modification or references recorded.
1016 * Note that old mappings are simply written
1017 * over. The page *must* be wired.
1018 * Note: SMP coherent. Uses a ranged shootdown IPI.
1021 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1031 for (i = 0; i < count; i++) {
1033 pa = VM_PAGE_TO_PHYS(m);
1034 pn = (pa / PAGE_SIZE);
1035 l3 = pmap_l3(kernel_pmap, va);
1038 entry |= (pn << PTE_PPN0_S);
1039 pmap_store(l3, entry);
1043 pmap_invalidate_range(kernel_pmap, sva, va);
1047 * This routine tears out page mappings from the
1048 * kernel -- it is meant only for temporary mappings.
1049 * Note: SMP coherent. Uses a ranged shootdown IPI.
1052 pmap_qremove(vm_offset_t sva, int count)
1057 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1059 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1060 l3 = pmap_l3(kernel_pmap, va);
1061 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1064 pmap_invalidate_range(kernel_pmap, sva, va);
1068 pmap_ps_enabled(pmap_t pmap __unused)
1071 return (superpages_enabled);
1074 /***************************************************
1075 * Page table page management routines.....
1076 ***************************************************/
1078 * Schedule the specified unused page table page to be freed. Specifically,
1079 * add the page to the specified list of pages that will be released to the
1080 * physical memory manager after the TLB has been updated.
1082 static __inline void
1083 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1084 boolean_t set_PG_ZERO)
1088 m->flags |= PG_ZERO;
1090 m->flags &= ~PG_ZERO;
1091 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1095 * Inserts the specified page table page into the specified pmap's collection
1096 * of idle page table pages. Each of a pmap's page table pages is responsible
1097 * for mapping a distinct range of virtual addresses. The pmap's collection is
1098 * ordered by this virtual address range.
1101 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3)
1104 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1105 return (vm_radix_insert(&pmap->pm_root, ml3));
1109 * Removes the page table page mapping the specified virtual address from the
1110 * specified pmap's collection of idle page table pages, and returns it.
1111 * Otherwise, returns NULL if there is no page table page corresponding to the
1112 * specified virtual address.
1114 static __inline vm_page_t
1115 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1118 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1119 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1123 * Decrements a page table page's wire count, which is used to record the
1124 * number of valid page table entries within the page. If the wire count
1125 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1126 * page table page was unmapped and FALSE otherwise.
1128 static inline boolean_t
1129 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1133 if (m->wire_count == 0) {
1134 _pmap_unwire_ptp(pmap, va, m, free);
1142 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1146 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1147 if (m->pindex >= NUL1E) {
1149 l1 = pmap_l1(pmap, va);
1151 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1154 l2 = pmap_l2(pmap, va);
1157 pmap_resident_count_dec(pmap, 1);
1158 if (m->pindex < NUL1E) {
1162 l1 = pmap_l1(pmap, va);
1163 phys = PTE_TO_PHYS(pmap_load(l1));
1164 pdpg = PHYS_TO_VM_PAGE(phys);
1165 pmap_unwire_ptp(pmap, va, pdpg, free);
1167 pmap_invalidate_page(pmap, va);
1172 * Put page on a list so that it is released after
1173 * *ALL* TLB shootdown is done
1175 pmap_add_delayed_free_list(m, free, TRUE);
1179 * After removing a page table entry, this routine is used to
1180 * conditionally free the page, and manage the hold/wire counts.
1183 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1184 struct spglist *free)
1188 if (va >= VM_MAXUSER_ADDRESS)
1190 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1191 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1192 return (pmap_unwire_ptp(pmap, va, mpte, free));
1196 pmap_pinit0(pmap_t pmap)
1199 PMAP_LOCK_INIT(pmap);
1200 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1201 pmap->pm_l1 = kernel_pmap->pm_l1;
1205 pmap_pinit(pmap_t pmap)
1211 * allocate the l1 page
1213 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1214 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1217 l1phys = VM_PAGE_TO_PHYS(l1pt);
1218 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1220 if ((l1pt->flags & PG_ZERO) == 0)
1221 pagezero(pmap->pm_l1);
1223 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1225 /* Install kernel pagetables */
1226 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1228 /* Add to the list of all user pmaps */
1229 mtx_lock(&allpmaps_lock);
1230 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1231 mtx_unlock(&allpmaps_lock);
1233 vm_radix_init(&pmap->pm_root);
1239 * This routine is called if the desired page table page does not exist.
1241 * If page table page allocation fails, this routine may sleep before
1242 * returning NULL. It sleeps only if a lock pointer was given.
1244 * Note: If a page allocation fails at page table level two or three,
1245 * one or two pages may be held during the wait, only to be released
1246 * afterwards. This conservative approach is easily argued to avoid
1250 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1252 vm_page_t m, /*pdppg, */pdpg;
1257 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1260 * Allocate a page table page.
1262 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1263 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1264 if (lockp != NULL) {
1265 RELEASE_PV_LIST_LOCK(lockp);
1267 rw_runlock(&pvh_global_lock);
1269 rw_rlock(&pvh_global_lock);
1274 * Indicate the need to retry. While waiting, the page table
1275 * page may have been allocated.
1280 if ((m->flags & PG_ZERO) == 0)
1284 * Map the pagetable page into the process address space, if
1285 * it isn't already there.
1288 if (ptepindex >= NUL1E) {
1290 vm_pindex_t l1index;
1292 l1index = ptepindex - NUL1E;
1293 l1 = &pmap->pm_l1[l1index];
1295 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1297 entry |= (pn << PTE_PPN0_S);
1298 pmap_store(l1, entry);
1299 pmap_distribute_l1(pmap, l1index, entry);
1301 vm_pindex_t l1index;
1302 pd_entry_t *l1, *l2;
1304 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1305 l1 = &pmap->pm_l1[l1index];
1306 if (pmap_load(l1) == 0) {
1307 /* recurse for allocating page dir */
1308 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1310 vm_page_unwire_noq(m);
1311 vm_page_free_zero(m);
1315 phys = PTE_TO_PHYS(pmap_load(l1));
1316 pdpg = PHYS_TO_VM_PAGE(phys);
1320 phys = PTE_TO_PHYS(pmap_load(l1));
1321 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1322 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1324 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1326 entry |= (pn << PTE_PPN0_S);
1327 pmap_store(l2, entry);
1330 pmap_resident_count_inc(pmap, 1);
1336 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1340 vm_pindex_t l2pindex;
1343 l1 = pmap_l1(pmap, va);
1344 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1345 /* Add a reference to the L2 page. */
1346 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1349 /* Allocate a L2 page. */
1350 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1351 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1352 if (l2pg == NULL && lockp != NULL)
1359 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1361 vm_pindex_t ptepindex;
1367 * Calculate pagetable page index
1369 ptepindex = pmap_l2_pindex(va);
1372 * Get the page directory entry
1374 l2 = pmap_l2(pmap, va);
1377 * If the page table page is mapped, we just increment the
1378 * hold count, and activate it.
1380 if (l2 != NULL && pmap_load(l2) != 0) {
1381 phys = PTE_TO_PHYS(pmap_load(l2));
1382 m = PHYS_TO_VM_PAGE(phys);
1386 * Here if the pte page isn't mapped, or if it has been
1389 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1390 if (m == NULL && lockp != NULL)
1397 /***************************************************
1398 * Pmap allocation/deallocation routines.
1399 ***************************************************/
1402 * Release any resources held by the given physical map.
1403 * Called when a pmap initialized by pmap_pinit is being released.
1404 * Should only be called if the map contains no valid mappings.
1407 pmap_release(pmap_t pmap)
1411 KASSERT(pmap->pm_stats.resident_count == 0,
1412 ("pmap_release: pmap resident count %ld != 0",
1413 pmap->pm_stats.resident_count));
1415 mtx_lock(&allpmaps_lock);
1416 LIST_REMOVE(pmap, pm_list);
1417 mtx_unlock(&allpmaps_lock);
1419 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1420 vm_page_unwire_noq(m);
1426 kvm_size(SYSCTL_HANDLER_ARGS)
1428 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1430 return sysctl_handle_long(oidp, &ksize, 0, req);
1432 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1433 0, 0, kvm_size, "LU", "Size of KVM");
1436 kvm_free(SYSCTL_HANDLER_ARGS)
1438 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1440 return sysctl_handle_long(oidp, &kfree, 0, req);
1442 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1443 0, 0, kvm_free, "LU", "Amount of KVM free");
1447 * grow the number of kernel page table entries, if needed
1450 pmap_growkernel(vm_offset_t addr)
1454 pd_entry_t *l1, *l2;
1458 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1460 addr = roundup2(addr, L2_SIZE);
1461 if (addr - 1 >= vm_map_max(kernel_map))
1462 addr = vm_map_max(kernel_map);
1463 while (kernel_vm_end < addr) {
1464 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1465 if (pmap_load(l1) == 0) {
1466 /* We need a new PDP entry */
1467 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1468 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1469 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1471 panic("pmap_growkernel: no memory to grow kernel");
1472 if ((nkpg->flags & PG_ZERO) == 0)
1473 pmap_zero_page(nkpg);
1474 paddr = VM_PAGE_TO_PHYS(nkpg);
1476 pn = (paddr / PAGE_SIZE);
1478 entry |= (pn << PTE_PPN0_S);
1479 pmap_store(l1, entry);
1480 pmap_distribute_l1(kernel_pmap,
1481 pmap_l1_index(kernel_vm_end), entry);
1482 continue; /* try again */
1484 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1485 if ((pmap_load(l2) & PTE_V) != 0 &&
1486 (pmap_load(l2) & PTE_RWX) == 0) {
1487 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1488 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1489 kernel_vm_end = vm_map_max(kernel_map);
1495 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1496 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1499 panic("pmap_growkernel: no memory to grow kernel");
1500 if ((nkpg->flags & PG_ZERO) == 0) {
1501 pmap_zero_page(nkpg);
1503 paddr = VM_PAGE_TO_PHYS(nkpg);
1505 pn = (paddr / PAGE_SIZE);
1507 entry |= (pn << PTE_PPN0_S);
1508 pmap_store(l2, entry);
1510 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1512 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1513 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1514 kernel_vm_end = vm_map_max(kernel_map);
1521 /***************************************************
1522 * page management routines.
1523 ***************************************************/
1525 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1526 CTASSERT(_NPCM == 3);
1527 CTASSERT(_NPCPV == 168);
1529 static __inline struct pv_chunk *
1530 pv_to_chunk(pv_entry_t pv)
1533 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1536 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1538 #define PC_FREE0 0xfffffffffffffffful
1539 #define PC_FREE1 0xfffffffffffffffful
1540 #define PC_FREE2 0x000000fffffffffful
1542 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1546 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1548 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1549 "Current number of pv entry chunks");
1550 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1551 "Current number of pv entry chunks allocated");
1552 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1553 "Current number of pv entry chunks frees");
1554 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1555 "Number of times tried to get a chunk page but failed.");
1557 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1558 static int pv_entry_spare;
1560 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1561 "Current number of pv entry frees");
1562 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1563 "Current number of pv entry allocs");
1564 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1565 "Current number of pv entries");
1566 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1567 "Current number of spare pv entries");
1572 * We are in a serious low memory condition. Resort to
1573 * drastic measures to free some pages so we can allocate
1574 * another pv entry chunk.
1576 * Returns NULL if PV entries were reclaimed from the specified pmap.
1578 * We do not, however, unmap 2mpages because subsequent accesses will
1579 * allocate per-page pv entries until repromotion occurs, thereby
1580 * exacerbating the shortage of free pv entries.
1583 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1586 panic("RISCVTODO: reclaim_pv_chunk");
1590 * free the pv_entry back to the free list
1593 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1595 struct pv_chunk *pc;
1596 int idx, field, bit;
1598 rw_assert(&pvh_global_lock, RA_LOCKED);
1599 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1600 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1601 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1602 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1603 pc = pv_to_chunk(pv);
1604 idx = pv - &pc->pc_pventry[0];
1607 pc->pc_map[field] |= 1ul << bit;
1608 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1609 pc->pc_map[2] != PC_FREE2) {
1610 /* 98% of the time, pc is already at the head of the list. */
1611 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1612 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1613 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1617 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1622 free_pv_chunk(struct pv_chunk *pc)
1626 mtx_lock(&pv_chunks_mutex);
1627 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1628 mtx_unlock(&pv_chunks_mutex);
1629 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1630 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1631 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1632 /* entire chunk is free, return it */
1633 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1634 #if 0 /* TODO: For minidump */
1635 dump_drop_page(m->phys_addr);
1637 vm_page_unwire(m, PQ_NONE);
1642 * Returns a new PV entry, allocating a new PV chunk from the system when
1643 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1644 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1647 * The given PV list lock may be released.
1650 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1654 struct pv_chunk *pc;
1657 rw_assert(&pvh_global_lock, RA_LOCKED);
1658 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1659 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1661 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1663 for (field = 0; field < _NPCM; field++) {
1664 if (pc->pc_map[field]) {
1665 bit = ffsl(pc->pc_map[field]) - 1;
1669 if (field < _NPCM) {
1670 pv = &pc->pc_pventry[field * 64 + bit];
1671 pc->pc_map[field] &= ~(1ul << bit);
1672 /* If this was the last item, move it to tail */
1673 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1674 pc->pc_map[2] == 0) {
1675 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1676 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1679 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1680 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1684 /* No free items, allocate another chunk */
1685 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1688 if (lockp == NULL) {
1689 PV_STAT(pc_chunk_tryfail++);
1692 m = reclaim_pv_chunk(pmap, lockp);
1696 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1697 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1698 #if 0 /* TODO: This is for minidump */
1699 dump_add_page(m->phys_addr);
1701 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1703 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1704 pc->pc_map[1] = PC_FREE1;
1705 pc->pc_map[2] = PC_FREE2;
1706 mtx_lock(&pv_chunks_mutex);
1707 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1708 mtx_unlock(&pv_chunks_mutex);
1709 pv = &pc->pc_pventry[0];
1710 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1711 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1712 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1717 * Ensure that the number of spare PV entries in the specified pmap meets or
1718 * exceeds the given count, "needed".
1720 * The given PV list lock may be released.
1723 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1725 struct pch new_tail;
1726 struct pv_chunk *pc;
1731 rw_assert(&pvh_global_lock, RA_LOCKED);
1732 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1733 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1736 * Newly allocated PV chunks must be stored in a private list until
1737 * the required number of PV chunks have been allocated. Otherwise,
1738 * reclaim_pv_chunk() could recycle one of these chunks. In
1739 * contrast, these chunks must be added to the pmap upon allocation.
1741 TAILQ_INIT(&new_tail);
1744 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1745 bit_count((bitstr_t *)pc->pc_map, 0,
1746 sizeof(pc->pc_map) * NBBY, &free);
1750 if (avail >= needed)
1753 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1754 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1757 m = reclaim_pv_chunk(pmap, lockp);
1764 dump_add_page(m->phys_addr);
1766 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1768 pc->pc_map[0] = PC_FREE0;
1769 pc->pc_map[1] = PC_FREE1;
1770 pc->pc_map[2] = PC_FREE2;
1771 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1772 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1775 * The reclaim might have freed a chunk from the current pmap.
1776 * If that chunk contained available entries, we need to
1777 * re-count the number of available entries.
1782 if (!TAILQ_EMPTY(&new_tail)) {
1783 mtx_lock(&pv_chunks_mutex);
1784 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1785 mtx_unlock(&pv_chunks_mutex);
1790 * First find and then remove the pv entry for the specified pmap and virtual
1791 * address from the specified pv list. Returns the pv entry if found and NULL
1792 * otherwise. This operation can be performed on pv lists for either 4KB or
1793 * 2MB page mappings.
1795 static __inline pv_entry_t
1796 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1800 rw_assert(&pvh_global_lock, RA_LOCKED);
1801 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1802 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1803 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1812 * First find and then destroy the pv entry for the specified pmap and virtual
1813 * address. This operation can be performed on pv lists for either 4KB or 2MB
1817 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1821 pv = pmap_pvh_remove(pvh, pmap, va);
1823 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1824 free_pv_entry(pmap, pv);
1828 * Conditionally create the PV entry for a 4KB page mapping if the required
1829 * memory can be allocated without resorting to reclamation.
1832 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1833 struct rwlock **lockp)
1837 rw_assert(&pvh_global_lock, RA_LOCKED);
1838 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1839 /* Pass NULL instead of the lock pointer to disable reclamation. */
1840 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1842 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1843 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1851 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1852 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1853 * entries for each of the 4KB page mappings.
1855 static void __unused
1856 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1857 struct rwlock **lockp)
1859 struct md_page *pvh;
1860 struct pv_chunk *pc;
1863 vm_offset_t va_last;
1866 rw_assert(&pvh_global_lock, RA_LOCKED);
1867 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1868 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1871 * Transfer the 2mpage's pv entry for this mapping to the first
1872 * page's pv list. Once this transfer begins, the pv list lock
1873 * must not be released until the last pv entry is reinstantiated.
1875 pvh = pa_to_pvh(pa);
1877 pv = pmap_pvh_remove(pvh, pmap, va);
1878 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1879 m = PHYS_TO_VM_PAGE(pa);
1880 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1882 /* Instantiate the remaining 511 pv entries. */
1883 va_last = va + L2_SIZE - PAGE_SIZE;
1885 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1886 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1887 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1888 for (field = 0; field < _NPCM; field++) {
1889 while (pc->pc_map[field] != 0) {
1890 bit = ffsl(pc->pc_map[field]) - 1;
1891 pc->pc_map[field] &= ~(1ul << bit);
1892 pv = &pc->pc_pventry[field * 64 + bit];
1896 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1897 ("pmap_pv_demote_l2: page %p is not managed", m));
1898 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1904 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1905 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1908 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1909 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1910 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1915 #if VM_NRESERVLEVEL > 0
1917 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1918 struct rwlock **lockp)
1920 struct md_page *pvh;
1923 vm_offset_t va_last;
1925 rw_assert(&pvh_global_lock, RA_LOCKED);
1926 KASSERT((va & L2_OFFSET) == 0,
1927 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1929 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1931 m = PHYS_TO_VM_PAGE(pa);
1932 pv = pmap_pvh_remove(&m->md, pmap, va);
1933 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1934 pvh = pa_to_pvh(pa);
1935 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1938 va_last = va + L2_SIZE - PAGE_SIZE;
1942 pmap_pvh_free(&m->md, pmap, va);
1943 } while (va < va_last);
1945 #endif /* VM_NRESERVLEVEL > 0 */
1948 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1949 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1950 * false if the PV entry cannot be allocated without resorting to reclamation.
1953 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1954 struct rwlock **lockp)
1956 struct md_page *pvh;
1960 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1961 /* Pass NULL instead of the lock pointer to disable reclamation. */
1962 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1963 NULL : lockp)) == NULL)
1966 pa = PTE_TO_PHYS(l2e);
1967 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1968 pvh = pa_to_pvh(pa);
1969 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1975 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1977 pt_entry_t newl2, oldl2;
1981 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1982 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1983 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1985 ml3 = pmap_remove_pt_page(pmap, va);
1987 panic("pmap_remove_kernel_l2: Missing pt page");
1989 ml3pa = VM_PAGE_TO_PHYS(ml3);
1990 newl2 = ml3pa | PTE_V;
1993 * Initialize the page table page.
1995 pagezero((void *)PHYS_TO_DMAP(ml3pa));
1998 * Demote the mapping.
2000 oldl2 = pmap_load_store(l2, newl2);
2001 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2002 __func__, l2, oldl2));
2006 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2009 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2010 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2012 struct md_page *pvh;
2014 vm_offset_t eva, va;
2017 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2018 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2019 oldl2 = pmap_load_clear(l2);
2020 KASSERT((oldl2 & PTE_RWX) != 0,
2021 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2024 * The sfence.vma documentation states that it is sufficient to specify
2025 * a single address within a superpage mapping. However, since we do
2026 * not perform any invalidation upon promotion, TLBs may still be
2027 * caching 4KB mappings within the superpage, so we must invalidate the
2030 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2031 if ((oldl2 & PTE_SW_WIRED) != 0)
2032 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2033 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2034 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2035 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2036 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2037 pmap_pvh_free(pvh, pmap, sva);
2038 eva = sva + L2_SIZE;
2039 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2040 va < eva; va += PAGE_SIZE, m++) {
2041 if ((oldl2 & PTE_D) != 0)
2043 if ((oldl2 & PTE_A) != 0)
2044 vm_page_aflag_set(m, PGA_REFERENCED);
2045 if (TAILQ_EMPTY(&m->md.pv_list) &&
2046 TAILQ_EMPTY(&pvh->pv_list))
2047 vm_page_aflag_clear(m, PGA_WRITEABLE);
2050 if (pmap == kernel_pmap) {
2051 pmap_remove_kernel_l2(pmap, l2, sva);
2053 ml3 = pmap_remove_pt_page(pmap, sva);
2055 pmap_resident_count_dec(pmap, 1);
2056 KASSERT(ml3->wire_count == Ln_ENTRIES,
2057 ("pmap_remove_l2: l3 page wire count error"));
2058 ml3->wire_count = 1;
2059 vm_page_unwire_noq(ml3);
2060 pmap_add_delayed_free_list(ml3, free, FALSE);
2063 return (pmap_unuse_pt(pmap, sva, l1e, free));
2067 * pmap_remove_l3: do the things to unmap a page in a process
2070 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2071 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2077 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2078 old_l3 = pmap_load_clear(l3);
2079 pmap_invalidate_page(pmap, va);
2080 if (old_l3 & PTE_SW_WIRED)
2081 pmap->pm_stats.wired_count -= 1;
2082 pmap_resident_count_dec(pmap, 1);
2083 if (old_l3 & PTE_SW_MANAGED) {
2084 phys = PTE_TO_PHYS(old_l3);
2085 m = PHYS_TO_VM_PAGE(phys);
2086 if ((old_l3 & PTE_D) != 0)
2089 vm_page_aflag_set(m, PGA_REFERENCED);
2090 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2091 pmap_pvh_free(&m->md, pmap, va);
2094 return (pmap_unuse_pt(pmap, va, l2e, free));
2098 * Remove the given range of addresses from the specified map.
2100 * It is assumed that the start and end are properly
2101 * rounded to the page size.
2104 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2106 struct spglist free;
2107 struct rwlock *lock;
2108 vm_offset_t va, va_next;
2109 pd_entry_t *l1, *l2, l2e;
2113 * Perform an unsynchronized read. This is, however, safe.
2115 if (pmap->pm_stats.resident_count == 0)
2120 rw_rlock(&pvh_global_lock);
2124 for (; sva < eva; sva = va_next) {
2125 if (pmap->pm_stats.resident_count == 0)
2128 l1 = pmap_l1(pmap, sva);
2129 if (pmap_load(l1) == 0) {
2130 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2137 * Calculate index for next page table.
2139 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2143 l2 = pmap_l1_to_l2(l1, sva);
2146 if ((l2e = pmap_load(l2)) == 0)
2148 if ((l2e & PTE_RWX) != 0) {
2149 if (sva + L2_SIZE == va_next && eva >= va_next) {
2150 (void)pmap_remove_l2(pmap, l2, sva,
2151 pmap_load(l1), &free, &lock);
2153 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2156 * The large page mapping was destroyed.
2160 l2e = pmap_load(l2);
2164 * Limit our scan to either the end of the va represented
2165 * by the current page table page, or to the end of the
2166 * range being removed.
2172 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2174 if (pmap_load(l3) == 0) {
2175 if (va != va_next) {
2176 pmap_invalidate_range(pmap, va, sva);
2183 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2189 pmap_invalidate_range(pmap, va, sva);
2193 rw_runlock(&pvh_global_lock);
2195 vm_page_free_pages_toq(&free, false);
2199 * Routine: pmap_remove_all
2201 * Removes this physical page from
2202 * all physical maps in which it resides.
2203 * Reflects back modify bits to the pager.
2206 * Original versions of this routine were very
2207 * inefficient because they iteratively called
2208 * pmap_remove (slow...)
2212 pmap_remove_all(vm_page_t m)
2214 struct spglist free;
2215 struct md_page *pvh;
2217 pt_entry_t *l3, l3e;
2218 pd_entry_t *l2, l2e;
2222 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2223 ("pmap_remove_all: page %p is not managed", m));
2225 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2226 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2228 rw_wlock(&pvh_global_lock);
2229 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2233 l2 = pmap_l2(pmap, va);
2234 (void)pmap_demote_l2(pmap, l2, va);
2237 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2240 pmap_resident_count_dec(pmap, 1);
2241 l2 = pmap_l2(pmap, pv->pv_va);
2242 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2243 l2e = pmap_load(l2);
2245 KASSERT((l2e & PTE_RX) == 0,
2246 ("pmap_remove_all: found a superpage in %p's pv list", m));
2248 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2249 l3e = pmap_load_clear(l3);
2250 pmap_invalidate_page(pmap, pv->pv_va);
2251 if (l3e & PTE_SW_WIRED)
2252 pmap->pm_stats.wired_count--;
2253 if ((l3e & PTE_A) != 0)
2254 vm_page_aflag_set(m, PGA_REFERENCED);
2257 * Update the vm_page_t clean and reference bits.
2259 if ((l3e & PTE_D) != 0)
2261 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2262 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2264 free_pv_entry(pmap, pv);
2267 vm_page_aflag_clear(m, PGA_WRITEABLE);
2268 rw_wunlock(&pvh_global_lock);
2269 vm_page_free_pages_toq(&free, false);
2273 * Set the physical protection on the
2274 * specified range of this map as requested.
2277 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2279 pd_entry_t *l1, *l2, l2e;
2280 pt_entry_t *l3, l3e, mask;
2283 vm_offset_t va, va_next;
2284 bool anychanged, pv_lists_locked;
2286 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2287 pmap_remove(pmap, sva, eva);
2291 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2292 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2296 pv_lists_locked = false;
2298 if ((prot & VM_PROT_WRITE) == 0)
2299 mask |= PTE_W | PTE_D;
2300 if ((prot & VM_PROT_EXECUTE) == 0)
2304 for (; sva < eva; sva = va_next) {
2305 l1 = pmap_l1(pmap, sva);
2306 if (pmap_load(l1) == 0) {
2307 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2313 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2317 l2 = pmap_l1_to_l2(l1, sva);
2318 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2320 if ((l2e & PTE_RWX) != 0) {
2321 if (sva + L2_SIZE == va_next && eva >= va_next) {
2323 if ((l2e & (PTE_SW_MANAGED | PTE_D)) ==
2324 (PTE_SW_MANAGED | PTE_D)) {
2325 pa = PTE_TO_PHYS(l2e);
2326 for (va = sva, m = PHYS_TO_VM_PAGE(pa);
2327 va < va_next; m++, va += PAGE_SIZE)
2330 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2334 if (!pv_lists_locked) {
2335 pv_lists_locked = true;
2336 if (!rw_try_rlock(&pvh_global_lock)) {
2338 pmap_invalidate_all(
2341 rw_rlock(&pvh_global_lock);
2345 if (!pmap_demote_l2(pmap, l2, sva)) {
2347 * The large page mapping was destroyed.
2357 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2359 l3e = pmap_load(l3);
2361 if ((l3e & PTE_V) == 0)
2363 if ((prot & VM_PROT_WRITE) == 0 &&
2364 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2365 (PTE_SW_MANAGED | PTE_D)) {
2366 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2369 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2375 pmap_invalidate_all(pmap);
2376 if (pv_lists_locked)
2377 rw_runlock(&pvh_global_lock);
2382 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2384 pd_entry_t *l2, l2e;
2385 pt_entry_t bits, *pte, oldpte;
2390 l2 = pmap_l2(pmap, va);
2391 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2393 if ((l2e & PTE_RWX) == 0) {
2394 pte = pmap_l2_to_l3(l2, va);
2395 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2402 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2403 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2404 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2405 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2409 if (ftype == VM_PROT_WRITE)
2413 * Spurious faults can occur if the implementation caches invalid
2414 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2415 * race with each other.
2417 if ((oldpte & bits) != bits)
2418 pmap_store_bits(pte, bits);
2427 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2429 struct rwlock *lock;
2433 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2440 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2441 * mapping is invalidated.
2444 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2445 struct rwlock **lockp)
2447 struct spglist free;
2449 pd_entry_t newl2, oldl2;
2450 pt_entry_t *firstl3, newl3;
2454 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2456 oldl2 = pmap_load(l2);
2457 KASSERT((oldl2 & PTE_RWX) != 0,
2458 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2459 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2461 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2462 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2463 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2466 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2467 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2468 vm_page_free_pages_toq(&free, true);
2469 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2470 "failure for va %#lx in pmap %p", va, pmap);
2473 if (va < VM_MAXUSER_ADDRESS)
2474 pmap_resident_count_inc(pmap, 1);
2476 mptepa = VM_PAGE_TO_PHYS(mpte);
2477 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2478 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2479 KASSERT((oldl2 & PTE_A) != 0,
2480 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2481 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2482 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2486 * If the page table page is new, initialize it.
2488 if (mpte->wire_count == 1) {
2489 mpte->wire_count = Ln_ENTRIES;
2490 for (i = 0; i < Ln_ENTRIES; i++)
2491 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2493 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2494 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2498 * If the mapping has changed attributes, update the page table
2501 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2502 for (i = 0; i < Ln_ENTRIES; i++)
2503 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2506 * The spare PV entries must be reserved prior to demoting the
2507 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2508 * state of the L2 entry and the PV lists will be inconsistent, which
2509 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2510 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2511 * expected PV entry for the 2MB page mapping that is being demoted.
2513 if ((oldl2 & PTE_SW_MANAGED) != 0)
2514 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2517 * Demote the mapping.
2519 pmap_store(l2, newl2);
2522 * Demote the PV entry.
2524 if ((oldl2 & PTE_SW_MANAGED) != 0)
2525 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2527 atomic_add_long(&pmap_l2_demotions, 1);
2528 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2533 #if VM_NRESERVLEVEL > 0
2535 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2536 struct rwlock **lockp)
2538 pt_entry_t *firstl3, *l3;
2542 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2545 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2546 ("pmap_promote_l2: invalid l2 entry %p", l2));
2548 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2549 pa = PTE_TO_PHYS(pmap_load(firstl3));
2550 if ((pa & L2_OFFSET) != 0) {
2551 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2553 atomic_add_long(&pmap_l2_p_failures, 1);
2558 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2559 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2561 "pmap_promote_l2: failure for va %#lx pmap %p",
2563 atomic_add_long(&pmap_l2_p_failures, 1);
2566 if ((pmap_load(l3) & PTE_PROMOTE) !=
2567 (pmap_load(firstl3) & PTE_PROMOTE)) {
2569 "pmap_promote_l2: failure for va %#lx pmap %p",
2571 atomic_add_long(&pmap_l2_p_failures, 1);
2577 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2578 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2579 ("pmap_promote_l2: page table page's pindex is wrong"));
2580 if (pmap_insert_pt_page(pmap, ml3)) {
2581 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2583 atomic_add_long(&pmap_l2_p_failures, 1);
2587 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2588 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2591 pmap_store(l2, pmap_load(firstl3));
2593 atomic_add_long(&pmap_l2_promotions, 1);
2594 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2600 * Insert the given physical page (p) at
2601 * the specified virtual address (v) in the
2602 * target physical map with the protection requested.
2604 * If specified, the page will be wired down, meaning
2605 * that the related pte can not be reclaimed.
2607 * NB: This is the only routine which MAY NOT lazy-evaluate
2608 * or lose information. That is, this routine must actually
2609 * insert this page into the given map NOW.
2612 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2613 u_int flags, int8_t psind)
2615 struct rwlock *lock;
2616 pd_entry_t *l1, *l2, l2e;
2617 pt_entry_t new_l3, orig_l3;
2620 vm_paddr_t opa, pa, l2_pa, l3_pa;
2621 vm_page_t mpte, om, l2_m, l3_m;
2623 pn_t l2_pn, l3_pn, pn;
2627 va = trunc_page(va);
2628 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2629 VM_OBJECT_ASSERT_LOCKED(m->object);
2630 pa = VM_PAGE_TO_PHYS(m);
2631 pn = (pa / PAGE_SIZE);
2633 new_l3 = PTE_V | PTE_R | PTE_A;
2634 if (prot & VM_PROT_EXECUTE)
2636 if (flags & VM_PROT_WRITE)
2638 if (prot & VM_PROT_WRITE)
2640 if (va < VM_MAX_USER_ADDRESS)
2643 new_l3 |= (pn << PTE_PPN0_S);
2644 if ((flags & PMAP_ENTER_WIRED) != 0)
2645 new_l3 |= PTE_SW_WIRED;
2648 * Set modified bit gratuitously for writeable mappings if
2649 * the page is unmanaged. We do not want to take a fault
2650 * to do the dirty bit accounting for these mappings.
2652 if ((m->oflags & VPO_UNMANAGED) != 0) {
2653 if (prot & VM_PROT_WRITE)
2656 new_l3 |= PTE_SW_MANAGED;
2658 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2662 rw_rlock(&pvh_global_lock);
2665 /* Assert the required virtual and physical alignment. */
2666 KASSERT((va & L2_OFFSET) == 0,
2667 ("pmap_enter: va %#lx unaligned", va));
2668 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2669 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2673 l2 = pmap_l2(pmap, va);
2674 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2675 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2677 l3 = pmap_l2_to_l3(l2, va);
2678 if (va < VM_MAXUSER_ADDRESS) {
2679 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2682 } else if (va < VM_MAXUSER_ADDRESS) {
2683 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2684 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2685 if (mpte == NULL && nosleep) {
2686 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2689 rw_runlock(&pvh_global_lock);
2691 return (KERN_RESOURCE_SHORTAGE);
2693 l3 = pmap_l3(pmap, va);
2695 l3 = pmap_l3(pmap, va);
2696 /* TODO: This is not optimal, but should mostly work */
2699 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2700 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2703 panic("pmap_enter: l2 pte_m == NULL");
2704 if ((l2_m->flags & PG_ZERO) == 0)
2705 pmap_zero_page(l2_m);
2707 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2708 l2_pn = (l2_pa / PAGE_SIZE);
2710 l1 = pmap_l1(pmap, va);
2712 entry |= (l2_pn << PTE_PPN0_S);
2713 pmap_store(l1, entry);
2714 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2715 l2 = pmap_l1_to_l2(l1, va);
2718 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2719 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2721 panic("pmap_enter: l3 pte_m == NULL");
2722 if ((l3_m->flags & PG_ZERO) == 0)
2723 pmap_zero_page(l3_m);
2725 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2726 l3_pn = (l3_pa / PAGE_SIZE);
2728 entry |= (l3_pn << PTE_PPN0_S);
2729 pmap_store(l2, entry);
2730 l3 = pmap_l2_to_l3(l2, va);
2732 pmap_invalidate_page(pmap, va);
2735 orig_l3 = pmap_load(l3);
2736 opa = PTE_TO_PHYS(orig_l3);
2740 * Is the specified virtual address already mapped?
2742 if ((orig_l3 & PTE_V) != 0) {
2744 * Wiring change, just update stats. We don't worry about
2745 * wiring PT pages as they remain resident as long as there
2746 * are valid mappings in them. Hence, if a user page is wired,
2747 * the PT page will be also.
2749 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2750 (orig_l3 & PTE_SW_WIRED) == 0)
2751 pmap->pm_stats.wired_count++;
2752 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2753 (orig_l3 & PTE_SW_WIRED) != 0)
2754 pmap->pm_stats.wired_count--;
2757 * Remove the extra PT page reference.
2761 KASSERT(mpte->wire_count > 0,
2762 ("pmap_enter: missing reference to page table page,"
2767 * Has the physical page changed?
2771 * No, might be a protection or wiring change.
2773 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2774 (new_l3 & PTE_W) != 0)
2775 vm_page_aflag_set(m, PGA_WRITEABLE);
2780 * The physical page has changed. Temporarily invalidate
2781 * the mapping. This ensures that all threads sharing the
2782 * pmap keep a consistent view of the mapping, which is
2783 * necessary for the correct handling of COW faults. It
2784 * also permits reuse of the old mapping's PV entry,
2785 * avoiding an allocation.
2787 * For consistency, handle unmanaged mappings the same way.
2789 orig_l3 = pmap_load_clear(l3);
2790 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2791 ("pmap_enter: unexpected pa update for %#lx", va));
2792 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2793 om = PHYS_TO_VM_PAGE(opa);
2796 * The pmap lock is sufficient to synchronize with
2797 * concurrent calls to pmap_page_test_mappings() and
2798 * pmap_ts_referenced().
2800 if ((orig_l3 & PTE_D) != 0)
2802 if ((orig_l3 & PTE_A) != 0)
2803 vm_page_aflag_set(om, PGA_REFERENCED);
2804 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2805 pv = pmap_pvh_remove(&om->md, pmap, va);
2807 ("pmap_enter: no PV entry for %#lx", va));
2808 if ((new_l3 & PTE_SW_MANAGED) == 0)
2809 free_pv_entry(pmap, pv);
2810 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2811 TAILQ_EMPTY(&om->md.pv_list))
2812 vm_page_aflag_clear(om, PGA_WRITEABLE);
2814 pmap_invalidate_page(pmap, va);
2818 * Increment the counters.
2820 if ((new_l3 & PTE_SW_WIRED) != 0)
2821 pmap->pm_stats.wired_count++;
2822 pmap_resident_count_inc(pmap, 1);
2825 * Enter on the PV list if part of our managed memory.
2827 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2829 pv = get_pv_entry(pmap, &lock);
2832 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2833 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2835 if ((new_l3 & PTE_W) != 0)
2836 vm_page_aflag_set(m, PGA_WRITEABLE);
2841 * Sync the i-cache on all harts before updating the PTE
2842 * if the new PTE is executable.
2844 if (prot & VM_PROT_EXECUTE)
2845 pmap_sync_icache(pmap, va, PAGE_SIZE);
2848 * Update the L3 entry.
2851 orig_l3 = pmap_load_store(l3, new_l3);
2852 pmap_invalidate_page(pmap, va);
2853 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2854 ("pmap_enter: invalid update"));
2855 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2856 (PTE_D | PTE_SW_MANAGED))
2859 pmap_store(l3, new_l3);
2862 #if VM_NRESERVLEVEL > 0
2863 if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2864 pmap_ps_enabled(pmap) &&
2865 (m->flags & PG_FICTITIOUS) == 0 &&
2866 vm_reserv_level_iffullpop(m) == 0)
2867 pmap_promote_l2(pmap, l2, va, &lock);
2874 rw_runlock(&pvh_global_lock);
2880 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2881 * if successful. Returns false if (1) a page table page cannot be allocated
2882 * without sleeping, (2) a mapping already exists at the specified virtual
2883 * address, or (3) a PV entry cannot be allocated without reclaiming another
2887 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2888 struct rwlock **lockp)
2893 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2895 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2896 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2897 if ((m->oflags & VPO_UNMANAGED) == 0)
2898 new_l2 |= PTE_SW_MANAGED;
2899 if ((prot & VM_PROT_EXECUTE) != 0)
2901 if (va < VM_MAXUSER_ADDRESS)
2903 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2904 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2909 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2910 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2911 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2912 * a mapping already exists at the specified virtual address. Returns
2913 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2914 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2915 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2917 * The parameter "m" is only used when creating a managed, writeable mapping.
2920 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2921 vm_page_t m, struct rwlock **lockp)
2923 struct spglist free;
2924 pd_entry_t *l2, *l3, oldl2;
2928 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2930 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2931 NULL : lockp)) == NULL) {
2932 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2934 return (KERN_RESOURCE_SHORTAGE);
2937 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2938 l2 = &l2[pmap_l2_index(va)];
2939 if ((oldl2 = pmap_load(l2)) != 0) {
2940 KASSERT(l2pg->wire_count > 1,
2941 ("pmap_enter_l2: l2pg's wire count is too low"));
2942 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2945 "pmap_enter_l2: failure for va %#lx in pmap %p",
2947 return (KERN_FAILURE);
2950 if ((oldl2 & PTE_RWX) != 0)
2951 (void)pmap_remove_l2(pmap, l2, va,
2952 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2954 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2955 l3 = pmap_l2_to_l3(l2, sva);
2956 if ((pmap_load(l3) & PTE_V) != 0 &&
2957 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2961 vm_page_free_pages_toq(&free, true);
2962 if (va >= VM_MAXUSER_ADDRESS) {
2963 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2964 if (pmap_insert_pt_page(pmap, mt)) {
2966 * XXX Currently, this can't happen bacuse
2967 * we do not perform pmap_enter(psind == 1)
2968 * on the kernel pmap.
2970 panic("pmap_enter_l2: trie insert failed");
2973 KASSERT(pmap_load(l2) == 0,
2974 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2977 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2979 * Abort this mapping if its PV entry could not be created.
2981 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2983 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
2985 * Although "va" is not mapped, paging-structure
2986 * caches could nonetheless have entries that
2987 * refer to the freed page table pages.
2988 * Invalidate those entries.
2990 pmap_invalidate_page(pmap, va);
2991 vm_page_free_pages_toq(&free, true);
2994 "pmap_enter_l2: failure for va %#lx in pmap %p",
2996 return (KERN_RESOURCE_SHORTAGE);
2998 if ((new_l2 & PTE_W) != 0)
2999 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3000 vm_page_aflag_set(mt, PGA_WRITEABLE);
3004 * Increment counters.
3006 if ((new_l2 & PTE_SW_WIRED) != 0)
3007 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3008 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3011 * Map the superpage.
3013 pmap_store(l2, new_l2);
3015 atomic_add_long(&pmap_l2_mappings, 1);
3016 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3019 return (KERN_SUCCESS);
3023 * Maps a sequence of resident pages belonging to the same object.
3024 * The sequence begins with the given page m_start. This page is
3025 * mapped at the given virtual address start. Each subsequent page is
3026 * mapped at a virtual address that is offset from start by the same
3027 * amount as the page is offset from m_start within the object. The
3028 * last page in the sequence is the page with the largest offset from
3029 * m_start that can be mapped at a virtual address less than the given
3030 * virtual address end. Not every virtual page between start and end
3031 * is mapped; only those for which a resident page exists with the
3032 * corresponding offset from m_start are mapped.
3035 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3036 vm_page_t m_start, vm_prot_t prot)
3038 struct rwlock *lock;
3041 vm_pindex_t diff, psize;
3043 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3045 psize = atop(end - start);
3049 rw_rlock(&pvh_global_lock);
3051 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3052 va = start + ptoa(diff);
3053 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3054 m->psind == 1 && pmap_ps_enabled(pmap) &&
3055 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3056 m = &m[L2_SIZE / PAGE_SIZE - 1];
3058 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3060 m = TAILQ_NEXT(m, listq);
3064 rw_runlock(&pvh_global_lock);
3069 * this code makes some *MAJOR* assumptions:
3070 * 1. Current pmap & pmap exists.
3073 * 4. No page table pages.
3074 * but is *MUCH* faster than pmap_enter...
3078 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3080 struct rwlock *lock;
3083 rw_rlock(&pvh_global_lock);
3085 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3088 rw_runlock(&pvh_global_lock);
3093 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3094 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3096 struct spglist free;
3099 pt_entry_t *l3, newl3;
3101 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3102 (m->oflags & VPO_UNMANAGED) != 0,
3103 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3104 rw_assert(&pvh_global_lock, RA_LOCKED);
3105 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3107 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3109 * In the case that a page table page is not
3110 * resident, we are creating it here.
3112 if (va < VM_MAXUSER_ADDRESS) {
3113 vm_pindex_t l2pindex;
3116 * Calculate pagetable page index
3118 l2pindex = pmap_l2_pindex(va);
3119 if (mpte && (mpte->pindex == l2pindex)) {
3125 l2 = pmap_l2(pmap, va);
3128 * If the page table page is mapped, we just increment
3129 * the hold count, and activate it. Otherwise, we
3130 * attempt to allocate a page table page. If this
3131 * attempt fails, we don't retry. Instead, we give up.
3133 if (l2 != NULL && pmap_load(l2) != 0) {
3134 phys = PTE_TO_PHYS(pmap_load(l2));
3135 mpte = PHYS_TO_VM_PAGE(phys);
3139 * Pass NULL instead of the PV list lock
3140 * pointer, because we don't intend to sleep.
3142 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3147 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3148 l3 = &l3[pmap_l3_index(va)];
3151 l3 = pmap_l3(kernel_pmap, va);
3154 panic("pmap_enter_quick_locked: No l3");
3155 if (pmap_load(l3) != 0) {
3164 * Enter on the PV list if part of our managed memory.
3166 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3167 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3170 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3171 pmap_invalidate_page(pmap, va);
3172 vm_page_free_pages_toq(&free, false);
3180 * Increment counters
3182 pmap_resident_count_inc(pmap, 1);
3184 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3186 if ((prot & VM_PROT_EXECUTE) != 0)
3188 if ((m->oflags & VPO_UNMANAGED) == 0)
3189 newl3 |= PTE_SW_MANAGED;
3190 if (va < VM_MAX_USER_ADDRESS)
3194 * Sync the i-cache on all harts before updating the PTE
3195 * if the new PTE is executable.
3197 if (prot & VM_PROT_EXECUTE)
3198 pmap_sync_icache(pmap, va, PAGE_SIZE);
3200 pmap_store(l3, newl3);
3202 pmap_invalidate_page(pmap, va);
3207 * This code maps large physical mmap regions into the
3208 * processor address space. Note that some shortcuts
3209 * are taken, but the code works.
3212 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3213 vm_pindex_t pindex, vm_size_t size)
3216 VM_OBJECT_ASSERT_WLOCKED(object);
3217 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3218 ("pmap_object_init_pt: non-device object"));
3222 * Clear the wired attribute from the mappings for the specified range of
3223 * addresses in the given pmap. Every valid mapping within that range
3224 * must have the wired attribute set. In contrast, invalid mappings
3225 * cannot have the wired attribute set, so they are ignored.
3227 * The wired attribute of the page table entry is not a hardware feature,
3228 * so there is no need to invalidate any TLB entries.
3231 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3233 vm_offset_t va_next;
3234 pd_entry_t *l1, *l2, l2e;
3235 pt_entry_t *l3, l3e;
3236 bool pv_lists_locked;
3238 pv_lists_locked = false;
3241 for (; sva < eva; sva = va_next) {
3242 l1 = pmap_l1(pmap, sva);
3243 if (pmap_load(l1) == 0) {
3244 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3250 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3254 l2 = pmap_l1_to_l2(l1, sva);
3255 if ((l2e = pmap_load(l2)) == 0)
3257 if ((l2e & PTE_RWX) != 0) {
3258 if (sva + L2_SIZE == va_next && eva >= va_next) {
3259 if ((l2e & PTE_SW_WIRED) == 0)
3260 panic("pmap_unwire: l2 %#jx is missing "
3261 "PTE_SW_WIRED", (uintmax_t)l2e);
3262 pmap_clear_bits(l2, PTE_SW_WIRED);
3265 if (!pv_lists_locked) {
3266 pv_lists_locked = true;
3267 if (!rw_try_rlock(&pvh_global_lock)) {
3269 rw_rlock(&pvh_global_lock);
3274 if (!pmap_demote_l2(pmap, l2, sva))
3275 panic("pmap_unwire: demotion failed");
3281 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3283 if ((l3e = pmap_load(l3)) == 0)
3285 if ((l3e & PTE_SW_WIRED) == 0)
3286 panic("pmap_unwire: l3 %#jx is missing "
3287 "PTE_SW_WIRED", (uintmax_t)l3e);
3290 * PG_W must be cleared atomically. Although the pmap
3291 * lock synchronizes access to PG_W, another processor
3292 * could be setting PG_M and/or PG_A concurrently.
3294 pmap_clear_bits(l3, PTE_SW_WIRED);
3295 pmap->pm_stats.wired_count--;
3298 if (pv_lists_locked)
3299 rw_runlock(&pvh_global_lock);
3304 * Copy the range specified by src_addr/len
3305 * from the source map to the range dst_addr/len
3306 * in the destination map.
3308 * This routine is only advisory and need not do anything.
3312 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3313 vm_offset_t src_addr)
3319 * pmap_zero_page zeros the specified hardware page by mapping
3320 * the page into KVM and using bzero to clear its contents.
3323 pmap_zero_page(vm_page_t m)
3325 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3327 pagezero((void *)va);
3331 * pmap_zero_page_area zeros the specified hardware page by mapping
3332 * the page into KVM and using bzero to clear its contents.
3334 * off and size may not cover an area beyond a single hardware page.
3337 pmap_zero_page_area(vm_page_t m, int off, int size)
3339 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3341 if (off == 0 && size == PAGE_SIZE)
3342 pagezero((void *)va);
3344 bzero((char *)va + off, size);
3348 * pmap_copy_page copies the specified (machine independent)
3349 * page by mapping the page into virtual memory and using
3350 * bcopy to copy the page, one machine dependent page at a
3354 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3356 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3357 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3359 pagecopy((void *)src, (void *)dst);
3362 int unmapped_buf_allowed = 1;
3365 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3366 vm_offset_t b_offset, int xfersize)
3370 vm_paddr_t p_a, p_b;
3371 vm_offset_t a_pg_offset, b_pg_offset;
3374 while (xfersize > 0) {
3375 a_pg_offset = a_offset & PAGE_MASK;
3376 m_a = ma[a_offset >> PAGE_SHIFT];
3377 p_a = m_a->phys_addr;
3378 b_pg_offset = b_offset & PAGE_MASK;
3379 m_b = mb[b_offset >> PAGE_SHIFT];
3380 p_b = m_b->phys_addr;
3381 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3382 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3383 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3384 panic("!DMAP a %lx", p_a);
3386 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3388 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3389 panic("!DMAP b %lx", p_b);
3391 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3393 bcopy(a_cp, b_cp, cnt);
3401 pmap_quick_enter_page(vm_page_t m)
3404 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3408 pmap_quick_remove_page(vm_offset_t addr)
3413 * Returns true if the pmap's pv is one of the first
3414 * 16 pvs linked to from this page. This count may
3415 * be changed upwards or downwards in the future; it
3416 * is only necessary that true be returned for a small
3417 * subset of pmaps for proper page aging.
3420 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3422 struct md_page *pvh;
3423 struct rwlock *lock;
3428 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3429 ("pmap_page_exists_quick: page %p is not managed", m));
3431 rw_rlock(&pvh_global_lock);
3432 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3434 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3435 if (PV_PMAP(pv) == pmap) {
3443 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3444 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3445 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3446 if (PV_PMAP(pv) == pmap) {
3456 rw_runlock(&pvh_global_lock);
3461 * pmap_page_wired_mappings:
3463 * Return the number of managed mappings to the given physical page
3467 pmap_page_wired_mappings(vm_page_t m)
3469 struct md_page *pvh;
3470 struct rwlock *lock;
3475 int count, md_gen, pvh_gen;
3477 if ((m->oflags & VPO_UNMANAGED) != 0)
3479 rw_rlock(&pvh_global_lock);
3480 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3484 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3486 if (!PMAP_TRYLOCK(pmap)) {
3487 md_gen = m->md.pv_gen;
3491 if (md_gen != m->md.pv_gen) {
3496 l3 = pmap_l3(pmap, pv->pv_va);
3497 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3501 if ((m->flags & PG_FICTITIOUS) == 0) {
3502 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3503 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3505 if (!PMAP_TRYLOCK(pmap)) {
3506 md_gen = m->md.pv_gen;
3507 pvh_gen = pvh->pv_gen;
3511 if (md_gen != m->md.pv_gen ||
3512 pvh_gen != pvh->pv_gen) {
3517 l2 = pmap_l2(pmap, pv->pv_va);
3518 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3524 rw_runlock(&pvh_global_lock);
3529 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3530 struct spglist *free, bool superpage)
3532 struct md_page *pvh;
3536 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3537 pvh = pa_to_pvh(m->phys_addr);
3538 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3540 if (TAILQ_EMPTY(&pvh->pv_list)) {
3541 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3542 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3543 (mt->aflags & PGA_WRITEABLE) != 0)
3544 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3546 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3548 pmap_resident_count_dec(pmap, 1);
3549 KASSERT(mpte->wire_count == Ln_ENTRIES,
3550 ("pmap_remove_pages: pte page wire count error"));
3551 mpte->wire_count = 0;
3552 pmap_add_delayed_free_list(mpte, free, FALSE);
3555 pmap_resident_count_dec(pmap, 1);
3556 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3558 if (TAILQ_EMPTY(&m->md.pv_list) &&
3559 (m->aflags & PGA_WRITEABLE) != 0) {
3560 pvh = pa_to_pvh(m->phys_addr);
3561 if (TAILQ_EMPTY(&pvh->pv_list))
3562 vm_page_aflag_clear(m, PGA_WRITEABLE);
3568 * Destroy all managed, non-wired mappings in the given user-space
3569 * pmap. This pmap cannot be active on any processor besides the
3572 * This function cannot be applied to the kernel pmap. Moreover, it
3573 * is not intended for general use. It is only to be used during
3574 * process termination. Consequently, it can be implemented in ways
3575 * that make it faster than pmap_remove(). First, it can more quickly
3576 * destroy mappings by iterating over the pmap's collection of PV
3577 * entries, rather than searching the page table. Second, it doesn't
3578 * have to test and clear the page table entries atomically, because
3579 * no processor is currently accessing the user address space. In
3580 * particular, a page table entry's dirty bit won't change state once
3581 * this function starts.
3584 pmap_remove_pages(pmap_t pmap)
3586 struct spglist free;
3588 pt_entry_t *pte, tpte;
3591 struct pv_chunk *pc, *npc;
3592 struct rwlock *lock;
3594 uint64_t inuse, bitmask;
3595 int allfree, field, freed, idx;
3601 rw_rlock(&pvh_global_lock);
3603 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3606 for (field = 0; field < _NPCM; field++) {
3607 inuse = ~pc->pc_map[field] & pc_freemask[field];
3608 while (inuse != 0) {
3609 bit = ffsl(inuse) - 1;
3610 bitmask = 1UL << bit;
3611 idx = field * 64 + bit;
3612 pv = &pc->pc_pventry[idx];
3615 pte = pmap_l1(pmap, pv->pv_va);
3616 ptepde = pmap_load(pte);
3617 pte = pmap_l1_to_l2(pte, pv->pv_va);
3618 tpte = pmap_load(pte);
3619 if ((tpte & PTE_RWX) != 0) {
3623 pte = pmap_l2_to_l3(pte, pv->pv_va);
3624 tpte = pmap_load(pte);
3629 * We cannot remove wired pages from a
3630 * process' mapping at this time.
3632 if (tpte & PTE_SW_WIRED) {
3637 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3638 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3639 m < &vm_page_array[vm_page_array_size],
3640 ("pmap_remove_pages: bad pte %#jx",
3646 * Update the vm_page_t clean/reference bits.
3648 if ((tpte & (PTE_D | PTE_W)) ==
3652 mt < &m[Ln_ENTRIES]; mt++)
3658 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3661 pc->pc_map[field] |= bitmask;
3663 pmap_remove_pages_pv(pmap, m, pv, &free,
3665 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3669 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3670 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3671 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3673 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3679 pmap_invalidate_all(pmap);
3680 rw_runlock(&pvh_global_lock);
3682 vm_page_free_pages_toq(&free, false);
3686 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3688 struct md_page *pvh;
3689 struct rwlock *lock;
3691 pt_entry_t *l3, mask;
3694 int md_gen, pvh_gen;
3704 rw_rlock(&pvh_global_lock);
3705 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3708 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3710 if (!PMAP_TRYLOCK(pmap)) {
3711 md_gen = m->md.pv_gen;
3715 if (md_gen != m->md.pv_gen) {
3720 l3 = pmap_l3(pmap, pv->pv_va);
3721 rv = (pmap_load(l3) & mask) == mask;
3726 if ((m->flags & PG_FICTITIOUS) == 0) {
3727 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3728 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3730 if (!PMAP_TRYLOCK(pmap)) {
3731 md_gen = m->md.pv_gen;
3732 pvh_gen = pvh->pv_gen;
3736 if (md_gen != m->md.pv_gen ||
3737 pvh_gen != pvh->pv_gen) {
3742 l2 = pmap_l2(pmap, pv->pv_va);
3743 rv = (pmap_load(l2) & mask) == mask;
3751 rw_runlock(&pvh_global_lock);
3758 * Return whether or not the specified physical page was modified
3759 * in any physical maps.
3762 pmap_is_modified(vm_page_t m)
3765 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3766 ("pmap_is_modified: page %p is not managed", m));
3769 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3770 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
3771 * is clear, no PTEs can have PG_M set.
3773 VM_OBJECT_ASSERT_WLOCKED(m->object);
3774 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3776 return (pmap_page_test_mappings(m, FALSE, TRUE));
3780 * pmap_is_prefaultable:
3782 * Return whether or not the specified virtual address is eligible
3786 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3793 l3 = pmap_l3(pmap, addr);
3794 if (l3 != NULL && pmap_load(l3) != 0) {
3802 * pmap_is_referenced:
3804 * Return whether or not the specified physical page was referenced
3805 * in any physical maps.
3808 pmap_is_referenced(vm_page_t m)
3811 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3812 ("pmap_is_referenced: page %p is not managed", m));
3813 return (pmap_page_test_mappings(m, TRUE, FALSE));
3817 * Clear the write and modified bits in each of the given page's mappings.
3820 pmap_remove_write(vm_page_t m)
3822 struct md_page *pvh;
3823 struct rwlock *lock;
3826 pt_entry_t *l3, oldl3, newl3;
3827 pv_entry_t next_pv, pv;
3829 int md_gen, pvh_gen;
3831 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3832 ("pmap_remove_write: page %p is not managed", m));
3835 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3836 * set by another thread while the object is locked. Thus,
3837 * if PGA_WRITEABLE is clear, no page table entries need updating.
3839 VM_OBJECT_ASSERT_WLOCKED(m->object);
3840 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3842 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3843 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3844 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3845 rw_rlock(&pvh_global_lock);
3848 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3850 if (!PMAP_TRYLOCK(pmap)) {
3851 pvh_gen = pvh->pv_gen;
3855 if (pvh_gen != pvh->pv_gen) {
3862 l2 = pmap_l2(pmap, va);
3863 if ((pmap_load(l2) & PTE_W) != 0)
3864 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3865 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3866 ("inconsistent pv lock %p %p for page %p",
3867 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3870 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3872 if (!PMAP_TRYLOCK(pmap)) {
3873 pvh_gen = pvh->pv_gen;
3874 md_gen = m->md.pv_gen;
3878 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3884 l3 = pmap_l3(pmap, pv->pv_va);
3885 oldl3 = pmap_load(l3);
3887 if ((oldl3 & PTE_W) != 0) {
3888 newl3 = oldl3 & ~(PTE_D | PTE_W);
3889 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3891 if ((oldl3 & PTE_D) != 0)
3893 pmap_invalidate_page(pmap, pv->pv_va);
3898 vm_page_aflag_clear(m, PGA_WRITEABLE);
3899 rw_runlock(&pvh_global_lock);
3903 * pmap_ts_referenced:
3905 * Return a count of reference bits for a page, clearing those bits.
3906 * It is not necessary for every reference bit to be cleared, but it
3907 * is necessary that 0 only be returned when there are truly no
3908 * reference bits set.
3910 * As an optimization, update the page's dirty field if a modified bit is
3911 * found while counting reference bits. This opportunistic update can be
3912 * performed at low cost and can eliminate the need for some future calls
3913 * to pmap_is_modified(). However, since this function stops after
3914 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3915 * dirty pages. Those dirty pages will only be detected by a future call
3916 * to pmap_is_modified().
3919 pmap_ts_referenced(vm_page_t m)
3921 struct spglist free;
3922 struct md_page *pvh;
3923 struct rwlock *lock;
3926 pd_entry_t *l2, l2e;
3927 pt_entry_t *l3, l3e;
3930 int md_gen, pvh_gen, ret;
3932 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3933 ("pmap_ts_referenced: page %p is not managed", m));
3936 pa = VM_PAGE_TO_PHYS(m);
3937 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3939 lock = PHYS_TO_PV_LIST_LOCK(pa);
3940 rw_rlock(&pvh_global_lock);
3943 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3944 goto small_mappings;
3948 if (!PMAP_TRYLOCK(pmap)) {
3949 pvh_gen = pvh->pv_gen;
3953 if (pvh_gen != pvh->pv_gen) {
3959 l2 = pmap_l2(pmap, va);
3960 l2e = pmap_load(l2);
3961 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3963 * Although l2e is mapping a 2MB page, because
3964 * this function is called at a 4KB page granularity,
3965 * we only update the 4KB page under test.
3969 if ((l2e & PTE_A) != 0) {
3971 * Since this reference bit is shared by 512 4KB
3972 * pages, it should not be cleared every time it is
3973 * tested. Apply a simple "hash" function on the
3974 * physical page number, the virtual superpage number,
3975 * and the pmap address to select one 4KB page out of
3976 * the 512 on which testing the reference bit will
3977 * result in clearing that reference bit. This
3978 * function is designed to avoid the selection of the
3979 * same 4KB page for every 2MB page mapping.
3981 * On demotion, a mapping that hasn't been referenced
3982 * is simply destroyed. To avoid the possibility of a
3983 * subsequent page fault on a demoted wired mapping,
3984 * always leave its reference bit set. Moreover,
3985 * since the superpage is wired, the current state of
3986 * its reference bit won't affect page replacement.
3988 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
3989 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
3990 (l2e & PTE_SW_WIRED) == 0) {
3991 pmap_clear_bits(l2, PTE_A);
3992 pmap_invalidate_page(pmap, va);
3997 /* Rotate the PV list if it has more than one entry. */
3998 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
3999 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4000 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4003 if (ret >= PMAP_TS_REFERENCED_MAX)
4005 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4007 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4012 if (!PMAP_TRYLOCK(pmap)) {
4013 pvh_gen = pvh->pv_gen;
4014 md_gen = m->md.pv_gen;
4018 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4023 l2 = pmap_l2(pmap, pv->pv_va);
4025 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4026 ("pmap_ts_referenced: found an invalid l2 table"));
4028 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4029 l3e = pmap_load(l3);
4030 if ((l3e & PTE_D) != 0)
4032 if ((l3e & PTE_A) != 0) {
4033 if ((l3e & PTE_SW_WIRED) == 0) {
4035 * Wired pages cannot be paged out so
4036 * doing accessed bit emulation for
4037 * them is wasted effort. We do the
4038 * hard work for unwired pages only.
4040 pmap_clear_bits(l3, PTE_A);
4041 pmap_invalidate_page(pmap, pv->pv_va);
4046 /* Rotate the PV list if it has more than one entry. */
4047 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4048 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4049 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4052 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && ret <
4053 PMAP_TS_REFERENCED_MAX);
4056 rw_runlock(&pvh_global_lock);
4057 vm_page_free_pages_toq(&free, false);
4062 * Apply the given advice to the specified range of addresses within the
4063 * given pmap. Depending on the advice, clear the referenced and/or
4064 * modified flags in each mapping and set the mapped page's dirty field.
4067 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4072 * Clear the modify bits on the specified physical page.
4075 pmap_clear_modify(vm_page_t m)
4077 struct md_page *pvh;
4078 struct rwlock *lock;
4080 pv_entry_t next_pv, pv;
4081 pd_entry_t *l2, oldl2;
4082 pt_entry_t *l3, oldl3;
4084 int md_gen, pvh_gen;
4086 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4087 ("pmap_clear_modify: page %p is not managed", m));
4088 VM_OBJECT_ASSERT_WLOCKED(m->object);
4089 KASSERT(!vm_page_xbusied(m),
4090 ("pmap_clear_modify: page %p is exclusive busied", m));
4093 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4094 * If the object containing the page is locked and the page is not
4095 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4097 if ((m->aflags & PGA_WRITEABLE) == 0)
4099 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4100 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4101 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4102 rw_rlock(&pvh_global_lock);
4105 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4107 if (!PMAP_TRYLOCK(pmap)) {
4108 pvh_gen = pvh->pv_gen;
4112 if (pvh_gen != pvh->pv_gen) {
4118 l2 = pmap_l2(pmap, va);
4119 oldl2 = pmap_load(l2);
4120 if ((oldl2 & PTE_W) != 0) {
4121 if (pmap_demote_l2_locked(pmap, l2, va, &lock)) {
4122 if ((oldl2 & PTE_SW_WIRED) == 0) {
4124 * Write protect the mapping to a
4125 * single page so that a subsequent
4126 * write access may repromote.
4128 va += VM_PAGE_TO_PHYS(m) -
4130 l3 = pmap_l2_to_l3(l2, va);
4131 oldl3 = pmap_load(l3);
4132 if ((oldl3 & PTE_V) != 0) {
4133 while (!atomic_fcmpset_long(l3,
4134 &oldl3, oldl3 & ~(PTE_D |
4138 pmap_invalidate_page(pmap, va);
4145 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4147 if (!PMAP_TRYLOCK(pmap)) {
4148 md_gen = m->md.pv_gen;
4149 pvh_gen = pvh->pv_gen;
4153 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4158 l2 = pmap_l2(pmap, pv->pv_va);
4159 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4160 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4162 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4163 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4164 pmap_clear_bits(l3, PTE_D);
4165 pmap_invalidate_page(pmap, pv->pv_va);
4170 rw_runlock(&pvh_global_lock);
4174 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4177 return ((void *)PHYS_TO_DMAP(pa));
4181 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4186 * Sets the memory attribute for the specified page.
4189 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4192 m->md.pv_memattr = ma;
4196 * perform the pmap work for mincore
4199 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4201 pt_entry_t *l2, *l3, tpte;
4211 l2 = pmap_l2(pmap, addr);
4212 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4213 if ((tpte & PTE_RWX) != 0) {
4214 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4215 val = MINCORE_INCORE | MINCORE_SUPER;
4217 l3 = pmap_l2_to_l3(l2, addr);
4218 tpte = pmap_load(l3);
4219 if ((tpte & PTE_V) == 0)
4221 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4222 val = MINCORE_INCORE;
4225 if ((tpte & PTE_D) != 0)
4226 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4227 if ((tpte & PTE_A) != 0)
4228 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4229 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4233 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4234 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4235 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4236 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4239 PA_UNLOCK_COND(*locked_pa);
4245 pmap_activate(struct thread *td)
4251 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4252 td->td_pcb->pcb_l1addr = vtophys(pmap->pm_l1);
4254 reg = SATP_MODE_SV39;
4255 reg |= (td->td_pcb->pcb_l1addr >> PAGE_SHIFT);
4258 pmap_invalidate_all(pmap);
4263 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
4268 * From the RISC-V User-Level ISA V2.2:
4270 * "To make a store to instruction memory visible to all
4271 * RISC-V harts, the writing hart has to execute a data FENCE
4272 * before requesting that all remote RISC-V harts execute a
4277 CPU_CLR(PCPU_GET(cpuid), &mask);
4279 sbi_remote_fence_i(mask.__bits);
4284 * Increase the starting virtual address of the given mapping if a
4285 * different alignment might result in more superpage mappings.
4288 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4289 vm_offset_t *addr, vm_size_t size)
4291 vm_offset_t superpage_offset;
4295 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4296 offset += ptoa(object->pg_color);
4297 superpage_offset = offset & L2_OFFSET;
4298 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4299 (*addr & L2_OFFSET) == superpage_offset)
4301 if ((*addr & L2_OFFSET) < superpage_offset)
4302 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4304 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4308 * Get the kernel virtual address of a set of physical pages. If there are
4309 * physical addresses not covered by the DMAP perform a transient mapping
4310 * that will be removed when calling pmap_unmap_io_transient.
4312 * \param page The pages the caller wishes to obtain the virtual
4313 * address on the kernel memory map.
4314 * \param vaddr On return contains the kernel virtual memory address
4315 * of the pages passed in the page parameter.
4316 * \param count Number of pages passed in.
4317 * \param can_fault TRUE if the thread using the mapped pages can take
4318 * page faults, FALSE otherwise.
4320 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4321 * finished or FALSE otherwise.
4325 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4326 boolean_t can_fault)
4329 boolean_t needs_mapping;
4333 * Allocate any KVA space that we need, this is done in a separate
4334 * loop to prevent calling vmem_alloc while pinned.
4336 needs_mapping = FALSE;
4337 for (i = 0; i < count; i++) {
4338 paddr = VM_PAGE_TO_PHYS(page[i]);
4339 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4340 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4341 M_BESTFIT | M_WAITOK, &vaddr[i]);
4342 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4343 needs_mapping = TRUE;
4345 vaddr[i] = PHYS_TO_DMAP(paddr);
4349 /* Exit early if everything is covered by the DMAP */
4355 for (i = 0; i < count; i++) {
4356 paddr = VM_PAGE_TO_PHYS(page[i]);
4357 if (paddr >= DMAP_MAX_PHYSADDR) {
4359 "pmap_map_io_transient: TODO: Map out of DMAP data");
4363 return (needs_mapping);
4367 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4368 boolean_t can_fault)
4375 for (i = 0; i < count; i++) {
4376 paddr = VM_PAGE_TO_PHYS(page[i]);
4377 if (paddr >= DMAP_MAX_PHYSADDR) {
4378 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4384 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4387 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);