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Change synchonization rules for vm_page reference counting.
[FreeBSD/FreeBSD.git] / sys / riscv / riscv / pmap.c
1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
3  *
4  * Copyright (c) 1991 Regents of the University of California.
5  * All rights reserved.
6  * Copyright (c) 1994 John S. Dyson
7  * All rights reserved.
8  * Copyright (c) 1994 David Greenman
9  * All rights reserved.
10  * Copyright (c) 2003 Peter Wemm
11  * All rights reserved.
12  * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13  * All rights reserved.
14  * Copyright (c) 2014 Andrew Turner
15  * All rights reserved.
16  * Copyright (c) 2014 The FreeBSD Foundation
17  * All rights reserved.
18  * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19  * All rights reserved.
20  *
21  * This code is derived from software contributed to Berkeley by
22  * the Systems Programming Group of the University of Utah Computer
23  * Science Department and William Jolitz of UUNET Technologies Inc.
24  *
25  * Portions of this software were developed by Andrew Turner under
26  * sponsorship from The FreeBSD Foundation.
27  *
28  * Portions of this software were developed by SRI International and the
29  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
31  *
32  * Portions of this software were developed by the University of Cambridge
33  * Computer Laboratory as part of the CTSRD Project, with support from the
34  * UK Higher Education Innovation Fund (HEIF).
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  * 3. All advertising materials mentioning features or use of this software
45  *    must display the following acknowledgement:
46  *      This product includes software developed by the University of
47  *      California, Berkeley and its contributors.
48  * 4. Neither the name of the University nor the names of its contributors
49  *    may be used to endorse or promote products derived from this software
50  *    without specific prior written permission.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62  * SUCH DAMAGE.
63  *
64  *      from:   @(#)pmap.c      7.7 (Berkeley)  5/12/91
65  */
66 /*-
67  * Copyright (c) 2003 Networks Associates Technology, Inc.
68  * All rights reserved.
69  *
70  * This software was developed for the FreeBSD Project by Jake Burkholder,
71  * Safeport Network Services, and Network Associates Laboratories, the
72  * Security Research Division of Network Associates, Inc. under
73  * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74  * CHATS research program.
75  *
76  * Redistribution and use in source and binary forms, with or without
77  * modification, are permitted provided that the following conditions
78  * are met:
79  * 1. Redistributions of source code must retain the above copyright
80  *    notice, this list of conditions and the following disclaimer.
81  * 2. Redistributions in binary form must reproduce the above copyright
82  *    notice, this list of conditions and the following disclaimer in the
83  *    documentation and/or other materials provided with the distribution.
84  *
85  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95  * SUCH DAMAGE.
96  */
97
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
100
101 /*
102  *      Manages physical address maps.
103  *
104  *      Since the information managed by this module is
105  *      also stored by the logical address mapping module,
106  *      this module may throw away valid virtual-to-physical
107  *      mappings at almost any time.  However, invalidations
108  *      of virtual-to-physical mappings must be done as
109  *      requested.
110  *
111  *      In order to cope with hardware architectures which
112  *      make virtual-to-physical map invalidates expensive,
113  *      this module may delay invalidate or reduced protection
114  *      operations until such time as they are actually
115  *      necessary.  This module is given full information as
116  *      to which processors are currently using which maps,
117  *      and to when physical maps must be made correct.
118  */
119
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
123 #include <sys/bus.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
126 #include <sys/ktr.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/proc.h>
133 #include <sys/rwlock.h>
134 #include <sys/sx.h>
135 #include <sys/vmem.h>
136 #include <sys/vmmeter.h>
137 #include <sys/sched.h>
138 #include <sys/sysctl.h>
139 #include <sys/smp.h>
140
141 #include <vm/vm.h>
142 #include <vm/vm_param.h>
143 #include <vm/vm_kern.h>
144 #include <vm/vm_page.h>
145 #include <vm/vm_map.h>
146 #include <vm/vm_object.h>
147 #include <vm/vm_extern.h>
148 #include <vm/vm_pageout.h>
149 #include <vm/vm_pager.h>
150 #include <vm/vm_phys.h>
151 #include <vm/vm_radix.h>
152 #include <vm/vm_reserv.h>
153 #include <vm/uma.h>
154
155 #include <machine/machdep.h>
156 #include <machine/md_var.h>
157 #include <machine/pcb.h>
158 #include <machine/sbi.h>
159
160 #define NUL1E           (Ln_ENTRIES * Ln_ENTRIES)
161 #define NUL2E           (Ln_ENTRIES * NUL1E)
162
163 #if !defined(DIAGNOSTIC)
164 #ifdef __GNUC_GNU_INLINE__
165 #define PMAP_INLINE     __attribute__((__gnu_inline__)) inline
166 #else
167 #define PMAP_INLINE     extern inline
168 #endif
169 #else
170 #define PMAP_INLINE
171 #endif
172
173 #ifdef PV_STATS
174 #define PV_STAT(x)      do { x ; } while (0)
175 #else
176 #define PV_STAT(x)      do { } while (0)
177 #endif
178
179 #define pmap_l2_pindex(v)       ((v) >> L2_SHIFT)
180 #define pa_to_pvh(pa)           (&pv_table[pa_index(pa)])
181
182 #define NPV_LIST_LOCKS  MAXCPU
183
184 #define PHYS_TO_PV_LIST_LOCK(pa)        \
185                         (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
186
187 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa)  do {    \
188         struct rwlock **_lockp = (lockp);               \
189         struct rwlock *_new_lock;                       \
190                                                         \
191         _new_lock = PHYS_TO_PV_LIST_LOCK(pa);           \
192         if (_new_lock != *_lockp) {                     \
193                 if (*_lockp != NULL)                    \
194                         rw_wunlock(*_lockp);            \
195                 *_lockp = _new_lock;                    \
196                 rw_wlock(*_lockp);                      \
197         }                                               \
198 } while (0)
199
200 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m)        \
201                         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
202
203 #define RELEASE_PV_LIST_LOCK(lockp)             do {    \
204         struct rwlock **_lockp = (lockp);               \
205                                                         \
206         if (*_lockp != NULL) {                          \
207                 rw_wunlock(*_lockp);                    \
208                 *_lockp = NULL;                         \
209         }                                               \
210 } while (0)
211
212 #define VM_PAGE_TO_PV_LIST_LOCK(m)      \
213                         PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
214
215 /* The list of all the user pmaps */
216 LIST_HEAD(pmaplist, pmap);
217 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
218
219 struct pmap kernel_pmap_store;
220
221 vm_offset_t virtual_avail;      /* VA of first avail page (after kernel bss) */
222 vm_offset_t virtual_end;        /* VA of last avail page (end of kernel AS) */
223 vm_offset_t kernel_vm_end = 0;
224
225 vm_paddr_t dmap_phys_base;      /* The start of the dmap region */
226 vm_paddr_t dmap_phys_max;       /* The limit of the dmap region */
227 vm_offset_t dmap_max_addr;      /* The virtual address limit of the dmap */
228
229 /* This code assumes all L1 DMAP entries will be used */
230 CTASSERT((DMAP_MIN_ADDRESS  & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
231 CTASSERT((DMAP_MAX_ADDRESS  & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
232
233 static struct rwlock_padalign pvh_global_lock;
234 static struct mtx_padalign allpmaps_lock;
235
236 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
237     "VM/pmap parameters");
238
239 static int superpages_enabled = 1;
240 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
241     CTLFLAG_RDTUN, &superpages_enabled, 0,
242     "Enable support for transparent superpages");
243
244 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
245     "2MB page mapping counters");
246
247 static u_long pmap_l2_demotions;
248 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
249     &pmap_l2_demotions, 0,
250     "2MB page demotions");
251
252 static u_long pmap_l2_mappings;
253 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
254     &pmap_l2_mappings, 0,
255     "2MB page mappings");
256
257 static u_long pmap_l2_p_failures;
258 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
259     &pmap_l2_p_failures, 0,
260     "2MB page promotion failures");
261
262 static u_long pmap_l2_promotions;
263 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
264     &pmap_l2_promotions, 0,
265     "2MB page promotions");
266
267 /*
268  * Data for the pv entry allocation mechanism
269  */
270 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
271 static struct mtx pv_chunks_mutex;
272 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
273 static struct md_page *pv_table;
274 static struct md_page pv_dummy;
275
276 extern cpuset_t all_harts;
277
278 /*
279  * Internal flags for pmap_enter()'s helper functions.
280  */
281 #define PMAP_ENTER_NORECLAIM    0x1000000       /* Don't reclaim PV entries. */
282 #define PMAP_ENTER_NOREPLACE    0x2000000       /* Don't replace mappings. */
283
284 static void     free_pv_chunk(struct pv_chunk *pc);
285 static void     free_pv_entry(pmap_t pmap, pv_entry_t pv);
286 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
287 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
288 static void     pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
289 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
290                     vm_offset_t va);
291 static bool     pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
292 static bool     pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
293                     vm_offset_t va, struct rwlock **lockp);
294 static int      pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
295                     u_int flags, vm_page_t m, struct rwlock **lockp);
296 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
297     vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
298 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
299     pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
300 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
301     vm_page_t m, struct rwlock **lockp);
302
303 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
304                 struct rwlock **lockp);
305
306 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
307     struct spglist *free);
308 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
309
310 #define pmap_clear(pte)                 pmap_store(pte, 0)
311 #define pmap_clear_bits(pte, bits)      atomic_clear_64(pte, bits)
312 #define pmap_load_store(pte, entry)     atomic_swap_64(pte, entry)
313 #define pmap_load_clear(pte)            pmap_load_store(pte, 0)
314 #define pmap_load(pte)                  atomic_load_64(pte)
315 #define pmap_store(pte, entry)          atomic_store_64(pte, entry)
316 #define pmap_store_bits(pte, bits)      atomic_set_64(pte, bits)
317
318 /********************/
319 /* Inline functions */
320 /********************/
321
322 static __inline void
323 pagecopy(void *s, void *d)
324 {
325
326         memcpy(d, s, PAGE_SIZE);
327 }
328
329 static __inline void
330 pagezero(void *p)
331 {
332
333         bzero(p, PAGE_SIZE);
334 }
335
336 #define pmap_l1_index(va)       (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
337 #define pmap_l2_index(va)       (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
338 #define pmap_l3_index(va)       (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
339
340 #define PTE_TO_PHYS(pte)        ((pte >> PTE_PPN0_S) * PAGE_SIZE)
341
342 static __inline pd_entry_t *
343 pmap_l1(pmap_t pmap, vm_offset_t va)
344 {
345
346         return (&pmap->pm_l1[pmap_l1_index(va)]);
347 }
348
349 static __inline pd_entry_t *
350 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
351 {
352         vm_paddr_t phys;
353         pd_entry_t *l2;
354
355         phys = PTE_TO_PHYS(pmap_load(l1));
356         l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
357
358         return (&l2[pmap_l2_index(va)]);
359 }
360
361 static __inline pd_entry_t *
362 pmap_l2(pmap_t pmap, vm_offset_t va)
363 {
364         pd_entry_t *l1;
365
366         l1 = pmap_l1(pmap, va);
367         if ((pmap_load(l1) & PTE_V) == 0)
368                 return (NULL);
369         if ((pmap_load(l1) & PTE_RX) != 0)
370                 return (NULL);
371
372         return (pmap_l1_to_l2(l1, va));
373 }
374
375 static __inline pt_entry_t *
376 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
377 {
378         vm_paddr_t phys;
379         pt_entry_t *l3;
380
381         phys = PTE_TO_PHYS(pmap_load(l2));
382         l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
383
384         return (&l3[pmap_l3_index(va)]);
385 }
386
387 static __inline pt_entry_t *
388 pmap_l3(pmap_t pmap, vm_offset_t va)
389 {
390         pd_entry_t *l2;
391
392         l2 = pmap_l2(pmap, va);
393         if (l2 == NULL)
394                 return (NULL);
395         if ((pmap_load(l2) & PTE_V) == 0)
396                 return (NULL);
397         if ((pmap_load(l2) & PTE_RX) != 0)
398                 return (NULL);
399
400         return (pmap_l2_to_l3(l2, va));
401 }
402
403 static __inline void
404 pmap_resident_count_inc(pmap_t pmap, int count)
405 {
406
407         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
408         pmap->pm_stats.resident_count += count;
409 }
410
411 static __inline void
412 pmap_resident_count_dec(pmap_t pmap, int count)
413 {
414
415         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
416         KASSERT(pmap->pm_stats.resident_count >= count,
417             ("pmap %p resident count underflow %ld %d", pmap,
418             pmap->pm_stats.resident_count, count));
419         pmap->pm_stats.resident_count -= count;
420 }
421
422 static void
423 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
424     pt_entry_t entry)
425 {
426         struct pmap *user_pmap;
427         pd_entry_t *l1;
428
429         /* Distribute new kernel L1 entry to all the user pmaps */
430         if (pmap != kernel_pmap)
431                 return;
432
433         mtx_lock(&allpmaps_lock);
434         LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
435                 l1 = &user_pmap->pm_l1[l1index];
436                 pmap_store(l1, entry);
437         }
438         mtx_unlock(&allpmaps_lock);
439 }
440
441 static pt_entry_t *
442 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
443     u_int *l2_slot)
444 {
445         pt_entry_t *l2;
446         pd_entry_t *l1;
447
448         l1 = (pd_entry_t *)l1pt;
449         *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
450
451         /* Check locore has used a table L1 map */
452         KASSERT((l1[*l1_slot] & PTE_RX) == 0,
453                 ("Invalid bootstrap L1 table"));
454
455         /* Find the address of the L2 table */
456         l2 = (pt_entry_t *)init_pt_va;
457         *l2_slot = pmap_l2_index(va);
458
459         return (l2);
460 }
461
462 static vm_paddr_t
463 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
464 {
465         u_int l1_slot, l2_slot;
466         pt_entry_t *l2;
467         vm_paddr_t ret;
468
469         l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
470
471         /* Check locore has used L2 superpages */
472         KASSERT((l2[l2_slot] & PTE_RX) != 0,
473                 ("Invalid bootstrap L2 table"));
474
475         /* L2 is superpages */
476         ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
477         ret += (va & L2_OFFSET);
478
479         return (ret);
480 }
481
482 static void
483 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
484 {
485         vm_offset_t va;
486         vm_paddr_t pa;
487         pd_entry_t *l1;
488         u_int l1_slot;
489         pt_entry_t entry;
490         pn_t pn;
491
492         pa = dmap_phys_base = min_pa & ~L1_OFFSET;
493         va = DMAP_MIN_ADDRESS;
494         l1 = (pd_entry_t *)kern_l1;
495         l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
496
497         for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
498             pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
499                 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
500
501                 /* superpages */
502                 pn = (pa / PAGE_SIZE);
503                 entry = PTE_KERN;
504                 entry |= (pn << PTE_PPN0_S);
505                 pmap_store(&l1[l1_slot], entry);
506         }
507
508         /* Set the upper limit of the DMAP region */
509         dmap_phys_max = pa;
510         dmap_max_addr = va;
511
512         sfence_vma();
513 }
514
515 static vm_offset_t
516 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
517 {
518         vm_offset_t l3pt;
519         pt_entry_t entry;
520         pd_entry_t *l2;
521         vm_paddr_t pa;
522         u_int l2_slot;
523         pn_t pn;
524
525         KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
526
527         l2 = pmap_l2(kernel_pmap, va);
528         l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
529         l2_slot = pmap_l2_index(va);
530         l3pt = l3_start;
531
532         for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
533                 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
534
535                 pa = pmap_early_vtophys(l1pt, l3pt);
536                 pn = (pa / PAGE_SIZE);
537                 entry = (PTE_V);
538                 entry |= (pn << PTE_PPN0_S);
539                 pmap_store(&l2[l2_slot], entry);
540                 l3pt += PAGE_SIZE;
541         }
542
543
544         /* Clean the L2 page table */
545         memset((void *)l3_start, 0, l3pt - l3_start);
546
547         return (l3pt);
548 }
549
550 /*
551  *      Bootstrap the system enough to run with virtual memory.
552  */
553 void
554 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
555 {
556         u_int l1_slot, l2_slot, avail_slot, map_slot;
557         vm_offset_t freemempos;
558         vm_offset_t dpcpu, msgbufpv;
559         vm_paddr_t end, max_pa, min_pa, pa, start;
560         int i;
561
562         printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
563         printf("%lx\n", l1pt);
564         printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
565
566         /* Set this early so we can use the pagetable walking functions */
567         kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
568         PMAP_LOCK_INIT(kernel_pmap);
569
570         rw_init(&pvh_global_lock, "pmap pv global");
571
572         CPU_FILL(&kernel_pmap->pm_active);
573
574         /* Assume the address we were loaded to is a valid physical address. */
575         min_pa = max_pa = kernstart;
576
577         /*
578          * Find the minimum physical address. physmap is sorted,
579          * but may contain empty ranges.
580          */
581         for (i = 0; i < physmap_idx * 2; i += 2) {
582                 if (physmap[i] == physmap[i + 1])
583                         continue;
584                 if (physmap[i] <= min_pa)
585                         min_pa = physmap[i];
586                 if (physmap[i + 1] > max_pa)
587                         max_pa = physmap[i + 1];
588         }
589         printf("physmap_idx %lx\n", physmap_idx);
590         printf("min_pa %lx\n", min_pa);
591         printf("max_pa %lx\n", max_pa);
592
593         /* Create a direct map region early so we can use it for pa -> va */
594         pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
595
596         /*
597          * Read the page table to find out what is already mapped.
598          * This assumes we have mapped a block of memory from KERNBASE
599          * using a single L1 entry.
600          */
601         (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
602
603         /* Sanity check the index, KERNBASE should be the first VA */
604         KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
605
606         freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
607
608         /* Create the l3 tables for the early devmap */
609         freemempos = pmap_bootstrap_l3(l1pt,
610             VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
611
612         sfence_vma();
613
614 #define alloc_pages(var, np)                                            \
615         (var) = freemempos;                                             \
616         freemempos += (np * PAGE_SIZE);                                 \
617         memset((char *)(var), 0, ((np) * PAGE_SIZE));
618
619         /* Allocate dynamic per-cpu area. */
620         alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
621         dpcpu_init((void *)dpcpu, 0);
622
623         /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
624         alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
625         msgbufp = (void *)msgbufpv;
626
627         virtual_avail = roundup2(freemempos, L2_SIZE);
628         virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
629         kernel_vm_end = virtual_avail;
630         
631         pa = pmap_early_vtophys(l1pt, freemempos);
632
633         /* Initialize phys_avail and dump_avail. */
634         for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
635             map_slot += 2) {
636                 start = physmap[map_slot];
637                 end = physmap[map_slot + 1];
638
639                 if (start == end)
640                         continue;
641                 dump_avail[map_slot] = start;
642                 dump_avail[map_slot + 1] = end;
643                 realmem += atop((vm_offset_t)(end - start));
644
645                 if (start >= kernstart && end <= pa)
646                         continue;
647
648                 if (start < kernstart && end > kernstart)
649                         end = kernstart;
650                 else if (start < pa && end > pa)
651                         start = pa;
652                 phys_avail[avail_slot] = start;
653                 phys_avail[avail_slot + 1] = end;
654                 physmem += (end - start) >> PAGE_SHIFT;
655                 avail_slot += 2;
656
657                 if (end != physmap[map_slot + 1] && end > pa) {
658                         phys_avail[avail_slot] = pa;
659                         phys_avail[avail_slot + 1] = physmap[map_slot + 1];
660                         physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
661                         avail_slot += 2;
662                 }
663         }
664         phys_avail[avail_slot] = 0;
665         phys_avail[avail_slot + 1] = 0;
666
667         /*
668          * Maxmem isn't the "maximum memory", it's one larger than the
669          * highest page of the physical address space.  It should be
670          * called something like "Maxphyspage".
671          */
672         Maxmem = atop(phys_avail[avail_slot - 1]);
673 }
674
675 /*
676  *      Initialize a vm_page's machine-dependent fields.
677  */
678 void
679 pmap_page_init(vm_page_t m)
680 {
681
682         TAILQ_INIT(&m->md.pv_list);
683         m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
684 }
685
686 /*
687  *      Initialize the pmap module.
688  *      Called by vm_init, to initialize any structures that the pmap
689  *      system needs to map virtual memory.
690  */
691 void
692 pmap_init(void)
693 {
694         vm_size_t s;
695         int i, pv_npg;
696
697         /*
698          * Initialize the pv chunk and pmap list mutexes.
699          */
700         mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
701         mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
702
703         /*
704          * Initialize the pool of pv list locks.
705          */
706         for (i = 0; i < NPV_LIST_LOCKS; i++)
707                 rw_init(&pv_list_locks[i], "pmap pv list");
708
709         /*
710          * Calculate the size of the pv head table for superpages.
711          */
712         pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
713
714         /*
715          * Allocate memory for the pv head table for superpages.
716          */
717         s = (vm_size_t)(pv_npg * sizeof(struct md_page));
718         s = round_page(s);
719         pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
720         for (i = 0; i < pv_npg; i++)
721                 TAILQ_INIT(&pv_table[i].pv_list);
722         TAILQ_INIT(&pv_dummy.pv_list);
723
724         if (superpages_enabled)
725                 pagesizes[1] = L2_SIZE;
726 }
727
728 #ifdef SMP
729 /*
730  * For SMP, these functions have to use IPIs for coherence.
731  *
732  * In general, the calling thread uses a plain fence to order the
733  * writes to the page tables before invoking an SBI callback to invoke
734  * sfence_vma() on remote CPUs.
735  */
736 static void
737 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
738 {
739         cpuset_t mask;
740
741         sched_pin();
742         mask = pmap->pm_active;
743         CPU_CLR(PCPU_GET(hart), &mask);
744         fence();
745         if (!CPU_EMPTY(&mask) && smp_started)
746                 sbi_remote_sfence_vma(mask.__bits, va, 1);
747         sfence_vma_page(va);
748         sched_unpin();
749 }
750
751 static void
752 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
753 {
754         cpuset_t mask;
755
756         sched_pin();
757         mask = pmap->pm_active;
758         CPU_CLR(PCPU_GET(hart), &mask);
759         fence();
760         if (!CPU_EMPTY(&mask) && smp_started)
761                 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
762
763         /*
764          * Might consider a loop of sfence_vma_page() for a small
765          * number of pages in the future.
766          */
767         sfence_vma();
768         sched_unpin();
769 }
770
771 static void
772 pmap_invalidate_all(pmap_t pmap)
773 {
774         cpuset_t mask;
775
776         sched_pin();
777         mask = pmap->pm_active;
778         CPU_CLR(PCPU_GET(hart), &mask);
779
780         /*
781          * XXX: The SBI doc doesn't detail how to specify x0 as the
782          * address to perform a global fence.  BBL currently treats
783          * all sfence_vma requests as global however.
784          */
785         fence();
786         if (!CPU_EMPTY(&mask) && smp_started)
787                 sbi_remote_sfence_vma(mask.__bits, 0, 0);
788         sfence_vma();
789         sched_unpin();
790 }
791 #else
792 /*
793  * Normal, non-SMP, invalidation functions.
794  * We inline these within pmap.c for speed.
795  */
796 static __inline void
797 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
798 {
799
800         sfence_vma_page(va);
801 }
802
803 static __inline void
804 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
805 {
806
807         /*
808          * Might consider a loop of sfence_vma_page() for a small
809          * number of pages in the future.
810          */
811         sfence_vma();
812 }
813
814 static __inline void
815 pmap_invalidate_all(pmap_t pmap)
816 {
817
818         sfence_vma();
819 }
820 #endif
821
822 /*
823  *      Routine:        pmap_extract
824  *      Function:
825  *              Extract the physical page address associated
826  *              with the given map/virtual_address pair.
827  */
828 vm_paddr_t 
829 pmap_extract(pmap_t pmap, vm_offset_t va)
830 {
831         pd_entry_t *l2p, l2;
832         pt_entry_t *l3p, l3;
833         vm_paddr_t pa;
834
835         pa = 0;
836         PMAP_LOCK(pmap);
837         /*
838          * Start with the l2 tabel. We are unable to allocate
839          * pages in the l1 table.
840          */
841         l2p = pmap_l2(pmap, va);
842         if (l2p != NULL) {
843                 l2 = pmap_load(l2p);
844                 if ((l2 & PTE_RX) == 0) {
845                         l3p = pmap_l2_to_l3(l2p, va);
846                         if (l3p != NULL) {
847                                 l3 = pmap_load(l3p);
848                                 pa = PTE_TO_PHYS(l3);
849                                 pa |= (va & L3_OFFSET);
850                         }
851                 } else {
852                         /* L2 is superpages */
853                         pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
854                         pa |= (va & L2_OFFSET);
855                 }
856         }
857         PMAP_UNLOCK(pmap);
858         return (pa);
859 }
860
861 /*
862  *      Routine:        pmap_extract_and_hold
863  *      Function:
864  *              Atomically extract and hold the physical page
865  *              with the given pmap and virtual address pair
866  *              if that mapping permits the given protection.
867  */
868 vm_page_t
869 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
870 {
871         pt_entry_t *l3p, l3;
872         vm_paddr_t phys;
873         vm_page_t m;
874
875         m = NULL;
876         PMAP_LOCK(pmap);
877         l3p = pmap_l3(pmap, va);
878         if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
879                 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
880                         phys = PTE_TO_PHYS(l3);
881                         m = PHYS_TO_VM_PAGE(phys);
882                         if (!vm_page_wire_mapped(m))
883                                 m = NULL;
884                 }
885         }
886         PMAP_UNLOCK(pmap);
887         return (m);
888 }
889
890 vm_paddr_t
891 pmap_kextract(vm_offset_t va)
892 {
893         pd_entry_t *l2;
894         pt_entry_t *l3;
895         vm_paddr_t pa;
896
897         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
898                 pa = DMAP_TO_PHYS(va);
899         } else {
900                 l2 = pmap_l2(kernel_pmap, va);
901                 if (l2 == NULL)
902                         panic("pmap_kextract: No l2");
903                 if ((pmap_load(l2) & PTE_RX) != 0) {
904                         /* superpages */
905                         pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
906                         pa |= (va & L2_OFFSET);
907                         return (pa);
908                 }
909
910                 l3 = pmap_l2_to_l3(l2, va);
911                 if (l3 == NULL)
912                         panic("pmap_kextract: No l3...");
913                 pa = PTE_TO_PHYS(pmap_load(l3));
914                 pa |= (va & PAGE_MASK);
915         }
916         return (pa);
917 }
918
919 /***************************************************
920  * Low level mapping routines.....
921  ***************************************************/
922
923 void
924 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
925 {
926         pt_entry_t entry;
927         pt_entry_t *l3;
928         vm_offset_t va;
929         pn_t pn;
930
931         KASSERT((pa & L3_OFFSET) == 0,
932            ("pmap_kenter_device: Invalid physical address"));
933         KASSERT((sva & L3_OFFSET) == 0,
934            ("pmap_kenter_device: Invalid virtual address"));
935         KASSERT((size & PAGE_MASK) == 0,
936             ("pmap_kenter_device: Mapping is not page-sized"));
937
938         va = sva;
939         while (size != 0) {
940                 l3 = pmap_l3(kernel_pmap, va);
941                 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
942
943                 pn = (pa / PAGE_SIZE);
944                 entry = PTE_KERN;
945                 entry |= (pn << PTE_PPN0_S);
946                 pmap_store(l3, entry);
947
948                 va += PAGE_SIZE;
949                 pa += PAGE_SIZE;
950                 size -= PAGE_SIZE;
951         }
952         pmap_invalidate_range(kernel_pmap, sva, va);
953 }
954
955 /*
956  * Remove a page from the kernel pagetables.
957  * Note: not SMP coherent.
958  */
959 PMAP_INLINE void
960 pmap_kremove(vm_offset_t va)
961 {
962         pt_entry_t *l3;
963
964         l3 = pmap_l3(kernel_pmap, va);
965         KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
966
967         pmap_clear(l3);
968         sfence_vma();
969 }
970
971 void
972 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
973 {
974         pt_entry_t *l3;
975         vm_offset_t va;
976
977         KASSERT((sva & L3_OFFSET) == 0,
978            ("pmap_kremove_device: Invalid virtual address"));
979         KASSERT((size & PAGE_MASK) == 0,
980             ("pmap_kremove_device: Mapping is not page-sized"));
981
982         va = sva;
983         while (size != 0) {
984                 l3 = pmap_l3(kernel_pmap, va);
985                 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
986                 pmap_clear(l3);
987
988                 va += PAGE_SIZE;
989                 size -= PAGE_SIZE;
990         }
991
992         pmap_invalidate_range(kernel_pmap, sva, va);
993 }
994
995 /*
996  *      Used to map a range of physical addresses into kernel
997  *      virtual address space.
998  *
999  *      The value passed in '*virt' is a suggested virtual address for
1000  *      the mapping. Architectures which can support a direct-mapped
1001  *      physical to virtual region can return the appropriate address
1002  *      within that region, leaving '*virt' unchanged. Other
1003  *      architectures should map the pages starting at '*virt' and
1004  *      update '*virt' with the first usable address after the mapped
1005  *      region.
1006  */
1007 vm_offset_t
1008 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1009 {
1010
1011         return PHYS_TO_DMAP(start);
1012 }
1013
1014
1015 /*
1016  * Add a list of wired pages to the kva
1017  * this routine is only used for temporary
1018  * kernel mappings that do not need to have
1019  * page modification or references recorded.
1020  * Note that old mappings are simply written
1021  * over.  The page *must* be wired.
1022  * Note: SMP coherent.  Uses a ranged shootdown IPI.
1023  */
1024 void
1025 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1026 {
1027         pt_entry_t *l3, pa;
1028         vm_offset_t va;
1029         vm_page_t m;
1030         pt_entry_t entry;
1031         pn_t pn;
1032         int i;
1033
1034         va = sva;
1035         for (i = 0; i < count; i++) {
1036                 m = ma[i];
1037                 pa = VM_PAGE_TO_PHYS(m);
1038                 pn = (pa / PAGE_SIZE);
1039                 l3 = pmap_l3(kernel_pmap, va);
1040
1041                 entry = PTE_KERN;
1042                 entry |= (pn << PTE_PPN0_S);
1043                 pmap_store(l3, entry);
1044
1045                 va += L3_SIZE;
1046         }
1047         pmap_invalidate_range(kernel_pmap, sva, va);
1048 }
1049
1050 /*
1051  * This routine tears out page mappings from the
1052  * kernel -- it is meant only for temporary mappings.
1053  * Note: SMP coherent.  Uses a ranged shootdown IPI.
1054  */
1055 void
1056 pmap_qremove(vm_offset_t sva, int count)
1057 {
1058         pt_entry_t *l3;
1059         vm_offset_t va;
1060
1061         KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1062
1063         for (va = sva; count-- > 0; va += PAGE_SIZE) {
1064                 l3 = pmap_l3(kernel_pmap, va);
1065                 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1066                 pmap_clear(l3);
1067         }
1068         pmap_invalidate_range(kernel_pmap, sva, va);
1069 }
1070
1071 bool
1072 pmap_ps_enabled(pmap_t pmap __unused)
1073 {
1074
1075         return (superpages_enabled);
1076 }
1077
1078 /***************************************************
1079  * Page table page management routines.....
1080  ***************************************************/
1081 /*
1082  * Schedule the specified unused page table page to be freed.  Specifically,
1083  * add the page to the specified list of pages that will be released to the
1084  * physical memory manager after the TLB has been updated.
1085  */
1086 static __inline void
1087 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1088     boolean_t set_PG_ZERO)
1089 {
1090
1091         if (set_PG_ZERO)
1092                 m->flags |= PG_ZERO;
1093         else
1094                 m->flags &= ~PG_ZERO;
1095         SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1096 }
1097
1098 /*
1099  * Inserts the specified page table page into the specified pmap's collection
1100  * of idle page table pages.  Each of a pmap's page table pages is responsible
1101  * for mapping a distinct range of virtual addresses.  The pmap's collection is
1102  * ordered by this virtual address range.
1103  *
1104  * If "promoted" is false, then the page table page "ml3" must be zero filled.
1105  */
1106 static __inline int
1107 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3, bool promoted)
1108 {
1109
1110         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1111         ml3->valid = promoted ? VM_PAGE_BITS_ALL : 0;
1112         return (vm_radix_insert(&pmap->pm_root, ml3));
1113 }
1114
1115 /*
1116  * Removes the page table page mapping the specified virtual address from the
1117  * specified pmap's collection of idle page table pages, and returns it.
1118  * Otherwise, returns NULL if there is no page table page corresponding to the
1119  * specified virtual address.
1120  */
1121 static __inline vm_page_t
1122 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1123 {
1124
1125         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1126         return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1127 }
1128         
1129 /*
1130  * Decrements a page table page's wire count, which is used to record the
1131  * number of valid page table entries within the page.  If the wire count
1132  * drops to zero, then the page table page is unmapped.  Returns TRUE if the
1133  * page table page was unmapped and FALSE otherwise.
1134  */
1135 static inline boolean_t
1136 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1137 {
1138
1139         --m->wire_count;
1140         if (m->wire_count == 0) {
1141                 _pmap_unwire_ptp(pmap, va, m, free);
1142                 return (TRUE);
1143         } else {
1144                 return (FALSE);
1145         }
1146 }
1147
1148 static void
1149 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1150 {
1151         vm_paddr_t phys;
1152
1153         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1154         if (m->pindex >= NUL1E) {
1155                 pd_entry_t *l1;
1156                 l1 = pmap_l1(pmap, va);
1157                 pmap_clear(l1);
1158                 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1159         } else {
1160                 pd_entry_t *l2;
1161                 l2 = pmap_l2(pmap, va);
1162                 pmap_clear(l2);
1163         }
1164         pmap_resident_count_dec(pmap, 1);
1165         if (m->pindex < NUL1E) {
1166                 pd_entry_t *l1;
1167                 vm_page_t pdpg;
1168
1169                 l1 = pmap_l1(pmap, va);
1170                 phys = PTE_TO_PHYS(pmap_load(l1));
1171                 pdpg = PHYS_TO_VM_PAGE(phys);
1172                 pmap_unwire_ptp(pmap, va, pdpg, free);
1173         }
1174         pmap_invalidate_page(pmap, va);
1175
1176         vm_wire_sub(1);
1177
1178         /* 
1179          * Put page on a list so that it is released after
1180          * *ALL* TLB shootdown is done
1181          */
1182         pmap_add_delayed_free_list(m, free, TRUE);
1183 }
1184
1185 /*
1186  * After removing a page table entry, this routine is used to
1187  * conditionally free the page, and manage the hold/wire counts.
1188  */
1189 static int
1190 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1191     struct spglist *free)
1192 {
1193         vm_page_t mpte;
1194
1195         if (va >= VM_MAXUSER_ADDRESS)
1196                 return (0);
1197         KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1198         mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1199         return (pmap_unwire_ptp(pmap, va, mpte, free));
1200 }
1201
1202 void
1203 pmap_pinit0(pmap_t pmap)
1204 {
1205
1206         PMAP_LOCK_INIT(pmap);
1207         bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1208         pmap->pm_l1 = kernel_pmap->pm_l1;
1209         pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1210         CPU_ZERO(&pmap->pm_active);
1211         pmap_activate_boot(pmap);
1212 }
1213
1214 int
1215 pmap_pinit(pmap_t pmap)
1216 {
1217         vm_paddr_t l1phys;
1218         vm_page_t l1pt;
1219
1220         /*
1221          * allocate the l1 page
1222          */
1223         while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1224             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1225                 vm_wait(NULL);
1226
1227         l1phys = VM_PAGE_TO_PHYS(l1pt);
1228         pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1229         pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1230
1231         if ((l1pt->flags & PG_ZERO) == 0)
1232                 pagezero(pmap->pm_l1);
1233
1234         bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1235
1236         CPU_ZERO(&pmap->pm_active);
1237
1238         /* Install kernel pagetables */
1239         memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1240
1241         /* Add to the list of all user pmaps */
1242         mtx_lock(&allpmaps_lock);
1243         LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1244         mtx_unlock(&allpmaps_lock);
1245
1246         vm_radix_init(&pmap->pm_root);
1247
1248         return (1);
1249 }
1250
1251 /*
1252  * This routine is called if the desired page table page does not exist.
1253  *
1254  * If page table page allocation fails, this routine may sleep before
1255  * returning NULL.  It sleeps only if a lock pointer was given.
1256  *
1257  * Note: If a page allocation fails at page table level two or three,
1258  * one or two pages may be held during the wait, only to be released
1259  * afterwards.  This conservative approach is easily argued to avoid
1260  * race conditions.
1261  */
1262 static vm_page_t
1263 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1264 {
1265         vm_page_t m, /*pdppg, */pdpg;
1266         pt_entry_t entry;
1267         vm_paddr_t phys;
1268         pn_t pn;
1269
1270         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1271
1272         /*
1273          * Allocate a page table page.
1274          */
1275         if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1276             VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1277                 if (lockp != NULL) {
1278                         RELEASE_PV_LIST_LOCK(lockp);
1279                         PMAP_UNLOCK(pmap);
1280                         rw_runlock(&pvh_global_lock);
1281                         vm_wait(NULL);
1282                         rw_rlock(&pvh_global_lock);
1283                         PMAP_LOCK(pmap);
1284                 }
1285
1286                 /*
1287                  * Indicate the need to retry.  While waiting, the page table
1288                  * page may have been allocated.
1289                  */
1290                 return (NULL);
1291         }
1292
1293         if ((m->flags & PG_ZERO) == 0)
1294                 pmap_zero_page(m);
1295
1296         /*
1297          * Map the pagetable page into the process address space, if
1298          * it isn't already there.
1299          */
1300
1301         if (ptepindex >= NUL1E) {
1302                 pd_entry_t *l1;
1303                 vm_pindex_t l1index;
1304
1305                 l1index = ptepindex - NUL1E;
1306                 l1 = &pmap->pm_l1[l1index];
1307
1308                 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1309                 entry = (PTE_V);
1310                 entry |= (pn << PTE_PPN0_S);
1311                 pmap_store(l1, entry);
1312                 pmap_distribute_l1(pmap, l1index, entry);
1313         } else {
1314                 vm_pindex_t l1index;
1315                 pd_entry_t *l1, *l2;
1316
1317                 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1318                 l1 = &pmap->pm_l1[l1index];
1319                 if (pmap_load(l1) == 0) {
1320                         /* recurse for allocating page dir */
1321                         if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1322                             lockp) == NULL) {
1323                                 vm_page_unwire_noq(m);
1324                                 vm_page_free_zero(m);
1325                                 return (NULL);
1326                         }
1327                 } else {
1328                         phys = PTE_TO_PHYS(pmap_load(l1));
1329                         pdpg = PHYS_TO_VM_PAGE(phys);
1330                         pdpg->wire_count++;
1331                 }
1332
1333                 phys = PTE_TO_PHYS(pmap_load(l1));
1334                 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1335                 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1336
1337                 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1338                 entry = (PTE_V);
1339                 entry |= (pn << PTE_PPN0_S);
1340                 pmap_store(l2, entry);
1341         }
1342
1343         pmap_resident_count_inc(pmap, 1);
1344
1345         return (m);
1346 }
1347
1348 static vm_page_t
1349 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1350 {
1351         pd_entry_t *l1;
1352         vm_page_t l2pg;
1353         vm_pindex_t l2pindex;
1354
1355 retry:
1356         l1 = pmap_l1(pmap, va);
1357         if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1358                 /* Add a reference to the L2 page. */
1359                 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1360                 l2pg->wire_count++;
1361         } else {
1362                 /* Allocate a L2 page. */
1363                 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1364                 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1365                 if (l2pg == NULL && lockp != NULL)
1366                         goto retry;
1367         }
1368         return (l2pg);
1369 }
1370
1371 static vm_page_t
1372 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1373 {
1374         vm_pindex_t ptepindex;
1375         pd_entry_t *l2;
1376         vm_paddr_t phys;
1377         vm_page_t m;
1378
1379         /*
1380          * Calculate pagetable page index
1381          */
1382         ptepindex = pmap_l2_pindex(va);
1383 retry:
1384         /*
1385          * Get the page directory entry
1386          */
1387         l2 = pmap_l2(pmap, va);
1388
1389         /*
1390          * If the page table page is mapped, we just increment the
1391          * hold count, and activate it.
1392          */
1393         if (l2 != NULL && pmap_load(l2) != 0) {
1394                 phys = PTE_TO_PHYS(pmap_load(l2));
1395                 m = PHYS_TO_VM_PAGE(phys);
1396                 m->wire_count++;
1397         } else {
1398                 /*
1399                  * Here if the pte page isn't mapped, or if it has been
1400                  * deallocated.
1401                  */
1402                 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1403                 if (m == NULL && lockp != NULL)
1404                         goto retry;
1405         }
1406         return (m);
1407 }
1408
1409
1410 /***************************************************
1411  * Pmap allocation/deallocation routines.
1412  ***************************************************/
1413
1414 /*
1415  * Release any resources held by the given physical map.
1416  * Called when a pmap initialized by pmap_pinit is being released.
1417  * Should only be called if the map contains no valid mappings.
1418  */
1419 void
1420 pmap_release(pmap_t pmap)
1421 {
1422         vm_page_t m;
1423
1424         KASSERT(pmap->pm_stats.resident_count == 0,
1425             ("pmap_release: pmap resident count %ld != 0",
1426             pmap->pm_stats.resident_count));
1427         KASSERT(CPU_EMPTY(&pmap->pm_active),
1428             ("releasing active pmap %p", pmap));
1429
1430         mtx_lock(&allpmaps_lock);
1431         LIST_REMOVE(pmap, pm_list);
1432         mtx_unlock(&allpmaps_lock);
1433
1434         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1435         vm_page_unwire_noq(m);
1436         vm_page_free(m);
1437 }
1438
1439 #if 0
1440 static int
1441 kvm_size(SYSCTL_HANDLER_ARGS)
1442 {
1443         unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1444
1445         return sysctl_handle_long(oidp, &ksize, 0, req);
1446 }
1447 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 
1448     0, 0, kvm_size, "LU", "Size of KVM");
1449
1450 static int
1451 kvm_free(SYSCTL_HANDLER_ARGS)
1452 {
1453         unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1454
1455         return sysctl_handle_long(oidp, &kfree, 0, req);
1456 }
1457 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 
1458     0, 0, kvm_free, "LU", "Amount of KVM free");
1459 #endif /* 0 */
1460
1461 /*
1462  * grow the number of kernel page table entries, if needed
1463  */
1464 void
1465 pmap_growkernel(vm_offset_t addr)
1466 {
1467         vm_paddr_t paddr;
1468         vm_page_t nkpg;
1469         pd_entry_t *l1, *l2;
1470         pt_entry_t entry;
1471         pn_t pn;
1472
1473         mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1474
1475         addr = roundup2(addr, L2_SIZE);
1476         if (addr - 1 >= vm_map_max(kernel_map))
1477                 addr = vm_map_max(kernel_map);
1478         while (kernel_vm_end < addr) {
1479                 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1480                 if (pmap_load(l1) == 0) {
1481                         /* We need a new PDP entry */
1482                         nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1483                             VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1484                             VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1485                         if (nkpg == NULL)
1486                                 panic("pmap_growkernel: no memory to grow kernel");
1487                         if ((nkpg->flags & PG_ZERO) == 0)
1488                                 pmap_zero_page(nkpg);
1489                         paddr = VM_PAGE_TO_PHYS(nkpg);
1490
1491                         pn = (paddr / PAGE_SIZE);
1492                         entry = (PTE_V);
1493                         entry |= (pn << PTE_PPN0_S);
1494                         pmap_store(l1, entry);
1495                         pmap_distribute_l1(kernel_pmap,
1496                             pmap_l1_index(kernel_vm_end), entry);
1497                         continue; /* try again */
1498                 }
1499                 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1500                 if ((pmap_load(l2) & PTE_V) != 0 &&
1501                     (pmap_load(l2) & PTE_RWX) == 0) {
1502                         kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1503                         if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1504                                 kernel_vm_end = vm_map_max(kernel_map);
1505                                 break;
1506                         }
1507                         continue;
1508                 }
1509
1510                 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1511                     VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1512                     VM_ALLOC_ZERO);
1513                 if (nkpg == NULL)
1514                         panic("pmap_growkernel: no memory to grow kernel");
1515                 if ((nkpg->flags & PG_ZERO) == 0) {
1516                         pmap_zero_page(nkpg);
1517                 }
1518                 paddr = VM_PAGE_TO_PHYS(nkpg);
1519
1520                 pn = (paddr / PAGE_SIZE);
1521                 entry = (PTE_V);
1522                 entry |= (pn << PTE_PPN0_S);
1523                 pmap_store(l2, entry);
1524
1525                 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1526
1527                 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1528                 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1529                         kernel_vm_end = vm_map_max(kernel_map);
1530                         break;                       
1531                 }
1532         }
1533 }
1534
1535
1536 /***************************************************
1537  * page management routines.
1538  ***************************************************/
1539
1540 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1541 CTASSERT(_NPCM == 3);
1542 CTASSERT(_NPCPV == 168);
1543
1544 static __inline struct pv_chunk *
1545 pv_to_chunk(pv_entry_t pv)
1546 {
1547
1548         return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1549 }
1550
1551 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1552
1553 #define PC_FREE0        0xfffffffffffffffful
1554 #define PC_FREE1        0xfffffffffffffffful
1555 #define PC_FREE2        0x000000fffffffffful
1556
1557 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1558
1559 #if 0
1560 #ifdef PV_STATS
1561 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1562
1563 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1564         "Current number of pv entry chunks");
1565 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1566         "Current number of pv entry chunks allocated");
1567 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1568         "Current number of pv entry chunks frees");
1569 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1570         "Number of times tried to get a chunk page but failed.");
1571
1572 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1573 static int pv_entry_spare;
1574
1575 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1576         "Current number of pv entry frees");
1577 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1578         "Current number of pv entry allocs");
1579 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1580         "Current number of pv entries");
1581 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1582         "Current number of spare pv entries");
1583 #endif
1584 #endif /* 0 */
1585
1586 /*
1587  * We are in a serious low memory condition.  Resort to
1588  * drastic measures to free some pages so we can allocate
1589  * another pv entry chunk.
1590  *
1591  * Returns NULL if PV entries were reclaimed from the specified pmap.
1592  *
1593  * We do not, however, unmap 2mpages because subsequent accesses will
1594  * allocate per-page pv entries until repromotion occurs, thereby
1595  * exacerbating the shortage of free pv entries.
1596  */
1597 static vm_page_t
1598 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1599 {
1600
1601         panic("RISCVTODO: reclaim_pv_chunk");
1602 }
1603
1604 /*
1605  * free the pv_entry back to the free list
1606  */
1607 static void
1608 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1609 {
1610         struct pv_chunk *pc;
1611         int idx, field, bit;
1612
1613         rw_assert(&pvh_global_lock, RA_LOCKED);
1614         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1615         PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1616         PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1617         PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1618         pc = pv_to_chunk(pv);
1619         idx = pv - &pc->pc_pventry[0];
1620         field = idx / 64;
1621         bit = idx % 64;
1622         pc->pc_map[field] |= 1ul << bit;
1623         if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1624             pc->pc_map[2] != PC_FREE2) {
1625                 /* 98% of the time, pc is already at the head of the list. */
1626                 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1627                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1628                         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1629                 }
1630                 return;
1631         }
1632         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1633         free_pv_chunk(pc);
1634 }
1635
1636 static void
1637 free_pv_chunk(struct pv_chunk *pc)
1638 {
1639         vm_page_t m;
1640
1641         mtx_lock(&pv_chunks_mutex);
1642         TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1643         mtx_unlock(&pv_chunks_mutex);
1644         PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1645         PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1646         PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1647         /* entire chunk is free, return it */
1648         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1649         dump_drop_page(m->phys_addr);
1650         vm_page_unwire_noq(m);
1651         vm_page_free(m);
1652 }
1653
1654 /*
1655  * Returns a new PV entry, allocating a new PV chunk from the system when
1656  * needed.  If this PV chunk allocation fails and a PV list lock pointer was
1657  * given, a PV chunk is reclaimed from an arbitrary pmap.  Otherwise, NULL is
1658  * returned.
1659  *
1660  * The given PV list lock may be released.
1661  */
1662 static pv_entry_t
1663 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1664 {
1665         int bit, field;
1666         pv_entry_t pv;
1667         struct pv_chunk *pc;
1668         vm_page_t m;
1669
1670         rw_assert(&pvh_global_lock, RA_LOCKED);
1671         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1672         PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1673 retry:
1674         pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1675         if (pc != NULL) {
1676                 for (field = 0; field < _NPCM; field++) {
1677                         if (pc->pc_map[field]) {
1678                                 bit = ffsl(pc->pc_map[field]) - 1;
1679                                 break;
1680                         }
1681                 }
1682                 if (field < _NPCM) {
1683                         pv = &pc->pc_pventry[field * 64 + bit];
1684                         pc->pc_map[field] &= ~(1ul << bit);
1685                         /* If this was the last item, move it to tail */
1686                         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1687                             pc->pc_map[2] == 0) {
1688                                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1689                                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1690                                     pc_list);
1691                         }
1692                         PV_STAT(atomic_add_long(&pv_entry_count, 1));
1693                         PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1694                         return (pv);
1695                 }
1696         }
1697         /* No free items, allocate another chunk */
1698         m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1699             VM_ALLOC_WIRED);
1700         if (m == NULL) {
1701                 if (lockp == NULL) {
1702                         PV_STAT(pc_chunk_tryfail++);
1703                         return (NULL);
1704                 }
1705                 m = reclaim_pv_chunk(pmap, lockp);
1706                 if (m == NULL)
1707                         goto retry;
1708         }
1709         PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1710         PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1711         dump_add_page(m->phys_addr);
1712         pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1713         pc->pc_pmap = pmap;
1714         pc->pc_map[0] = PC_FREE0 & ~1ul;        /* preallocated bit 0 */
1715         pc->pc_map[1] = PC_FREE1;
1716         pc->pc_map[2] = PC_FREE2;
1717         mtx_lock(&pv_chunks_mutex);
1718         TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1719         mtx_unlock(&pv_chunks_mutex);
1720         pv = &pc->pc_pventry[0];
1721         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1722         PV_STAT(atomic_add_long(&pv_entry_count, 1));
1723         PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1724         return (pv);
1725 }
1726
1727 /*
1728  * Ensure that the number of spare PV entries in the specified pmap meets or
1729  * exceeds the given count, "needed".
1730  *
1731  * The given PV list lock may be released.
1732  */
1733 static void
1734 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1735 {
1736         struct pch new_tail;
1737         struct pv_chunk *pc;
1738         vm_page_t m;
1739         int avail, free;
1740         bool reclaimed;
1741
1742         rw_assert(&pvh_global_lock, RA_LOCKED);
1743         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1744         KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1745
1746         /*
1747          * Newly allocated PV chunks must be stored in a private list until
1748          * the required number of PV chunks have been allocated.  Otherwise,
1749          * reclaim_pv_chunk() could recycle one of these chunks.  In
1750          * contrast, these chunks must be added to the pmap upon allocation.
1751          */
1752         TAILQ_INIT(&new_tail);
1753 retry:
1754         avail = 0;
1755         TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1756                 bit_count((bitstr_t *)pc->pc_map, 0,
1757                     sizeof(pc->pc_map) * NBBY, &free);
1758                 if (free == 0)
1759                         break;
1760                 avail += free;
1761                 if (avail >= needed)
1762                         break;
1763         }
1764         for (reclaimed = false; avail < needed; avail += _NPCPV) {
1765                 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1766                     VM_ALLOC_WIRED);
1767                 if (m == NULL) {
1768                         m = reclaim_pv_chunk(pmap, lockp);
1769                         if (m == NULL)
1770                                 goto retry;
1771                         reclaimed = true;
1772                 }
1773                 /* XXX PV STATS */
1774 #if 0
1775                 dump_add_page(m->phys_addr);
1776 #endif
1777                 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1778                 pc->pc_pmap = pmap;
1779                 pc->pc_map[0] = PC_FREE0;
1780                 pc->pc_map[1] = PC_FREE1;
1781                 pc->pc_map[2] = PC_FREE2;
1782                 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1783                 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1784
1785                 /*
1786                  * The reclaim might have freed a chunk from the current pmap.
1787                  * If that chunk contained available entries, we need to
1788                  * re-count the number of available entries.
1789                  */
1790                 if (reclaimed)
1791                         goto retry;
1792         }
1793         if (!TAILQ_EMPTY(&new_tail)) {
1794                 mtx_lock(&pv_chunks_mutex);
1795                 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1796                 mtx_unlock(&pv_chunks_mutex);
1797         }
1798 }
1799
1800 /*
1801  * First find and then remove the pv entry for the specified pmap and virtual
1802  * address from the specified pv list.  Returns the pv entry if found and NULL
1803  * otherwise.  This operation can be performed on pv lists for either 4KB or
1804  * 2MB page mappings.
1805  */
1806 static __inline pv_entry_t
1807 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1808 {
1809         pv_entry_t pv;
1810
1811         rw_assert(&pvh_global_lock, RA_LOCKED);
1812         TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1813                 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1814                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1815                         pvh->pv_gen++;
1816                         break;
1817                 }
1818         }
1819         return (pv);
1820 }
1821
1822 /*
1823  * First find and then destroy the pv entry for the specified pmap and virtual
1824  * address.  This operation can be performed on pv lists for either 4KB or 2MB
1825  * page mappings.
1826  */
1827 static void
1828 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1829 {
1830         pv_entry_t pv;
1831
1832         pv = pmap_pvh_remove(pvh, pmap, va);
1833
1834         KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1835         free_pv_entry(pmap, pv);
1836 }
1837
1838 /*
1839  * Conditionally create the PV entry for a 4KB page mapping if the required
1840  * memory can be allocated without resorting to reclamation.
1841  */
1842 static boolean_t
1843 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1844     struct rwlock **lockp)
1845 {
1846         pv_entry_t pv;
1847
1848         rw_assert(&pvh_global_lock, RA_LOCKED);
1849         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1850         /* Pass NULL instead of the lock pointer to disable reclamation. */
1851         if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1852                 pv->pv_va = va;
1853                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1854                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1855                 m->md.pv_gen++;
1856                 return (TRUE);
1857         } else
1858                 return (FALSE);
1859 }
1860
1861 /*
1862  * After demotion from a 2MB page mapping to 512 4KB page mappings,
1863  * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1864  * entries for each of the 4KB page mappings.
1865  */
1866 static void __unused
1867 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1868     struct rwlock **lockp)
1869 {
1870         struct md_page *pvh;
1871         struct pv_chunk *pc;
1872         pv_entry_t pv;
1873         vm_page_t m;
1874         vm_offset_t va_last;
1875         int bit, field;
1876
1877         rw_assert(&pvh_global_lock, RA_LOCKED);
1878         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1879         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1880
1881         /*
1882          * Transfer the 2mpage's pv entry for this mapping to the first
1883          * page's pv list.  Once this transfer begins, the pv list lock
1884          * must not be released until the last pv entry is reinstantiated.
1885          */
1886         pvh = pa_to_pvh(pa);
1887         va &= ~L2_OFFSET;
1888         pv = pmap_pvh_remove(pvh, pmap, va);
1889         KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1890         m = PHYS_TO_VM_PAGE(pa);
1891         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1892         m->md.pv_gen++;
1893         /* Instantiate the remaining 511 pv entries. */
1894         va_last = va + L2_SIZE - PAGE_SIZE;
1895         for (;;) {
1896                 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1897                 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1898                     pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1899                 for (field = 0; field < _NPCM; field++) {
1900                         while (pc->pc_map[field] != 0) {
1901                                 bit = ffsl(pc->pc_map[field]) - 1;
1902                                 pc->pc_map[field] &= ~(1ul << bit);
1903                                 pv = &pc->pc_pventry[field * 64 + bit];
1904                                 va += PAGE_SIZE;
1905                                 pv->pv_va = va;
1906                                 m++;
1907                                 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1908                             ("pmap_pv_demote_l2: page %p is not managed", m));
1909                                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1910                                 m->md.pv_gen++;
1911                                 if (va == va_last)
1912                                         goto out;
1913                         }
1914                 }
1915                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1916                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1917         }
1918 out:
1919         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1920                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1921                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1922         }
1923         /* XXX PV stats */
1924 }
1925
1926 #if VM_NRESERVLEVEL > 0
1927 static void
1928 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1929     struct rwlock **lockp)
1930 {
1931         struct md_page *pvh;
1932         pv_entry_t pv;
1933         vm_page_t m;
1934         vm_offset_t va_last;
1935
1936         rw_assert(&pvh_global_lock, RA_LOCKED);
1937         KASSERT((va & L2_OFFSET) == 0,
1938             ("pmap_pv_promote_l2: misaligned va %#lx", va));
1939
1940         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1941
1942         m = PHYS_TO_VM_PAGE(pa);
1943         pv = pmap_pvh_remove(&m->md, pmap, va);
1944         KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1945         pvh = pa_to_pvh(pa);
1946         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1947         pvh->pv_gen++;
1948
1949         va_last = va + L2_SIZE - PAGE_SIZE;
1950         do {
1951                 m++;
1952                 va += PAGE_SIZE;
1953                 pmap_pvh_free(&m->md, pmap, va);
1954         } while (va < va_last);
1955 }
1956 #endif /* VM_NRESERVLEVEL > 0 */
1957
1958 /*
1959  * Create the PV entry for a 2MB page mapping.  Always returns true unless the
1960  * flag PMAP_ENTER_NORECLAIM is specified.  If that flag is specified, returns
1961  * false if the PV entry cannot be allocated without resorting to reclamation.
1962  */
1963 static bool
1964 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1965     struct rwlock **lockp)
1966 {
1967         struct md_page *pvh;
1968         pv_entry_t pv;
1969         vm_paddr_t pa;
1970
1971         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1972         /* Pass NULL instead of the lock pointer to disable reclamation. */
1973         if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1974             NULL : lockp)) == NULL)
1975                 return (false);
1976         pv->pv_va = va;
1977         pa = PTE_TO_PHYS(l2e);
1978         CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1979         pvh = pa_to_pvh(pa);
1980         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1981         pvh->pv_gen++;
1982         return (true);
1983 }
1984
1985 static void
1986 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1987 {
1988         pt_entry_t newl2, oldl2;
1989         vm_page_t ml3;
1990         vm_paddr_t ml3pa;
1991
1992         KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1993         KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1994         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1995
1996         ml3 = pmap_remove_pt_page(pmap, va);
1997         if (ml3 == NULL)
1998                 panic("pmap_remove_kernel_l2: Missing pt page");
1999
2000         ml3pa = VM_PAGE_TO_PHYS(ml3);
2001         newl2 = ml3pa | PTE_V;
2002
2003         /*
2004          * If this page table page was unmapped by a promotion, then it
2005          * contains valid mappings.  Zero it to invalidate those mappings.
2006          */
2007         if (ml3->valid != 0)
2008                 pagezero((void *)PHYS_TO_DMAP(ml3pa));
2009
2010         /*
2011          * Demote the mapping.
2012          */
2013         oldl2 = pmap_load_store(l2, newl2);
2014         KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2015             __func__, l2, oldl2));
2016 }
2017
2018 /*
2019  * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2020  */
2021 static int
2022 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2023     pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2024 {
2025         struct md_page *pvh;
2026         pt_entry_t oldl2;
2027         vm_offset_t eva, va;
2028         vm_page_t m, ml3;
2029
2030         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2031         KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2032         oldl2 = pmap_load_clear(l2);
2033         KASSERT((oldl2 & PTE_RWX) != 0,
2034             ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2035
2036         /*
2037          * The sfence.vma documentation states that it is sufficient to specify
2038          * a single address within a superpage mapping.  However, since we do
2039          * not perform any invalidation upon promotion, TLBs may still be
2040          * caching 4KB mappings within the superpage, so we must invalidate the
2041          * entire range.
2042          */
2043         pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2044         if ((oldl2 & PTE_SW_WIRED) != 0)
2045                 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2046         pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2047         if ((oldl2 & PTE_SW_MANAGED) != 0) {
2048                 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2049                 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2050                 pmap_pvh_free(pvh, pmap, sva);
2051                 eva = sva + L2_SIZE;
2052                 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2053                     va < eva; va += PAGE_SIZE, m++) {
2054                         if ((oldl2 & PTE_D) != 0)
2055                                 vm_page_dirty(m);
2056                         if ((oldl2 & PTE_A) != 0)
2057                                 vm_page_aflag_set(m, PGA_REFERENCED);
2058                         if (TAILQ_EMPTY(&m->md.pv_list) &&
2059                             TAILQ_EMPTY(&pvh->pv_list))
2060                                 vm_page_aflag_clear(m, PGA_WRITEABLE);
2061                 }
2062         }
2063         if (pmap == kernel_pmap) {
2064                 pmap_remove_kernel_l2(pmap, l2, sva);
2065         } else {
2066                 ml3 = pmap_remove_pt_page(pmap, sva);
2067                 if (ml3 != NULL) {
2068                         KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
2069                             ("pmap_remove_l2: l3 page not promoted"));
2070                         pmap_resident_count_dec(pmap, 1);
2071                         KASSERT(ml3->wire_count == Ln_ENTRIES,
2072                             ("pmap_remove_l2: l3 page wire count error"));
2073                         ml3->wire_count = 1;
2074                         vm_page_unwire_noq(ml3);
2075                         pmap_add_delayed_free_list(ml3, free, FALSE);
2076                 }
2077         }
2078         return (pmap_unuse_pt(pmap, sva, l1e, free));
2079 }
2080
2081 /*
2082  * pmap_remove_l3: do the things to unmap a page in a process
2083  */
2084 static int
2085 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va, 
2086     pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2087 {
2088         pt_entry_t old_l3;
2089         vm_paddr_t phys;
2090         vm_page_t m;
2091
2092         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2093         old_l3 = pmap_load_clear(l3);
2094         pmap_invalidate_page(pmap, va);
2095         if (old_l3 & PTE_SW_WIRED)
2096                 pmap->pm_stats.wired_count -= 1;
2097         pmap_resident_count_dec(pmap, 1);
2098         if (old_l3 & PTE_SW_MANAGED) {
2099                 phys = PTE_TO_PHYS(old_l3);
2100                 m = PHYS_TO_VM_PAGE(phys);
2101                 if ((old_l3 & PTE_D) != 0)
2102                         vm_page_dirty(m);
2103                 if (old_l3 & PTE_A)
2104                         vm_page_aflag_set(m, PGA_REFERENCED);
2105                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2106                 pmap_pvh_free(&m->md, pmap, va);
2107         }
2108
2109         return (pmap_unuse_pt(pmap, va, l2e, free));
2110 }
2111
2112 /*
2113  *      Remove the given range of addresses from the specified map.
2114  *
2115  *      It is assumed that the start and end are properly
2116  *      rounded to the page size.
2117  */
2118 void
2119 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2120 {
2121         struct spglist free;
2122         struct rwlock *lock;
2123         vm_offset_t va, va_next;
2124         pd_entry_t *l1, *l2, l2e;
2125         pt_entry_t *l3;
2126
2127         /*
2128          * Perform an unsynchronized read.  This is, however, safe.
2129          */
2130         if (pmap->pm_stats.resident_count == 0)
2131                 return;
2132
2133         SLIST_INIT(&free);
2134
2135         rw_rlock(&pvh_global_lock);
2136         PMAP_LOCK(pmap);
2137
2138         lock = NULL;
2139         for (; sva < eva; sva = va_next) {
2140                 if (pmap->pm_stats.resident_count == 0)
2141                         break;
2142
2143                 l1 = pmap_l1(pmap, sva);
2144                 if (pmap_load(l1) == 0) {
2145                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2146                         if (va_next < sva)
2147                                 va_next = eva;
2148                         continue;
2149                 }
2150
2151                 /*
2152                  * Calculate index for next page table.
2153                  */
2154                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2155                 if (va_next < sva)
2156                         va_next = eva;
2157
2158                 l2 = pmap_l1_to_l2(l1, sva);
2159                 if (l2 == NULL)
2160                         continue;
2161                 if ((l2e = pmap_load(l2)) == 0)
2162                         continue;
2163                 if ((l2e & PTE_RWX) != 0) {
2164                         if (sva + L2_SIZE == va_next && eva >= va_next) {
2165                                 (void)pmap_remove_l2(pmap, l2, sva,
2166                                     pmap_load(l1), &free, &lock);
2167                                 continue;
2168                         } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2169                             &lock)) {
2170                                 /*
2171                                  * The large page mapping was destroyed.
2172                                  */
2173                                 continue;
2174                         }
2175                         l2e = pmap_load(l2);
2176                 }
2177
2178                 /*
2179                  * Limit our scan to either the end of the va represented
2180                  * by the current page table page, or to the end of the
2181                  * range being removed.
2182                  */
2183                 if (va_next > eva)
2184                         va_next = eva;
2185
2186                 va = va_next;
2187                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2188                     sva += L3_SIZE) {
2189                         if (pmap_load(l3) == 0) {
2190                                 if (va != va_next) {
2191                                         pmap_invalidate_range(pmap, va, sva);
2192                                         va = va_next;
2193                                 }
2194                                 continue;
2195                         }
2196                         if (va == va_next)
2197                                 va = sva;
2198                         if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2199                                 sva += L3_SIZE;
2200                                 break;
2201                         }
2202                 }
2203                 if (va != va_next)
2204                         pmap_invalidate_range(pmap, va, sva);
2205         }
2206         if (lock != NULL)
2207                 rw_wunlock(lock);
2208         rw_runlock(&pvh_global_lock);
2209         PMAP_UNLOCK(pmap);
2210         vm_page_free_pages_toq(&free, false);
2211 }
2212
2213 /*
2214  *      Routine:        pmap_remove_all
2215  *      Function:
2216  *              Removes this physical page from
2217  *              all physical maps in which it resides.
2218  *              Reflects back modify bits to the pager.
2219  *
2220  *      Notes:
2221  *              Original versions of this routine were very
2222  *              inefficient because they iteratively called
2223  *              pmap_remove (slow...)
2224  */
2225
2226 void
2227 pmap_remove_all(vm_page_t m)
2228 {
2229         struct spglist free;
2230         struct md_page *pvh;
2231         pmap_t pmap;
2232         pt_entry_t *l3, l3e;
2233         pd_entry_t *l2, l2e;
2234         pv_entry_t pv;
2235         vm_offset_t va;
2236
2237         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2238             ("pmap_remove_all: page %p is not managed", m));
2239         SLIST_INIT(&free);
2240         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2241             pa_to_pvh(VM_PAGE_TO_PHYS(m));
2242
2243         rw_wlock(&pvh_global_lock);
2244         while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2245                 pmap = PV_PMAP(pv);
2246                 PMAP_LOCK(pmap);
2247                 va = pv->pv_va;
2248                 l2 = pmap_l2(pmap, va);
2249                 (void)pmap_demote_l2(pmap, l2, va);
2250                 PMAP_UNLOCK(pmap);
2251         }
2252         while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2253                 pmap = PV_PMAP(pv);
2254                 PMAP_LOCK(pmap);
2255                 pmap_resident_count_dec(pmap, 1);
2256                 l2 = pmap_l2(pmap, pv->pv_va);
2257                 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2258                 l2e = pmap_load(l2);
2259
2260                 KASSERT((l2e & PTE_RX) == 0,
2261                     ("pmap_remove_all: found a superpage in %p's pv list", m));
2262
2263                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2264                 l3e = pmap_load_clear(l3);
2265                 pmap_invalidate_page(pmap, pv->pv_va);
2266                 if (l3e & PTE_SW_WIRED)
2267                         pmap->pm_stats.wired_count--;
2268                 if ((l3e & PTE_A) != 0)
2269                         vm_page_aflag_set(m, PGA_REFERENCED);
2270
2271                 /*
2272                  * Update the vm_page_t clean and reference bits.
2273                  */
2274                 if ((l3e & PTE_D) != 0)
2275                         vm_page_dirty(m);
2276                 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2277                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2278                 m->md.pv_gen++;
2279                 free_pv_entry(pmap, pv);
2280                 PMAP_UNLOCK(pmap);
2281         }
2282         vm_page_aflag_clear(m, PGA_WRITEABLE);
2283         rw_wunlock(&pvh_global_lock);
2284         vm_page_free_pages_toq(&free, false);
2285 }
2286
2287 /*
2288  *      Set the physical protection on the
2289  *      specified range of this map as requested.
2290  */
2291 void
2292 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2293 {
2294         pd_entry_t *l1, *l2, l2e;
2295         pt_entry_t *l3, l3e, mask;
2296         vm_page_t m, mt;
2297         vm_paddr_t pa;
2298         vm_offset_t va_next;
2299         bool anychanged, pv_lists_locked;
2300
2301         if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2302                 pmap_remove(pmap, sva, eva);
2303                 return;
2304         }
2305
2306         if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2307             (VM_PROT_WRITE | VM_PROT_EXECUTE))
2308                 return;
2309
2310         anychanged = false;
2311         pv_lists_locked = false;
2312         mask = 0;
2313         if ((prot & VM_PROT_WRITE) == 0)
2314                 mask |= PTE_W | PTE_D;
2315         if ((prot & VM_PROT_EXECUTE) == 0)
2316                 mask |= PTE_X;
2317 resume:
2318         PMAP_LOCK(pmap);
2319         for (; sva < eva; sva = va_next) {
2320                 l1 = pmap_l1(pmap, sva);
2321                 if (pmap_load(l1) == 0) {
2322                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2323                         if (va_next < sva)
2324                                 va_next = eva;
2325                         continue;
2326                 }
2327
2328                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2329                 if (va_next < sva)
2330                         va_next = eva;
2331
2332                 l2 = pmap_l1_to_l2(l1, sva);
2333                 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2334                         continue;
2335                 if ((l2e & PTE_RWX) != 0) {
2336                         if (sva + L2_SIZE == va_next && eva >= va_next) {
2337 retryl2:
2338                                 if ((prot & VM_PROT_WRITE) == 0 &&
2339                                     (l2e & (PTE_SW_MANAGED | PTE_D)) ==
2340                                     (PTE_SW_MANAGED | PTE_D)) {
2341                                         pa = PTE_TO_PHYS(l2e);
2342                                         m = PHYS_TO_VM_PAGE(pa);
2343                                         for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
2344                                                 vm_page_dirty(mt);
2345                                 }
2346                                 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2347                                         goto retryl2;
2348                                 anychanged = true;
2349                         } else {
2350                                 if (!pv_lists_locked) {
2351                                         pv_lists_locked = true;
2352                                         if (!rw_try_rlock(&pvh_global_lock)) {
2353                                                 if (anychanged)
2354                                                         pmap_invalidate_all(
2355                                                             pmap);
2356                                                 PMAP_UNLOCK(pmap);
2357                                                 rw_rlock(&pvh_global_lock);
2358                                                 goto resume;
2359                                         }
2360                                 }
2361                                 if (!pmap_demote_l2(pmap, l2, sva)) {
2362                                         /*
2363                                          * The large page mapping was destroyed.
2364                                          */
2365                                         continue;
2366                                 }
2367                         }
2368                 }
2369
2370                 if (va_next > eva)
2371                         va_next = eva;
2372
2373                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2374                     sva += L3_SIZE) {
2375                         l3e = pmap_load(l3);
2376 retryl3:
2377                         if ((l3e & PTE_V) == 0)
2378                                 continue;
2379                         if ((prot & VM_PROT_WRITE) == 0 &&
2380                             (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2381                             (PTE_SW_MANAGED | PTE_D)) {
2382                                 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2383                                 vm_page_dirty(m);
2384                         }
2385                         if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2386                                 goto retryl3;
2387                         anychanged = true;
2388                 }
2389         }
2390         if (anychanged)
2391                 pmap_invalidate_all(pmap);
2392         if (pv_lists_locked)
2393                 rw_runlock(&pvh_global_lock);
2394         PMAP_UNLOCK(pmap);
2395 }
2396
2397 int
2398 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2399 {
2400         pd_entry_t *l2, l2e;
2401         pt_entry_t bits, *pte, oldpte;
2402         int rv;
2403
2404         rv = 0;
2405         PMAP_LOCK(pmap);
2406         l2 = pmap_l2(pmap, va);
2407         if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2408                 goto done;
2409         if ((l2e & PTE_RWX) == 0) {
2410                 pte = pmap_l2_to_l3(l2, va);
2411                 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2412                         goto done;
2413         } else {
2414                 pte = l2;
2415                 oldpte = l2e;
2416         }
2417
2418         if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2419             (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2420             (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2421             (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2422                 goto done;
2423
2424         bits = PTE_A;
2425         if (ftype == VM_PROT_WRITE)
2426                 bits |= PTE_D;
2427
2428         /*
2429          * Spurious faults can occur if the implementation caches invalid
2430          * entries in the TLB, or if simultaneous accesses on multiple CPUs
2431          * race with each other.
2432          */
2433         if ((oldpte & bits) != bits)
2434                 pmap_store_bits(pte, bits);
2435         sfence_vma();
2436         rv = 1;
2437 done:
2438         PMAP_UNLOCK(pmap);
2439         return (rv);
2440 }
2441
2442 static bool
2443 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2444 {
2445         struct rwlock *lock;
2446         bool rv;
2447
2448         lock = NULL;
2449         rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2450         if (lock != NULL)
2451                 rw_wunlock(lock);
2452         return (rv);
2453 }
2454
2455 /*
2456  * Tries to demote a 2MB page mapping.  If demotion fails, the 2MB page
2457  * mapping is invalidated.
2458  */
2459 static bool
2460 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2461     struct rwlock **lockp)
2462 {
2463         struct spglist free;
2464         vm_page_t mpte;
2465         pd_entry_t newl2, oldl2;
2466         pt_entry_t *firstl3, newl3;
2467         vm_paddr_t mptepa;
2468         int i;
2469
2470         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2471
2472         oldl2 = pmap_load(l2);
2473         KASSERT((oldl2 & PTE_RWX) != 0,
2474             ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2475         if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2476             NULL) {
2477                 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2478                     pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2479                     VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2480                     NULL) {
2481                         SLIST_INIT(&free);
2482                         (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2483                             pmap_load(pmap_l1(pmap, va)), &free, lockp);
2484                         vm_page_free_pages_toq(&free, true);
2485                         CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2486                             "failure for va %#lx in pmap %p", va, pmap);
2487                         return (false);
2488                 }
2489                 if (va < VM_MAXUSER_ADDRESS) {
2490                         mpte->wire_count = Ln_ENTRIES;
2491                         pmap_resident_count_inc(pmap, 1);
2492                 }
2493         }
2494         mptepa = VM_PAGE_TO_PHYS(mpte);
2495         firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2496         newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2497         KASSERT((oldl2 & PTE_A) != 0,
2498             ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2499         KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2500             ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2501         newl3 = oldl2;
2502
2503         /*
2504          * If the page table page is not leftover from an earlier promotion,
2505          * initialize it.
2506          */
2507         if (mpte->valid == 0) {
2508                 for (i = 0; i < Ln_ENTRIES; i++)
2509                         pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2510         }
2511         KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2512             ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2513             "addresses"));
2514
2515         /*
2516          * If the mapping has changed attributes, update the page table
2517          * entries.
2518          */
2519         if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2520                 for (i = 0; i < Ln_ENTRIES; i++)
2521                         pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2522
2523         /*
2524          * The spare PV entries must be reserved prior to demoting the
2525          * mapping, that is, prior to changing the L2 entry.  Otherwise, the
2526          * state of the L2 entry and the PV lists will be inconsistent, which
2527          * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2528          * the wrong PV list and pmap_pv_demote_l2() failing to find the
2529          * expected PV entry for the 2MB page mapping that is being demoted.
2530          */
2531         if ((oldl2 & PTE_SW_MANAGED) != 0)
2532                 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2533
2534         /*
2535          * Demote the mapping.
2536          */
2537         pmap_store(l2, newl2);
2538
2539         /*
2540          * Demote the PV entry.
2541          */
2542         if ((oldl2 & PTE_SW_MANAGED) != 0)
2543                 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2544
2545         atomic_add_long(&pmap_l2_demotions, 1);
2546         CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2547             va, pmap);
2548         return (true);
2549 }
2550
2551 #if VM_NRESERVLEVEL > 0
2552 static void
2553 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2554     struct rwlock **lockp)
2555 {
2556         pt_entry_t *firstl3, *l3;
2557         vm_paddr_t pa;
2558         vm_page_t ml3;
2559
2560         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2561
2562         va &= ~L2_OFFSET;
2563         KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2564             ("pmap_promote_l2: invalid l2 entry %p", l2));
2565
2566         firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2567         pa = PTE_TO_PHYS(pmap_load(firstl3));
2568         if ((pa & L2_OFFSET) != 0) {
2569                 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2570                     va, pmap);
2571                 atomic_add_long(&pmap_l2_p_failures, 1);
2572                 return;
2573         }
2574
2575         pa += PAGE_SIZE;
2576         for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2577                 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2578                         CTR2(KTR_PMAP,
2579                             "pmap_promote_l2: failure for va %#lx pmap %p",
2580                             va, pmap);
2581                         atomic_add_long(&pmap_l2_p_failures, 1);
2582                         return;
2583                 }
2584                 if ((pmap_load(l3) & PTE_PROMOTE) !=
2585                     (pmap_load(firstl3) & PTE_PROMOTE)) {
2586                         CTR2(KTR_PMAP,
2587                             "pmap_promote_l2: failure for va %#lx pmap %p",
2588                             va, pmap);
2589                         atomic_add_long(&pmap_l2_p_failures, 1);
2590                         return;
2591                 }
2592                 pa += PAGE_SIZE;
2593         }
2594
2595         ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2596         KASSERT(ml3->pindex == pmap_l2_pindex(va),
2597             ("pmap_promote_l2: page table page's pindex is wrong"));
2598         if (pmap_insert_pt_page(pmap, ml3, true)) {
2599                 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2600                     va, pmap);
2601                 atomic_add_long(&pmap_l2_p_failures, 1);
2602                 return;
2603         }
2604
2605         if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2606                 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2607                     lockp);
2608
2609         pmap_store(l2, pmap_load(firstl3));
2610
2611         atomic_add_long(&pmap_l2_promotions, 1);
2612         CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2613             pmap);
2614 }
2615 #endif
2616
2617 /*
2618  *      Insert the given physical page (p) at
2619  *      the specified virtual address (v) in the
2620  *      target physical map with the protection requested.
2621  *
2622  *      If specified, the page will be wired down, meaning
2623  *      that the related pte can not be reclaimed.
2624  *
2625  *      NB:  This is the only routine which MAY NOT lazy-evaluate
2626  *      or lose information.  That is, this routine must actually
2627  *      insert this page into the given map NOW.
2628  */
2629 int
2630 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2631     u_int flags, int8_t psind)
2632 {
2633         struct rwlock *lock;
2634         pd_entry_t *l1, *l2, l2e;
2635         pt_entry_t new_l3, orig_l3;
2636         pt_entry_t *l3;
2637         pv_entry_t pv;
2638         vm_paddr_t opa, pa, l2_pa, l3_pa;
2639         vm_page_t mpte, om, l2_m, l3_m;
2640         pt_entry_t entry;
2641         pn_t l2_pn, l3_pn, pn;
2642         int rv;
2643         bool nosleep;
2644
2645         va = trunc_page(va);
2646         if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2647                 VM_OBJECT_ASSERT_LOCKED(m->object);
2648         pa = VM_PAGE_TO_PHYS(m);
2649         pn = (pa / PAGE_SIZE);
2650
2651         new_l3 = PTE_V | PTE_R | PTE_A;
2652         if (prot & VM_PROT_EXECUTE)
2653                 new_l3 |= PTE_X;
2654         if (flags & VM_PROT_WRITE)
2655                 new_l3 |= PTE_D;
2656         if (prot & VM_PROT_WRITE)
2657                 new_l3 |= PTE_W;
2658         if (va < VM_MAX_USER_ADDRESS)
2659                 new_l3 |= PTE_U;
2660
2661         new_l3 |= (pn << PTE_PPN0_S);
2662         if ((flags & PMAP_ENTER_WIRED) != 0)
2663                 new_l3 |= PTE_SW_WIRED;
2664
2665         /*
2666          * Set modified bit gratuitously for writeable mappings if
2667          * the page is unmanaged. We do not want to take a fault
2668          * to do the dirty bit accounting for these mappings.
2669          */
2670         if ((m->oflags & VPO_UNMANAGED) != 0) {
2671                 if (prot & VM_PROT_WRITE)
2672                         new_l3 |= PTE_D;
2673         } else
2674                 new_l3 |= PTE_SW_MANAGED;
2675
2676         CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2677
2678         lock = NULL;
2679         mpte = NULL;
2680         rw_rlock(&pvh_global_lock);
2681         PMAP_LOCK(pmap);
2682         if (psind == 1) {
2683                 /* Assert the required virtual and physical alignment. */
2684                 KASSERT((va & L2_OFFSET) == 0,
2685                     ("pmap_enter: va %#lx unaligned", va));
2686                 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2687                 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2688                 goto out;
2689         }
2690
2691         l2 = pmap_l2(pmap, va);
2692         if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2693             ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2694             va, &lock))) {
2695                 l3 = pmap_l2_to_l3(l2, va);
2696                 if (va < VM_MAXUSER_ADDRESS) {
2697                         mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2698                         mpte->wire_count++;
2699                 }
2700         } else if (va < VM_MAXUSER_ADDRESS) {
2701                 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2702                 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2703                 if (mpte == NULL && nosleep) {
2704                         CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2705                         if (lock != NULL)
2706                                 rw_wunlock(lock);
2707                         rw_runlock(&pvh_global_lock);
2708                         PMAP_UNLOCK(pmap);
2709                         return (KERN_RESOURCE_SHORTAGE);
2710                 }
2711                 l3 = pmap_l3(pmap, va);
2712         } else {
2713                 l3 = pmap_l3(pmap, va);
2714                 /* TODO: This is not optimal, but should mostly work */
2715                 if (l3 == NULL) {
2716                         if (l2 == NULL) {
2717                                 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2718                                     VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2719                                     VM_ALLOC_ZERO);
2720                                 if (l2_m == NULL)
2721                                         panic("pmap_enter: l2 pte_m == NULL");
2722                                 if ((l2_m->flags & PG_ZERO) == 0)
2723                                         pmap_zero_page(l2_m);
2724
2725                                 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2726                                 l2_pn = (l2_pa / PAGE_SIZE);
2727
2728                                 l1 = pmap_l1(pmap, va);
2729                                 entry = (PTE_V);
2730                                 entry |= (l2_pn << PTE_PPN0_S);
2731                                 pmap_store(l1, entry);
2732                                 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2733                                 l2 = pmap_l1_to_l2(l1, va);
2734                         }
2735
2736                         l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2737                             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2738                         if (l3_m == NULL)
2739                                 panic("pmap_enter: l3 pte_m == NULL");
2740                         if ((l3_m->flags & PG_ZERO) == 0)
2741                                 pmap_zero_page(l3_m);
2742
2743                         l3_pa = VM_PAGE_TO_PHYS(l3_m);
2744                         l3_pn = (l3_pa / PAGE_SIZE);
2745                         entry = (PTE_V);
2746                         entry |= (l3_pn << PTE_PPN0_S);
2747                         pmap_store(l2, entry);
2748                         l3 = pmap_l2_to_l3(l2, va);
2749                 }
2750                 pmap_invalidate_page(pmap, va);
2751         }
2752
2753         orig_l3 = pmap_load(l3);
2754         opa = PTE_TO_PHYS(orig_l3);
2755         pv = NULL;
2756
2757         /*
2758          * Is the specified virtual address already mapped?
2759          */
2760         if ((orig_l3 & PTE_V) != 0) {
2761                 /*
2762                  * Wiring change, just update stats. We don't worry about
2763                  * wiring PT pages as they remain resident as long as there
2764                  * are valid mappings in them. Hence, if a user page is wired,
2765                  * the PT page will be also.
2766                  */
2767                 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2768                     (orig_l3 & PTE_SW_WIRED) == 0)
2769                         pmap->pm_stats.wired_count++;
2770                 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2771                     (orig_l3 & PTE_SW_WIRED) != 0)
2772                         pmap->pm_stats.wired_count--;
2773
2774                 /*
2775                  * Remove the extra PT page reference.
2776                  */
2777                 if (mpte != NULL) {
2778                         mpte->wire_count--;
2779                         KASSERT(mpte->wire_count > 0,
2780                             ("pmap_enter: missing reference to page table page,"
2781                              " va: 0x%lx", va));
2782                 }
2783
2784                 /*
2785                  * Has the physical page changed?
2786                  */
2787                 if (opa == pa) {
2788                         /*
2789                          * No, might be a protection or wiring change.
2790                          */
2791                         if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2792                             (new_l3 & PTE_W) != 0)
2793                                 vm_page_aflag_set(m, PGA_WRITEABLE);
2794                         goto validate;
2795                 }
2796
2797                 /*
2798                  * The physical page has changed.  Temporarily invalidate
2799                  * the mapping.  This ensures that all threads sharing the
2800                  * pmap keep a consistent view of the mapping, which is
2801                  * necessary for the correct handling of COW faults.  It
2802                  * also permits reuse of the old mapping's PV entry,
2803                  * avoiding an allocation.
2804                  *
2805                  * For consistency, handle unmanaged mappings the same way.
2806                  */
2807                 orig_l3 = pmap_load_clear(l3);
2808                 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2809                     ("pmap_enter: unexpected pa update for %#lx", va));
2810                 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2811                         om = PHYS_TO_VM_PAGE(opa);
2812
2813                         /*
2814                          * The pmap lock is sufficient to synchronize with
2815                          * concurrent calls to pmap_page_test_mappings() and
2816                          * pmap_ts_referenced().
2817                          */
2818                         if ((orig_l3 & PTE_D) != 0)
2819                                 vm_page_dirty(om);
2820                         if ((orig_l3 & PTE_A) != 0)
2821                                 vm_page_aflag_set(om, PGA_REFERENCED);
2822                         CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2823                         pv = pmap_pvh_remove(&om->md, pmap, va);
2824                         KASSERT(pv != NULL,
2825                             ("pmap_enter: no PV entry for %#lx", va));
2826                         if ((new_l3 & PTE_SW_MANAGED) == 0)
2827                                 free_pv_entry(pmap, pv);
2828                         if ((om->aflags & PGA_WRITEABLE) != 0 &&
2829                             TAILQ_EMPTY(&om->md.pv_list))
2830                                 vm_page_aflag_clear(om, PGA_WRITEABLE);
2831                 }
2832                 pmap_invalidate_page(pmap, va);
2833                 orig_l3 = 0;
2834         } else {
2835                 /*
2836                  * Increment the counters.
2837                  */
2838                 if ((new_l3 & PTE_SW_WIRED) != 0)
2839                         pmap->pm_stats.wired_count++;
2840                 pmap_resident_count_inc(pmap, 1);
2841         }
2842         /*
2843          * Enter on the PV list if part of our managed memory.
2844          */
2845         if ((new_l3 & PTE_SW_MANAGED) != 0) {
2846                 if (pv == NULL) {
2847                         pv = get_pv_entry(pmap, &lock);
2848                         pv->pv_va = va;
2849                 }
2850                 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2851                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2852                 m->md.pv_gen++;
2853                 if ((new_l3 & PTE_W) != 0)
2854                         vm_page_aflag_set(m, PGA_WRITEABLE);
2855         }
2856
2857 validate:
2858         /*
2859          * Sync the i-cache on all harts before updating the PTE
2860          * if the new PTE is executable.
2861          */
2862         if (prot & VM_PROT_EXECUTE)
2863                 pmap_sync_icache(pmap, va, PAGE_SIZE);
2864
2865         /*
2866          * Update the L3 entry.
2867          */
2868         if (orig_l3 != 0) {
2869                 orig_l3 = pmap_load_store(l3, new_l3);
2870                 pmap_invalidate_page(pmap, va);
2871                 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2872                     ("pmap_enter: invalid update"));
2873                 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2874                     (PTE_D | PTE_SW_MANAGED))
2875                         vm_page_dirty(m);
2876         } else {
2877                 pmap_store(l3, new_l3);
2878         }
2879
2880 #if VM_NRESERVLEVEL > 0
2881         if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2882             pmap_ps_enabled(pmap) &&
2883             (m->flags & PG_FICTITIOUS) == 0 &&
2884             vm_reserv_level_iffullpop(m) == 0)
2885                 pmap_promote_l2(pmap, l2, va, &lock);
2886 #endif
2887
2888         rv = KERN_SUCCESS;
2889 out:
2890         if (lock != NULL)
2891                 rw_wunlock(lock);
2892         rw_runlock(&pvh_global_lock);
2893         PMAP_UNLOCK(pmap);
2894         return (rv);
2895 }
2896
2897 /*
2898  * Tries to create a read- and/or execute-only 2MB page mapping.  Returns true
2899  * if successful.  Returns false if (1) a page table page cannot be allocated
2900  * without sleeping, (2) a mapping already exists at the specified virtual
2901  * address, or (3) a PV entry cannot be allocated without reclaiming another
2902  * PV entry.
2903  */
2904 static bool
2905 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2906     struct rwlock **lockp)
2907 {
2908         pd_entry_t new_l2;
2909         pn_t pn;
2910
2911         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2912
2913         pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2914         new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2915         if ((m->oflags & VPO_UNMANAGED) == 0)
2916                 new_l2 |= PTE_SW_MANAGED;
2917         if ((prot & VM_PROT_EXECUTE) != 0)
2918                 new_l2 |= PTE_X;
2919         if (va < VM_MAXUSER_ADDRESS)
2920                 new_l2 |= PTE_U;
2921         return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2922             PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2923             KERN_SUCCESS);
2924 }
2925
2926 /*
2927  * Tries to create the specified 2MB page mapping.  Returns KERN_SUCCESS if
2928  * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2929  * otherwise.  Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2930  * a mapping already exists at the specified virtual address.  Returns
2931  * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2932  * page allocation failed.  Returns KERN_RESOURCE_SHORTAGE if
2933  * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2934  *
2935  * The parameter "m" is only used when creating a managed, writeable mapping.
2936  */
2937 static int
2938 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2939     vm_page_t m, struct rwlock **lockp)
2940 {
2941         struct spglist free;
2942         pd_entry_t *l2, *l3, oldl2;
2943         vm_offset_t sva;
2944         vm_page_t l2pg, mt;
2945
2946         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2947
2948         if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2949             NULL : lockp)) == NULL) {
2950                 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2951                     va, pmap);
2952                 return (KERN_RESOURCE_SHORTAGE);
2953         }
2954
2955         l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2956         l2 = &l2[pmap_l2_index(va)];
2957         if ((oldl2 = pmap_load(l2)) != 0) {
2958                 KASSERT(l2pg->wire_count > 1,
2959                     ("pmap_enter_l2: l2pg's wire count is too low"));
2960                 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2961                         l2pg->wire_count--;
2962                         CTR2(KTR_PMAP,
2963                             "pmap_enter_l2: failure for va %#lx in pmap %p",
2964                             va, pmap);
2965                         return (KERN_FAILURE);
2966                 }
2967                 SLIST_INIT(&free);
2968                 if ((oldl2 & PTE_RWX) != 0)
2969                         (void)pmap_remove_l2(pmap, l2, va,
2970                             pmap_load(pmap_l1(pmap, va)), &free, lockp);
2971                 else
2972                         for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2973                                 l3 = pmap_l2_to_l3(l2, sva);
2974                                 if ((pmap_load(l3) & PTE_V) != 0 &&
2975                                     pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2976                                     lockp) != 0)
2977                                         break;
2978                         }
2979                 vm_page_free_pages_toq(&free, true);
2980                 if (va >= VM_MAXUSER_ADDRESS) {
2981                         /*
2982                          * Both pmap_remove_l2() and pmap_remove_l3() will
2983                          * leave the kernel page table page zero filled.
2984                          */
2985                         mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2986                         if (pmap_insert_pt_page(pmap, mt, false))
2987                                 panic("pmap_enter_l2: trie insert failed");
2988                 } else
2989                         KASSERT(pmap_load(l2) == 0,
2990                             ("pmap_enter_l2: non-zero L2 entry %p", l2));
2991         }
2992
2993         if ((new_l2 & PTE_SW_MANAGED) != 0) {
2994                 /*
2995                  * Abort this mapping if its PV entry could not be created.
2996                  */
2997                 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2998                         SLIST_INIT(&free);
2999                         if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
3000                                 /*
3001                                  * Although "va" is not mapped, paging-structure
3002                                  * caches could nonetheless have entries that
3003                                  * refer to the freed page table pages.
3004                                  * Invalidate those entries.
3005                                  */
3006                                 pmap_invalidate_page(pmap, va);
3007                                 vm_page_free_pages_toq(&free, true);
3008                         }
3009                         CTR2(KTR_PMAP,
3010                             "pmap_enter_l2: failure for va %#lx in pmap %p",
3011                             va, pmap);
3012                         return (KERN_RESOURCE_SHORTAGE);
3013                 }
3014                 if ((new_l2 & PTE_W) != 0)
3015                         for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3016                                 vm_page_aflag_set(mt, PGA_WRITEABLE);
3017         }
3018
3019         /*
3020          * Increment counters.
3021          */
3022         if ((new_l2 & PTE_SW_WIRED) != 0)
3023                 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3024         pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3025
3026         /*
3027          * Map the superpage.
3028          */
3029         pmap_store(l2, new_l2);
3030
3031         atomic_add_long(&pmap_l2_mappings, 1);
3032         CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3033             va, pmap);
3034
3035         return (KERN_SUCCESS);
3036 }
3037
3038 /*
3039  * Maps a sequence of resident pages belonging to the same object.
3040  * The sequence begins with the given page m_start.  This page is
3041  * mapped at the given virtual address start.  Each subsequent page is
3042  * mapped at a virtual address that is offset from start by the same
3043  * amount as the page is offset from m_start within the object.  The
3044  * last page in the sequence is the page with the largest offset from
3045  * m_start that can be mapped at a virtual address less than the given
3046  * virtual address end.  Not every virtual page between start and end
3047  * is mapped; only those for which a resident page exists with the
3048  * corresponding offset from m_start are mapped.
3049  */
3050 void
3051 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3052     vm_page_t m_start, vm_prot_t prot)
3053 {
3054         struct rwlock *lock;
3055         vm_offset_t va;
3056         vm_page_t m, mpte;
3057         vm_pindex_t diff, psize;
3058
3059         VM_OBJECT_ASSERT_LOCKED(m_start->object);
3060
3061         psize = atop(end - start);
3062         mpte = NULL;
3063         m = m_start;
3064         lock = NULL;
3065         rw_rlock(&pvh_global_lock);
3066         PMAP_LOCK(pmap);
3067         while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3068                 va = start + ptoa(diff);
3069                 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3070                     m->psind == 1 && pmap_ps_enabled(pmap) &&
3071                     pmap_enter_2mpage(pmap, va, m, prot, &lock))
3072                         m = &m[L2_SIZE / PAGE_SIZE - 1];
3073                 else
3074                         mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3075                             &lock);
3076                 m = TAILQ_NEXT(m, listq);
3077         }
3078         if (lock != NULL)
3079                 rw_wunlock(lock);
3080         rw_runlock(&pvh_global_lock);
3081         PMAP_UNLOCK(pmap);
3082 }
3083
3084 /*
3085  * this code makes some *MAJOR* assumptions:
3086  * 1. Current pmap & pmap exists.
3087  * 2. Not wired.
3088  * 3. Read access.
3089  * 4. No page table pages.
3090  * but is *MUCH* faster than pmap_enter...
3091  */
3092
3093 void
3094 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3095 {
3096         struct rwlock *lock;
3097
3098         lock = NULL;
3099         rw_rlock(&pvh_global_lock);
3100         PMAP_LOCK(pmap);
3101         (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3102         if (lock != NULL)
3103                 rw_wunlock(lock);
3104         rw_runlock(&pvh_global_lock);
3105         PMAP_UNLOCK(pmap);
3106 }
3107
3108 static vm_page_t
3109 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3110     vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3111 {
3112         struct spglist free;
3113         vm_paddr_t phys;
3114         pd_entry_t *l2;
3115         pt_entry_t *l3, newl3;
3116
3117         KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3118             (m->oflags & VPO_UNMANAGED) != 0,
3119             ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3120         rw_assert(&pvh_global_lock, RA_LOCKED);
3121         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3122
3123         CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3124         /*
3125          * In the case that a page table page is not
3126          * resident, we are creating it here.
3127          */
3128         if (va < VM_MAXUSER_ADDRESS) {
3129                 vm_pindex_t l2pindex;
3130
3131                 /*
3132                  * Calculate pagetable page index
3133                  */
3134                 l2pindex = pmap_l2_pindex(va);
3135                 if (mpte && (mpte->pindex == l2pindex)) {
3136                         mpte->wire_count++;
3137                 } else {
3138                         /*
3139                          * Get the l2 entry
3140                          */
3141                         l2 = pmap_l2(pmap, va);
3142
3143                         /*
3144                          * If the page table page is mapped, we just increment
3145                          * the hold count, and activate it.  Otherwise, we
3146                          * attempt to allocate a page table page.  If this
3147                          * attempt fails, we don't retry.  Instead, we give up.
3148                          */
3149                         if (l2 != NULL && pmap_load(l2) != 0) {
3150                                 phys = PTE_TO_PHYS(pmap_load(l2));
3151                                 mpte = PHYS_TO_VM_PAGE(phys);
3152                                 mpte->wire_count++;
3153                         } else {
3154                                 /*
3155                                  * Pass NULL instead of the PV list lock
3156                                  * pointer, because we don't intend to sleep.
3157                                  */
3158                                 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3159                                 if (mpte == NULL)
3160                                         return (mpte);
3161                         }
3162                 }
3163                 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3164                 l3 = &l3[pmap_l3_index(va)];
3165         } else {
3166                 mpte = NULL;
3167                 l3 = pmap_l3(kernel_pmap, va);
3168         }
3169         if (l3 == NULL)
3170                 panic("pmap_enter_quick_locked: No l3");
3171         if (pmap_load(l3) != 0) {
3172                 if (mpte != NULL) {
3173                         mpte->wire_count--;
3174                         mpte = NULL;
3175                 }
3176                 return (mpte);
3177         }
3178
3179         /*
3180          * Enter on the PV list if part of our managed memory.
3181          */
3182         if ((m->oflags & VPO_UNMANAGED) == 0 &&
3183             !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3184                 if (mpte != NULL) {
3185                         SLIST_INIT(&free);
3186                         if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3187                                 pmap_invalidate_page(pmap, va);
3188                                 vm_page_free_pages_toq(&free, false);
3189                         }
3190                         mpte = NULL;
3191                 }
3192                 return (mpte);
3193         }
3194
3195         /*
3196          * Increment counters
3197          */
3198         pmap_resident_count_inc(pmap, 1);
3199
3200         newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3201             PTE_V | PTE_R;
3202         if ((prot & VM_PROT_EXECUTE) != 0)
3203                 newl3 |= PTE_X;
3204         if ((m->oflags & VPO_UNMANAGED) == 0)
3205                 newl3 |= PTE_SW_MANAGED;
3206         if (va < VM_MAX_USER_ADDRESS)
3207                 newl3 |= PTE_U;
3208
3209         /*
3210          * Sync the i-cache on all harts before updating the PTE
3211          * if the new PTE is executable.
3212          */
3213         if (prot & VM_PROT_EXECUTE)
3214                 pmap_sync_icache(pmap, va, PAGE_SIZE);
3215
3216         pmap_store(l3, newl3);
3217
3218         pmap_invalidate_page(pmap, va);
3219         return (mpte);
3220 }
3221
3222 /*
3223  * This code maps large physical mmap regions into the
3224  * processor address space.  Note that some shortcuts
3225  * are taken, but the code works.
3226  */
3227 void
3228 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3229     vm_pindex_t pindex, vm_size_t size)
3230 {
3231
3232         VM_OBJECT_ASSERT_WLOCKED(object);
3233         KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3234             ("pmap_object_init_pt: non-device object"));
3235 }
3236
3237 /*
3238  *      Clear the wired attribute from the mappings for the specified range of
3239  *      addresses in the given pmap.  Every valid mapping within that range
3240  *      must have the wired attribute set.  In contrast, invalid mappings
3241  *      cannot have the wired attribute set, so they are ignored.
3242  *
3243  *      The wired attribute of the page table entry is not a hardware feature,
3244  *      so there is no need to invalidate any TLB entries.
3245  */
3246 void
3247 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3248 {
3249         vm_offset_t va_next;
3250         pd_entry_t *l1, *l2, l2e;
3251         pt_entry_t *l3, l3e;
3252         bool pv_lists_locked;
3253
3254         pv_lists_locked = false;
3255 retry:
3256         PMAP_LOCK(pmap);
3257         for (; sva < eva; sva = va_next) {
3258                 l1 = pmap_l1(pmap, sva);
3259                 if (pmap_load(l1) == 0) {
3260                         va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3261                         if (va_next < sva)
3262                                 va_next = eva;
3263                         continue;
3264                 }
3265
3266                 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3267                 if (va_next < sva)
3268                         va_next = eva;
3269
3270                 l2 = pmap_l1_to_l2(l1, sva);
3271                 if ((l2e = pmap_load(l2)) == 0)
3272                         continue;
3273                 if ((l2e & PTE_RWX) != 0) {
3274                         if (sva + L2_SIZE == va_next && eva >= va_next) {
3275                                 if ((l2e & PTE_SW_WIRED) == 0)
3276                                         panic("pmap_unwire: l2 %#jx is missing "
3277                                             "PTE_SW_WIRED", (uintmax_t)l2e);
3278                                 pmap_clear_bits(l2, PTE_SW_WIRED);
3279                                 continue;
3280                         } else {
3281                                 if (!pv_lists_locked) {
3282                                         pv_lists_locked = true;
3283                                         if (!rw_try_rlock(&pvh_global_lock)) {
3284                                                 PMAP_UNLOCK(pmap);
3285                                                 rw_rlock(&pvh_global_lock);
3286                                                 /* Repeat sva. */
3287                                                 goto retry;
3288                                         }
3289                                 }
3290                                 if (!pmap_demote_l2(pmap, l2, sva))
3291                                         panic("pmap_unwire: demotion failed");
3292                         }
3293                 }
3294
3295                 if (va_next > eva)
3296                         va_next = eva;
3297                 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3298                     sva += L3_SIZE) {
3299                         if ((l3e = pmap_load(l3)) == 0)
3300                                 continue;
3301                         if ((l3e & PTE_SW_WIRED) == 0)
3302                                 panic("pmap_unwire: l3 %#jx is missing "
3303                                     "PTE_SW_WIRED", (uintmax_t)l3e);
3304
3305                         /*
3306                          * PG_W must be cleared atomically.  Although the pmap
3307                          * lock synchronizes access to PG_W, another processor
3308                          * could be setting PG_M and/or PG_A concurrently.
3309                          */
3310                         pmap_clear_bits(l3, PTE_SW_WIRED);
3311                         pmap->pm_stats.wired_count--;
3312                 }
3313         }
3314         if (pv_lists_locked)
3315                 rw_runlock(&pvh_global_lock);
3316         PMAP_UNLOCK(pmap);
3317 }
3318
3319 /*
3320  *      Copy the range specified by src_addr/len
3321  *      from the source map to the range dst_addr/len
3322  *      in the destination map.
3323  *
3324  *      This routine is only advisory and need not do anything.
3325  */
3326
3327 void
3328 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3329     vm_offset_t src_addr)
3330 {
3331
3332 }
3333
3334 /*
3335  *      pmap_zero_page zeros the specified hardware page by mapping
3336  *      the page into KVM and using bzero to clear its contents.
3337  */
3338 void
3339 pmap_zero_page(vm_page_t m)
3340 {
3341         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3342
3343         pagezero((void *)va);
3344 }
3345
3346 /*
3347  *      pmap_zero_page_area zeros the specified hardware page by mapping 
3348  *      the page into KVM and using bzero to clear its contents.
3349  *
3350  *      off and size may not cover an area beyond a single hardware page.
3351  */
3352 void
3353 pmap_zero_page_area(vm_page_t m, int off, int size)
3354 {
3355         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3356
3357         if (off == 0 && size == PAGE_SIZE)
3358                 pagezero((void *)va);
3359         else
3360                 bzero((char *)va + off, size);
3361 }
3362
3363 /*
3364  *      pmap_copy_page copies the specified (machine independent)
3365  *      page by mapping the page into virtual memory and using
3366  *      bcopy to copy the page, one machine dependent page at a
3367  *      time.
3368  */
3369 void
3370 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3371 {
3372         vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3373         vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3374
3375         pagecopy((void *)src, (void *)dst);
3376 }
3377
3378 int unmapped_buf_allowed = 1;
3379
3380 void
3381 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3382     vm_offset_t b_offset, int xfersize)
3383 {
3384         void *a_cp, *b_cp;
3385         vm_page_t m_a, m_b;
3386         vm_paddr_t p_a, p_b;
3387         vm_offset_t a_pg_offset, b_pg_offset;
3388         int cnt;
3389
3390         while (xfersize > 0) {
3391                 a_pg_offset = a_offset & PAGE_MASK;
3392                 m_a = ma[a_offset >> PAGE_SHIFT];
3393                 p_a = m_a->phys_addr;
3394                 b_pg_offset = b_offset & PAGE_MASK;
3395                 m_b = mb[b_offset >> PAGE_SHIFT];
3396                 p_b = m_b->phys_addr;
3397                 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3398                 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3399                 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3400                         panic("!DMAP a %lx", p_a);
3401                 } else {
3402                         a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3403                 }
3404                 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3405                         panic("!DMAP b %lx", p_b);
3406                 } else {
3407                         b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3408                 }
3409                 bcopy(a_cp, b_cp, cnt);
3410                 a_offset += cnt;
3411                 b_offset += cnt;
3412                 xfersize -= cnt;
3413         }
3414 }
3415
3416 vm_offset_t
3417 pmap_quick_enter_page(vm_page_t m)
3418 {
3419
3420         return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3421 }
3422
3423 void
3424 pmap_quick_remove_page(vm_offset_t addr)
3425 {
3426 }
3427
3428 /*
3429  * Returns true if the pmap's pv is one of the first
3430  * 16 pvs linked to from this page.  This count may
3431  * be changed upwards or downwards in the future; it
3432  * is only necessary that true be returned for a small
3433  * subset of pmaps for proper page aging.
3434  */
3435 boolean_t
3436 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3437 {
3438         struct md_page *pvh;
3439         struct rwlock *lock;
3440         pv_entry_t pv;
3441         int loops = 0;
3442         boolean_t rv;
3443
3444         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3445             ("pmap_page_exists_quick: page %p is not managed", m));
3446         rv = FALSE;
3447         rw_rlock(&pvh_global_lock);
3448         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3449         rw_rlock(lock);
3450         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3451                 if (PV_PMAP(pv) == pmap) {
3452                         rv = TRUE;
3453                         break;
3454                 }
3455                 loops++;
3456                 if (loops >= 16)
3457                         break;
3458         }
3459         if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3460                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3461                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3462                         if (PV_PMAP(pv) == pmap) {
3463                                 rv = TRUE;
3464                                 break;
3465                         }
3466                         loops++;
3467                         if (loops >= 16)
3468                                 break;
3469                 }
3470         }
3471         rw_runlock(lock);
3472         rw_runlock(&pvh_global_lock);
3473         return (rv);
3474 }
3475
3476 /*
3477  *      pmap_page_wired_mappings:
3478  *
3479  *      Return the number of managed mappings to the given physical page
3480  *      that are wired.
3481  */
3482 int
3483 pmap_page_wired_mappings(vm_page_t m)
3484 {
3485         struct md_page *pvh;
3486         struct rwlock *lock;
3487         pmap_t pmap;
3488         pd_entry_t *l2;
3489         pt_entry_t *l3;
3490         pv_entry_t pv;
3491         int count, md_gen, pvh_gen;
3492
3493         if ((m->oflags & VPO_UNMANAGED) != 0)
3494                 return (0);
3495         rw_rlock(&pvh_global_lock);
3496         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3497         rw_rlock(lock);
3498 restart:
3499         count = 0;
3500         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3501                 pmap = PV_PMAP(pv);
3502                 if (!PMAP_TRYLOCK(pmap)) {
3503                         md_gen = m->md.pv_gen;
3504                         rw_runlock(lock);
3505                         PMAP_LOCK(pmap);
3506                         rw_rlock(lock);
3507                         if (md_gen != m->md.pv_gen) {
3508                                 PMAP_UNLOCK(pmap);
3509                                 goto restart;
3510                         }
3511                 }
3512                 l3 = pmap_l3(pmap, pv->pv_va);
3513                 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3514                         count++;
3515                 PMAP_UNLOCK(pmap);
3516         }
3517         if ((m->flags & PG_FICTITIOUS) == 0) {
3518                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3519                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3520                         pmap = PV_PMAP(pv);
3521                         if (!PMAP_TRYLOCK(pmap)) {
3522                                 md_gen = m->md.pv_gen;
3523                                 pvh_gen = pvh->pv_gen;
3524                                 rw_runlock(lock);
3525                                 PMAP_LOCK(pmap);
3526                                 rw_rlock(lock);
3527                                 if (md_gen != m->md.pv_gen ||
3528                                     pvh_gen != pvh->pv_gen) {
3529                                         PMAP_UNLOCK(pmap);
3530                                         goto restart;
3531                                 }
3532                         }
3533                         l2 = pmap_l2(pmap, pv->pv_va);
3534                         if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3535                                 count++;
3536                         PMAP_UNLOCK(pmap);
3537                 }
3538         }
3539         rw_runlock(lock);
3540         rw_runlock(&pvh_global_lock);
3541         return (count);
3542 }
3543
3544 static void
3545 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3546     struct spglist *free, bool superpage)
3547 {
3548         struct md_page *pvh;
3549         vm_page_t mpte, mt;
3550
3551         if (superpage) {
3552                 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3553                 pvh = pa_to_pvh(m->phys_addr);
3554                 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3555                 pvh->pv_gen++;
3556                 if (TAILQ_EMPTY(&pvh->pv_list)) {
3557                         for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3558                                 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3559                                     (mt->aflags & PGA_WRITEABLE) != 0)
3560                                         vm_page_aflag_clear(mt, PGA_WRITEABLE);
3561                 }
3562                 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3563                 if (mpte != NULL) {
3564                         KASSERT(mpte->valid == VM_PAGE_BITS_ALL,
3565                             ("pmap_remove_pages: pte page not promoted"));
3566                         pmap_resident_count_dec(pmap, 1);
3567                         KASSERT(mpte->wire_count == Ln_ENTRIES,
3568                             ("pmap_remove_pages: pte page wire count error"));
3569                         mpte->wire_count = 0;
3570                         pmap_add_delayed_free_list(mpte, free, FALSE);
3571                 }
3572         } else {
3573                 pmap_resident_count_dec(pmap, 1);
3574                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3575                 m->md.pv_gen++;
3576                 if (TAILQ_EMPTY(&m->md.pv_list) &&
3577                     (m->aflags & PGA_WRITEABLE) != 0) {
3578                         pvh = pa_to_pvh(m->phys_addr);
3579                         if (TAILQ_EMPTY(&pvh->pv_list))
3580                                 vm_page_aflag_clear(m, PGA_WRITEABLE);
3581                 }
3582         }
3583 }
3584
3585 /*
3586  * Destroy all managed, non-wired mappings in the given user-space
3587  * pmap.  This pmap cannot be active on any processor besides the
3588  * caller.
3589  *
3590  * This function cannot be applied to the kernel pmap.  Moreover, it
3591  * is not intended for general use.  It is only to be used during
3592  * process termination.  Consequently, it can be implemented in ways
3593  * that make it faster than pmap_remove().  First, it can more quickly
3594  * destroy mappings by iterating over the pmap's collection of PV
3595  * entries, rather than searching the page table.  Second, it doesn't
3596  * have to test and clear the page table entries atomically, because
3597  * no processor is currently accessing the user address space.  In
3598  * particular, a page table entry's dirty bit won't change state once
3599  * this function starts.
3600  */
3601 void
3602 pmap_remove_pages(pmap_t pmap)
3603 {
3604         struct spglist free;
3605         pd_entry_t ptepde;
3606         pt_entry_t *pte, tpte;
3607         vm_page_t m, mt;
3608         pv_entry_t pv;
3609         struct pv_chunk *pc, *npc;
3610         struct rwlock *lock;
3611         int64_t bit;
3612         uint64_t inuse, bitmask;
3613         int allfree, field, freed, idx;
3614         bool superpage;
3615
3616         lock = NULL;
3617
3618         SLIST_INIT(&free);
3619         rw_rlock(&pvh_global_lock);
3620         PMAP_LOCK(pmap);
3621         TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3622                 allfree = 1;
3623                 freed = 0;
3624                 for (field = 0; field < _NPCM; field++) {
3625                         inuse = ~pc->pc_map[field] & pc_freemask[field];
3626                         while (inuse != 0) {
3627                                 bit = ffsl(inuse) - 1;
3628                                 bitmask = 1UL << bit;
3629                                 idx = field * 64 + bit;
3630                                 pv = &pc->pc_pventry[idx];
3631                                 inuse &= ~bitmask;
3632
3633                                 pte = pmap_l1(pmap, pv->pv_va);
3634                                 ptepde = pmap_load(pte);
3635                                 pte = pmap_l1_to_l2(pte, pv->pv_va);
3636                                 tpte = pmap_load(pte);
3637                                 if ((tpte & PTE_RWX) != 0) {
3638                                         superpage = true;
3639                                 } else {
3640                                         ptepde = tpte;
3641                                         pte = pmap_l2_to_l3(pte, pv->pv_va);
3642                                         tpte = pmap_load(pte);
3643                                         superpage = false;
3644                                 }
3645
3646                                 /*
3647                                  * We cannot remove wired pages from a
3648                                  * process' mapping at this time.
3649                                  */
3650                                 if (tpte & PTE_SW_WIRED) {
3651                                         allfree = 0;
3652                                         continue;
3653                                 }
3654
3655                                 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3656                                 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3657                                     m < &vm_page_array[vm_page_array_size],
3658                                     ("pmap_remove_pages: bad pte %#jx",
3659                                     (uintmax_t)tpte));
3660
3661                                 pmap_clear(pte);
3662
3663                                 /*
3664                                  * Update the vm_page_t clean/reference bits.
3665                                  */
3666                                 if ((tpte & (PTE_D | PTE_W)) ==
3667                                     (PTE_D | PTE_W)) {
3668                                         if (superpage)
3669                                                 for (mt = m;
3670                                                     mt < &m[Ln_ENTRIES]; mt++)
3671                                                         vm_page_dirty(mt);
3672                                         else
3673                                                 vm_page_dirty(m);
3674                                 }
3675
3676                                 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3677
3678                                 /* Mark free */
3679                                 pc->pc_map[field] |= bitmask;
3680
3681                                 pmap_remove_pages_pv(pmap, m, pv, &free,
3682                                     superpage);
3683                                 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3684                                 freed++;
3685                         }
3686                 }
3687                 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3688                 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3689                 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3690                 if (allfree) {
3691                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3692                         free_pv_chunk(pc);
3693                 }
3694         }
3695         if (lock != NULL)
3696                 rw_wunlock(lock);
3697         pmap_invalidate_all(pmap);
3698         rw_runlock(&pvh_global_lock);
3699         PMAP_UNLOCK(pmap);
3700         vm_page_free_pages_toq(&free, false);
3701 }
3702
3703 static bool
3704 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3705 {
3706         struct md_page *pvh;
3707         struct rwlock *lock;
3708         pd_entry_t *l2;
3709         pt_entry_t *l3, mask;
3710         pv_entry_t pv;
3711         pmap_t pmap;
3712         int md_gen, pvh_gen;
3713         bool rv;
3714
3715         mask = 0;
3716         if (modified)
3717                 mask |= PTE_D;
3718         if (accessed)
3719                 mask |= PTE_A;
3720
3721         rv = FALSE;
3722         rw_rlock(&pvh_global_lock);
3723         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3724         rw_rlock(lock);
3725 restart:
3726         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3727                 pmap = PV_PMAP(pv);
3728                 if (!PMAP_TRYLOCK(pmap)) {
3729                         md_gen = m->md.pv_gen;
3730                         rw_runlock(lock);
3731                         PMAP_LOCK(pmap);
3732                         rw_rlock(lock);
3733                         if (md_gen != m->md.pv_gen) {
3734                                 PMAP_UNLOCK(pmap);
3735                                 goto restart;
3736                         }
3737                 }
3738                 l3 = pmap_l3(pmap, pv->pv_va);
3739                 rv = (pmap_load(l3) & mask) == mask;
3740                 PMAP_UNLOCK(pmap);
3741                 if (rv)
3742                         goto out;
3743         }
3744         if ((m->flags & PG_FICTITIOUS) == 0) {
3745                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3746                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3747                         pmap = PV_PMAP(pv);
3748                         if (!PMAP_TRYLOCK(pmap)) {
3749                                 md_gen = m->md.pv_gen;
3750                                 pvh_gen = pvh->pv_gen;
3751                                 rw_runlock(lock);
3752                                 PMAP_LOCK(pmap);
3753                                 rw_rlock(lock);
3754                                 if (md_gen != m->md.pv_gen ||
3755                                     pvh_gen != pvh->pv_gen) {
3756                                         PMAP_UNLOCK(pmap);
3757                                         goto restart;
3758                                 }
3759                         }
3760                         l2 = pmap_l2(pmap, pv->pv_va);
3761                         rv = (pmap_load(l2) & mask) == mask;
3762                         PMAP_UNLOCK(pmap);
3763                         if (rv)
3764                                 goto out;
3765                 }
3766         }
3767 out:
3768         rw_runlock(lock);
3769         rw_runlock(&pvh_global_lock);
3770         return (rv);
3771 }
3772
3773 /*
3774  *      pmap_is_modified:
3775  *
3776  *      Return whether or not the specified physical page was modified
3777  *      in any physical maps.
3778  */
3779 boolean_t
3780 pmap_is_modified(vm_page_t m)
3781 {
3782
3783         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3784             ("pmap_is_modified: page %p is not managed", m));
3785
3786         /*
3787          * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3788          * concurrently set while the object is locked.  Thus, if PGA_WRITEABLE
3789          * is clear, no PTEs can have PG_M set.
3790          */
3791         VM_OBJECT_ASSERT_WLOCKED(m->object);
3792         if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3793                 return (FALSE);
3794         return (pmap_page_test_mappings(m, FALSE, TRUE));
3795 }
3796
3797 /*
3798  *      pmap_is_prefaultable:
3799  *
3800  *      Return whether or not the specified virtual address is eligible
3801  *      for prefault.
3802  */
3803 boolean_t
3804 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3805 {
3806         pt_entry_t *l3;
3807         boolean_t rv;
3808
3809         rv = FALSE;
3810         PMAP_LOCK(pmap);
3811         l3 = pmap_l3(pmap, addr);
3812         if (l3 != NULL && pmap_load(l3) != 0) {
3813                 rv = TRUE;
3814         }
3815         PMAP_UNLOCK(pmap);
3816         return (rv);
3817 }
3818
3819 /*
3820  *      pmap_is_referenced:
3821  *
3822  *      Return whether or not the specified physical page was referenced
3823  *      in any physical maps.
3824  */
3825 boolean_t
3826 pmap_is_referenced(vm_page_t m)
3827 {
3828
3829         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3830             ("pmap_is_referenced: page %p is not managed", m));
3831         return (pmap_page_test_mappings(m, TRUE, FALSE));
3832 }
3833
3834 /*
3835  * Clear the write and modified bits in each of the given page's mappings.
3836  */
3837 void
3838 pmap_remove_write(vm_page_t m)
3839 {
3840         struct md_page *pvh;
3841         struct rwlock *lock;
3842         pmap_t pmap;
3843         pd_entry_t *l2;
3844         pt_entry_t *l3, oldl3, newl3;
3845         pv_entry_t next_pv, pv;
3846         vm_offset_t va;
3847         int md_gen, pvh_gen;
3848
3849         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3850             ("pmap_remove_write: page %p is not managed", m));
3851
3852         /*
3853          * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3854          * set by another thread while the object is locked.  Thus,
3855          * if PGA_WRITEABLE is clear, no page table entries need updating.
3856          */
3857         VM_OBJECT_ASSERT_WLOCKED(m->object);
3858         if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3859                 return;
3860         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3861         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3862             pa_to_pvh(VM_PAGE_TO_PHYS(m));
3863         rw_rlock(&pvh_global_lock);
3864 retry_pv_loop:
3865         rw_wlock(lock);
3866         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3867                 pmap = PV_PMAP(pv);
3868                 if (!PMAP_TRYLOCK(pmap)) {
3869                         pvh_gen = pvh->pv_gen;
3870                         rw_wunlock(lock);
3871                         PMAP_LOCK(pmap);
3872                         rw_wlock(lock);
3873                         if (pvh_gen != pvh->pv_gen) {
3874                                 PMAP_UNLOCK(pmap);
3875                                 rw_wunlock(lock);
3876                                 goto retry_pv_loop;
3877                         }
3878                 }
3879                 va = pv->pv_va;
3880                 l2 = pmap_l2(pmap, va);
3881                 if ((pmap_load(l2) & PTE_W) != 0)
3882                         (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3883                 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3884                     ("inconsistent pv lock %p %p for page %p",
3885                     lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3886                 PMAP_UNLOCK(pmap);
3887         }
3888         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3889                 pmap = PV_PMAP(pv);
3890                 if (!PMAP_TRYLOCK(pmap)) {
3891                         pvh_gen = pvh->pv_gen;
3892                         md_gen = m->md.pv_gen;
3893                         rw_wunlock(lock);
3894                         PMAP_LOCK(pmap);
3895                         rw_wlock(lock);
3896                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3897                                 PMAP_UNLOCK(pmap);
3898                                 rw_wunlock(lock);
3899                                 goto retry_pv_loop;
3900                         }
3901                 }
3902                 l3 = pmap_l3(pmap, pv->pv_va);
3903                 oldl3 = pmap_load(l3);
3904 retry:
3905                 if ((oldl3 & PTE_W) != 0) {
3906                         newl3 = oldl3 & ~(PTE_D | PTE_W);
3907                         if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3908                                 goto retry;
3909                         if ((oldl3 & PTE_D) != 0)
3910                                 vm_page_dirty(m);
3911                         pmap_invalidate_page(pmap, pv->pv_va);
3912                 }
3913                 PMAP_UNLOCK(pmap);
3914         }
3915         rw_wunlock(lock);
3916         vm_page_aflag_clear(m, PGA_WRITEABLE);
3917         rw_runlock(&pvh_global_lock);
3918 }
3919
3920 /*
3921  *      pmap_ts_referenced:
3922  *
3923  *      Return a count of reference bits for a page, clearing those bits.
3924  *      It is not necessary for every reference bit to be cleared, but it
3925  *      is necessary that 0 only be returned when there are truly no
3926  *      reference bits set.
3927  *
3928  *      As an optimization, update the page's dirty field if a modified bit is
3929  *      found while counting reference bits.  This opportunistic update can be
3930  *      performed at low cost and can eliminate the need for some future calls
3931  *      to pmap_is_modified().  However, since this function stops after
3932  *      finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3933  *      dirty pages.  Those dirty pages will only be detected by a future call
3934  *      to pmap_is_modified().
3935  */
3936 int
3937 pmap_ts_referenced(vm_page_t m)
3938 {
3939         struct spglist free;
3940         struct md_page *pvh;
3941         struct rwlock *lock;
3942         pv_entry_t pv, pvf;
3943         pmap_t pmap;
3944         pd_entry_t *l2, l2e;
3945         pt_entry_t *l3, l3e;
3946         vm_paddr_t pa;
3947         vm_offset_t va;
3948         int cleared, md_gen, not_cleared, pvh_gen;
3949
3950         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3951             ("pmap_ts_referenced: page %p is not managed", m));
3952         SLIST_INIT(&free);
3953         cleared = 0;
3954         pa = VM_PAGE_TO_PHYS(m);
3955         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3956
3957         lock = PHYS_TO_PV_LIST_LOCK(pa);
3958         rw_rlock(&pvh_global_lock);
3959         rw_wlock(lock);
3960 retry:
3961         not_cleared = 0;
3962         if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3963                 goto small_mappings;
3964         pv = pvf;
3965         do {
3966                 pmap = PV_PMAP(pv);
3967                 if (!PMAP_TRYLOCK(pmap)) {
3968                         pvh_gen = pvh->pv_gen;
3969                         rw_wunlock(lock);
3970                         PMAP_LOCK(pmap);
3971                         rw_wlock(lock);
3972                         if (pvh_gen != pvh->pv_gen) {
3973                                 PMAP_UNLOCK(pmap);
3974                                 goto retry;
3975                         }
3976                 }
3977                 va = pv->pv_va;
3978                 l2 = pmap_l2(pmap, va);
3979                 l2e = pmap_load(l2);
3980                 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3981                         /*
3982                          * Although l2e is mapping a 2MB page, because
3983                          * this function is called at a 4KB page granularity,
3984                          * we only update the 4KB page under test.
3985                          */
3986                         vm_page_dirty(m);
3987                 }
3988                 if ((l2e & PTE_A) != 0) {
3989                         /*
3990                          * Since this reference bit is shared by 512 4KB
3991                          * pages, it should not be cleared every time it is
3992                          * tested.  Apply a simple "hash" function on the
3993                          * physical page number, the virtual superpage number,
3994                          * and the pmap address to select one 4KB page out of
3995                          * the 512 on which testing the reference bit will
3996                          * result in clearing that reference bit.  This
3997                          * function is designed to avoid the selection of the
3998                          * same 4KB page for every 2MB page mapping.
3999                          *
4000                          * On demotion, a mapping that hasn't been referenced
4001                          * is simply destroyed.  To avoid the possibility of a
4002                          * subsequent page fault on a demoted wired mapping,
4003                          * always leave its reference bit set.  Moreover,
4004                          * since the superpage is wired, the current state of
4005                          * its reference bit won't affect page replacement.
4006                          */
4007                         if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4008                             (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4009                             (l2e & PTE_SW_WIRED) == 0) {
4010                                 pmap_clear_bits(l2, PTE_A);
4011                                 pmap_invalidate_page(pmap, va);
4012                                 cleared++;
4013                         } else
4014                                 not_cleared++;
4015                 }
4016                 PMAP_UNLOCK(pmap);
4017                 /* Rotate the PV list if it has more than one entry. */
4018                 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4019                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4020                         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4021                         pvh->pv_gen++;
4022                 }
4023                 if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX)
4024                         goto out;
4025         } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4026 small_mappings:
4027         if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4028                 goto out;
4029         pv = pvf;
4030         do {
4031                 pmap = PV_PMAP(pv);
4032                 if (!PMAP_TRYLOCK(pmap)) {
4033                         pvh_gen = pvh->pv_gen;
4034                         md_gen = m->md.pv_gen;
4035                         rw_wunlock(lock);
4036                         PMAP_LOCK(pmap);
4037                         rw_wlock(lock);
4038                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4039                                 PMAP_UNLOCK(pmap);
4040                                 goto retry;
4041                         }
4042                 }
4043                 l2 = pmap_l2(pmap, pv->pv_va);
4044
4045                 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4046                     ("pmap_ts_referenced: found an invalid l2 table"));
4047
4048                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4049                 l3e = pmap_load(l3);
4050                 if ((l3e & PTE_D) != 0)
4051                         vm_page_dirty(m);
4052                 if ((l3e & PTE_A) != 0) {
4053                         if ((l3e & PTE_SW_WIRED) == 0) {
4054                                 /*
4055                                  * Wired pages cannot be paged out so
4056                                  * doing accessed bit emulation for
4057                                  * them is wasted effort. We do the
4058                                  * hard work for unwired pages only.
4059                                  */
4060                                 pmap_clear_bits(l3, PTE_A);
4061                                 pmap_invalidate_page(pmap, pv->pv_va);
4062                                 cleared++;
4063                         } else
4064                                 not_cleared++;
4065                 }
4066                 PMAP_UNLOCK(pmap);
4067                 /* Rotate the PV list if it has more than one entry. */
4068                 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4069                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4070                         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4071                         m->md.pv_gen++;
4072                 }
4073         } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
4074             not_cleared < PMAP_TS_REFERENCED_MAX);
4075 out:
4076         rw_wunlock(lock);
4077         rw_runlock(&pvh_global_lock);
4078         vm_page_free_pages_toq(&free, false);
4079         return (cleared + not_cleared);
4080 }
4081
4082 /*
4083  *      Apply the given advice to the specified range of addresses within the
4084  *      given pmap.  Depending on the advice, clear the referenced and/or
4085  *      modified flags in each mapping and set the mapped page's dirty field.
4086  */
4087 void
4088 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4089 {
4090 }
4091
4092 /*
4093  *      Clear the modify bits on the specified physical page.
4094  */
4095 void
4096 pmap_clear_modify(vm_page_t m)
4097 {
4098         struct md_page *pvh;
4099         struct rwlock *lock;
4100         pmap_t pmap;
4101         pv_entry_t next_pv, pv;
4102         pd_entry_t *l2, oldl2;
4103         pt_entry_t *l3;
4104         vm_offset_t va;
4105         int md_gen, pvh_gen;
4106
4107         KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4108             ("pmap_clear_modify: page %p is not managed", m));
4109         VM_OBJECT_ASSERT_WLOCKED(m->object);
4110         KASSERT(!vm_page_xbusied(m),
4111             ("pmap_clear_modify: page %p is exclusive busied", m));
4112
4113         /*
4114          * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4115          * If the object containing the page is locked and the page is not
4116          * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4117          */
4118         if ((m->aflags & PGA_WRITEABLE) == 0)
4119                 return;
4120         pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4121             pa_to_pvh(VM_PAGE_TO_PHYS(m));
4122         lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4123         rw_rlock(&pvh_global_lock);
4124         rw_wlock(lock);
4125 restart:
4126         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4127                 pmap = PV_PMAP(pv);
4128                 if (!PMAP_TRYLOCK(pmap)) {
4129                         pvh_gen = pvh->pv_gen;
4130                         rw_wunlock(lock);
4131                         PMAP_LOCK(pmap);
4132                         rw_wlock(lock);
4133                         if (pvh_gen != pvh->pv_gen) {
4134                                 PMAP_UNLOCK(pmap);
4135                                 goto restart;
4136                         }
4137                 }
4138                 va = pv->pv_va;
4139                 l2 = pmap_l2(pmap, va);
4140                 oldl2 = pmap_load(l2);
4141                 /* If oldl2 has PTE_W set, then it also has PTE_D set. */
4142                 if ((oldl2 & PTE_W) != 0 &&
4143                     pmap_demote_l2_locked(pmap, l2, va, &lock) &&
4144                     (oldl2 & PTE_SW_WIRED) == 0) {
4145                         /*
4146                          * Write protect the mapping to a single page so that
4147                          * a subsequent write access may repromote.
4148                          */
4149                         va += VM_PAGE_TO_PHYS(m) - PTE_TO_PHYS(oldl2);
4150                         l3 = pmap_l2_to_l3(l2, va);
4151                         pmap_clear_bits(l3, PTE_D | PTE_W);
4152                         vm_page_dirty(m);
4153                         pmap_invalidate_page(pmap, va);
4154                 }
4155                 PMAP_UNLOCK(pmap);
4156         }
4157         TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4158                 pmap = PV_PMAP(pv);
4159                 if (!PMAP_TRYLOCK(pmap)) {
4160                         md_gen = m->md.pv_gen;
4161                         pvh_gen = pvh->pv_gen;
4162                         rw_wunlock(lock);
4163                         PMAP_LOCK(pmap);
4164                         rw_wlock(lock);
4165                         if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4166                                 PMAP_UNLOCK(pmap);
4167                                 goto restart;
4168                         }
4169                 }
4170                 l2 = pmap_l2(pmap, pv->pv_va);
4171                 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4172                     ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4173                     m));
4174                 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4175                 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4176                         pmap_clear_bits(l3, PTE_D | PTE_W);
4177                         pmap_invalidate_page(pmap, pv->pv_va);
4178                 }
4179                 PMAP_UNLOCK(pmap);
4180         }
4181         rw_wunlock(lock);
4182         rw_runlock(&pvh_global_lock);
4183 }
4184
4185 void *
4186 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4187 {
4188
4189         return ((void *)PHYS_TO_DMAP(pa));
4190 }
4191
4192 void
4193 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4194 {
4195 }
4196
4197 /*
4198  * Sets the memory attribute for the specified page.
4199  */
4200 void
4201 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4202 {
4203
4204         m->md.pv_memattr = ma;
4205 }
4206
4207 /*
4208  * perform the pmap work for mincore
4209  */
4210 int
4211 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4212 {
4213         pt_entry_t *l2, *l3, tpte;
4214         vm_paddr_t pa;
4215         int val;
4216         bool managed;
4217
4218         PMAP_LOCK(pmap);
4219 retry:
4220         managed = false;
4221         val = 0;
4222
4223         l2 = pmap_l2(pmap, addr);
4224         if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4225                 if ((tpte & PTE_RWX) != 0) {
4226                         pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4227                         val = MINCORE_INCORE | MINCORE_SUPER;
4228                 } else {
4229                         l3 = pmap_l2_to_l3(l2, addr);
4230                         tpte = pmap_load(l3);
4231                         if ((tpte & PTE_V) == 0)
4232                                 goto done;
4233                         pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4234                         val = MINCORE_INCORE;
4235                 }
4236
4237                 if ((tpte & PTE_D) != 0)
4238                         val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4239                 if ((tpte & PTE_A) != 0)
4240                         val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4241                 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4242         }
4243
4244 done:
4245         if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4246             (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4247                 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4248                 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4249                         goto retry;
4250         } else
4251                 PA_UNLOCK_COND(*locked_pa);
4252         PMAP_UNLOCK(pmap);
4253         return (val);
4254 }
4255
4256 void
4257 pmap_activate_sw(struct thread *td)
4258 {
4259         pmap_t oldpmap, pmap;
4260         u_int hart;
4261
4262         oldpmap = PCPU_GET(curpmap);
4263         pmap = vmspace_pmap(td->td_proc->p_vmspace);
4264         if (pmap == oldpmap)
4265                 return;
4266         load_satp(pmap->pm_satp);
4267
4268         hart = PCPU_GET(hart);
4269 #ifdef SMP
4270         CPU_SET_ATOMIC(hart, &pmap->pm_active);
4271         CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4272 #else
4273         CPU_SET(hart, &pmap->pm_active);
4274         CPU_CLR(hart, &oldpmap->pm_active);
4275 #endif
4276         PCPU_SET(curpmap, pmap);
4277
4278         sfence_vma();
4279 }
4280
4281 void
4282 pmap_activate(struct thread *td)
4283 {
4284
4285         critical_enter();
4286         pmap_activate_sw(td);
4287         critical_exit();
4288 }
4289
4290 void
4291 pmap_activate_boot(pmap_t pmap)
4292 {
4293         u_int hart;
4294
4295         hart = PCPU_GET(hart);
4296 #ifdef SMP
4297         CPU_SET_ATOMIC(hart, &pmap->pm_active);
4298 #else
4299         CPU_SET(hart, &pmap->pm_active);
4300 #endif
4301         PCPU_SET(curpmap, pmap);
4302 }
4303
4304 void
4305 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4306 {
4307         cpuset_t mask;
4308
4309         /*
4310          * From the RISC-V User-Level ISA V2.2:
4311          *
4312          * "To make a store to instruction memory visible to all
4313          * RISC-V harts, the writing hart has to execute a data FENCE
4314          * before requesting that all remote RISC-V harts execute a
4315          * FENCE.I."
4316          */
4317         sched_pin();
4318         mask = all_harts;
4319         CPU_CLR(PCPU_GET(hart), &mask);
4320         fence();
4321         if (!CPU_EMPTY(&mask) && smp_started)
4322                 sbi_remote_fence_i(mask.__bits);
4323         sched_unpin();
4324 }
4325
4326 /*
4327  *      Increase the starting virtual address of the given mapping if a
4328  *      different alignment might result in more superpage mappings.
4329  */
4330 void
4331 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4332     vm_offset_t *addr, vm_size_t size)
4333 {
4334         vm_offset_t superpage_offset;
4335
4336         if (size < L2_SIZE)
4337                 return;
4338         if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4339                 offset += ptoa(object->pg_color);
4340         superpage_offset = offset & L2_OFFSET;
4341         if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4342             (*addr & L2_OFFSET) == superpage_offset)
4343                 return;
4344         if ((*addr & L2_OFFSET) < superpage_offset)
4345                 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4346         else
4347                 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4348 }
4349
4350 /**
4351  * Get the kernel virtual address of a set of physical pages. If there are
4352  * physical addresses not covered by the DMAP perform a transient mapping
4353  * that will be removed when calling pmap_unmap_io_transient.
4354  *
4355  * \param page        The pages the caller wishes to obtain the virtual
4356  *                    address on the kernel memory map.
4357  * \param vaddr       On return contains the kernel virtual memory address
4358  *                    of the pages passed in the page parameter.
4359  * \param count       Number of pages passed in.
4360  * \param can_fault   TRUE if the thread using the mapped pages can take
4361  *                    page faults, FALSE otherwise.
4362  *
4363  * \returns TRUE if the caller must call pmap_unmap_io_transient when
4364  *          finished or FALSE otherwise.
4365  *
4366  */
4367 boolean_t
4368 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4369     boolean_t can_fault)
4370 {
4371         vm_paddr_t paddr;
4372         boolean_t needs_mapping;
4373         int error, i;
4374
4375         /*
4376          * Allocate any KVA space that we need, this is done in a separate
4377          * loop to prevent calling vmem_alloc while pinned.
4378          */
4379         needs_mapping = FALSE;
4380         for (i = 0; i < count; i++) {
4381                 paddr = VM_PAGE_TO_PHYS(page[i]);
4382                 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4383                         error = vmem_alloc(kernel_arena, PAGE_SIZE,
4384                             M_BESTFIT | M_WAITOK, &vaddr[i]);
4385                         KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4386                         needs_mapping = TRUE;
4387                 } else {
4388                         vaddr[i] = PHYS_TO_DMAP(paddr);
4389                 }
4390         }
4391
4392         /* Exit early if everything is covered by the DMAP */
4393         if (!needs_mapping)
4394                 return (FALSE);
4395
4396         if (!can_fault)
4397                 sched_pin();
4398         for (i = 0; i < count; i++) {
4399                 paddr = VM_PAGE_TO_PHYS(page[i]);
4400                 if (paddr >= DMAP_MAX_PHYSADDR) {
4401                         panic(
4402                            "pmap_map_io_transient: TODO: Map out of DMAP data");
4403                 }
4404         }
4405
4406         return (needs_mapping);
4407 }
4408
4409 void
4410 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4411     boolean_t can_fault)
4412 {
4413         vm_paddr_t paddr;
4414         int i;
4415
4416         if (!can_fault)
4417                 sched_unpin();
4418         for (i = 0; i < count; i++) {
4419                 paddr = VM_PAGE_TO_PHYS(page[i]);
4420                 if (paddr >= DMAP_MAX_PHYSADDR) {
4421                         panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4422                 }
4423         }
4424 }
4425
4426 boolean_t
4427 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4428 {
4429
4430         return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4431 }
4432
4433 bool
4434 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4435     pt_entry_t **l3)
4436 {
4437         pd_entry_t *l1p, *l2p;
4438
4439         /* Get l1 directory entry. */
4440         l1p = pmap_l1(pmap, va);
4441         *l1 = l1p;
4442
4443         if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4444                 return (false);
4445
4446         if ((pmap_load(l1p) & PTE_RX) != 0) {
4447                 *l2 = NULL;
4448                 *l3 = NULL;
4449                 return (true);
4450         }
4451
4452         /* Get l2 directory entry. */
4453         l2p = pmap_l1_to_l2(l1p, va);
4454         *l2 = l2p;
4455
4456         if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4457                 return (false);
4458
4459         if ((pmap_load(l2p) & PTE_RX) != 0) {
4460                 *l3 = NULL;
4461                 return (true);
4462         }
4463
4464         /* Get l3 page table entry. */
4465         *l3 = pmap_l2_to_l3(l2p, va);
4466
4467         return (true);
4468 }