2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 1991 Regents of the University of California.
6 * Copyright (c) 1994 John S. Dyson
8 * Copyright (c) 1994 David Greenman
10 * Copyright (c) 2003 Peter Wemm
11 * All rights reserved.
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
13 * All rights reserved.
14 * Copyright (c) 2014 Andrew Turner
15 * All rights reserved.
16 * Copyright (c) 2014 The FreeBSD Foundation
17 * All rights reserved.
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
19 * All rights reserved.
21 * This code is derived from software contributed to Berkeley by
22 * the Systems Programming Group of the University of Utah Computer
23 * Science Department and William Jolitz of UUNET Technologies Inc.
25 * Portions of this software were developed by Andrew Turner under
26 * sponsorship from The FreeBSD Foundation.
28 * Portions of this software were developed by SRI International and the
29 * University of Cambridge Computer Laboratory under DARPA/AFRL contract
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
32 * Portions of this software were developed by the University of Cambridge
33 * Computer Laboratory as part of the CTSRD Project, with support from the
34 * UK Higher Education Innovation Fund (HEIF).
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed by the University of
47 * California, Berkeley and its contributors.
48 * 4. Neither the name of the University nor the names of its contributors
49 * may be used to endorse or promote products derived from this software
50 * without specific prior written permission.
52 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
67 * Copyright (c) 2003 Networks Associates Technology, Inc.
68 * All rights reserved.
70 * This software was developed for the FreeBSD Project by Jake Burkholder,
71 * Safeport Network Services, and Network Associates Laboratories, the
72 * Security Research Division of Network Associates, Inc. under
73 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
74 * CHATS research program.
76 * Redistribution and use in source and binary forms, with or without
77 * modification, are permitted provided that the following conditions
79 * 1. Redistributions of source code must retain the above copyright
80 * notice, this list of conditions and the following disclaimer.
81 * 2. Redistributions in binary form must reproduce the above copyright
82 * notice, this list of conditions and the following disclaimer in the
83 * documentation and/or other materials provided with the distribution.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 #include <sys/cdefs.h>
99 __FBSDID("$FreeBSD$");
102 * Manages physical address maps.
104 * Since the information managed by this module is
105 * also stored by the logical address mapping module,
106 * this module may throw away valid virtual-to-physical
107 * mappings at almost any time. However, invalidations
108 * of virtual-to-physical mappings must be done as
111 * In order to cope with hardware architectures which
112 * make virtual-to-physical map invalidates expensive,
113 * this module may delay invalidate or reduced protection
114 * operations until such time as they are actually
115 * necessary. This module is given full information as
116 * to which processors are currently using which maps,
117 * and to when physical maps must be made correct.
120 #include <sys/param.h>
121 #include <sys/systm.h>
122 #include <sys/bitstring.h>
124 #include <sys/cpuset.h>
125 #include <sys/kernel.h>
127 #include <sys/lock.h>
128 #include <sys/malloc.h>
129 #include <sys/mman.h>
130 #include <sys/msgbuf.h>
131 #include <sys/mutex.h>
132 #include <sys/proc.h>
133 #include <sys/rwlock.h>
135 #include <sys/vmem.h>
136 #include <sys/vmmeter.h>
137 #include <sys/sched.h>
138 #include <sys/sysctl.h>
142 #include <vm/vm_param.h>
143 #include <vm/vm_kern.h>
144 #include <vm/vm_page.h>
145 #include <vm/vm_map.h>
146 #include <vm/vm_object.h>
147 #include <vm/vm_extern.h>
148 #include <vm/vm_pageout.h>
149 #include <vm/vm_pager.h>
150 #include <vm/vm_phys.h>
151 #include <vm/vm_radix.h>
152 #include <vm/vm_reserv.h>
155 #include <machine/machdep.h>
156 #include <machine/md_var.h>
157 #include <machine/pcb.h>
158 #include <machine/sbi.h>
160 #define NUL1E (Ln_ENTRIES * Ln_ENTRIES)
161 #define NUL2E (Ln_ENTRIES * NUL1E)
163 #if !defined(DIAGNOSTIC)
164 #ifdef __GNUC_GNU_INLINE__
165 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
167 #define PMAP_INLINE extern inline
174 #define PV_STAT(x) do { x ; } while (0)
176 #define PV_STAT(x) do { } while (0)
179 #define pmap_l2_pindex(v) ((v) >> L2_SHIFT)
180 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
182 #define NPV_LIST_LOCKS MAXCPU
184 #define PHYS_TO_PV_LIST_LOCK(pa) \
185 (&pv_list_locks[pmap_l2_pindex(pa) % NPV_LIST_LOCKS])
187 #define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \
188 struct rwlock **_lockp = (lockp); \
189 struct rwlock *_new_lock; \
191 _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \
192 if (_new_lock != *_lockp) { \
193 if (*_lockp != NULL) \
194 rw_wunlock(*_lockp); \
195 *_lockp = _new_lock; \
200 #define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \
201 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m))
203 #define RELEASE_PV_LIST_LOCK(lockp) do { \
204 struct rwlock **_lockp = (lockp); \
206 if (*_lockp != NULL) { \
207 rw_wunlock(*_lockp); \
212 #define VM_PAGE_TO_PV_LIST_LOCK(m) \
213 PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m))
215 /* The list of all the user pmaps */
216 LIST_HEAD(pmaplist, pmap);
217 static struct pmaplist allpmaps = LIST_HEAD_INITIALIZER();
219 struct pmap kernel_pmap_store;
221 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
222 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
223 vm_offset_t kernel_vm_end = 0;
225 vm_paddr_t dmap_phys_base; /* The start of the dmap region */
226 vm_paddr_t dmap_phys_max; /* The limit of the dmap region */
227 vm_offset_t dmap_max_addr; /* The virtual address limit of the dmap */
229 /* This code assumes all L1 DMAP entries will be used */
230 CTASSERT((DMAP_MIN_ADDRESS & ~L1_OFFSET) == DMAP_MIN_ADDRESS);
231 CTASSERT((DMAP_MAX_ADDRESS & ~L1_OFFSET) == DMAP_MAX_ADDRESS);
233 static struct rwlock_padalign pvh_global_lock;
234 static struct mtx_padalign allpmaps_lock;
236 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0,
237 "VM/pmap parameters");
239 static int superpages_enabled = 1;
240 SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled,
241 CTLFLAG_RDTUN, &superpages_enabled, 0,
242 "Enable support for transparent superpages");
244 static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2, CTLFLAG_RD, 0,
245 "2MB page mapping counters");
247 static u_long pmap_l2_demotions;
248 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, demotions, CTLFLAG_RD,
249 &pmap_l2_demotions, 0,
250 "2MB page demotions");
252 static u_long pmap_l2_mappings;
253 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, mappings, CTLFLAG_RD,
254 &pmap_l2_mappings, 0,
255 "2MB page mappings");
257 static u_long pmap_l2_p_failures;
258 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, p_failures, CTLFLAG_RD,
259 &pmap_l2_p_failures, 0,
260 "2MB page promotion failures");
262 static u_long pmap_l2_promotions;
263 SYSCTL_ULONG(_vm_pmap_l2, OID_AUTO, promotions, CTLFLAG_RD,
264 &pmap_l2_promotions, 0,
265 "2MB page promotions");
268 * Data for the pv entry allocation mechanism
270 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
271 static struct mtx pv_chunks_mutex;
272 static struct rwlock pv_list_locks[NPV_LIST_LOCKS];
273 static struct md_page *pv_table;
274 static struct md_page pv_dummy;
276 extern cpuset_t all_harts;
279 * Internal flags for pmap_enter()'s helper functions.
281 #define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */
282 #define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */
284 static void free_pv_chunk(struct pv_chunk *pc);
285 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
286 static pv_entry_t get_pv_entry(pmap_t pmap, struct rwlock **lockp);
287 static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp);
288 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
289 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
291 static bool pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va);
292 static bool pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2,
293 vm_offset_t va, struct rwlock **lockp);
294 static int pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2,
295 u_int flags, vm_page_t m, struct rwlock **lockp);
296 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
297 vm_page_t m, vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp);
298 static int pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t sva,
299 pd_entry_t ptepde, struct spglist *free, struct rwlock **lockp);
300 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
301 vm_page_t m, struct rwlock **lockp);
303 static vm_page_t _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex,
304 struct rwlock **lockp);
306 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m,
307 struct spglist *free);
308 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, struct spglist *);
310 #define pmap_clear(pte) pmap_store(pte, 0)
311 #define pmap_clear_bits(pte, bits) atomic_clear_64(pte, bits)
312 #define pmap_load_store(pte, entry) atomic_swap_64(pte, entry)
313 #define pmap_load_clear(pte) pmap_load_store(pte, 0)
314 #define pmap_load(pte) atomic_load_64(pte)
315 #define pmap_store(pte, entry) atomic_store_64(pte, entry)
316 #define pmap_store_bits(pte, bits) atomic_set_64(pte, bits)
318 /********************/
319 /* Inline functions */
320 /********************/
323 pagecopy(void *s, void *d)
326 memcpy(d, s, PAGE_SIZE);
336 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK)
337 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK)
338 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK)
340 #define PTE_TO_PHYS(pte) ((pte >> PTE_PPN0_S) * PAGE_SIZE)
342 static __inline pd_entry_t *
343 pmap_l1(pmap_t pmap, vm_offset_t va)
346 return (&pmap->pm_l1[pmap_l1_index(va)]);
349 static __inline pd_entry_t *
350 pmap_l1_to_l2(pd_entry_t *l1, vm_offset_t va)
355 phys = PTE_TO_PHYS(pmap_load(l1));
356 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
358 return (&l2[pmap_l2_index(va)]);
361 static __inline pd_entry_t *
362 pmap_l2(pmap_t pmap, vm_offset_t va)
366 l1 = pmap_l1(pmap, va);
367 if ((pmap_load(l1) & PTE_V) == 0)
369 if ((pmap_load(l1) & PTE_RX) != 0)
372 return (pmap_l1_to_l2(l1, va));
375 static __inline pt_entry_t *
376 pmap_l2_to_l3(pd_entry_t *l2, vm_offset_t va)
381 phys = PTE_TO_PHYS(pmap_load(l2));
382 l3 = (pd_entry_t *)PHYS_TO_DMAP(phys);
384 return (&l3[pmap_l3_index(va)]);
387 static __inline pt_entry_t *
388 pmap_l3(pmap_t pmap, vm_offset_t va)
392 l2 = pmap_l2(pmap, va);
395 if ((pmap_load(l2) & PTE_V) == 0)
397 if ((pmap_load(l2) & PTE_RX) != 0)
400 return (pmap_l2_to_l3(l2, va));
404 pmap_resident_count_inc(pmap_t pmap, int count)
407 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
408 pmap->pm_stats.resident_count += count;
412 pmap_resident_count_dec(pmap_t pmap, int count)
415 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
416 KASSERT(pmap->pm_stats.resident_count >= count,
417 ("pmap %p resident count underflow %ld %d", pmap,
418 pmap->pm_stats.resident_count, count));
419 pmap->pm_stats.resident_count -= count;
423 pmap_distribute_l1(struct pmap *pmap, vm_pindex_t l1index,
426 struct pmap *user_pmap;
429 /* Distribute new kernel L1 entry to all the user pmaps */
430 if (pmap != kernel_pmap)
433 mtx_lock(&allpmaps_lock);
434 LIST_FOREACH(user_pmap, &allpmaps, pm_list) {
435 l1 = &user_pmap->pm_l1[l1index];
436 pmap_store(l1, entry);
438 mtx_unlock(&allpmaps_lock);
442 pmap_early_page_idx(vm_offset_t l1pt, vm_offset_t va, u_int *l1_slot,
448 l1 = (pd_entry_t *)l1pt;
449 *l1_slot = (va >> L1_SHIFT) & Ln_ADDR_MASK;
451 /* Check locore has used a table L1 map */
452 KASSERT((l1[*l1_slot] & PTE_RX) == 0,
453 ("Invalid bootstrap L1 table"));
455 /* Find the address of the L2 table */
456 l2 = (pt_entry_t *)init_pt_va;
457 *l2_slot = pmap_l2_index(va);
463 pmap_early_vtophys(vm_offset_t l1pt, vm_offset_t va)
465 u_int l1_slot, l2_slot;
469 l2 = pmap_early_page_idx(l1pt, va, &l1_slot, &l2_slot);
471 /* Check locore has used L2 superpages */
472 KASSERT((l2[l2_slot] & PTE_RX) != 0,
473 ("Invalid bootstrap L2 table"));
475 /* L2 is superpages */
476 ret = (l2[l2_slot] >> PTE_PPN1_S) << L2_SHIFT;
477 ret += (va & L2_OFFSET);
483 pmap_bootstrap_dmap(vm_offset_t kern_l1, vm_paddr_t min_pa, vm_paddr_t max_pa)
492 pa = dmap_phys_base = min_pa & ~L1_OFFSET;
493 va = DMAP_MIN_ADDRESS;
494 l1 = (pd_entry_t *)kern_l1;
495 l1_slot = pmap_l1_index(DMAP_MIN_ADDRESS);
497 for (; va < DMAP_MAX_ADDRESS && pa < max_pa;
498 pa += L1_SIZE, va += L1_SIZE, l1_slot++) {
499 KASSERT(l1_slot < Ln_ENTRIES, ("Invalid L1 index"));
502 pn = (pa / PAGE_SIZE);
504 entry |= (pn << PTE_PPN0_S);
505 pmap_store(&l1[l1_slot], entry);
508 /* Set the upper limit of the DMAP region */
516 pmap_bootstrap_l3(vm_offset_t l1pt, vm_offset_t va, vm_offset_t l3_start)
525 KASSERT((va & L2_OFFSET) == 0, ("Invalid virtual address"));
527 l2 = pmap_l2(kernel_pmap, va);
528 l2 = (pd_entry_t *)((uintptr_t)l2 & ~(PAGE_SIZE - 1));
529 l2_slot = pmap_l2_index(va);
532 for (; va < VM_MAX_KERNEL_ADDRESS; l2_slot++, va += L2_SIZE) {
533 KASSERT(l2_slot < Ln_ENTRIES, ("Invalid L2 index"));
535 pa = pmap_early_vtophys(l1pt, l3pt);
536 pn = (pa / PAGE_SIZE);
538 entry |= (pn << PTE_PPN0_S);
539 pmap_store(&l2[l2_slot], entry);
544 /* Clean the L2 page table */
545 memset((void *)l3_start, 0, l3pt - l3_start);
551 * Bootstrap the system enough to run with virtual memory.
554 pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart, vm_size_t kernlen)
556 u_int l1_slot, l2_slot, avail_slot, map_slot;
557 vm_offset_t freemempos;
558 vm_offset_t dpcpu, msgbufpv;
559 vm_paddr_t end, max_pa, min_pa, pa, start;
562 printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
563 printf("%lx\n", l1pt);
564 printf("%lx\n", (KERNBASE >> L1_SHIFT) & Ln_ADDR_MASK);
566 /* Set this early so we can use the pagetable walking functions */
567 kernel_pmap_store.pm_l1 = (pd_entry_t *)l1pt;
568 PMAP_LOCK_INIT(kernel_pmap);
570 rw_init(&pvh_global_lock, "pmap pv global");
572 CPU_FILL(&kernel_pmap->pm_active);
574 /* Assume the address we were loaded to is a valid physical address. */
575 min_pa = max_pa = kernstart;
578 * Find the minimum physical address. physmap is sorted,
579 * but may contain empty ranges.
581 for (i = 0; i < physmap_idx * 2; i += 2) {
582 if (physmap[i] == physmap[i + 1])
584 if (physmap[i] <= min_pa)
586 if (physmap[i + 1] > max_pa)
587 max_pa = physmap[i + 1];
589 printf("physmap_idx %lx\n", physmap_idx);
590 printf("min_pa %lx\n", min_pa);
591 printf("max_pa %lx\n", max_pa);
593 /* Create a direct map region early so we can use it for pa -> va */
594 pmap_bootstrap_dmap(l1pt, min_pa, max_pa);
597 * Read the page table to find out what is already mapped.
598 * This assumes we have mapped a block of memory from KERNBASE
599 * using a single L1 entry.
601 (void)pmap_early_page_idx(l1pt, KERNBASE, &l1_slot, &l2_slot);
603 /* Sanity check the index, KERNBASE should be the first VA */
604 KASSERT(l2_slot == 0, ("The L2 index is non-zero"));
606 freemempos = roundup2(KERNBASE + kernlen, PAGE_SIZE);
608 /* Create the l3 tables for the early devmap */
609 freemempos = pmap_bootstrap_l3(l1pt,
610 VM_MAX_KERNEL_ADDRESS - L2_SIZE, freemempos);
614 #define alloc_pages(var, np) \
615 (var) = freemempos; \
616 freemempos += (np * PAGE_SIZE); \
617 memset((char *)(var), 0, ((np) * PAGE_SIZE));
619 /* Allocate dynamic per-cpu area. */
620 alloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
621 dpcpu_init((void *)dpcpu, 0);
623 /* Allocate memory for the msgbuf, e.g. for /sbin/dmesg */
624 alloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
625 msgbufp = (void *)msgbufpv;
627 virtual_avail = roundup2(freemempos, L2_SIZE);
628 virtual_end = VM_MAX_KERNEL_ADDRESS - L2_SIZE;
629 kernel_vm_end = virtual_avail;
631 pa = pmap_early_vtophys(l1pt, freemempos);
633 /* Initialize phys_avail and dump_avail. */
634 for (avail_slot = map_slot = physmem = 0; map_slot < physmap_idx * 2;
636 start = physmap[map_slot];
637 end = physmap[map_slot + 1];
641 dump_avail[map_slot] = start;
642 dump_avail[map_slot + 1] = end;
643 realmem += atop((vm_offset_t)(end - start));
645 if (start >= kernstart && end <= pa)
648 if (start < kernstart && end > kernstart)
650 else if (start < pa && end > pa)
652 phys_avail[avail_slot] = start;
653 phys_avail[avail_slot + 1] = end;
654 physmem += (end - start) >> PAGE_SHIFT;
657 if (end != physmap[map_slot + 1] && end > pa) {
658 phys_avail[avail_slot] = pa;
659 phys_avail[avail_slot + 1] = physmap[map_slot + 1];
660 physmem += (physmap[map_slot + 1] - pa) >> PAGE_SHIFT;
664 phys_avail[avail_slot] = 0;
665 phys_avail[avail_slot + 1] = 0;
668 * Maxmem isn't the "maximum memory", it's one larger than the
669 * highest page of the physical address space. It should be
670 * called something like "Maxphyspage".
672 Maxmem = atop(phys_avail[avail_slot - 1]);
676 * Initialize a vm_page's machine-dependent fields.
679 pmap_page_init(vm_page_t m)
682 TAILQ_INIT(&m->md.pv_list);
683 m->md.pv_memattr = VM_MEMATTR_WRITE_BACK;
687 * Initialize the pmap module.
688 * Called by vm_init, to initialize any structures that the pmap
689 * system needs to map virtual memory.
698 * Initialize the pv chunk and pmap list mutexes.
700 mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF);
701 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_DEF);
704 * Initialize the pool of pv list locks.
706 for (i = 0; i < NPV_LIST_LOCKS; i++)
707 rw_init(&pv_list_locks[i], "pmap pv list");
710 * Calculate the size of the pv head table for superpages.
712 pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L2_SIZE);
715 * Allocate memory for the pv head table for superpages.
717 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
719 pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO);
720 for (i = 0; i < pv_npg; i++)
721 TAILQ_INIT(&pv_table[i].pv_list);
722 TAILQ_INIT(&pv_dummy.pv_list);
724 if (superpages_enabled)
725 pagesizes[1] = L2_SIZE;
730 * For SMP, these functions have to use IPIs for coherence.
732 * In general, the calling thread uses a plain fence to order the
733 * writes to the page tables before invoking an SBI callback to invoke
734 * sfence_vma() on remote CPUs.
737 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
742 mask = pmap->pm_active;
743 CPU_CLR(PCPU_GET(hart), &mask);
745 if (!CPU_EMPTY(&mask) && smp_started)
746 sbi_remote_sfence_vma(mask.__bits, va, 1);
752 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
757 mask = pmap->pm_active;
758 CPU_CLR(PCPU_GET(hart), &mask);
760 if (!CPU_EMPTY(&mask) && smp_started)
761 sbi_remote_sfence_vma(mask.__bits, sva, eva - sva + 1);
764 * Might consider a loop of sfence_vma_page() for a small
765 * number of pages in the future.
772 pmap_invalidate_all(pmap_t pmap)
777 mask = pmap->pm_active;
778 CPU_CLR(PCPU_GET(hart), &mask);
781 * XXX: The SBI doc doesn't detail how to specify x0 as the
782 * address to perform a global fence. BBL currently treats
783 * all sfence_vma requests as global however.
786 if (!CPU_EMPTY(&mask) && smp_started)
787 sbi_remote_sfence_vma(mask.__bits, 0, 0);
793 * Normal, non-SMP, invalidation functions.
794 * We inline these within pmap.c for speed.
797 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
804 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
808 * Might consider a loop of sfence_vma_page() for a small
809 * number of pages in the future.
815 pmap_invalidate_all(pmap_t pmap)
823 * Routine: pmap_extract
825 * Extract the physical page address associated
826 * with the given map/virtual_address pair.
829 pmap_extract(pmap_t pmap, vm_offset_t va)
838 * Start with the l2 tabel. We are unable to allocate
839 * pages in the l1 table.
841 l2p = pmap_l2(pmap, va);
844 if ((l2 & PTE_RX) == 0) {
845 l3p = pmap_l2_to_l3(l2p, va);
848 pa = PTE_TO_PHYS(l3);
849 pa |= (va & L3_OFFSET);
852 /* L2 is superpages */
853 pa = (l2 >> PTE_PPN1_S) << L2_SHIFT;
854 pa |= (va & L2_OFFSET);
862 * Routine: pmap_extract_and_hold
864 * Atomically extract and hold the physical page
865 * with the given pmap and virtual address pair
866 * if that mapping permits the given protection.
869 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
877 l3p = pmap_l3(pmap, va);
878 if (l3p != NULL && (l3 = pmap_load(l3p)) != 0) {
879 if ((l3 & PTE_W) != 0 || (prot & VM_PROT_WRITE) == 0) {
880 phys = PTE_TO_PHYS(l3);
881 m = PHYS_TO_VM_PAGE(phys);
882 if (!vm_page_wire_mapped(m))
891 pmap_kextract(vm_offset_t va)
897 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
898 pa = DMAP_TO_PHYS(va);
900 l2 = pmap_l2(kernel_pmap, va);
902 panic("pmap_kextract: No l2");
903 if ((pmap_load(l2) & PTE_RX) != 0) {
905 pa = (pmap_load(l2) >> PTE_PPN1_S) << L2_SHIFT;
906 pa |= (va & L2_OFFSET);
910 l3 = pmap_l2_to_l3(l2, va);
912 panic("pmap_kextract: No l3...");
913 pa = PTE_TO_PHYS(pmap_load(l3));
914 pa |= (va & PAGE_MASK);
919 /***************************************************
920 * Low level mapping routines.....
921 ***************************************************/
924 pmap_kenter_device(vm_offset_t sva, vm_size_t size, vm_paddr_t pa)
931 KASSERT((pa & L3_OFFSET) == 0,
932 ("pmap_kenter_device: Invalid physical address"));
933 KASSERT((sva & L3_OFFSET) == 0,
934 ("pmap_kenter_device: Invalid virtual address"));
935 KASSERT((size & PAGE_MASK) == 0,
936 ("pmap_kenter_device: Mapping is not page-sized"));
940 l3 = pmap_l3(kernel_pmap, va);
941 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
943 pn = (pa / PAGE_SIZE);
945 entry |= (pn << PTE_PPN0_S);
946 pmap_store(l3, entry);
952 pmap_invalidate_range(kernel_pmap, sva, va);
956 * Remove a page from the kernel pagetables.
957 * Note: not SMP coherent.
960 pmap_kremove(vm_offset_t va)
964 l3 = pmap_l3(kernel_pmap, va);
965 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
972 pmap_kremove_device(vm_offset_t sva, vm_size_t size)
977 KASSERT((sva & L3_OFFSET) == 0,
978 ("pmap_kremove_device: Invalid virtual address"));
979 KASSERT((size & PAGE_MASK) == 0,
980 ("pmap_kremove_device: Mapping is not page-sized"));
984 l3 = pmap_l3(kernel_pmap, va);
985 KASSERT(l3 != NULL, ("Invalid page table, va: 0x%lx", va));
992 pmap_invalidate_range(kernel_pmap, sva, va);
996 * Used to map a range of physical addresses into kernel
997 * virtual address space.
999 * The value passed in '*virt' is a suggested virtual address for
1000 * the mapping. Architectures which can support a direct-mapped
1001 * physical to virtual region can return the appropriate address
1002 * within that region, leaving '*virt' unchanged. Other
1003 * architectures should map the pages starting at '*virt' and
1004 * update '*virt' with the first usable address after the mapped
1008 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1011 return PHYS_TO_DMAP(start);
1016 * Add a list of wired pages to the kva
1017 * this routine is only used for temporary
1018 * kernel mappings that do not need to have
1019 * page modification or references recorded.
1020 * Note that old mappings are simply written
1021 * over. The page *must* be wired.
1022 * Note: SMP coherent. Uses a ranged shootdown IPI.
1025 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1035 for (i = 0; i < count; i++) {
1037 pa = VM_PAGE_TO_PHYS(m);
1038 pn = (pa / PAGE_SIZE);
1039 l3 = pmap_l3(kernel_pmap, va);
1042 entry |= (pn << PTE_PPN0_S);
1043 pmap_store(l3, entry);
1047 pmap_invalidate_range(kernel_pmap, sva, va);
1051 * This routine tears out page mappings from the
1052 * kernel -- it is meant only for temporary mappings.
1053 * Note: SMP coherent. Uses a ranged shootdown IPI.
1056 pmap_qremove(vm_offset_t sva, int count)
1061 KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode va %lx", sva));
1063 for (va = sva; count-- > 0; va += PAGE_SIZE) {
1064 l3 = pmap_l3(kernel_pmap, va);
1065 KASSERT(l3 != NULL, ("pmap_kremove: Invalid address"));
1068 pmap_invalidate_range(kernel_pmap, sva, va);
1072 pmap_ps_enabled(pmap_t pmap __unused)
1075 return (superpages_enabled);
1078 /***************************************************
1079 * Page table page management routines.....
1080 ***************************************************/
1082 * Schedule the specified unused page table page to be freed. Specifically,
1083 * add the page to the specified list of pages that will be released to the
1084 * physical memory manager after the TLB has been updated.
1086 static __inline void
1087 pmap_add_delayed_free_list(vm_page_t m, struct spglist *free,
1088 boolean_t set_PG_ZERO)
1092 m->flags |= PG_ZERO;
1094 m->flags &= ~PG_ZERO;
1095 SLIST_INSERT_HEAD(free, m, plinks.s.ss);
1099 * Inserts the specified page table page into the specified pmap's collection
1100 * of idle page table pages. Each of a pmap's page table pages is responsible
1101 * for mapping a distinct range of virtual addresses. The pmap's collection is
1102 * ordered by this virtual address range.
1104 * If "promoted" is false, then the page table page "ml3" must be zero filled.
1107 pmap_insert_pt_page(pmap_t pmap, vm_page_t ml3, bool promoted)
1110 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1111 ml3->valid = promoted ? VM_PAGE_BITS_ALL : 0;
1112 return (vm_radix_insert(&pmap->pm_root, ml3));
1116 * Removes the page table page mapping the specified virtual address from the
1117 * specified pmap's collection of idle page table pages, and returns it.
1118 * Otherwise, returns NULL if there is no page table page corresponding to the
1119 * specified virtual address.
1121 static __inline vm_page_t
1122 pmap_remove_pt_page(pmap_t pmap, vm_offset_t va)
1125 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1126 return (vm_radix_remove(&pmap->pm_root, pmap_l2_pindex(va)));
1130 * Decrements a page table page's wire count, which is used to record the
1131 * number of valid page table entries within the page. If the wire count
1132 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1133 * page table page was unmapped and FALSE otherwise.
1135 static inline boolean_t
1136 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1140 if (m->wire_count == 0) {
1141 _pmap_unwire_ptp(pmap, va, m, free);
1149 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free)
1153 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1154 if (m->pindex >= NUL1E) {
1156 l1 = pmap_l1(pmap, va);
1158 pmap_distribute_l1(pmap, pmap_l1_index(va), 0);
1161 l2 = pmap_l2(pmap, va);
1164 pmap_resident_count_dec(pmap, 1);
1165 if (m->pindex < NUL1E) {
1169 l1 = pmap_l1(pmap, va);
1170 phys = PTE_TO_PHYS(pmap_load(l1));
1171 pdpg = PHYS_TO_VM_PAGE(phys);
1172 pmap_unwire_ptp(pmap, va, pdpg, free);
1174 pmap_invalidate_page(pmap, va);
1179 * Put page on a list so that it is released after
1180 * *ALL* TLB shootdown is done
1182 pmap_add_delayed_free_list(m, free, TRUE);
1186 * After removing a page table entry, this routine is used to
1187 * conditionally free the page, and manage the hold/wire counts.
1190 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde,
1191 struct spglist *free)
1195 if (va >= VM_MAXUSER_ADDRESS)
1197 KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
1198 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(ptepde));
1199 return (pmap_unwire_ptp(pmap, va, mpte, free));
1203 pmap_pinit0(pmap_t pmap)
1206 PMAP_LOCK_INIT(pmap);
1207 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1208 pmap->pm_l1 = kernel_pmap->pm_l1;
1209 pmap->pm_satp = SATP_MODE_SV39 | (vtophys(pmap->pm_l1) >> PAGE_SHIFT);
1210 CPU_ZERO(&pmap->pm_active);
1211 pmap_activate_boot(pmap);
1215 pmap_pinit(pmap_t pmap)
1221 * allocate the l1 page
1223 while ((l1pt = vm_page_alloc(NULL, 0xdeadbeef, VM_ALLOC_NORMAL |
1224 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
1227 l1phys = VM_PAGE_TO_PHYS(l1pt);
1228 pmap->pm_l1 = (pd_entry_t *)PHYS_TO_DMAP(l1phys);
1229 pmap->pm_satp = SATP_MODE_SV39 | (l1phys >> PAGE_SHIFT);
1231 if ((l1pt->flags & PG_ZERO) == 0)
1232 pagezero(pmap->pm_l1);
1234 bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
1236 CPU_ZERO(&pmap->pm_active);
1238 /* Install kernel pagetables */
1239 memcpy(pmap->pm_l1, kernel_pmap->pm_l1, PAGE_SIZE);
1241 /* Add to the list of all user pmaps */
1242 mtx_lock(&allpmaps_lock);
1243 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1244 mtx_unlock(&allpmaps_lock);
1246 vm_radix_init(&pmap->pm_root);
1252 * This routine is called if the desired page table page does not exist.
1254 * If page table page allocation fails, this routine may sleep before
1255 * returning NULL. It sleeps only if a lock pointer was given.
1257 * Note: If a page allocation fails at page table level two or three,
1258 * one or two pages may be held during the wait, only to be released
1259 * afterwards. This conservative approach is easily argued to avoid
1263 _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp)
1265 vm_page_t m, /*pdppg, */pdpg;
1270 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1273 * Allocate a page table page.
1275 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1276 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1277 if (lockp != NULL) {
1278 RELEASE_PV_LIST_LOCK(lockp);
1280 rw_runlock(&pvh_global_lock);
1282 rw_rlock(&pvh_global_lock);
1287 * Indicate the need to retry. While waiting, the page table
1288 * page may have been allocated.
1293 if ((m->flags & PG_ZERO) == 0)
1297 * Map the pagetable page into the process address space, if
1298 * it isn't already there.
1301 if (ptepindex >= NUL1E) {
1303 vm_pindex_t l1index;
1305 l1index = ptepindex - NUL1E;
1306 l1 = &pmap->pm_l1[l1index];
1308 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1310 entry |= (pn << PTE_PPN0_S);
1311 pmap_store(l1, entry);
1312 pmap_distribute_l1(pmap, l1index, entry);
1314 vm_pindex_t l1index;
1315 pd_entry_t *l1, *l2;
1317 l1index = ptepindex >> (L1_SHIFT - L2_SHIFT);
1318 l1 = &pmap->pm_l1[l1index];
1319 if (pmap_load(l1) == 0) {
1320 /* recurse for allocating page dir */
1321 if (_pmap_alloc_l3(pmap, NUL1E + l1index,
1323 vm_page_unwire_noq(m);
1324 vm_page_free_zero(m);
1328 phys = PTE_TO_PHYS(pmap_load(l1));
1329 pdpg = PHYS_TO_VM_PAGE(phys);
1333 phys = PTE_TO_PHYS(pmap_load(l1));
1334 l2 = (pd_entry_t *)PHYS_TO_DMAP(phys);
1335 l2 = &l2[ptepindex & Ln_ADDR_MASK];
1337 pn = (VM_PAGE_TO_PHYS(m) / PAGE_SIZE);
1339 entry |= (pn << PTE_PPN0_S);
1340 pmap_store(l2, entry);
1343 pmap_resident_count_inc(pmap, 1);
1349 pmap_alloc_l2(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1353 vm_pindex_t l2pindex;
1356 l1 = pmap_l1(pmap, va);
1357 if (l1 != NULL && (pmap_load(l1) & PTE_RWX) == 0) {
1358 /* Add a reference to the L2 page. */
1359 l2pg = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l1)));
1362 /* Allocate a L2 page. */
1363 l2pindex = pmap_l2_pindex(va) >> Ln_ENTRIES_SHIFT;
1364 l2pg = _pmap_alloc_l3(pmap, NUL2E + l2pindex, lockp);
1365 if (l2pg == NULL && lockp != NULL)
1372 pmap_alloc_l3(pmap_t pmap, vm_offset_t va, struct rwlock **lockp)
1374 vm_pindex_t ptepindex;
1380 * Calculate pagetable page index
1382 ptepindex = pmap_l2_pindex(va);
1385 * Get the page directory entry
1387 l2 = pmap_l2(pmap, va);
1390 * If the page table page is mapped, we just increment the
1391 * hold count, and activate it.
1393 if (l2 != NULL && pmap_load(l2) != 0) {
1394 phys = PTE_TO_PHYS(pmap_load(l2));
1395 m = PHYS_TO_VM_PAGE(phys);
1399 * Here if the pte page isn't mapped, or if it has been
1402 m = _pmap_alloc_l3(pmap, ptepindex, lockp);
1403 if (m == NULL && lockp != NULL)
1410 /***************************************************
1411 * Pmap allocation/deallocation routines.
1412 ***************************************************/
1415 * Release any resources held by the given physical map.
1416 * Called when a pmap initialized by pmap_pinit is being released.
1417 * Should only be called if the map contains no valid mappings.
1420 pmap_release(pmap_t pmap)
1424 KASSERT(pmap->pm_stats.resident_count == 0,
1425 ("pmap_release: pmap resident count %ld != 0",
1426 pmap->pm_stats.resident_count));
1427 KASSERT(CPU_EMPTY(&pmap->pm_active),
1428 ("releasing active pmap %p", pmap));
1430 mtx_lock(&allpmaps_lock);
1431 LIST_REMOVE(pmap, pm_list);
1432 mtx_unlock(&allpmaps_lock);
1434 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_l1));
1435 vm_page_unwire_noq(m);
1441 kvm_size(SYSCTL_HANDLER_ARGS)
1443 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
1445 return sysctl_handle_long(oidp, &ksize, 0, req);
1447 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1448 0, 0, kvm_size, "LU", "Size of KVM");
1451 kvm_free(SYSCTL_HANDLER_ARGS)
1453 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1455 return sysctl_handle_long(oidp, &kfree, 0, req);
1457 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1458 0, 0, kvm_free, "LU", "Amount of KVM free");
1462 * grow the number of kernel page table entries, if needed
1465 pmap_growkernel(vm_offset_t addr)
1469 pd_entry_t *l1, *l2;
1473 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1475 addr = roundup2(addr, L2_SIZE);
1476 if (addr - 1 >= vm_map_max(kernel_map))
1477 addr = vm_map_max(kernel_map);
1478 while (kernel_vm_end < addr) {
1479 l1 = pmap_l1(kernel_pmap, kernel_vm_end);
1480 if (pmap_load(l1) == 0) {
1481 /* We need a new PDP entry */
1482 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L1_SHIFT,
1483 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
1484 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1486 panic("pmap_growkernel: no memory to grow kernel");
1487 if ((nkpg->flags & PG_ZERO) == 0)
1488 pmap_zero_page(nkpg);
1489 paddr = VM_PAGE_TO_PHYS(nkpg);
1491 pn = (paddr / PAGE_SIZE);
1493 entry |= (pn << PTE_PPN0_S);
1494 pmap_store(l1, entry);
1495 pmap_distribute_l1(kernel_pmap,
1496 pmap_l1_index(kernel_vm_end), entry);
1497 continue; /* try again */
1499 l2 = pmap_l1_to_l2(l1, kernel_vm_end);
1500 if ((pmap_load(l2) & PTE_V) != 0 &&
1501 (pmap_load(l2) & PTE_RWX) == 0) {
1502 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1503 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1504 kernel_vm_end = vm_map_max(kernel_map);
1510 nkpg = vm_page_alloc(NULL, kernel_vm_end >> L2_SHIFT,
1511 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1514 panic("pmap_growkernel: no memory to grow kernel");
1515 if ((nkpg->flags & PG_ZERO) == 0) {
1516 pmap_zero_page(nkpg);
1518 paddr = VM_PAGE_TO_PHYS(nkpg);
1520 pn = (paddr / PAGE_SIZE);
1522 entry |= (pn << PTE_PPN0_S);
1523 pmap_store(l2, entry);
1525 pmap_invalidate_page(kernel_pmap, kernel_vm_end);
1527 kernel_vm_end = (kernel_vm_end + L2_SIZE) & ~L2_OFFSET;
1528 if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) {
1529 kernel_vm_end = vm_map_max(kernel_map);
1536 /***************************************************
1537 * page management routines.
1538 ***************************************************/
1540 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1541 CTASSERT(_NPCM == 3);
1542 CTASSERT(_NPCPV == 168);
1544 static __inline struct pv_chunk *
1545 pv_to_chunk(pv_entry_t pv)
1548 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1551 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1553 #define PC_FREE0 0xfffffffffffffffful
1554 #define PC_FREE1 0xfffffffffffffffful
1555 #define PC_FREE2 0x000000fffffffffful
1557 static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
1561 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1563 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1564 "Current number of pv entry chunks");
1565 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1566 "Current number of pv entry chunks allocated");
1567 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1568 "Current number of pv entry chunks frees");
1569 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1570 "Number of times tried to get a chunk page but failed.");
1572 static long pv_entry_frees, pv_entry_allocs, pv_entry_count;
1573 static int pv_entry_spare;
1575 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1576 "Current number of pv entry frees");
1577 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1578 "Current number of pv entry allocs");
1579 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1580 "Current number of pv entries");
1581 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1582 "Current number of spare pv entries");
1587 * We are in a serious low memory condition. Resort to
1588 * drastic measures to free some pages so we can allocate
1589 * another pv entry chunk.
1591 * Returns NULL if PV entries were reclaimed from the specified pmap.
1593 * We do not, however, unmap 2mpages because subsequent accesses will
1594 * allocate per-page pv entries until repromotion occurs, thereby
1595 * exacerbating the shortage of free pv entries.
1598 reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp)
1601 panic("RISCVTODO: reclaim_pv_chunk");
1605 * free the pv_entry back to the free list
1608 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1610 struct pv_chunk *pc;
1611 int idx, field, bit;
1613 rw_assert(&pvh_global_lock, RA_LOCKED);
1614 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1615 PV_STAT(atomic_add_long(&pv_entry_frees, 1));
1616 PV_STAT(atomic_add_int(&pv_entry_spare, 1));
1617 PV_STAT(atomic_subtract_long(&pv_entry_count, 1));
1618 pc = pv_to_chunk(pv);
1619 idx = pv - &pc->pc_pventry[0];
1622 pc->pc_map[field] |= 1ul << bit;
1623 if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
1624 pc->pc_map[2] != PC_FREE2) {
1625 /* 98% of the time, pc is already at the head of the list. */
1626 if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) {
1627 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1628 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1632 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1637 free_pv_chunk(struct pv_chunk *pc)
1641 mtx_lock(&pv_chunks_mutex);
1642 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1643 mtx_unlock(&pv_chunks_mutex);
1644 PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV));
1645 PV_STAT(atomic_subtract_int(&pc_chunk_count, 1));
1646 PV_STAT(atomic_add_int(&pc_chunk_frees, 1));
1647 /* entire chunk is free, return it */
1648 m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
1649 dump_drop_page(m->phys_addr);
1650 vm_page_unwire_noq(m);
1655 * Returns a new PV entry, allocating a new PV chunk from the system when
1656 * needed. If this PV chunk allocation fails and a PV list lock pointer was
1657 * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is
1660 * The given PV list lock may be released.
1663 get_pv_entry(pmap_t pmap, struct rwlock **lockp)
1667 struct pv_chunk *pc;
1670 rw_assert(&pvh_global_lock, RA_LOCKED);
1671 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1672 PV_STAT(atomic_add_long(&pv_entry_allocs, 1));
1674 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1676 for (field = 0; field < _NPCM; field++) {
1677 if (pc->pc_map[field]) {
1678 bit = ffsl(pc->pc_map[field]) - 1;
1682 if (field < _NPCM) {
1683 pv = &pc->pc_pventry[field * 64 + bit];
1684 pc->pc_map[field] &= ~(1ul << bit);
1685 /* If this was the last item, move it to tail */
1686 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
1687 pc->pc_map[2] == 0) {
1688 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1689 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
1692 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1693 PV_STAT(atomic_subtract_int(&pv_entry_spare, 1));
1697 /* No free items, allocate another chunk */
1698 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1701 if (lockp == NULL) {
1702 PV_STAT(pc_chunk_tryfail++);
1705 m = reclaim_pv_chunk(pmap, lockp);
1709 PV_STAT(atomic_add_int(&pc_chunk_count, 1));
1710 PV_STAT(atomic_add_int(&pc_chunk_allocs, 1));
1711 dump_add_page(m->phys_addr);
1712 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1714 pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */
1715 pc->pc_map[1] = PC_FREE1;
1716 pc->pc_map[2] = PC_FREE2;
1717 mtx_lock(&pv_chunks_mutex);
1718 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1719 mtx_unlock(&pv_chunks_mutex);
1720 pv = &pc->pc_pventry[0];
1721 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1722 PV_STAT(atomic_add_long(&pv_entry_count, 1));
1723 PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1));
1728 * Ensure that the number of spare PV entries in the specified pmap meets or
1729 * exceeds the given count, "needed".
1731 * The given PV list lock may be released.
1734 reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp)
1736 struct pch new_tail;
1737 struct pv_chunk *pc;
1742 rw_assert(&pvh_global_lock, RA_LOCKED);
1743 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1744 KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL"));
1747 * Newly allocated PV chunks must be stored in a private list until
1748 * the required number of PV chunks have been allocated. Otherwise,
1749 * reclaim_pv_chunk() could recycle one of these chunks. In
1750 * contrast, these chunks must be added to the pmap upon allocation.
1752 TAILQ_INIT(&new_tail);
1755 TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) {
1756 bit_count((bitstr_t *)pc->pc_map, 0,
1757 sizeof(pc->pc_map) * NBBY, &free);
1761 if (avail >= needed)
1764 for (reclaimed = false; avail < needed; avail += _NPCPV) {
1765 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1768 m = reclaim_pv_chunk(pmap, lockp);
1775 dump_add_page(m->phys_addr);
1777 pc = (void *)PHYS_TO_DMAP(m->phys_addr);
1779 pc->pc_map[0] = PC_FREE0;
1780 pc->pc_map[1] = PC_FREE1;
1781 pc->pc_map[2] = PC_FREE2;
1782 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1783 TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru);
1786 * The reclaim might have freed a chunk from the current pmap.
1787 * If that chunk contained available entries, we need to
1788 * re-count the number of available entries.
1793 if (!TAILQ_EMPTY(&new_tail)) {
1794 mtx_lock(&pv_chunks_mutex);
1795 TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru);
1796 mtx_unlock(&pv_chunks_mutex);
1801 * First find and then remove the pv entry for the specified pmap and virtual
1802 * address from the specified pv list. Returns the pv entry if found and NULL
1803 * otherwise. This operation can be performed on pv lists for either 4KB or
1804 * 2MB page mappings.
1806 static __inline pv_entry_t
1807 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1811 rw_assert(&pvh_global_lock, RA_LOCKED);
1812 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
1813 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1814 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
1823 * First find and then destroy the pv entry for the specified pmap and virtual
1824 * address. This operation can be performed on pv lists for either 4KB or 2MB
1828 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1832 pv = pmap_pvh_remove(pvh, pmap, va);
1834 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found for %#lx", va));
1835 free_pv_entry(pmap, pv);
1839 * Conditionally create the PV entry for a 4KB page mapping if the required
1840 * memory can be allocated without resorting to reclamation.
1843 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m,
1844 struct rwlock **lockp)
1848 rw_assert(&pvh_global_lock, RA_LOCKED);
1849 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1850 /* Pass NULL instead of the lock pointer to disable reclamation. */
1851 if ((pv = get_pv_entry(pmap, NULL)) != NULL) {
1853 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
1854 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1862 * After demotion from a 2MB page mapping to 512 4KB page mappings,
1863 * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
1864 * entries for each of the 4KB page mappings.
1866 static void __unused
1867 pmap_pv_demote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1868 struct rwlock **lockp)
1870 struct md_page *pvh;
1871 struct pv_chunk *pc;
1874 vm_offset_t va_last;
1877 rw_assert(&pvh_global_lock, RA_LOCKED);
1878 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1879 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1882 * Transfer the 2mpage's pv entry for this mapping to the first
1883 * page's pv list. Once this transfer begins, the pv list lock
1884 * must not be released until the last pv entry is reinstantiated.
1886 pvh = pa_to_pvh(pa);
1888 pv = pmap_pvh_remove(pvh, pmap, va);
1889 KASSERT(pv != NULL, ("pmap_pv_demote_l2: pv not found"));
1890 m = PHYS_TO_VM_PAGE(pa);
1891 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1893 /* Instantiate the remaining 511 pv entries. */
1894 va_last = va + L2_SIZE - PAGE_SIZE;
1896 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1897 KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 ||
1898 pc->pc_map[2] != 0, ("pmap_pv_demote_l2: missing spare"));
1899 for (field = 0; field < _NPCM; field++) {
1900 while (pc->pc_map[field] != 0) {
1901 bit = ffsl(pc->pc_map[field]) - 1;
1902 pc->pc_map[field] &= ~(1ul << bit);
1903 pv = &pc->pc_pventry[field * 64 + bit];
1907 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1908 ("pmap_pv_demote_l2: page %p is not managed", m));
1909 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
1915 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1916 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1919 if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 && pc->pc_map[2] == 0) {
1920 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1921 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1926 #if VM_NRESERVLEVEL > 0
1928 pmap_pv_promote_l2(pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
1929 struct rwlock **lockp)
1931 struct md_page *pvh;
1934 vm_offset_t va_last;
1936 rw_assert(&pvh_global_lock, RA_LOCKED);
1937 KASSERT((va & L2_OFFSET) == 0,
1938 ("pmap_pv_promote_l2: misaligned va %#lx", va));
1940 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1942 m = PHYS_TO_VM_PAGE(pa);
1943 pv = pmap_pvh_remove(&m->md, pmap, va);
1944 KASSERT(pv != NULL, ("pmap_pv_promote_l2: pv for %#lx not found", va));
1945 pvh = pa_to_pvh(pa);
1946 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1949 va_last = va + L2_SIZE - PAGE_SIZE;
1953 pmap_pvh_free(&m->md, pmap, va);
1954 } while (va < va_last);
1956 #endif /* VM_NRESERVLEVEL > 0 */
1959 * Create the PV entry for a 2MB page mapping. Always returns true unless the
1960 * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns
1961 * false if the PV entry cannot be allocated without resorting to reclamation.
1964 pmap_pv_insert_l2(pmap_t pmap, vm_offset_t va, pd_entry_t l2e, u_int flags,
1965 struct rwlock **lockp)
1967 struct md_page *pvh;
1971 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1972 /* Pass NULL instead of the lock pointer to disable reclamation. */
1973 if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ?
1974 NULL : lockp)) == NULL)
1977 pa = PTE_TO_PHYS(l2e);
1978 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa);
1979 pvh = pa_to_pvh(pa);
1980 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
1986 pmap_remove_kernel_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t va)
1988 pt_entry_t newl2, oldl2;
1992 KASSERT(!VIRT_IN_DMAP(va), ("removing direct mapping of %#lx", va));
1993 KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap));
1994 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1996 ml3 = pmap_remove_pt_page(pmap, va);
1998 panic("pmap_remove_kernel_l2: Missing pt page");
2000 ml3pa = VM_PAGE_TO_PHYS(ml3);
2001 newl2 = ml3pa | PTE_V;
2004 * If this page table page was unmapped by a promotion, then it
2005 * contains valid mappings. Zero it to invalidate those mappings.
2007 if (ml3->valid != 0)
2008 pagezero((void *)PHYS_TO_DMAP(ml3pa));
2011 * Demote the mapping.
2013 oldl2 = pmap_load_store(l2, newl2);
2014 KASSERT(oldl2 == 0, ("%s: found existing mapping at %p: %#lx",
2015 __func__, l2, oldl2));
2019 * pmap_remove_l2: Do the things to unmap a level 2 superpage.
2022 pmap_remove_l2(pmap_t pmap, pt_entry_t *l2, vm_offset_t sva,
2023 pd_entry_t l1e, struct spglist *free, struct rwlock **lockp)
2025 struct md_page *pvh;
2027 vm_offset_t eva, va;
2030 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2031 KASSERT((sva & L2_OFFSET) == 0, ("pmap_remove_l2: sva is not aligned"));
2032 oldl2 = pmap_load_clear(l2);
2033 KASSERT((oldl2 & PTE_RWX) != 0,
2034 ("pmap_remove_l2: L2e %lx is not a superpage mapping", oldl2));
2037 * The sfence.vma documentation states that it is sufficient to specify
2038 * a single address within a superpage mapping. However, since we do
2039 * not perform any invalidation upon promotion, TLBs may still be
2040 * caching 4KB mappings within the superpage, so we must invalidate the
2043 pmap_invalidate_range(pmap, sva, sva + L2_SIZE);
2044 if ((oldl2 & PTE_SW_WIRED) != 0)
2045 pmap->pm_stats.wired_count -= L2_SIZE / PAGE_SIZE;
2046 pmap_resident_count_dec(pmap, L2_SIZE / PAGE_SIZE);
2047 if ((oldl2 & PTE_SW_MANAGED) != 0) {
2048 CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, PTE_TO_PHYS(oldl2));
2049 pvh = pa_to_pvh(PTE_TO_PHYS(oldl2));
2050 pmap_pvh_free(pvh, pmap, sva);
2051 eva = sva + L2_SIZE;
2052 for (va = sva, m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(oldl2));
2053 va < eva; va += PAGE_SIZE, m++) {
2054 if ((oldl2 & PTE_D) != 0)
2056 if ((oldl2 & PTE_A) != 0)
2057 vm_page_aflag_set(m, PGA_REFERENCED);
2058 if (TAILQ_EMPTY(&m->md.pv_list) &&
2059 TAILQ_EMPTY(&pvh->pv_list))
2060 vm_page_aflag_clear(m, PGA_WRITEABLE);
2063 if (pmap == kernel_pmap) {
2064 pmap_remove_kernel_l2(pmap, l2, sva);
2066 ml3 = pmap_remove_pt_page(pmap, sva);
2068 KASSERT(ml3->valid == VM_PAGE_BITS_ALL,
2069 ("pmap_remove_l2: l3 page not promoted"));
2070 pmap_resident_count_dec(pmap, 1);
2071 KASSERT(ml3->wire_count == Ln_ENTRIES,
2072 ("pmap_remove_l2: l3 page wire count error"));
2073 ml3->wire_count = 1;
2074 vm_page_unwire_noq(ml3);
2075 pmap_add_delayed_free_list(ml3, free, FALSE);
2078 return (pmap_unuse_pt(pmap, sva, l1e, free));
2082 * pmap_remove_l3: do the things to unmap a page in a process
2085 pmap_remove_l3(pmap_t pmap, pt_entry_t *l3, vm_offset_t va,
2086 pd_entry_t l2e, struct spglist *free, struct rwlock **lockp)
2092 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2093 old_l3 = pmap_load_clear(l3);
2094 pmap_invalidate_page(pmap, va);
2095 if (old_l3 & PTE_SW_WIRED)
2096 pmap->pm_stats.wired_count -= 1;
2097 pmap_resident_count_dec(pmap, 1);
2098 if (old_l3 & PTE_SW_MANAGED) {
2099 phys = PTE_TO_PHYS(old_l3);
2100 m = PHYS_TO_VM_PAGE(phys);
2101 if ((old_l3 & PTE_D) != 0)
2104 vm_page_aflag_set(m, PGA_REFERENCED);
2105 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m);
2106 pmap_pvh_free(&m->md, pmap, va);
2109 return (pmap_unuse_pt(pmap, va, l2e, free));
2113 * Remove the given range of addresses from the specified map.
2115 * It is assumed that the start and end are properly
2116 * rounded to the page size.
2119 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2121 struct spglist free;
2122 struct rwlock *lock;
2123 vm_offset_t va, va_next;
2124 pd_entry_t *l1, *l2, l2e;
2128 * Perform an unsynchronized read. This is, however, safe.
2130 if (pmap->pm_stats.resident_count == 0)
2135 rw_rlock(&pvh_global_lock);
2139 for (; sva < eva; sva = va_next) {
2140 if (pmap->pm_stats.resident_count == 0)
2143 l1 = pmap_l1(pmap, sva);
2144 if (pmap_load(l1) == 0) {
2145 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2152 * Calculate index for next page table.
2154 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2158 l2 = pmap_l1_to_l2(l1, sva);
2161 if ((l2e = pmap_load(l2)) == 0)
2163 if ((l2e & PTE_RWX) != 0) {
2164 if (sva + L2_SIZE == va_next && eva >= va_next) {
2165 (void)pmap_remove_l2(pmap, l2, sva,
2166 pmap_load(l1), &free, &lock);
2168 } else if (!pmap_demote_l2_locked(pmap, l2, sva,
2171 * The large page mapping was destroyed.
2175 l2e = pmap_load(l2);
2179 * Limit our scan to either the end of the va represented
2180 * by the current page table page, or to the end of the
2181 * range being removed.
2187 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2189 if (pmap_load(l3) == 0) {
2190 if (va != va_next) {
2191 pmap_invalidate_range(pmap, va, sva);
2198 if (pmap_remove_l3(pmap, l3, sva, l2e, &free, &lock)) {
2204 pmap_invalidate_range(pmap, va, sva);
2208 rw_runlock(&pvh_global_lock);
2210 vm_page_free_pages_toq(&free, false);
2214 * Routine: pmap_remove_all
2216 * Removes this physical page from
2217 * all physical maps in which it resides.
2218 * Reflects back modify bits to the pager.
2221 * Original versions of this routine were very
2222 * inefficient because they iteratively called
2223 * pmap_remove (slow...)
2227 pmap_remove_all(vm_page_t m)
2229 struct spglist free;
2230 struct md_page *pvh;
2232 pt_entry_t *l3, l3e;
2233 pd_entry_t *l2, l2e;
2237 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2238 ("pmap_remove_all: page %p is not managed", m));
2240 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
2241 pa_to_pvh(VM_PAGE_TO_PHYS(m));
2243 rw_wlock(&pvh_global_lock);
2244 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2248 l2 = pmap_l2(pmap, va);
2249 (void)pmap_demote_l2(pmap, l2, va);
2252 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2255 pmap_resident_count_dec(pmap, 1);
2256 l2 = pmap_l2(pmap, pv->pv_va);
2257 KASSERT(l2 != NULL, ("pmap_remove_all: no l2 table found"));
2258 l2e = pmap_load(l2);
2260 KASSERT((l2e & PTE_RX) == 0,
2261 ("pmap_remove_all: found a superpage in %p's pv list", m));
2263 l3 = pmap_l2_to_l3(l2, pv->pv_va);
2264 l3e = pmap_load_clear(l3);
2265 pmap_invalidate_page(pmap, pv->pv_va);
2266 if (l3e & PTE_SW_WIRED)
2267 pmap->pm_stats.wired_count--;
2268 if ((l3e & PTE_A) != 0)
2269 vm_page_aflag_set(m, PGA_REFERENCED);
2272 * Update the vm_page_t clean and reference bits.
2274 if ((l3e & PTE_D) != 0)
2276 pmap_unuse_pt(pmap, pv->pv_va, pmap_load(l2), &free);
2277 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2279 free_pv_entry(pmap, pv);
2282 vm_page_aflag_clear(m, PGA_WRITEABLE);
2283 rw_wunlock(&pvh_global_lock);
2284 vm_page_free_pages_toq(&free, false);
2288 * Set the physical protection on the
2289 * specified range of this map as requested.
2292 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2294 pd_entry_t *l1, *l2, l2e;
2295 pt_entry_t *l3, l3e, mask;
2298 vm_offset_t va_next;
2299 bool anychanged, pv_lists_locked;
2301 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2302 pmap_remove(pmap, sva, eva);
2306 if ((prot & (VM_PROT_WRITE | VM_PROT_EXECUTE)) ==
2307 (VM_PROT_WRITE | VM_PROT_EXECUTE))
2311 pv_lists_locked = false;
2313 if ((prot & VM_PROT_WRITE) == 0)
2314 mask |= PTE_W | PTE_D;
2315 if ((prot & VM_PROT_EXECUTE) == 0)
2319 for (; sva < eva; sva = va_next) {
2320 l1 = pmap_l1(pmap, sva);
2321 if (pmap_load(l1) == 0) {
2322 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
2328 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
2332 l2 = pmap_l1_to_l2(l1, sva);
2333 if (l2 == NULL || (l2e = pmap_load(l2)) == 0)
2335 if ((l2e & PTE_RWX) != 0) {
2336 if (sva + L2_SIZE == va_next && eva >= va_next) {
2338 if ((prot & VM_PROT_WRITE) == 0 &&
2339 (l2e & (PTE_SW_MANAGED | PTE_D)) ==
2340 (PTE_SW_MANAGED | PTE_D)) {
2341 pa = PTE_TO_PHYS(l2e);
2342 m = PHYS_TO_VM_PAGE(pa);
2343 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
2346 if (!atomic_fcmpset_long(l2, &l2e, l2e & ~mask))
2350 if (!pv_lists_locked) {
2351 pv_lists_locked = true;
2352 if (!rw_try_rlock(&pvh_global_lock)) {
2354 pmap_invalidate_all(
2357 rw_rlock(&pvh_global_lock);
2361 if (!pmap_demote_l2(pmap, l2, sva)) {
2363 * The large page mapping was destroyed.
2373 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
2375 l3e = pmap_load(l3);
2377 if ((l3e & PTE_V) == 0)
2379 if ((prot & VM_PROT_WRITE) == 0 &&
2380 (l3e & (PTE_SW_MANAGED | PTE_D)) ==
2381 (PTE_SW_MANAGED | PTE_D)) {
2382 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(l3e));
2385 if (!atomic_fcmpset_long(l3, &l3e, l3e & ~mask))
2391 pmap_invalidate_all(pmap);
2392 if (pv_lists_locked)
2393 rw_runlock(&pvh_global_lock);
2398 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
2400 pd_entry_t *l2, l2e;
2401 pt_entry_t bits, *pte, oldpte;
2406 l2 = pmap_l2(pmap, va);
2407 if (l2 == NULL || ((l2e = pmap_load(l2)) & PTE_V) == 0)
2409 if ((l2e & PTE_RWX) == 0) {
2410 pte = pmap_l2_to_l3(l2, va);
2411 if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
2418 if ((pmap != kernel_pmap && (oldpte & PTE_U) == 0) ||
2419 (ftype == VM_PROT_WRITE && (oldpte & PTE_W) == 0) ||
2420 (ftype == VM_PROT_EXECUTE && (oldpte & PTE_X) == 0) ||
2421 (ftype == VM_PROT_READ && (oldpte & PTE_R) == 0))
2425 if (ftype == VM_PROT_WRITE)
2429 * Spurious faults can occur if the implementation caches invalid
2430 * entries in the TLB, or if simultaneous accesses on multiple CPUs
2431 * race with each other.
2433 if ((oldpte & bits) != bits)
2434 pmap_store_bits(pte, bits);
2443 pmap_demote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va)
2445 struct rwlock *lock;
2449 rv = pmap_demote_l2_locked(pmap, l2, va, &lock);
2456 * Tries to demote a 2MB page mapping. If demotion fails, the 2MB page
2457 * mapping is invalidated.
2460 pmap_demote_l2_locked(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2461 struct rwlock **lockp)
2463 struct spglist free;
2465 pd_entry_t newl2, oldl2;
2466 pt_entry_t *firstl3, newl3;
2470 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2472 oldl2 = pmap_load(l2);
2473 KASSERT((oldl2 & PTE_RWX) != 0,
2474 ("pmap_demote_l2_locked: oldl2 is not a leaf entry"));
2475 if ((oldl2 & PTE_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) ==
2477 if ((oldl2 & PTE_A) == 0 || (mpte = vm_page_alloc(NULL,
2478 pmap_l2_pindex(va), (VIRT_IN_DMAP(va) ? VM_ALLOC_INTERRUPT :
2479 VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) ==
2482 (void)pmap_remove_l2(pmap, l2, va & ~L2_OFFSET,
2483 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2484 vm_page_free_pages_toq(&free, true);
2485 CTR2(KTR_PMAP, "pmap_demote_l2_locked: "
2486 "failure for va %#lx in pmap %p", va, pmap);
2489 if (va < VM_MAXUSER_ADDRESS) {
2490 mpte->wire_count = Ln_ENTRIES;
2491 pmap_resident_count_inc(pmap, 1);
2494 mptepa = VM_PAGE_TO_PHYS(mpte);
2495 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
2496 newl2 = ((mptepa / PAGE_SIZE) << PTE_PPN0_S) | PTE_V;
2497 KASSERT((oldl2 & PTE_A) != 0,
2498 ("pmap_demote_l2_locked: oldl2 is missing PTE_A"));
2499 KASSERT((oldl2 & (PTE_D | PTE_W)) != PTE_W,
2500 ("pmap_demote_l2_locked: oldl2 is missing PTE_D"));
2504 * If the page table page is not leftover from an earlier promotion,
2507 if (mpte->valid == 0) {
2508 for (i = 0; i < Ln_ENTRIES; i++)
2509 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2511 KASSERT(PTE_TO_PHYS(pmap_load(firstl3)) == PTE_TO_PHYS(newl3),
2512 ("pmap_demote_l2_locked: firstl3 and newl3 map different physical "
2516 * If the mapping has changed attributes, update the page table
2519 if ((pmap_load(firstl3) & PTE_PROMOTE) != (newl3 & PTE_PROMOTE))
2520 for (i = 0; i < Ln_ENTRIES; i++)
2521 pmap_store(firstl3 + i, newl3 + (i << PTE_PPN0_S));
2524 * The spare PV entries must be reserved prior to demoting the
2525 * mapping, that is, prior to changing the L2 entry. Otherwise, the
2526 * state of the L2 entry and the PV lists will be inconsistent, which
2527 * can result in reclaim_pv_chunk() attempting to remove a PV entry from
2528 * the wrong PV list and pmap_pv_demote_l2() failing to find the
2529 * expected PV entry for the 2MB page mapping that is being demoted.
2531 if ((oldl2 & PTE_SW_MANAGED) != 0)
2532 reserve_pv_entries(pmap, Ln_ENTRIES - 1, lockp);
2535 * Demote the mapping.
2537 pmap_store(l2, newl2);
2540 * Demote the PV entry.
2542 if ((oldl2 & PTE_SW_MANAGED) != 0)
2543 pmap_pv_demote_l2(pmap, va, PTE_TO_PHYS(oldl2), lockp);
2545 atomic_add_long(&pmap_l2_demotions, 1);
2546 CTR2(KTR_PMAP, "pmap_demote_l2_locked: success for va %#lx in pmap %p",
2551 #if VM_NRESERVLEVEL > 0
2553 pmap_promote_l2(pmap_t pmap, pd_entry_t *l2, vm_offset_t va,
2554 struct rwlock **lockp)
2556 pt_entry_t *firstl3, *l3;
2560 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2563 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
2564 ("pmap_promote_l2: invalid l2 entry %p", l2));
2566 firstl3 = (pt_entry_t *)PHYS_TO_DMAP(PTE_TO_PHYS(pmap_load(l2)));
2567 pa = PTE_TO_PHYS(pmap_load(firstl3));
2568 if ((pa & L2_OFFSET) != 0) {
2569 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2571 atomic_add_long(&pmap_l2_p_failures, 1);
2576 for (l3 = firstl3 + 1; l3 < firstl3 + Ln_ENTRIES; l3++) {
2577 if (PTE_TO_PHYS(pmap_load(l3)) != pa) {
2579 "pmap_promote_l2: failure for va %#lx pmap %p",
2581 atomic_add_long(&pmap_l2_p_failures, 1);
2584 if ((pmap_load(l3) & PTE_PROMOTE) !=
2585 (pmap_load(firstl3) & PTE_PROMOTE)) {
2587 "pmap_promote_l2: failure for va %#lx pmap %p",
2589 atomic_add_long(&pmap_l2_p_failures, 1);
2595 ml3 = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2596 KASSERT(ml3->pindex == pmap_l2_pindex(va),
2597 ("pmap_promote_l2: page table page's pindex is wrong"));
2598 if (pmap_insert_pt_page(pmap, ml3, true)) {
2599 CTR2(KTR_PMAP, "pmap_promote_l2: failure for va %#lx pmap %p",
2601 atomic_add_long(&pmap_l2_p_failures, 1);
2605 if ((pmap_load(firstl3) & PTE_SW_MANAGED) != 0)
2606 pmap_pv_promote_l2(pmap, va, PTE_TO_PHYS(pmap_load(firstl3)),
2609 pmap_store(l2, pmap_load(firstl3));
2611 atomic_add_long(&pmap_l2_promotions, 1);
2612 CTR2(KTR_PMAP, "pmap_promote_l2: success for va %#lx in pmap %p", va,
2618 * Insert the given physical page (p) at
2619 * the specified virtual address (v) in the
2620 * target physical map with the protection requested.
2622 * If specified, the page will be wired down, meaning
2623 * that the related pte can not be reclaimed.
2625 * NB: This is the only routine which MAY NOT lazy-evaluate
2626 * or lose information. That is, this routine must actually
2627 * insert this page into the given map NOW.
2630 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2631 u_int flags, int8_t psind)
2633 struct rwlock *lock;
2634 pd_entry_t *l1, *l2, l2e;
2635 pt_entry_t new_l3, orig_l3;
2638 vm_paddr_t opa, pa, l2_pa, l3_pa;
2639 vm_page_t mpte, om, l2_m, l3_m;
2641 pn_t l2_pn, l3_pn, pn;
2645 va = trunc_page(va);
2646 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2647 VM_OBJECT_ASSERT_LOCKED(m->object);
2648 pa = VM_PAGE_TO_PHYS(m);
2649 pn = (pa / PAGE_SIZE);
2651 new_l3 = PTE_V | PTE_R | PTE_A;
2652 if (prot & VM_PROT_EXECUTE)
2654 if (flags & VM_PROT_WRITE)
2656 if (prot & VM_PROT_WRITE)
2658 if (va < VM_MAX_USER_ADDRESS)
2661 new_l3 |= (pn << PTE_PPN0_S);
2662 if ((flags & PMAP_ENTER_WIRED) != 0)
2663 new_l3 |= PTE_SW_WIRED;
2666 * Set modified bit gratuitously for writeable mappings if
2667 * the page is unmanaged. We do not want to take a fault
2668 * to do the dirty bit accounting for these mappings.
2670 if ((m->oflags & VPO_UNMANAGED) != 0) {
2671 if (prot & VM_PROT_WRITE)
2674 new_l3 |= PTE_SW_MANAGED;
2676 CTR2(KTR_PMAP, "pmap_enter: %.16lx -> %.16lx", va, pa);
2680 rw_rlock(&pvh_global_lock);
2683 /* Assert the required virtual and physical alignment. */
2684 KASSERT((va & L2_OFFSET) == 0,
2685 ("pmap_enter: va %#lx unaligned", va));
2686 KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind"));
2687 rv = pmap_enter_l2(pmap, va, new_l3, flags, m, &lock);
2691 l2 = pmap_l2(pmap, va);
2692 if (l2 != NULL && ((l2e = pmap_load(l2)) & PTE_V) != 0 &&
2693 ((l2e & PTE_RWX) == 0 || pmap_demote_l2_locked(pmap, l2,
2695 l3 = pmap_l2_to_l3(l2, va);
2696 if (va < VM_MAXUSER_ADDRESS) {
2697 mpte = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2700 } else if (va < VM_MAXUSER_ADDRESS) {
2701 nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0;
2702 mpte = pmap_alloc_l3(pmap, va, nosleep ? NULL : &lock);
2703 if (mpte == NULL && nosleep) {
2704 CTR0(KTR_PMAP, "pmap_enter: mpte == NULL");
2707 rw_runlock(&pvh_global_lock);
2709 return (KERN_RESOURCE_SHORTAGE);
2711 l3 = pmap_l3(pmap, va);
2713 l3 = pmap_l3(pmap, va);
2714 /* TODO: This is not optimal, but should mostly work */
2717 l2_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2718 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2721 panic("pmap_enter: l2 pte_m == NULL");
2722 if ((l2_m->flags & PG_ZERO) == 0)
2723 pmap_zero_page(l2_m);
2725 l2_pa = VM_PAGE_TO_PHYS(l2_m);
2726 l2_pn = (l2_pa / PAGE_SIZE);
2728 l1 = pmap_l1(pmap, va);
2730 entry |= (l2_pn << PTE_PPN0_S);
2731 pmap_store(l1, entry);
2732 pmap_distribute_l1(pmap, pmap_l1_index(va), entry);
2733 l2 = pmap_l1_to_l2(l1, va);
2736 l3_m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2737 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | VM_ALLOC_ZERO);
2739 panic("pmap_enter: l3 pte_m == NULL");
2740 if ((l3_m->flags & PG_ZERO) == 0)
2741 pmap_zero_page(l3_m);
2743 l3_pa = VM_PAGE_TO_PHYS(l3_m);
2744 l3_pn = (l3_pa / PAGE_SIZE);
2746 entry |= (l3_pn << PTE_PPN0_S);
2747 pmap_store(l2, entry);
2748 l3 = pmap_l2_to_l3(l2, va);
2750 pmap_invalidate_page(pmap, va);
2753 orig_l3 = pmap_load(l3);
2754 opa = PTE_TO_PHYS(orig_l3);
2758 * Is the specified virtual address already mapped?
2760 if ((orig_l3 & PTE_V) != 0) {
2762 * Wiring change, just update stats. We don't worry about
2763 * wiring PT pages as they remain resident as long as there
2764 * are valid mappings in them. Hence, if a user page is wired,
2765 * the PT page will be also.
2767 if ((flags & PMAP_ENTER_WIRED) != 0 &&
2768 (orig_l3 & PTE_SW_WIRED) == 0)
2769 pmap->pm_stats.wired_count++;
2770 else if ((flags & PMAP_ENTER_WIRED) == 0 &&
2771 (orig_l3 & PTE_SW_WIRED) != 0)
2772 pmap->pm_stats.wired_count--;
2775 * Remove the extra PT page reference.
2779 KASSERT(mpte->wire_count > 0,
2780 ("pmap_enter: missing reference to page table page,"
2785 * Has the physical page changed?
2789 * No, might be a protection or wiring change.
2791 if ((orig_l3 & PTE_SW_MANAGED) != 0 &&
2792 (new_l3 & PTE_W) != 0)
2793 vm_page_aflag_set(m, PGA_WRITEABLE);
2798 * The physical page has changed. Temporarily invalidate
2799 * the mapping. This ensures that all threads sharing the
2800 * pmap keep a consistent view of the mapping, which is
2801 * necessary for the correct handling of COW faults. It
2802 * also permits reuse of the old mapping's PV entry,
2803 * avoiding an allocation.
2805 * For consistency, handle unmanaged mappings the same way.
2807 orig_l3 = pmap_load_clear(l3);
2808 KASSERT(PTE_TO_PHYS(orig_l3) == opa,
2809 ("pmap_enter: unexpected pa update for %#lx", va));
2810 if ((orig_l3 & PTE_SW_MANAGED) != 0) {
2811 om = PHYS_TO_VM_PAGE(opa);
2814 * The pmap lock is sufficient to synchronize with
2815 * concurrent calls to pmap_page_test_mappings() and
2816 * pmap_ts_referenced().
2818 if ((orig_l3 & PTE_D) != 0)
2820 if ((orig_l3 & PTE_A) != 0)
2821 vm_page_aflag_set(om, PGA_REFERENCED);
2822 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa);
2823 pv = pmap_pvh_remove(&om->md, pmap, va);
2825 ("pmap_enter: no PV entry for %#lx", va));
2826 if ((new_l3 & PTE_SW_MANAGED) == 0)
2827 free_pv_entry(pmap, pv);
2828 if ((om->aflags & PGA_WRITEABLE) != 0 &&
2829 TAILQ_EMPTY(&om->md.pv_list))
2830 vm_page_aflag_clear(om, PGA_WRITEABLE);
2832 pmap_invalidate_page(pmap, va);
2836 * Increment the counters.
2838 if ((new_l3 & PTE_SW_WIRED) != 0)
2839 pmap->pm_stats.wired_count++;
2840 pmap_resident_count_inc(pmap, 1);
2843 * Enter on the PV list if part of our managed memory.
2845 if ((new_l3 & PTE_SW_MANAGED) != 0) {
2847 pv = get_pv_entry(pmap, &lock);
2850 CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa);
2851 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2853 if ((new_l3 & PTE_W) != 0)
2854 vm_page_aflag_set(m, PGA_WRITEABLE);
2859 * Sync the i-cache on all harts before updating the PTE
2860 * if the new PTE is executable.
2862 if (prot & VM_PROT_EXECUTE)
2863 pmap_sync_icache(pmap, va, PAGE_SIZE);
2866 * Update the L3 entry.
2869 orig_l3 = pmap_load_store(l3, new_l3);
2870 pmap_invalidate_page(pmap, va);
2871 KASSERT(PTE_TO_PHYS(orig_l3) == pa,
2872 ("pmap_enter: invalid update"));
2873 if ((orig_l3 & (PTE_D | PTE_SW_MANAGED)) ==
2874 (PTE_D | PTE_SW_MANAGED))
2877 pmap_store(l3, new_l3);
2880 #if VM_NRESERVLEVEL > 0
2881 if (mpte != NULL && mpte->wire_count == Ln_ENTRIES &&
2882 pmap_ps_enabled(pmap) &&
2883 (m->flags & PG_FICTITIOUS) == 0 &&
2884 vm_reserv_level_iffullpop(m) == 0)
2885 pmap_promote_l2(pmap, l2, va, &lock);
2892 rw_runlock(&pvh_global_lock);
2898 * Tries to create a read- and/or execute-only 2MB page mapping. Returns true
2899 * if successful. Returns false if (1) a page table page cannot be allocated
2900 * without sleeping, (2) a mapping already exists at the specified virtual
2901 * address, or (3) a PV entry cannot be allocated without reclaiming another
2905 pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2906 struct rwlock **lockp)
2911 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2913 pn = VM_PAGE_TO_PHYS(m) / PAGE_SIZE;
2914 new_l2 = (pd_entry_t)((pn << PTE_PPN0_S) | PTE_R | PTE_V);
2915 if ((m->oflags & VPO_UNMANAGED) == 0)
2916 new_l2 |= PTE_SW_MANAGED;
2917 if ((prot & VM_PROT_EXECUTE) != 0)
2919 if (va < VM_MAXUSER_ADDRESS)
2921 return (pmap_enter_l2(pmap, va, new_l2, PMAP_ENTER_NOSLEEP |
2922 PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) ==
2927 * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if
2928 * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE
2929 * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and
2930 * a mapping already exists at the specified virtual address. Returns
2931 * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table
2932 * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if
2933 * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed.
2935 * The parameter "m" is only used when creating a managed, writeable mapping.
2938 pmap_enter_l2(pmap_t pmap, vm_offset_t va, pd_entry_t new_l2, u_int flags,
2939 vm_page_t m, struct rwlock **lockp)
2941 struct spglist free;
2942 pd_entry_t *l2, *l3, oldl2;
2946 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2948 if ((l2pg = pmap_alloc_l2(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ?
2949 NULL : lockp)) == NULL) {
2950 CTR2(KTR_PMAP, "pmap_enter_l2: failure for va %#lx in pmap %p",
2952 return (KERN_RESOURCE_SHORTAGE);
2955 l2 = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(l2pg));
2956 l2 = &l2[pmap_l2_index(va)];
2957 if ((oldl2 = pmap_load(l2)) != 0) {
2958 KASSERT(l2pg->wire_count > 1,
2959 ("pmap_enter_l2: l2pg's wire count is too low"));
2960 if ((flags & PMAP_ENTER_NOREPLACE) != 0) {
2963 "pmap_enter_l2: failure for va %#lx in pmap %p",
2965 return (KERN_FAILURE);
2968 if ((oldl2 & PTE_RWX) != 0)
2969 (void)pmap_remove_l2(pmap, l2, va,
2970 pmap_load(pmap_l1(pmap, va)), &free, lockp);
2972 for (sva = va; sva < va + L2_SIZE; sva += PAGE_SIZE) {
2973 l3 = pmap_l2_to_l3(l2, sva);
2974 if ((pmap_load(l3) & PTE_V) != 0 &&
2975 pmap_remove_l3(pmap, l3, sva, oldl2, &free,
2979 vm_page_free_pages_toq(&free, true);
2980 if (va >= VM_MAXUSER_ADDRESS) {
2982 * Both pmap_remove_l2() and pmap_remove_l3() will
2983 * leave the kernel page table page zero filled.
2985 mt = PHYS_TO_VM_PAGE(PTE_TO_PHYS(pmap_load(l2)));
2986 if (pmap_insert_pt_page(pmap, mt, false))
2987 panic("pmap_enter_l2: trie insert failed");
2989 KASSERT(pmap_load(l2) == 0,
2990 ("pmap_enter_l2: non-zero L2 entry %p", l2));
2993 if ((new_l2 & PTE_SW_MANAGED) != 0) {
2995 * Abort this mapping if its PV entry could not be created.
2997 if (!pmap_pv_insert_l2(pmap, va, new_l2, flags, lockp)) {
2999 if (pmap_unwire_ptp(pmap, va, l2pg, &free)) {
3001 * Although "va" is not mapped, paging-structure
3002 * caches could nonetheless have entries that
3003 * refer to the freed page table pages.
3004 * Invalidate those entries.
3006 pmap_invalidate_page(pmap, va);
3007 vm_page_free_pages_toq(&free, true);
3010 "pmap_enter_l2: failure for va %#lx in pmap %p",
3012 return (KERN_RESOURCE_SHORTAGE);
3014 if ((new_l2 & PTE_W) != 0)
3015 for (mt = m; mt < &m[L2_SIZE / PAGE_SIZE]; mt++)
3016 vm_page_aflag_set(mt, PGA_WRITEABLE);
3020 * Increment counters.
3022 if ((new_l2 & PTE_SW_WIRED) != 0)
3023 pmap->pm_stats.wired_count += L2_SIZE / PAGE_SIZE;
3024 pmap->pm_stats.resident_count += L2_SIZE / PAGE_SIZE;
3027 * Map the superpage.
3029 pmap_store(l2, new_l2);
3031 atomic_add_long(&pmap_l2_mappings, 1);
3032 CTR2(KTR_PMAP, "pmap_enter_l2: success for va %#lx in pmap %p",
3035 return (KERN_SUCCESS);
3039 * Maps a sequence of resident pages belonging to the same object.
3040 * The sequence begins with the given page m_start. This page is
3041 * mapped at the given virtual address start. Each subsequent page is
3042 * mapped at a virtual address that is offset from start by the same
3043 * amount as the page is offset from m_start within the object. The
3044 * last page in the sequence is the page with the largest offset from
3045 * m_start that can be mapped at a virtual address less than the given
3046 * virtual address end. Not every virtual page between start and end
3047 * is mapped; only those for which a resident page exists with the
3048 * corresponding offset from m_start are mapped.
3051 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3052 vm_page_t m_start, vm_prot_t prot)
3054 struct rwlock *lock;
3057 vm_pindex_t diff, psize;
3059 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3061 psize = atop(end - start);
3065 rw_rlock(&pvh_global_lock);
3067 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3068 va = start + ptoa(diff);
3069 if ((va & L2_OFFSET) == 0 && va + L2_SIZE <= end &&
3070 m->psind == 1 && pmap_ps_enabled(pmap) &&
3071 pmap_enter_2mpage(pmap, va, m, prot, &lock))
3072 m = &m[L2_SIZE / PAGE_SIZE - 1];
3074 mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte,
3076 m = TAILQ_NEXT(m, listq);
3080 rw_runlock(&pvh_global_lock);
3085 * this code makes some *MAJOR* assumptions:
3086 * 1. Current pmap & pmap exists.
3089 * 4. No page table pages.
3090 * but is *MUCH* faster than pmap_enter...
3094 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3096 struct rwlock *lock;
3099 rw_rlock(&pvh_global_lock);
3101 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL, &lock);
3104 rw_runlock(&pvh_global_lock);
3109 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3110 vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp)
3112 struct spglist free;
3115 pt_entry_t *l3, newl3;
3117 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3118 (m->oflags & VPO_UNMANAGED) != 0,
3119 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3120 rw_assert(&pvh_global_lock, RA_LOCKED);
3121 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3123 CTR2(KTR_PMAP, "pmap_enter_quick_locked: %p %lx", pmap, va);
3125 * In the case that a page table page is not
3126 * resident, we are creating it here.
3128 if (va < VM_MAXUSER_ADDRESS) {
3129 vm_pindex_t l2pindex;
3132 * Calculate pagetable page index
3134 l2pindex = pmap_l2_pindex(va);
3135 if (mpte && (mpte->pindex == l2pindex)) {
3141 l2 = pmap_l2(pmap, va);
3144 * If the page table page is mapped, we just increment
3145 * the hold count, and activate it. Otherwise, we
3146 * attempt to allocate a page table page. If this
3147 * attempt fails, we don't retry. Instead, we give up.
3149 if (l2 != NULL && pmap_load(l2) != 0) {
3150 phys = PTE_TO_PHYS(pmap_load(l2));
3151 mpte = PHYS_TO_VM_PAGE(phys);
3155 * Pass NULL instead of the PV list lock
3156 * pointer, because we don't intend to sleep.
3158 mpte = _pmap_alloc_l3(pmap, l2pindex, NULL);
3163 l3 = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
3164 l3 = &l3[pmap_l3_index(va)];
3167 l3 = pmap_l3(kernel_pmap, va);
3170 panic("pmap_enter_quick_locked: No l3");
3171 if (pmap_load(l3) != 0) {
3180 * Enter on the PV list if part of our managed memory.
3182 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3183 !pmap_try_insert_pv_entry(pmap, va, m, lockp)) {
3186 if (pmap_unwire_ptp(pmap, va, mpte, &free)) {
3187 pmap_invalidate_page(pmap, va);
3188 vm_page_free_pages_toq(&free, false);
3196 * Increment counters
3198 pmap_resident_count_inc(pmap, 1);
3200 newl3 = ((VM_PAGE_TO_PHYS(m) / PAGE_SIZE) << PTE_PPN0_S) |
3202 if ((prot & VM_PROT_EXECUTE) != 0)
3204 if ((m->oflags & VPO_UNMANAGED) == 0)
3205 newl3 |= PTE_SW_MANAGED;
3206 if (va < VM_MAX_USER_ADDRESS)
3210 * Sync the i-cache on all harts before updating the PTE
3211 * if the new PTE is executable.
3213 if (prot & VM_PROT_EXECUTE)
3214 pmap_sync_icache(pmap, va, PAGE_SIZE);
3216 pmap_store(l3, newl3);
3218 pmap_invalidate_page(pmap, va);
3223 * This code maps large physical mmap regions into the
3224 * processor address space. Note that some shortcuts
3225 * are taken, but the code works.
3228 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3229 vm_pindex_t pindex, vm_size_t size)
3232 VM_OBJECT_ASSERT_WLOCKED(object);
3233 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3234 ("pmap_object_init_pt: non-device object"));
3238 * Clear the wired attribute from the mappings for the specified range of
3239 * addresses in the given pmap. Every valid mapping within that range
3240 * must have the wired attribute set. In contrast, invalid mappings
3241 * cannot have the wired attribute set, so they are ignored.
3243 * The wired attribute of the page table entry is not a hardware feature,
3244 * so there is no need to invalidate any TLB entries.
3247 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3249 vm_offset_t va_next;
3250 pd_entry_t *l1, *l2, l2e;
3251 pt_entry_t *l3, l3e;
3252 bool pv_lists_locked;
3254 pv_lists_locked = false;
3257 for (; sva < eva; sva = va_next) {
3258 l1 = pmap_l1(pmap, sva);
3259 if (pmap_load(l1) == 0) {
3260 va_next = (sva + L1_SIZE) & ~L1_OFFSET;
3266 va_next = (sva + L2_SIZE) & ~L2_OFFSET;
3270 l2 = pmap_l1_to_l2(l1, sva);
3271 if ((l2e = pmap_load(l2)) == 0)
3273 if ((l2e & PTE_RWX) != 0) {
3274 if (sva + L2_SIZE == va_next && eva >= va_next) {
3275 if ((l2e & PTE_SW_WIRED) == 0)
3276 panic("pmap_unwire: l2 %#jx is missing "
3277 "PTE_SW_WIRED", (uintmax_t)l2e);
3278 pmap_clear_bits(l2, PTE_SW_WIRED);
3281 if (!pv_lists_locked) {
3282 pv_lists_locked = true;
3283 if (!rw_try_rlock(&pvh_global_lock)) {
3285 rw_rlock(&pvh_global_lock);
3290 if (!pmap_demote_l2(pmap, l2, sva))
3291 panic("pmap_unwire: demotion failed");
3297 for (l3 = pmap_l2_to_l3(l2, sva); sva != va_next; l3++,
3299 if ((l3e = pmap_load(l3)) == 0)
3301 if ((l3e & PTE_SW_WIRED) == 0)
3302 panic("pmap_unwire: l3 %#jx is missing "
3303 "PTE_SW_WIRED", (uintmax_t)l3e);
3306 * PG_W must be cleared atomically. Although the pmap
3307 * lock synchronizes access to PG_W, another processor
3308 * could be setting PG_M and/or PG_A concurrently.
3310 pmap_clear_bits(l3, PTE_SW_WIRED);
3311 pmap->pm_stats.wired_count--;
3314 if (pv_lists_locked)
3315 rw_runlock(&pvh_global_lock);
3320 * Copy the range specified by src_addr/len
3321 * from the source map to the range dst_addr/len
3322 * in the destination map.
3324 * This routine is only advisory and need not do anything.
3328 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3329 vm_offset_t src_addr)
3335 * pmap_zero_page zeros the specified hardware page by mapping
3336 * the page into KVM and using bzero to clear its contents.
3339 pmap_zero_page(vm_page_t m)
3341 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3343 pagezero((void *)va);
3347 * pmap_zero_page_area zeros the specified hardware page by mapping
3348 * the page into KVM and using bzero to clear its contents.
3350 * off and size may not cover an area beyond a single hardware page.
3353 pmap_zero_page_area(vm_page_t m, int off, int size)
3355 vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
3357 if (off == 0 && size == PAGE_SIZE)
3358 pagezero((void *)va);
3360 bzero((char *)va + off, size);
3364 * pmap_copy_page copies the specified (machine independent)
3365 * page by mapping the page into virtual memory and using
3366 * bcopy to copy the page, one machine dependent page at a
3370 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
3372 vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
3373 vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
3375 pagecopy((void *)src, (void *)dst);
3378 int unmapped_buf_allowed = 1;
3381 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3382 vm_offset_t b_offset, int xfersize)
3386 vm_paddr_t p_a, p_b;
3387 vm_offset_t a_pg_offset, b_pg_offset;
3390 while (xfersize > 0) {
3391 a_pg_offset = a_offset & PAGE_MASK;
3392 m_a = ma[a_offset >> PAGE_SHIFT];
3393 p_a = m_a->phys_addr;
3394 b_pg_offset = b_offset & PAGE_MASK;
3395 m_b = mb[b_offset >> PAGE_SHIFT];
3396 p_b = m_b->phys_addr;
3397 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3398 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3399 if (__predict_false(!PHYS_IN_DMAP(p_a))) {
3400 panic("!DMAP a %lx", p_a);
3402 a_cp = (char *)PHYS_TO_DMAP(p_a) + a_pg_offset;
3404 if (__predict_false(!PHYS_IN_DMAP(p_b))) {
3405 panic("!DMAP b %lx", p_b);
3407 b_cp = (char *)PHYS_TO_DMAP(p_b) + b_pg_offset;
3409 bcopy(a_cp, b_cp, cnt);
3417 pmap_quick_enter_page(vm_page_t m)
3420 return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)));
3424 pmap_quick_remove_page(vm_offset_t addr)
3429 * Returns true if the pmap's pv is one of the first
3430 * 16 pvs linked to from this page. This count may
3431 * be changed upwards or downwards in the future; it
3432 * is only necessary that true be returned for a small
3433 * subset of pmaps for proper page aging.
3436 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3438 struct md_page *pvh;
3439 struct rwlock *lock;
3444 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3445 ("pmap_page_exists_quick: page %p is not managed", m));
3447 rw_rlock(&pvh_global_lock);
3448 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3450 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3451 if (PV_PMAP(pv) == pmap) {
3459 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
3460 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3461 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3462 if (PV_PMAP(pv) == pmap) {
3472 rw_runlock(&pvh_global_lock);
3477 * pmap_page_wired_mappings:
3479 * Return the number of managed mappings to the given physical page
3483 pmap_page_wired_mappings(vm_page_t m)
3485 struct md_page *pvh;
3486 struct rwlock *lock;
3491 int count, md_gen, pvh_gen;
3493 if ((m->oflags & VPO_UNMANAGED) != 0)
3495 rw_rlock(&pvh_global_lock);
3496 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3500 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3502 if (!PMAP_TRYLOCK(pmap)) {
3503 md_gen = m->md.pv_gen;
3507 if (md_gen != m->md.pv_gen) {
3512 l3 = pmap_l3(pmap, pv->pv_va);
3513 if ((pmap_load(l3) & PTE_SW_WIRED) != 0)
3517 if ((m->flags & PG_FICTITIOUS) == 0) {
3518 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3519 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3521 if (!PMAP_TRYLOCK(pmap)) {
3522 md_gen = m->md.pv_gen;
3523 pvh_gen = pvh->pv_gen;
3527 if (md_gen != m->md.pv_gen ||
3528 pvh_gen != pvh->pv_gen) {
3533 l2 = pmap_l2(pmap, pv->pv_va);
3534 if ((pmap_load(l2) & PTE_SW_WIRED) != 0)
3540 rw_runlock(&pvh_global_lock);
3545 pmap_remove_pages_pv(pmap_t pmap, vm_page_t m, pv_entry_t pv,
3546 struct spglist *free, bool superpage)
3548 struct md_page *pvh;
3552 pmap_resident_count_dec(pmap, Ln_ENTRIES);
3553 pvh = pa_to_pvh(m->phys_addr);
3554 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
3556 if (TAILQ_EMPTY(&pvh->pv_list)) {
3557 for (mt = m; mt < &m[Ln_ENTRIES]; mt++)
3558 if (TAILQ_EMPTY(&mt->md.pv_list) &&
3559 (mt->aflags & PGA_WRITEABLE) != 0)
3560 vm_page_aflag_clear(mt, PGA_WRITEABLE);
3562 mpte = pmap_remove_pt_page(pmap, pv->pv_va);
3564 KASSERT(mpte->valid == VM_PAGE_BITS_ALL,
3565 ("pmap_remove_pages: pte page not promoted"));
3566 pmap_resident_count_dec(pmap, 1);
3567 KASSERT(mpte->wire_count == Ln_ENTRIES,
3568 ("pmap_remove_pages: pte page wire count error"));
3569 mpte->wire_count = 0;
3570 pmap_add_delayed_free_list(mpte, free, FALSE);
3573 pmap_resident_count_dec(pmap, 1);
3574 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3576 if (TAILQ_EMPTY(&m->md.pv_list) &&
3577 (m->aflags & PGA_WRITEABLE) != 0) {
3578 pvh = pa_to_pvh(m->phys_addr);
3579 if (TAILQ_EMPTY(&pvh->pv_list))
3580 vm_page_aflag_clear(m, PGA_WRITEABLE);
3586 * Destroy all managed, non-wired mappings in the given user-space
3587 * pmap. This pmap cannot be active on any processor besides the
3590 * This function cannot be applied to the kernel pmap. Moreover, it
3591 * is not intended for general use. It is only to be used during
3592 * process termination. Consequently, it can be implemented in ways
3593 * that make it faster than pmap_remove(). First, it can more quickly
3594 * destroy mappings by iterating over the pmap's collection of PV
3595 * entries, rather than searching the page table. Second, it doesn't
3596 * have to test and clear the page table entries atomically, because
3597 * no processor is currently accessing the user address space. In
3598 * particular, a page table entry's dirty bit won't change state once
3599 * this function starts.
3602 pmap_remove_pages(pmap_t pmap)
3604 struct spglist free;
3606 pt_entry_t *pte, tpte;
3609 struct pv_chunk *pc, *npc;
3610 struct rwlock *lock;
3612 uint64_t inuse, bitmask;
3613 int allfree, field, freed, idx;
3619 rw_rlock(&pvh_global_lock);
3621 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3624 for (field = 0; field < _NPCM; field++) {
3625 inuse = ~pc->pc_map[field] & pc_freemask[field];
3626 while (inuse != 0) {
3627 bit = ffsl(inuse) - 1;
3628 bitmask = 1UL << bit;
3629 idx = field * 64 + bit;
3630 pv = &pc->pc_pventry[idx];
3633 pte = pmap_l1(pmap, pv->pv_va);
3634 ptepde = pmap_load(pte);
3635 pte = pmap_l1_to_l2(pte, pv->pv_va);
3636 tpte = pmap_load(pte);
3637 if ((tpte & PTE_RWX) != 0) {
3641 pte = pmap_l2_to_l3(pte, pv->pv_va);
3642 tpte = pmap_load(pte);
3647 * We cannot remove wired pages from a
3648 * process' mapping at this time.
3650 if (tpte & PTE_SW_WIRED) {
3655 m = PHYS_TO_VM_PAGE(PTE_TO_PHYS(tpte));
3656 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
3657 m < &vm_page_array[vm_page_array_size],
3658 ("pmap_remove_pages: bad pte %#jx",
3664 * Update the vm_page_t clean/reference bits.
3666 if ((tpte & (PTE_D | PTE_W)) ==
3670 mt < &m[Ln_ENTRIES]; mt++)
3676 CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m);
3679 pc->pc_map[field] |= bitmask;
3681 pmap_remove_pages_pv(pmap, m, pv, &free,
3683 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
3687 PV_STAT(atomic_add_long(&pv_entry_frees, freed));
3688 PV_STAT(atomic_add_int(&pv_entry_spare, freed));
3689 PV_STAT(atomic_subtract_long(&pv_entry_count, freed));
3691 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3697 pmap_invalidate_all(pmap);
3698 rw_runlock(&pvh_global_lock);
3700 vm_page_free_pages_toq(&free, false);
3704 pmap_page_test_mappings(vm_page_t m, boolean_t accessed, boolean_t modified)
3706 struct md_page *pvh;
3707 struct rwlock *lock;
3709 pt_entry_t *l3, mask;
3712 int md_gen, pvh_gen;
3722 rw_rlock(&pvh_global_lock);
3723 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3726 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3728 if (!PMAP_TRYLOCK(pmap)) {
3729 md_gen = m->md.pv_gen;
3733 if (md_gen != m->md.pv_gen) {
3738 l3 = pmap_l3(pmap, pv->pv_va);
3739 rv = (pmap_load(l3) & mask) == mask;
3744 if ((m->flags & PG_FICTITIOUS) == 0) {
3745 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3746 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
3748 if (!PMAP_TRYLOCK(pmap)) {
3749 md_gen = m->md.pv_gen;
3750 pvh_gen = pvh->pv_gen;
3754 if (md_gen != m->md.pv_gen ||
3755 pvh_gen != pvh->pv_gen) {
3760 l2 = pmap_l2(pmap, pv->pv_va);
3761 rv = (pmap_load(l2) & mask) == mask;
3769 rw_runlock(&pvh_global_lock);
3776 * Return whether or not the specified physical page was modified
3777 * in any physical maps.
3780 pmap_is_modified(vm_page_t m)
3783 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3784 ("pmap_is_modified: page %p is not managed", m));
3787 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3788 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
3789 * is clear, no PTEs can have PG_M set.
3791 VM_OBJECT_ASSERT_WLOCKED(m->object);
3792 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3794 return (pmap_page_test_mappings(m, FALSE, TRUE));
3798 * pmap_is_prefaultable:
3800 * Return whether or not the specified virtual address is eligible
3804 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3811 l3 = pmap_l3(pmap, addr);
3812 if (l3 != NULL && pmap_load(l3) != 0) {
3820 * pmap_is_referenced:
3822 * Return whether or not the specified physical page was referenced
3823 * in any physical maps.
3826 pmap_is_referenced(vm_page_t m)
3829 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3830 ("pmap_is_referenced: page %p is not managed", m));
3831 return (pmap_page_test_mappings(m, TRUE, FALSE));
3835 * Clear the write and modified bits in each of the given page's mappings.
3838 pmap_remove_write(vm_page_t m)
3840 struct md_page *pvh;
3841 struct rwlock *lock;
3844 pt_entry_t *l3, oldl3, newl3;
3845 pv_entry_t next_pv, pv;
3847 int md_gen, pvh_gen;
3849 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3850 ("pmap_remove_write: page %p is not managed", m));
3853 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3854 * set by another thread while the object is locked. Thus,
3855 * if PGA_WRITEABLE is clear, no page table entries need updating.
3857 VM_OBJECT_ASSERT_WLOCKED(m->object);
3858 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3860 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
3861 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
3862 pa_to_pvh(VM_PAGE_TO_PHYS(m));
3863 rw_rlock(&pvh_global_lock);
3866 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
3868 if (!PMAP_TRYLOCK(pmap)) {
3869 pvh_gen = pvh->pv_gen;
3873 if (pvh_gen != pvh->pv_gen) {
3880 l2 = pmap_l2(pmap, va);
3881 if ((pmap_load(l2) & PTE_W) != 0)
3882 (void)pmap_demote_l2_locked(pmap, l2, va, &lock);
3883 KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m),
3884 ("inconsistent pv lock %p %p for page %p",
3885 lock, VM_PAGE_TO_PV_LIST_LOCK(m), m));
3888 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3890 if (!PMAP_TRYLOCK(pmap)) {
3891 pvh_gen = pvh->pv_gen;
3892 md_gen = m->md.pv_gen;
3896 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
3902 l3 = pmap_l3(pmap, pv->pv_va);
3903 oldl3 = pmap_load(l3);
3905 if ((oldl3 & PTE_W) != 0) {
3906 newl3 = oldl3 & ~(PTE_D | PTE_W);
3907 if (!atomic_fcmpset_long(l3, &oldl3, newl3))
3909 if ((oldl3 & PTE_D) != 0)
3911 pmap_invalidate_page(pmap, pv->pv_va);
3916 vm_page_aflag_clear(m, PGA_WRITEABLE);
3917 rw_runlock(&pvh_global_lock);
3921 * pmap_ts_referenced:
3923 * Return a count of reference bits for a page, clearing those bits.
3924 * It is not necessary for every reference bit to be cleared, but it
3925 * is necessary that 0 only be returned when there are truly no
3926 * reference bits set.
3928 * As an optimization, update the page's dirty field if a modified bit is
3929 * found while counting reference bits. This opportunistic update can be
3930 * performed at low cost and can eliminate the need for some future calls
3931 * to pmap_is_modified(). However, since this function stops after
3932 * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some
3933 * dirty pages. Those dirty pages will only be detected by a future call
3934 * to pmap_is_modified().
3937 pmap_ts_referenced(vm_page_t m)
3939 struct spglist free;
3940 struct md_page *pvh;
3941 struct rwlock *lock;
3944 pd_entry_t *l2, l2e;
3945 pt_entry_t *l3, l3e;
3948 int cleared, md_gen, not_cleared, pvh_gen;
3950 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3951 ("pmap_ts_referenced: page %p is not managed", m));
3954 pa = VM_PAGE_TO_PHYS(m);
3955 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa);
3957 lock = PHYS_TO_PV_LIST_LOCK(pa);
3958 rw_rlock(&pvh_global_lock);
3962 if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL)
3963 goto small_mappings;
3967 if (!PMAP_TRYLOCK(pmap)) {
3968 pvh_gen = pvh->pv_gen;
3972 if (pvh_gen != pvh->pv_gen) {
3978 l2 = pmap_l2(pmap, va);
3979 l2e = pmap_load(l2);
3980 if ((l2e & (PTE_W | PTE_D)) == (PTE_W | PTE_D)) {
3982 * Although l2e is mapping a 2MB page, because
3983 * this function is called at a 4KB page granularity,
3984 * we only update the 4KB page under test.
3988 if ((l2e & PTE_A) != 0) {
3990 * Since this reference bit is shared by 512 4KB
3991 * pages, it should not be cleared every time it is
3992 * tested. Apply a simple "hash" function on the
3993 * physical page number, the virtual superpage number,
3994 * and the pmap address to select one 4KB page out of
3995 * the 512 on which testing the reference bit will
3996 * result in clearing that reference bit. This
3997 * function is designed to avoid the selection of the
3998 * same 4KB page for every 2MB page mapping.
4000 * On demotion, a mapping that hasn't been referenced
4001 * is simply destroyed. To avoid the possibility of a
4002 * subsequent page fault on a demoted wired mapping,
4003 * always leave its reference bit set. Moreover,
4004 * since the superpage is wired, the current state of
4005 * its reference bit won't affect page replacement.
4007 if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L2_SHIFT) ^
4008 (uintptr_t)pmap) & (Ln_ENTRIES - 1)) == 0 &&
4009 (l2e & PTE_SW_WIRED) == 0) {
4010 pmap_clear_bits(l2, PTE_A);
4011 pmap_invalidate_page(pmap, va);
4017 /* Rotate the PV list if it has more than one entry. */
4018 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4019 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
4020 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_next);
4023 if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX)
4025 } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf);
4027 if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL)
4032 if (!PMAP_TRYLOCK(pmap)) {
4033 pvh_gen = pvh->pv_gen;
4034 md_gen = m->md.pv_gen;
4038 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4043 l2 = pmap_l2(pmap, pv->pv_va);
4045 KASSERT((pmap_load(l2) & PTE_RX) == 0,
4046 ("pmap_ts_referenced: found an invalid l2 table"));
4048 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4049 l3e = pmap_load(l3);
4050 if ((l3e & PTE_D) != 0)
4052 if ((l3e & PTE_A) != 0) {
4053 if ((l3e & PTE_SW_WIRED) == 0) {
4055 * Wired pages cannot be paged out so
4056 * doing accessed bit emulation for
4057 * them is wasted effort. We do the
4058 * hard work for unwired pages only.
4060 pmap_clear_bits(l3, PTE_A);
4061 pmap_invalidate_page(pmap, pv->pv_va);
4067 /* Rotate the PV list if it has more than one entry. */
4068 if (pv != NULL && TAILQ_NEXT(pv, pv_next) != NULL) {
4069 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
4070 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
4073 } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared +
4074 not_cleared < PMAP_TS_REFERENCED_MAX);
4077 rw_runlock(&pvh_global_lock);
4078 vm_page_free_pages_toq(&free, false);
4079 return (cleared + not_cleared);
4083 * Apply the given advice to the specified range of addresses within the
4084 * given pmap. Depending on the advice, clear the referenced and/or
4085 * modified flags in each mapping and set the mapped page's dirty field.
4088 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4093 * Clear the modify bits on the specified physical page.
4096 pmap_clear_modify(vm_page_t m)
4098 struct md_page *pvh;
4099 struct rwlock *lock;
4101 pv_entry_t next_pv, pv;
4102 pd_entry_t *l2, oldl2;
4105 int md_gen, pvh_gen;
4107 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4108 ("pmap_clear_modify: page %p is not managed", m));
4109 VM_OBJECT_ASSERT_WLOCKED(m->object);
4110 KASSERT(!vm_page_xbusied(m),
4111 ("pmap_clear_modify: page %p is exclusive busied", m));
4114 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4115 * If the object containing the page is locked and the page is not
4116 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4118 if ((m->aflags & PGA_WRITEABLE) == 0)
4120 pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy :
4121 pa_to_pvh(VM_PAGE_TO_PHYS(m));
4122 lock = VM_PAGE_TO_PV_LIST_LOCK(m);
4123 rw_rlock(&pvh_global_lock);
4126 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_next, next_pv) {
4128 if (!PMAP_TRYLOCK(pmap)) {
4129 pvh_gen = pvh->pv_gen;
4133 if (pvh_gen != pvh->pv_gen) {
4139 l2 = pmap_l2(pmap, va);
4140 oldl2 = pmap_load(l2);
4141 /* If oldl2 has PTE_W set, then it also has PTE_D set. */
4142 if ((oldl2 & PTE_W) != 0 &&
4143 pmap_demote_l2_locked(pmap, l2, va, &lock) &&
4144 (oldl2 & PTE_SW_WIRED) == 0) {
4146 * Write protect the mapping to a single page so that
4147 * a subsequent write access may repromote.
4149 va += VM_PAGE_TO_PHYS(m) - PTE_TO_PHYS(oldl2);
4150 l3 = pmap_l2_to_l3(l2, va);
4151 pmap_clear_bits(l3, PTE_D | PTE_W);
4153 pmap_invalidate_page(pmap, va);
4157 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4159 if (!PMAP_TRYLOCK(pmap)) {
4160 md_gen = m->md.pv_gen;
4161 pvh_gen = pvh->pv_gen;
4165 if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) {
4170 l2 = pmap_l2(pmap, pv->pv_va);
4171 KASSERT((pmap_load(l2) & PTE_RWX) == 0,
4172 ("pmap_clear_modify: found a 2mpage in page %p's pv list",
4174 l3 = pmap_l2_to_l3(l2, pv->pv_va);
4175 if ((pmap_load(l3) & (PTE_D | PTE_W)) == (PTE_D | PTE_W)) {
4176 pmap_clear_bits(l3, PTE_D | PTE_W);
4177 pmap_invalidate_page(pmap, pv->pv_va);
4182 rw_runlock(&pvh_global_lock);
4186 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4189 return ((void *)PHYS_TO_DMAP(pa));
4193 pmap_unmapbios(vm_paddr_t pa, vm_size_t size)
4198 * Sets the memory attribute for the specified page.
4201 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4204 m->md.pv_memattr = ma;
4208 * perform the pmap work for mincore
4211 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4213 pt_entry_t *l2, *l3, tpte;
4223 l2 = pmap_l2(pmap, addr);
4224 if (l2 != NULL && ((tpte = pmap_load(l2)) & PTE_V) != 0) {
4225 if ((tpte & PTE_RWX) != 0) {
4226 pa = PTE_TO_PHYS(tpte) | (addr & L2_OFFSET);
4227 val = MINCORE_INCORE | MINCORE_SUPER;
4229 l3 = pmap_l2_to_l3(l2, addr);
4230 tpte = pmap_load(l3);
4231 if ((tpte & PTE_V) == 0)
4233 pa = PTE_TO_PHYS(tpte) | (addr & L3_OFFSET);
4234 val = MINCORE_INCORE;
4237 if ((tpte & PTE_D) != 0)
4238 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4239 if ((tpte & PTE_A) != 0)
4240 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4241 managed = (tpte & PTE_SW_MANAGED) == PTE_SW_MANAGED;
4245 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4246 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4247 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4248 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4251 PA_UNLOCK_COND(*locked_pa);
4257 pmap_activate_sw(struct thread *td)
4259 pmap_t oldpmap, pmap;
4262 oldpmap = PCPU_GET(curpmap);
4263 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4264 if (pmap == oldpmap)
4266 load_satp(pmap->pm_satp);
4268 hart = PCPU_GET(hart);
4270 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4271 CPU_CLR_ATOMIC(hart, &oldpmap->pm_active);
4273 CPU_SET(hart, &pmap->pm_active);
4274 CPU_CLR(hart, &oldpmap->pm_active);
4276 PCPU_SET(curpmap, pmap);
4282 pmap_activate(struct thread *td)
4286 pmap_activate_sw(td);
4291 pmap_activate_boot(pmap_t pmap)
4295 hart = PCPU_GET(hart);
4297 CPU_SET_ATOMIC(hart, &pmap->pm_active);
4299 CPU_SET(hart, &pmap->pm_active);
4301 PCPU_SET(curpmap, pmap);
4305 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
4310 * From the RISC-V User-Level ISA V2.2:
4312 * "To make a store to instruction memory visible to all
4313 * RISC-V harts, the writing hart has to execute a data FENCE
4314 * before requesting that all remote RISC-V harts execute a
4319 CPU_CLR(PCPU_GET(hart), &mask);
4321 if (!CPU_EMPTY(&mask) && smp_started)
4322 sbi_remote_fence_i(mask.__bits);
4327 * Increase the starting virtual address of the given mapping if a
4328 * different alignment might result in more superpage mappings.
4331 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4332 vm_offset_t *addr, vm_size_t size)
4334 vm_offset_t superpage_offset;
4338 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4339 offset += ptoa(object->pg_color);
4340 superpage_offset = offset & L2_OFFSET;
4341 if (size - ((L2_SIZE - superpage_offset) & L2_OFFSET) < L2_SIZE ||
4342 (*addr & L2_OFFSET) == superpage_offset)
4344 if ((*addr & L2_OFFSET) < superpage_offset)
4345 *addr = (*addr & ~L2_OFFSET) + superpage_offset;
4347 *addr = ((*addr + L2_OFFSET) & ~L2_OFFSET) + superpage_offset;
4351 * Get the kernel virtual address of a set of physical pages. If there are
4352 * physical addresses not covered by the DMAP perform a transient mapping
4353 * that will be removed when calling pmap_unmap_io_transient.
4355 * \param page The pages the caller wishes to obtain the virtual
4356 * address on the kernel memory map.
4357 * \param vaddr On return contains the kernel virtual memory address
4358 * of the pages passed in the page parameter.
4359 * \param count Number of pages passed in.
4360 * \param can_fault TRUE if the thread using the mapped pages can take
4361 * page faults, FALSE otherwise.
4363 * \returns TRUE if the caller must call pmap_unmap_io_transient when
4364 * finished or FALSE otherwise.
4368 pmap_map_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4369 boolean_t can_fault)
4372 boolean_t needs_mapping;
4376 * Allocate any KVA space that we need, this is done in a separate
4377 * loop to prevent calling vmem_alloc while pinned.
4379 needs_mapping = FALSE;
4380 for (i = 0; i < count; i++) {
4381 paddr = VM_PAGE_TO_PHYS(page[i]);
4382 if (__predict_false(paddr >= DMAP_MAX_PHYSADDR)) {
4383 error = vmem_alloc(kernel_arena, PAGE_SIZE,
4384 M_BESTFIT | M_WAITOK, &vaddr[i]);
4385 KASSERT(error == 0, ("vmem_alloc failed: %d", error));
4386 needs_mapping = TRUE;
4388 vaddr[i] = PHYS_TO_DMAP(paddr);
4392 /* Exit early if everything is covered by the DMAP */
4398 for (i = 0; i < count; i++) {
4399 paddr = VM_PAGE_TO_PHYS(page[i]);
4400 if (paddr >= DMAP_MAX_PHYSADDR) {
4402 "pmap_map_io_transient: TODO: Map out of DMAP data");
4406 return (needs_mapping);
4410 pmap_unmap_io_transient(vm_page_t page[], vm_offset_t vaddr[], int count,
4411 boolean_t can_fault)
4418 for (i = 0; i < count; i++) {
4419 paddr = VM_PAGE_TO_PHYS(page[i]);
4420 if (paddr >= DMAP_MAX_PHYSADDR) {
4421 panic("RISCVTODO: pmap_unmap_io_transient: Unmap data");
4427 pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode)
4430 return (mode >= VM_MEMATTR_DEVICE && mode <= VM_MEMATTR_WRITE_BACK);
4434 pmap_get_tables(pmap_t pmap, vm_offset_t va, pd_entry_t **l1, pd_entry_t **l2,
4437 pd_entry_t *l1p, *l2p;
4439 /* Get l1 directory entry. */
4440 l1p = pmap_l1(pmap, va);
4443 if (l1p == NULL || (pmap_load(l1p) & PTE_V) == 0)
4446 if ((pmap_load(l1p) & PTE_RX) != 0) {
4452 /* Get l2 directory entry. */
4453 l2p = pmap_l1_to_l2(l1p, va);
4456 if (l2p == NULL || (pmap_load(l2p) & PTE_V) == 0)
4459 if ((pmap_load(l2p) & PTE_RX) != 0) {
4464 /* Get l3 page table entry. */
4465 *l3 = pmap_l2_to_l3(l2p, va);