2 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
7 * NASA Ames Research Center.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
31 * Copyright (c) 1997-1999 Eduardo E. Horvath. All rights reserved.
32 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
33 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * 2. Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in the
42 * documentation and/or other materials provided with the distribution.
43 * 3. All advertising materials mentioning features or use of this software
44 * must display the following acknowledgement:
45 * This product includes software developed by Christopher G. Demetriou
46 * for the NetBSD Project.
47 * 4. The name of the author may not be used to endorse or promote products
48 * derived from this software without specific prior written permission
50 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
51 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
52 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
53 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
54 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
55 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
56 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
57 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
59 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 * from: NetBSD: bus.h,v 1.58 2008/04/28 20:23:36 martin Exp
63 * from: FreeBSD: src/sys/alpha/include/bus.h,v 1.9 2001/01/09
68 #ifndef _MACHINE_BUS_H_
69 #define _MACHINE_BUS_H_
71 #ifdef BUS_SPACE_DEBUG
75 #include <machine/_bus.h>
76 #include <machine/cpufunc.h>
79 * Nexus and SBus spaces are non-cached and big endian
80 * (except for RAM and PROM)
82 * PCI spaces are non-cached and little endian
84 #define NEXUS_BUS_SPACE 0
85 #define SBUS_BUS_SPACE 1
86 #define PCI_CONFIG_BUS_SPACE 2
87 #define PCI_IO_BUS_SPACE 3
88 #define PCI_MEMORY_BUS_SPACE 4
89 #define LAST_BUS_SPACE 5
91 extern const int bus_type_asi[];
92 extern const int bus_stream_asi[];
94 #define __BUS_SPACE_HAS_STREAM_METHODS 1
96 #define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
97 #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
98 #define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFF
99 #define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
100 #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
101 #define BUS_SPACE_MAXADDR 0xFFFFFFFF
103 #define BUS_SPACE_UNRESTRICTED (~0)
105 struct bus_space_tag {
111 * Bus space function prototypes.
113 static void bus_space_barrier(bus_space_tag_t, bus_space_handle_t, bus_size_t,
115 static int bus_space_subregion(bus_space_tag_t, bus_space_handle_t,
116 bus_size_t, bus_size_t, bus_space_handle_t *);
119 * Map a region of device bus space into CPU virtual address space.
121 int bus_space_map(bus_space_tag_t tag, bus_addr_t address, bus_size_t size,
122 int flags, bus_space_handle_t *handlep);
125 * Unmap a region of device bus space.
127 void bus_space_unmap(bus_space_tag_t tag, bus_space_handle_t handle,
131 bus_space_barrier(bus_space_tag_t t __unused, bus_space_handle_t h __unused,
132 bus_size_t o __unused, bus_size_t s __unused, int f __unused)
136 * We have lots of alternatives depending on whether we're
137 * synchronizing loads with loads, loads with stores, stores
138 * with loads, or stores with stores. The only ones that seem
139 * generic are #Sync and #MemIssue. We use #Sync for safety.
145 bus_space_subregion(bus_space_tag_t t __unused, bus_space_handle_t h,
146 bus_size_t o __unused, bus_size_t s __unused, bus_space_handle_t *hp)
153 /* flags for bus space map functions */
154 #define BUS_SPACE_MAP_CACHEABLE 0x0001
155 #define BUS_SPACE_MAP_LINEAR 0x0002
156 #define BUS_SPACE_MAP_READONLY 0x0004
157 #define BUS_SPACE_MAP_PREFETCHABLE 0x0008
158 /* placeholders for bus functions... */
159 #define BUS_SPACE_MAP_BUS1 0x0100
160 #define BUS_SPACE_MAP_BUS2 0x0200
161 #define BUS_SPACE_MAP_BUS3 0x0400
162 #define BUS_SPACE_MAP_BUS4 0x0800
164 /* flags for bus_space_barrier() */
165 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
166 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
168 #ifdef BUS_SPACE_DEBUG
169 #define KTR_BUS KTR_SPARE2
170 #define __BUS_DEBUG_ACCESS(h, o, desc, sz) do { \
171 CTR4(KTR_BUS, "bus space: %s %d: handle %#lx, offset %#lx", \
172 (desc), (sz), (h), (o)); \
175 #define __BUS_DEBUG_ACCESS(h, o, desc, sz)
178 static __inline uint8_t
179 bus_space_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
182 __BUS_DEBUG_ACCESS(h, o, "read", 1);
183 return (lduba_nc((caddr_t)(h + o), bus_type_asi[t->bst_type]));
186 static __inline uint16_t
187 bus_space_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
190 __BUS_DEBUG_ACCESS(h, o, "read", 2);
191 return (lduha_nc((caddr_t)(h + o), bus_type_asi[t->bst_type]));
194 static __inline uint32_t
195 bus_space_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
198 __BUS_DEBUG_ACCESS(h, o, "read", 4);
199 return (lduwa_nc((caddr_t)(h + o), bus_type_asi[t->bst_type]));
202 static __inline uint64_t
203 bus_space_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
206 __BUS_DEBUG_ACCESS(h, o, "read", 8);
207 return (ldxa_nc((caddr_t)(h + o), bus_type_asi[t->bst_type]));
211 bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
212 uint8_t *a, size_t c)
216 *a++ = bus_space_read_1(t, h, o);
220 bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
221 uint16_t *a, size_t c)
225 *a++ = bus_space_read_2(t, h, o);
229 bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
230 uint32_t *a, size_t c)
234 *a++ = bus_space_read_4(t, h, o);
238 bus_space_read_multi_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
239 uint64_t *a, size_t c)
243 *a++ = bus_space_read_8(t, h, o);
247 bus_space_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
251 __BUS_DEBUG_ACCESS(h, o, "write", 1);
252 stba_nc((caddr_t)(h + o), bus_type_asi[t->bst_type], v);
256 bus_space_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
260 __BUS_DEBUG_ACCESS(h, o, "write", 2);
261 stha_nc((caddr_t)(h + o), bus_type_asi[t->bst_type], v);
265 bus_space_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
269 __BUS_DEBUG_ACCESS(h, o, "write", 4);
270 stwa_nc((caddr_t)(h + o), bus_type_asi[t->bst_type], v);
274 bus_space_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
278 __BUS_DEBUG_ACCESS(h, o, "write", 8);
279 stxa_nc((caddr_t)(h + o), bus_type_asi[t->bst_type], v);
283 bus_space_write_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
284 const uint8_t *a, size_t c)
288 bus_space_write_1(t, h, o, *a++);
292 bus_space_write_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
293 const uint16_t *a, size_t c)
297 bus_space_write_2(t, h, o, *a++);
301 bus_space_write_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
302 const uint32_t *a, size_t c)
306 bus_space_write_4(t, h, o, *a++);
310 bus_space_write_multi_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
311 const uint64_t *a, size_t c)
315 bus_space_write_8(t, h, o, *a++);
319 bus_space_set_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
324 bus_space_write_1(t, h, o, v);
328 bus_space_set_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
329 uint16_t v, size_t c)
333 bus_space_write_2(t, h, o, v);
337 bus_space_set_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
338 uint32_t v, size_t c)
342 bus_space_write_4(t, h, o, v);
346 bus_space_set_multi_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
347 uint64_t v, size_t c)
351 bus_space_write_8(t, h, o, v);
355 bus_space_read_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
356 uint8_t *a, bus_size_t c)
359 for (; c; a++, c--, o++)
360 *a = bus_space_read_1(t, h, o);
364 bus_space_read_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
365 uint16_t *a, bus_size_t c)
368 for (; c; a++, c--, o += 2)
369 *a = bus_space_read_2(t, h, o);
373 bus_space_read_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
374 uint32_t *a, bus_size_t c)
377 for (; c; a++, c--, o += 4)
378 *a = bus_space_read_4(t, h, o);
382 bus_space_read_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
383 uint64_t *a, bus_size_t c)
386 for (; c; a++, c--, o += 8)
387 *a = bus_space_read_8(t, h, o);
391 bus_space_write_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
392 const uint8_t *a, bus_size_t c)
395 for (; c; a++, c--, o++)
396 bus_space_write_1(t, h, o, *a);
400 bus_space_write_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
401 const uint16_t *a, bus_size_t c)
404 for (; c; a++, c--, o += 2)
405 bus_space_write_2(t, h, o, *a);
409 bus_space_write_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
410 const uint32_t *a, bus_size_t c)
413 for (; c; a++, c--, o += 4)
414 bus_space_write_4(t, h, o, *a);
418 bus_space_write_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
419 const uint64_t *a, bus_size_t c)
422 for (; c; a++, c--, o += 8)
423 bus_space_write_8(t, h, o, *a);
427 bus_space_set_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
428 const uint8_t v, bus_size_t c)
432 bus_space_write_1(t, h, o, v);
436 bus_space_set_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
437 const uint16_t v, bus_size_t c)
440 for (; c; c--, o += 2)
441 bus_space_write_2(t, h, o, v);
445 bus_space_set_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
446 const uint32_t v, bus_size_t c)
449 for (; c; c--, o += 4)
450 bus_space_write_4(t, h, o, v);
454 bus_space_set_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
455 const uint64_t v, bus_size_t c)
458 for (; c; c--, o += 8)
459 bus_space_write_8(t, h, o, v);
463 bus_space_copy_region_1(bus_space_tag_t t, bus_space_handle_t h1,
464 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
467 for (; c; c--, o1++, o2++)
468 bus_space_write_1(t, h1, o1, bus_space_read_1(t, h2, o2));
472 bus_space_copy_region_2(bus_space_tag_t t, bus_space_handle_t h1,
473 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
476 for (; c; c--, o1 += 2, o2 += 2)
477 bus_space_write_2(t, h1, o1, bus_space_read_2(t, h2, o2));
481 bus_space_copy_region_4(bus_space_tag_t t, bus_space_handle_t h1,
482 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
485 for (; c; c--, o1 += 4, o2 += 4)
486 bus_space_write_4(t, h1, o1, bus_space_read_4(t, h2, o2));
490 bus_space_copy_region_8(bus_space_tag_t t, bus_space_handle_t h1,
491 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
494 for (; c; c--, o1 += 8, o2 += 8)
495 bus_space_write_8(t, h1, o1, bus_space_read_8(t, h2, o2));
498 static __inline uint8_t
499 bus_space_read_stream_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
502 __BUS_DEBUG_ACCESS(h, o, "read stream", 1);
503 return (lduba_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type]));
506 static __inline uint16_t
507 bus_space_read_stream_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
510 __BUS_DEBUG_ACCESS(h, o, "read stream", 2);
511 return (lduha_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type]));
514 static __inline uint32_t
515 bus_space_read_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
518 __BUS_DEBUG_ACCESS(h, o, "read stream", 4);
519 return (lduwa_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type]));
522 static __inline uint64_t
523 bus_space_read_stream_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
526 __BUS_DEBUG_ACCESS(h, o, "read stream", 8);
527 return (ldxa_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type]));
531 bus_space_read_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
532 bus_size_t o, uint8_t *a, size_t c)
536 *a++ = bus_space_read_stream_1(t, h, o);
540 bus_space_read_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
541 bus_size_t o, uint16_t *a, size_t c)
545 *a++ = bus_space_read_stream_2(t, h, o);
549 bus_space_read_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
550 bus_size_t o, uint32_t *a, size_t c)
554 *a++ = bus_space_read_stream_4(t, h, o);
558 bus_space_read_multi_stream_8(bus_space_tag_t t, bus_space_handle_t h,
559 bus_size_t o, uint64_t *a, size_t c)
563 *a++ = bus_space_read_stream_8(t, h, o);
567 bus_space_write_stream_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
571 __BUS_DEBUG_ACCESS(h, o, "write stream", 1);
572 stba_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type], v);
576 bus_space_write_stream_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
580 __BUS_DEBUG_ACCESS(h, o, "write stream", 2);
581 stha_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type], v);
585 bus_space_write_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
589 __BUS_DEBUG_ACCESS(h, o, "write stream", 4);
590 stwa_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type], v);
594 bus_space_write_stream_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
598 __BUS_DEBUG_ACCESS(h, o, "write stream", 8);
599 stxa_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type], v);
603 bus_space_write_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
604 bus_size_t o, const uint8_t *a, size_t c)
608 bus_space_write_stream_1(t, h, o, *a++);
612 bus_space_write_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
613 bus_size_t o, const uint16_t *a, size_t c)
617 bus_space_write_stream_2(t, h, o, *a++);
621 bus_space_write_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
622 bus_size_t o, const uint32_t *a, size_t c)
626 bus_space_write_stream_4(t, h, o, *a++);
630 bus_space_write_multi_stream_8(bus_space_tag_t t, bus_space_handle_t h,
631 bus_size_t o, const uint64_t *a, size_t c)
635 bus_space_write_stream_8(t, h, o, *a++);
639 bus_space_set_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
640 bus_size_t o, uint8_t v, size_t c)
644 bus_space_write_stream_1(t, h, o, v);
648 bus_space_set_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
649 bus_size_t o, uint16_t v, size_t c)
653 bus_space_write_stream_2(t, h, o, v);
657 bus_space_set_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
658 bus_size_t o, uint32_t v, size_t c)
662 bus_space_write_stream_4(t, h, o, v);
666 bus_space_set_multi_stream_8(bus_space_tag_t t, bus_space_handle_t h,
667 bus_size_t o, uint64_t v, size_t c)
671 bus_space_write_stream_8(t, h, o, v);
675 bus_space_read_region_stream_1(bus_space_tag_t t, bus_space_handle_t h,
676 bus_size_t o, uint8_t *a, bus_size_t c)
679 for (; c; a++, c--, o++)
680 *a = bus_space_read_stream_1(t, h, o);
684 bus_space_read_region_stream_2(bus_space_tag_t t, bus_space_handle_t h,
685 bus_size_t o, uint16_t *a, bus_size_t c)
688 for (; c; a++, c--, o += 2)
689 *a = bus_space_read_stream_2(t, h, o);
693 bus_space_read_region_stream_4(bus_space_tag_t t, bus_space_handle_t h,
694 bus_size_t o, uint32_t *a, bus_size_t c)
697 for (; c; a++, c--, o += 4)
698 *a = bus_space_read_stream_4(t, h, o);
702 bus_space_read_region_stream_8(bus_space_tag_t t, bus_space_handle_t h,
703 bus_size_t o, uint64_t *a, bus_size_t c)
706 for (; c; a++, c--, o += 8)
707 *a = bus_space_read_stream_8(t, h, o);
711 bus_space_write_region_stream_1(bus_space_tag_t t, bus_space_handle_t h,
712 bus_size_t o, const uint8_t *a, bus_size_t c)
715 for (; c; a++, c--, o++)
716 bus_space_write_stream_1(t, h, o, *a);
720 bus_space_write_region_stream_2(bus_space_tag_t t, bus_space_handle_t h,
721 bus_size_t o, const uint16_t *a, bus_size_t c)
724 for (; c; a++, c--, o += 2)
725 bus_space_write_stream_2(t, h, o, *a);
729 bus_space_write_region_stream_4(bus_space_tag_t t, bus_space_handle_t h,
730 bus_size_t o, const uint32_t *a, bus_size_t c)
733 for (; c; a++, c--, o += 4)
734 bus_space_write_stream_4(t, h, o, *a);
738 bus_space_write_region_stream_8(bus_space_tag_t t, bus_space_handle_t h,
739 bus_size_t o, const uint64_t *a, bus_size_t c)
742 for (; c; a++, c--, o += 8)
743 bus_space_write_stream_8(t, h, o, *a);
747 bus_space_set_region_stream_1(bus_space_tag_t t, bus_space_handle_t h,
748 bus_size_t o, const uint8_t v, bus_size_t c)
752 bus_space_write_stream_1(t, h, o, v);
756 bus_space_set_region_stream_2(bus_space_tag_t t, bus_space_handle_t h,
757 bus_size_t o, const uint16_t v, bus_size_t c)
760 for (; c; c--, o += 2)
761 bus_space_write_stream_2(t, h, o, v);
765 bus_space_set_region_stream_4(bus_space_tag_t t, bus_space_handle_t h,
766 bus_size_t o, const uint32_t v, bus_size_t c)
769 for (; c; c--, o += 4)
770 bus_space_write_stream_4(t, h, o, v);
774 bus_space_set_region_stream_8(bus_space_tag_t t, bus_space_handle_t h,
775 bus_size_t o, const uint64_t v, bus_size_t c)
778 for (; c; c--, o += 8)
779 bus_space_write_stream_8(t, h, o, v);
783 bus_space_copy_region_stream_1(bus_space_tag_t t, bus_space_handle_t h1,
784 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
787 for (; c; c--, o1++, o2++)
788 bus_space_write_stream_1(t, h1, o1, bus_space_read_stream_1(t, h2,
793 bus_space_copy_region_stream_2(bus_space_tag_t t, bus_space_handle_t h1,
794 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
797 for (; c; c--, o1 += 2, o2 += 2)
798 bus_space_write_stream_2(t, h1, o1, bus_space_read_stream_2(t, h2,
803 bus_space_copy_region_stream_4(bus_space_tag_t t, bus_space_handle_t h1,
804 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
807 for (; c; c--, o1 += 4, o2 += 4)
808 bus_space_write_stream_4(t, h1, o1, bus_space_read_stream_4(t, h2,
813 bus_space_copy_region_stream_8(bus_space_tag_t t, bus_space_handle_t h1,
814 bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
817 for (; c; c--, o1 += 8, o2 += 8)
818 bus_space_write_stream_8(t, h1, o1, bus_space_read_8(t, h2, o2));
822 bus_space_peek_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
826 __BUS_DEBUG_ACCESS(h, o, "peek", 1);
827 return (fasword8(bus_type_asi[t->bst_type], (caddr_t)(h + o), a));
831 bus_space_peek_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
835 __BUS_DEBUG_ACCESS(h, o, "peek", 2);
836 return (fasword16(bus_type_asi[t->bst_type], (caddr_t)(h + o), a));
840 bus_space_peek_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
844 __BUS_DEBUG_ACCESS(h, o, "peek", 4);
845 return (fasword32(bus_type_asi[t->bst_type], (caddr_t)(h + o), a));
848 #include <machine/bus_dma.h>
850 #endif /* !_MACHINE_BUS_H_ */