2 * Copyright (c) 2001 Jake Burkholder.
4 * Copyright 2001 by Thomas Moestl <tmm@FreeBSD.org>. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/param.h>
34 #include <machine/asi.h>
35 #include <machine/cpufunc.h>
36 #include <machine/lsu.h>
37 #include <machine/watch.h>
40 #include <ddb/db_access.h>
41 #include <ddb/db_sym.h>
42 #include <ddb/db_variables.h>
43 #include <ddb/db_watch.h>
45 static void db_watch_print(vm_offset_t wp, int bm);
48 watch_phys_set_mask(vm_paddr_t pa, u_long mask)
52 stxa_sync(AA_DMMU_PWPR, ASI_DMMU, pa & (((2UL << 38) - 1) << 3));
53 lsucr = ldxa(0, ASI_LSU_CTL_REG);
54 lsucr = ((lsucr | LSU_PW) & ~LSU_PM_MASK) |
55 (mask << LSU_PM_SHIFT);
56 stxa_sync(0, ASI_LSU_CTL_REG, lsucr);
61 watch_phys_set(vm_paddr_t pa, int sz)
66 /* Test for misaligned watch points. */
69 return (watch_phys_set_mask(pa, ((1 << sz) - 1) << off));
73 watch_phys_get(int *bm)
78 if (!watch_phys_active())
81 pa = ldxa(AA_DMMU_PWPR, ASI_DMMU);
82 lsucr = ldxa(0, ASI_LSU_CTL_REG);
83 *bm = (lsucr & LSU_PM_MASK) >> LSU_PM_SHIFT;
91 stxa_sync(0, ASI_LSU_CTL_REG,
92 ldxa(0, ASI_LSU_CTL_REG) & ~LSU_PW);
99 return (ldxa(0, ASI_LSU_CTL_REG) & LSU_PW);
103 watch_virt_set_mask(vm_offset_t va, u_long mask)
107 stxa_sync(AA_DMMU_VWPR, ASI_DMMU, va & (((2UL << 41) - 1) << 3));
108 lsucr = ldxa(0, ASI_LSU_CTL_REG);
109 lsucr = ((lsucr | LSU_VW) & ~LSU_VM_MASK) |
110 (mask << LSU_VM_SHIFT);
111 stxa_sync(0, ASI_LSU_CTL_REG, lsucr);
116 watch_virt_set(vm_offset_t va, int sz)
120 off = (u_long)va & 7;
121 /* Test for misaligned watch points. */
124 return (watch_virt_set_mask(va, ((1 << sz) - 1) << off));
128 watch_virt_get(int *bm)
133 if (!watch_virt_active())
136 va = ldxa(AA_DMMU_VWPR, ASI_DMMU);
137 lsucr = ldxa(0, ASI_LSU_CTL_REG);
138 *bm = (lsucr & LSU_VM_MASK) >> LSU_VM_SHIFT;
140 return ((vm_offset_t)va);
146 stxa_sync(0, ASI_LSU_CTL_REG,
147 ldxa(0, ASI_LSU_CTL_REG) & ~LSU_VW);
154 return (ldxa(0, ASI_LSU_CTL_REG) & LSU_VW);
158 db_md_set_watchpoint(db_expr_t addr, db_expr_t size)
162 if (watch_virt_active()) {
163 db_printf("Overwriting previously active watch point at "
164 "0x%lx\n", watch_virt_get(&dummy));
166 return (watch_virt_set(addr, size));
170 db_md_clr_watchpoint(db_expr_t addr, db_expr_t size)
178 db_watch_print(vm_offset_t wp, int bm)
182 db_printf("\tat 0x%lx, active bytes: ", (u_long)wp);
183 for (i = 0; i < 8; i++) {
184 if ((bm & (1 << i)) != 0)
193 db_md_list_watchpoints(void)
199 db_printf("Physical address watchpoint:\n");
200 if (watch_phys_active()) {
201 pa = watch_phys_get(&bm);
202 db_watch_print(pa, bm);
204 db_printf("\tnot active.\n");
205 db_printf("Virtual address watchpoint:\n");
206 if (watch_virt_active()) {
207 va = watch_virt_get(&bm);
208 db_watch_print(va, bm);
210 db_printf("\tnot active.\n");