2 * Copyright (c) 1999, 2000 Matthew R. Green
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * from: NetBSD: iommu.c,v 1.82 2008/05/30 02:29:37 mrg Exp
29 * Copyright (c) 1999-2002 Eduardo Horvath
30 * Copyright (c) 2001-2003 Thomas Moestl
31 * Copyright (c) 2007, 2009 Marius Strobl <marius@FreeBSD.org>
32 * All rights reserved.
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
50 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
51 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
52 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
53 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 * from: NetBSD: sbus.c,v 1.50 2002/06/20 18:26:24 eeh Exp
60 #include <sys/cdefs.h>
61 __FBSDID("$FreeBSD$");
64 * UltraSPARC IOMMU support; used by both the PCI and SBus code.
67 * - Support sub-page boundaries.
68 * - Fix alignment handling for small allocations (the possible page offset
69 * of malloc()ed memory is not handled at all). Revise interaction of
70 * alignment with the load_mbuf and load_uio functions.
71 * - Handle lowaddr and highaddr in some way, and try to work out a way
72 * for filter callbacks to work. Currently, only lowaddr is honored
73 * in that no addresses above it are considered at all.
74 * - Implement BUS_DMA_ALLOCNOW in bus_dma_tag_create as far as possible.
75 * - Check the possible return values and callback error arguments;
76 * the callback currently gets called in error conditions where it should
78 * - When running out of DVMA space, return EINPROGRESS in the non-
79 * BUS_DMA_NOWAIT case and delay the callback until sufficient space
83 #include "opt_iommu.h"
85 #include <sys/param.h>
86 #include <sys/kernel.h>
88 #include <sys/malloc.h>
90 #include <sys/mutex.h>
93 #include <sys/systm.h>
98 #include <vm/vm_map.h>
100 #include <machine/asi.h>
101 #include <machine/bus.h>
102 #include <machine/bus_private.h>
103 #include <machine/iommureg.h>
104 #include <machine/resource.h>
105 #include <machine/ver.h>
107 #include <sys/rman.h>
109 #include <machine/iommuvar.h>
114 #define IOMMU_MAX_PRE (32 * 1024)
115 #define IOMMU_MAX_PRE_SEG 3
117 /* Threshold for using the streaming buffer */
118 #define IOMMU_STREAM_THRESH 128
120 static MALLOC_DEFINE(M_IOMMU, "dvmamem", "IOMMU DVMA Buffers");
122 static int iommu_strbuf_flush_sync(struct iommu_state *);
124 static void iommu_diag(struct iommu_state *, vm_offset_t va);
130 #define IOMMU_READ8(is, reg, off) \
131 bus_space_read_8((is)->is_bustag, (is)->is_bushandle, \
133 #define IOMMU_WRITE8(is, reg, off, v) \
134 bus_space_write_8((is)->is_bustag, (is)->is_bushandle, \
135 (is)->reg + (off), (v))
137 #define IOMMU_HAS_SB(is) \
138 ((is)->is_sb[0] != 0 || (is)->is_sb[1] != 0)
141 * Always overallocate one page; this is needed to handle alignment of the
142 * buffer, so it makes sense using a lazy allocation scheme.
144 #define IOMMU_SIZE_ROUNDUP(sz) \
145 (round_io_page(sz) + IO_PAGE_SIZE)
147 #define IOMMU_SET_TTE(is, va, tte) \
148 ((is)->is_tsb[IOTSBSLOT(va)] = (tte))
149 #define IOMMU_GET_TTE(is, va) \
150 (is)->is_tsb[IOTSBSLOT(va)]
152 /* Resource helpers */
153 #define IOMMU_RES_START(res) \
154 ((bus_addr_t)rman_get_start(res) << IO_PAGE_SHIFT)
155 #define IOMMU_RES_END(res) \
156 ((bus_addr_t)(rman_get_end(res) + 1) << IO_PAGE_SHIFT)
157 #define IOMMU_RES_SIZE(res) \
158 ((bus_size_t)rman_get_size(res) << IO_PAGE_SHIFT)
160 /* Helpers for struct bus_dmamap_res */
161 #define BDR_START(r) IOMMU_RES_START((r)->dr_res)
162 #define BDR_END(r) IOMMU_RES_END((r)->dr_res)
163 #define BDR_SIZE(r) IOMMU_RES_SIZE((r)->dr_res)
166 #define IS_LOCK(is) mtx_lock(&is->is_mtx)
167 #define IS_LOCK_ASSERT(is) mtx_assert(&is->is_mtx, MA_OWNED)
168 #define IS_UNLOCK(is) mtx_unlock(&is->is_mtx)
170 /* Flush a page from the TLB. No locking required, since this is atomic. */
172 iommu_tlb_flush(struct iommu_state *is, bus_addr_t va)
175 if ((is->is_flags & IOMMU_FIRE) != 0)
177 * Direct page flushing is not supported and also not
178 * necessary due to cache snooping.
181 IOMMU_WRITE8(is, is_iommu, IMR_FLUSH, va);
185 * Flush a page from the streaming buffer. No locking required, since this
189 iommu_strbuf_flushpg(struct iommu_state *is, bus_addr_t va)
193 for (i = 0; i < 2; i++)
194 if (is->is_sb[i] != 0)
195 IOMMU_WRITE8(is, is_sb[i], ISR_PGFLUSH, va);
199 * Flush an address from the streaming buffer(s); this is an asynchronous
200 * operation. To make sure that it has completed, iommu_strbuf_sync() needs
201 * to be called. No locking required.
204 iommu_strbuf_flush(struct iommu_state *is, bus_addr_t va)
207 iommu_strbuf_flushpg(is, va);
210 /* Synchronize all outstanding flush operations. */
212 iommu_strbuf_sync(struct iommu_state *is)
216 iommu_strbuf_flush_sync(is);
219 /* LRU queue handling for lazy resource allocation. */
221 iommu_map_insq(struct iommu_state *is, bus_dmamap_t map)
225 if (!SLIST_EMPTY(&map->dm_reslist)) {
227 TAILQ_REMOVE(&is->is_maplruq, map, dm_maplruq);
228 TAILQ_INSERT_TAIL(&is->is_maplruq, map, dm_maplruq);
234 iommu_map_remq(struct iommu_state *is, bus_dmamap_t map)
239 TAILQ_REMOVE(&is->is_maplruq, map, dm_maplruq);
244 * initialise the UltraSPARC IOMMU (PCI or SBus):
245 * - allocate and setup the iotsb.
247 * - initialise the streaming buffers (if they exist)
248 * - create a private DVMA map.
251 iommu_init(const char *name, struct iommu_state *is, u_int tsbsize,
252 uint32_t iovabase, u_int resvpg)
256 uint64_t end, obpmap, obpptsb, tte;
257 u_int maxtsbsize, obptsbentries, obptsbsize, slot, tsbentries;
263 * The sun4u IOMMU is part of the PCI or SBus controller so we
264 * will deal with it here..
266 * The IOMMU address space always ends at 0xffffe000, but the starting
267 * address depends on the size of the map. The map size is 1024 * 2 ^
268 * is->is_tsbsize entries, where each entry is 8 bytes. The start of
269 * the map can be calculated by (0xffffe000 << (8 + is->is_tsbsize)).
271 if ((is->is_flags & IOMMU_FIRE) != 0) {
272 maxtsbsize = IOMMU_TSB512K;
274 * We enable bypass in order to be able to use a physical
275 * address for the event queue base.
277 is->is_cr = IOMMUCR_SE | IOMMUCR_CM_C_TLB_TBW | IOMMUCR_BE;
279 maxtsbsize = IOMMU_TSB128K;
280 is->is_cr = (tsbsize << IOMMUCR_TSBSZ_SHIFT) | IOMMUCR_DE;
282 if (tsbsize > maxtsbsize)
283 panic("%s: unsupported TSB size ", __func__);
284 tsbentries = IOMMU_TSBENTRIES(tsbsize);
285 is->is_cr |= IOMMUCR_EN;
286 is->is_tsbsize = tsbsize;
287 is->is_dvmabase = iovabase;
289 is->is_dvmabase = IOTSB_VSTART(is->is_tsbsize);
291 size = IOTSB_BASESZ << is->is_tsbsize;
292 printf("%s: DVMA map: %#lx to %#lx %d entries%s\n", name,
293 is->is_dvmabase, is->is_dvmabase +
294 (size << (IO_PAGE_SHIFT - IOTTE_SHIFT)) - 1, tsbentries,
295 IOMMU_HAS_SB(is) ? ", streaming buffer" : "");
298 * Set up resource mamangement.
300 mtx_init(&is->is_mtx, "iommu", NULL, MTX_DEF);
301 end = is->is_dvmabase + (size << (IO_PAGE_SHIFT - IOTTE_SHIFT));
302 is->is_dvma_rman.rm_type = RMAN_ARRAY;
303 is->is_dvma_rman.rm_descr = "DVMA Memory";
304 if (rman_init(&is->is_dvma_rman) != 0 ||
305 rman_manage_region(&is->is_dvma_rman,
306 (is->is_dvmabase >> IO_PAGE_SHIFT) + resvpg,
307 (end >> IO_PAGE_SHIFT) - 1) != 0)
308 panic("%s: could not initialize DVMA rman", __func__);
309 TAILQ_INIT(&is->is_maplruq);
312 * Allocate memory for I/O page tables. They need to be
313 * physically contiguous.
315 is->is_tsb = contigmalloc(size, M_DEVBUF, M_NOWAIT, 0, ~0UL,
317 if (is->is_tsb == NULL)
318 panic("%s: contigmalloc failed", __func__);
319 is->is_ptsb = pmap_kextract((vm_offset_t)is->is_tsb);
320 bzero(is->is_tsb, size);
323 * Add the PROM mappings to the kernel IOTSB if desired.
324 * Note that the firmware of certain Darwin boards doesn't set
325 * the TSB size correctly.
327 if ((is->is_flags & IOMMU_FIRE) != 0)
328 obptsbsize = (IOMMU_READ8(is, is_iommu, IMR_TSB) &
329 IOMMUTB_TSBSZ_MASK) >> IOMMUTB_TSBSZ_SHIFT;
331 obptsbsize = (IOMMU_READ8(is, is_iommu, IMR_CTL) &
332 IOMMUCR_TSBSZ_MASK) >> IOMMUCR_TSBSZ_SHIFT;
333 obptsbentries = IOMMU_TSBENTRIES(obptsbsize);
335 printf("%s: PROM IOTSB size: %d (%d entries)\n", name,
336 obptsbsize, obptsbentries);
337 if ((is->is_flags & IOMMU_PRESERVE_PROM) != 0 &&
338 !(PCPU_GET(impl) == CPU_IMPL_ULTRASPARCIIi && obptsbsize == 7)) {
339 if (obptsbentries > tsbentries)
340 panic("%s: PROM IOTSB entries exceed kernel",
342 obpptsb = IOMMU_READ8(is, is_iommu, IMR_TSB) &
344 for (i = 0; i < obptsbentries; i++) {
345 tte = ldxa(obpptsb + i * 8, ASI_PHYS_USE_EC);
346 if ((tte & IOTTE_V) == 0)
348 slot = tsbentries - obptsbentries + i;
350 printf("%s: adding PROM IOTSB slot %d "
351 "(kernel slot %d) TTE: %#lx\n", name,
353 obpmap = (is->is_dvmabase + slot * IO_PAGE_SIZE) >>
355 if (rman_reserve_resource(&is->is_dvma_rman, obpmap,
356 obpmap, IO_PAGE_SIZE >> IO_PAGE_SHIFT, RF_ACTIVE,
358 panic("%s: could not reserve PROM IOTSB slot "
359 "%d (kernel slot %d)", __func__, i, slot);
360 is->is_tsb[slot] = tte;
365 * Initialize streaming buffer, if it is there.
367 if (IOMMU_HAS_SB(is)) {
369 * Find two 64-byte blocks in is_flush that are aligned on
370 * a 64-byte boundary for flushing.
372 offs = roundup2((vm_offset_t)is->is_flush,
373 STRBUF_FLUSHSYNC_NBYTES);
374 for (i = 0; i < 2; i++, offs += STRBUF_FLUSHSYNC_NBYTES) {
375 is->is_flushva[i] = (uint64_t *)offs;
376 is->is_flushpa[i] = pmap_kextract(offs);
381 * Now actually start up the IOMMU.
387 * Streaming buffers don't exist on the UltraSPARC IIi; we should have
388 * detected that already and disabled them. If not, we will notice that
389 * they aren't there when the STRBUF_EN bit does not remain.
392 iommu_reset(struct iommu_state *is)
398 if ((is->is_flags & IOMMU_FIRE) != 0) {
399 tsb |= is->is_tsbsize;
400 IOMMU_WRITE8(is, is_iommu, IMR_CACHE_INVAL, ~0ULL);
402 IOMMU_WRITE8(is, is_iommu, IMR_TSB, tsb);
403 IOMMU_WRITE8(is, is_iommu, IMR_CTL, is->is_cr);
405 for (i = 0; i < 2; i++) {
406 if (is->is_sb[i] != 0) {
407 IOMMU_WRITE8(is, is_sb[i], ISR_CTL, STRBUF_EN |
408 ((is->is_flags & IOMMU_RERUN_DISABLE) != 0 ?
411 /* No streaming buffers? Disable them. */
412 if ((IOMMU_READ8(is, is_sb[i], ISR_CTL) &
418 (void)IOMMU_READ8(is, is_iommu, IMR_CTL);
422 * Enter a mapping into the TSB. No locking required, since each TSB slot is
423 * uniquely assigned to a single map.
426 iommu_enter(struct iommu_state *is, vm_offset_t va, vm_paddr_t pa,
427 int stream, int flags)
431 KASSERT(va >= is->is_dvmabase,
432 ("%s: va %#lx not in DVMA space", __func__, va));
433 KASSERT(pa <= is->is_pmaxaddr,
434 ("%s: XXX: physical address too large (%#lx)", __func__, pa));
436 tte = MAKEIOTTE(pa, !(flags & BUS_DMA_NOWRITE),
437 !(flags & BUS_DMA_NOCACHE), stream);
439 IOMMU_SET_TTE(is, va, tte);
440 iommu_tlb_flush(is, va);
449 * Remove mappings created by iommu_enter(). Flush the streaming buffer,
450 * but do not synchronize it. Returns whether a streaming buffer flush
454 iommu_remove(struct iommu_state *is, vm_offset_t va, vm_size_t len)
456 int slot, streamed = 0;
462 KASSERT(va >= is->is_dvmabase,
463 ("%s: va 0x%lx not in DVMA space", __func__, (u_long)va));
464 KASSERT(va + len >= va,
465 ("%s: va 0x%lx + len 0x%lx wraps", __func__, (long)va, (long)len));
467 va = trunc_io_page(va);
469 if ((IOMMU_GET_TTE(is, va) & IOTTE_STREAM) != 0) {
471 iommu_strbuf_flush(is, va);
473 len -= ulmin(len, IO_PAGE_SIZE);
474 IOMMU_SET_TTE(is, va, 0);
475 iommu_tlb_flush(is, va);
476 if ((is->is_flags & IOMMU_FLUSH_CACHE) != 0) {
477 slot = IOTSBSLOT(va);
478 if (len <= IO_PAGE_SIZE || slot % 8 == 7)
479 IOMMU_WRITE8(is, is_iommu, IMR_CACHE_FLUSH,
480 is->is_ptsb + slot * 8);
487 /* Decode an IOMMU fault for host bridge error handlers. */
489 iommu_decode_fault(struct iommu_state *is, vm_offset_t phys)
494 idx = phys - is->is_ptsb;
495 if (phys < is->is_ptsb ||
496 idx > (PAGE_SIZE << is->is_tsbsize))
498 va = is->is_dvmabase +
499 (((bus_addr_t)idx >> IOTTE_SHIFT) << IO_PAGE_SHIFT);
500 printf("IOMMU fault virtual address %#lx\n", (u_long)va);
504 * A barrier operation which makes sure that all previous streaming buffer
505 * flushes complete before it returns.
508 iommu_strbuf_flush_sync(struct iommu_state *is)
510 struct timeval cur, end;
514 if (!IOMMU_HAS_SB(is))
518 * Streaming buffer flushes:
520 * 1 Tell strbuf to flush by storing va to strbuf_pgflush. If
521 * we're not on a cache line boundary (64-bits):
523 * 3 Store pointer to flag in flushsync
524 * 4 wait till flushsync becomes 0x1
526 * If it takes more than .5 sec, something went wrong.
528 *is->is_flushva[0] = 1;
529 *is->is_flushva[1] = 1;
531 for (i = 0; i < 2; i++) {
532 if (is->is_sb[i] != 0) {
533 *is->is_flushva[i] = 0;
534 IOMMU_WRITE8(is, is_sb[i], ISR_FLUSHSYNC,
542 * 0.5s is the recommended timeout from the U2S manual. The actual
543 * time required should be smaller by at least a factor of 1000.
544 * We have no choice but to busy-wait.
546 end.tv_usec = 500000;
547 timevaladd(&end, &cur);
549 while ((!*is->is_flushva[0] || !*is->is_flushva[1]) &&
550 timevalcmp(&cur, &end, <=))
553 if (!*is->is_flushva[0] || !*is->is_flushva[1]) {
554 panic("%s: flush timeout %ld, %ld at %#lx", __func__,
555 *is->is_flushva[0], *is->is_flushva[1], is->is_flushpa[0]);
561 /* Determine whether we may enable streaming on a mapping. */
563 iommu_use_streaming(struct iommu_state *is, bus_dmamap_t map, bus_size_t size)
566 return (size >= IOMMU_STREAM_THRESH && IOMMU_HAS_SB(is) &&
567 (map->dm_flags & DMF_COHERENT) == 0);
571 * Allocate DVMA virtual memory for a map. The map may not be on a queue,
572 * so that it can be freely modified.
575 iommu_dvma_valloc(bus_dma_tag_t t, struct iommu_state *is, bus_dmamap_t map,
578 struct resource *res;
579 struct bus_dmamap_res *bdr;
580 bus_size_t align, sgsize;
582 KASSERT(!map->dm_onq, ("%s: map on queue!", __func__));
583 if ((bdr = malloc(sizeof(*bdr), M_IOMMU, M_NOWAIT)) == NULL)
586 * If a boundary is specified, a map cannot be larger than it; however
587 * we do not clip currently, as that does not play well with the lazy
589 * Alignment to a page boundary is always enforced.
591 align = (t->dt_alignment + IO_PAGE_MASK) >> IO_PAGE_SHIFT;
592 sgsize = round_io_page(size) >> IO_PAGE_SHIFT;
593 if (t->dt_boundary > 0 && t->dt_boundary < IO_PAGE_SIZE)
594 panic("%s: illegal boundary specified", __func__);
595 res = rman_reserve_resource_bound(&is->is_dvma_rman, 0L,
596 t->dt_lowaddr >> IO_PAGE_SHIFT, sgsize,
597 t->dt_boundary >> IO_PAGE_SHIFT,
598 RF_ACTIVE | rman_make_alignment_flags(align), NULL);
606 SLIST_INSERT_HEAD(&map->dm_reslist, bdr, dr_link);
610 /* Unload the map and mark all resources as unused, but do not free them. */
612 iommu_dvmamap_vunload(struct iommu_state *is, bus_dmamap_t map)
614 struct bus_dmamap_res *r;
617 IS_LOCK_ASSERT(is); /* for iommu_strbuf_sync() below */
618 SLIST_FOREACH(r, &map->dm_reslist, dr_link) {
619 streamed |= iommu_remove(is, BDR_START(r), r->dr_used);
623 iommu_strbuf_sync(is);
626 /* Free a DVMA virtual memory resource. */
628 iommu_dvma_vfree_res(bus_dmamap_t map, struct bus_dmamap_res *r)
631 KASSERT(r->dr_used == 0, ("%s: resource busy!", __func__));
632 if (r->dr_res != NULL && rman_release_resource(r->dr_res) != 0)
633 printf("warning: DVMA space lost\n");
634 SLIST_REMOVE(&map->dm_reslist, r, bus_dmamap_res, dr_link);
638 /* Free all DVMA virtual memory for a map. */
640 iommu_dvma_vfree(struct iommu_state *is, bus_dmamap_t map)
644 iommu_map_remq(is, map);
645 iommu_dvmamap_vunload(is, map);
647 while (!SLIST_EMPTY(&map->dm_reslist))
648 iommu_dvma_vfree_res(map, SLIST_FIRST(&map->dm_reslist));
651 /* Prune a map, freeing all unused DVMA resources. */
653 iommu_dvma_vprune(struct iommu_state *is, bus_dmamap_t map)
655 struct bus_dmamap_res *r, *n;
656 bus_size_t freed = 0;
659 for (r = SLIST_FIRST(&map->dm_reslist); r != NULL; r = n) {
660 n = SLIST_NEXT(r, dr_link);
661 if (r->dr_used == 0) {
662 freed += BDR_SIZE(r);
663 iommu_dvma_vfree_res(map, r);
666 if (SLIST_EMPTY(&map->dm_reslist))
667 iommu_map_remq(is, map);
672 * Try to find a suitably-sized (and if requested, -aligned) slab of DVMA
673 * memory with IO page offset voffs.
676 iommu_dvma_vfindseg(bus_dmamap_t map, vm_offset_t voffs, bus_size_t size,
679 struct bus_dmamap_res *r;
680 bus_addr_t dvmaddr, dvmend;
682 KASSERT(!map->dm_onq, ("%s: map on queue!", __func__));
683 SLIST_FOREACH(r, &map->dm_reslist, dr_link) {
684 dvmaddr = round_io_page(BDR_START(r) + r->dr_used);
685 /* Alignment can only work with voffs == 0. */
686 dvmaddr = (dvmaddr + amask) & ~amask;
688 dvmend = dvmaddr + size;
689 if (dvmend <= BDR_END(r)) {
690 r->dr_used = dvmend - BDR_START(r);
698 * Try to find or allocate a slab of DVMA space; see above.
701 iommu_dvma_vallocseg(bus_dma_tag_t dt, struct iommu_state *is, bus_dmamap_t map,
702 vm_offset_t voffs, bus_size_t size, bus_addr_t amask, bus_addr_t *addr)
704 bus_dmamap_t tm, last;
705 bus_addr_t dvmaddr, freed;
706 int error, complete = 0;
708 dvmaddr = iommu_dvma_vfindseg(map, voffs, size, amask);
710 /* Need to allocate. */
712 while ((error = iommu_dvma_valloc(dt, is, map,
713 voffs + size)) == ENOMEM && !complete) {
715 * Free the allocated DVMA of a few maps until
716 * the required size is reached. This is an
717 * approximation to not have to call the allocation
718 * function too often; most likely one free run
719 * will not suffice if not one map was large enough
720 * itself due to fragmentation.
724 last = TAILQ_LAST(&is->is_maplruq, iommu_maplruq_head);
726 tm = TAILQ_FIRST(&is->is_maplruq);
727 complete = tm == last;
730 freed += iommu_dvma_vprune(is, tm);
731 /* Move to the end. */
732 iommu_map_insq(is, tm);
733 } while (freed < size && !complete);
738 dvmaddr = iommu_dvma_vfindseg(map, voffs, size, amask);
739 KASSERT(dvmaddr != 0, ("%s: allocation failed unexpectedly!",
747 iommu_dvmamem_alloc(bus_dma_tag_t dt, void **vaddr, int flags,
750 struct iommu_state *is = dt->dt_cookie;
754 * XXX: This will break for 32 bit transfers on machines with more
755 * than is->is_pmaxaddr memory.
757 if ((error = sparc64_dma_alloc_map(dt, mapp)) != 0)
760 if ((flags & BUS_DMA_NOWAIT) != 0)
764 if ((flags & BUS_DMA_ZERO) != 0)
767 if ((*vaddr = malloc(dt->dt_maxsize, M_IOMMU, mflags)) == NULL) {
769 sparc64_dma_free_map(dt, *mapp);
772 if ((flags & BUS_DMA_COHERENT) != 0)
773 (*mapp)->dm_flags |= DMF_COHERENT;
775 * Try to preallocate DVMA space. If this fails, it is retried at
778 iommu_dvma_valloc(dt, is, *mapp, IOMMU_SIZE_ROUNDUP(dt->dt_maxsize));
780 iommu_map_insq(is, *mapp);
786 iommu_dvmamem_free(bus_dma_tag_t dt, void *vaddr, bus_dmamap_t map)
788 struct iommu_state *is = dt->dt_cookie;
790 iommu_dvma_vfree(is, map);
791 sparc64_dma_free_map(dt, map);
792 free(vaddr, M_IOMMU);
796 iommu_dvmamap_create(bus_dma_tag_t dt, int flags, bus_dmamap_t *mapp)
798 struct iommu_state *is = dt->dt_cookie;
799 bus_size_t totsz, presz, currsz;
800 int error, i, maxpre;
802 if ((error = sparc64_dma_alloc_map(dt, mapp)) != 0)
804 if ((flags & BUS_DMA_COHERENT) != 0)
805 (*mapp)->dm_flags |= DMF_COHERENT;
807 * Preallocate DVMA space; if this fails now, it is retried at load
808 * time. Through bus_dmamap_load_mbuf() and bus_dmamap_load_uio(),
809 * it is possible to have multiple discontiguous segments in a single
810 * map, which is handled by allocating additional resources, instead
811 * of increasing the size, to avoid fragmentation.
812 * Clamp preallocation to IOMMU_MAX_PRE. In some situations we can
813 * handle more; that case is handled by reallocating at map load time.
815 totsz = ulmin(IOMMU_SIZE_ROUNDUP(dt->dt_maxsize), IOMMU_MAX_PRE);
816 error = iommu_dvma_valloc(dt, is, *mapp, totsz);
820 * Try to be smart about preallocating some additional segments if
823 maxpre = imin(dt->dt_nsegments, IOMMU_MAX_PRE_SEG);
824 presz = dt->dt_maxsize / maxpre;
825 for (i = 1; i < maxpre && totsz < IOMMU_MAX_PRE; i++) {
826 currsz = round_io_page(ulmin(presz, IOMMU_MAX_PRE - totsz));
827 error = iommu_dvma_valloc(dt, is, *mapp, currsz);
833 iommu_map_insq(is, *mapp);
839 iommu_dvmamap_destroy(bus_dma_tag_t dt, bus_dmamap_t map)
841 struct iommu_state *is = dt->dt_cookie;
843 iommu_dvma_vfree(is, map);
844 sparc64_dma_free_map(dt, map);
849 * Utility function to load a physical buffer. segp contains
850 * the starting segment on entrace, and the ending segment on exit.
853 iommu_dvmamap_load_phys(bus_dma_tag_t dt, bus_dmamap_t map, vm_paddr_t buf,
854 bus_size_t buflen, int flags, bus_dma_segment_t *segs, int *segp)
856 bus_addr_t amask, dvmaddr, dvmoffs;
857 bus_size_t sgsize, esize;
858 struct iommu_state *is;
861 int error, firstpg, sgcnt;
866 if ((map->dm_flags & DMF_LOADED) != 0) {
868 printf("%s: map still in use\n", __func__);
870 bus_dmamap_unload(dt, map);
874 * Make sure that the map is not on a queue so that the
875 * resource list may be safely accessed and modified without
876 * needing the lock to cover the whole operation.
879 iommu_map_remq(is, map);
882 amask = dt->dt_alignment - 1;
885 KASSERT(buflen != 0, ("%s: buflen == 0!", __func__));
886 if (buflen > dt->dt_maxsize)
890 segs = dt->dt_segments;
892 voffs = buf & IO_PAGE_MASK;
894 /* Try to find a slab that is large enough. */
895 error = iommu_dvma_vallocseg(dt, is, map, voffs, buflen, amask,
902 map->dm_flags &= ~DMF_STREAMED;
903 map->dm_flags |= iommu_use_streaming(is, map, buflen) != 0 ?
905 for (; buflen > 0; ) {
909 * Compute the segment size, and adjust counts.
911 sgsize = IO_PAGE_SIZE - ((u_long)buf & IO_PAGE_MASK);
918 dvmoffs = trunc_io_page(dvmaddr);
919 iommu_enter(is, dvmoffs, trunc_io_page(curaddr),
920 (map->dm_flags & DMF_STREAMED) != 0, flags);
921 if ((is->is_flags & IOMMU_FLUSH_CACHE) != 0) {
922 slot = IOTSBSLOT(dvmoffs);
923 if (buflen <= 0 || slot % 8 == 7)
924 IOMMU_WRITE8(is, is_iommu, IMR_CACHE_FLUSH,
925 is->is_ptsb + slot * 8);
929 * Chop the chunk up into segments of at most maxsegsz, but try
930 * to fill each segment as well as possible.
933 esize = ulmin(sgsize,
934 dt->dt_maxsegsz - segs[sgcnt].ds_len);
935 segs[sgcnt].ds_len += esize;
941 if (sgcnt >= dt->dt_nsegments)
944 * No extra alignment here - the common practice in
945 * the busdma code seems to be that only the first
946 * segment needs to satisfy the alignment constraints
947 * (and that only for bus_dmamem_alloc()ed maps).
948 * It is assumed that such tags have maxsegsize >=
951 esize = ulmin(sgsize, dt->dt_maxsegsz);
952 segs[sgcnt].ds_addr = dvmaddr;
953 segs[sgcnt].ds_len = esize;
965 * IOMMU DVMA operations, common to PCI and SBus
968 iommu_dvmamap_load_buffer(bus_dma_tag_t dt, bus_dmamap_t map, void *buf,
969 bus_size_t buflen, pmap_t pmap, int flags, bus_dma_segment_t *segs,
972 bus_addr_t amask, dvmaddr, dvmoffs;
973 bus_size_t sgsize, esize;
974 struct iommu_state *is;
975 vm_offset_t vaddr, voffs;
977 int error, firstpg, sgcnt;
982 if ((map->dm_flags & DMF_LOADED) != 0) {
984 printf("%s: map still in use\n", __func__);
986 bus_dmamap_unload(dt, map);
990 * Make sure that the map is not on a queue so that the
991 * resource list may be safely accessed and modified without
992 * needing the lock to cover the whole operation.
995 iommu_map_remq(is, map);
998 amask = dt->dt_alignment - 1;
1001 KASSERT(buflen != 0, ("%s: buflen == 0!", __func__));
1002 if (buflen > dt->dt_maxsize)
1006 segs = dt->dt_segments;
1008 vaddr = (vm_offset_t)buf;
1009 voffs = vaddr & IO_PAGE_MASK;
1011 /* Try to find a slab that is large enough. */
1012 error = iommu_dvma_vallocseg(dt, is, map, voffs, buflen, amask,
1019 map->dm_flags &= ~DMF_STREAMED;
1020 map->dm_flags |= iommu_use_streaming(is, map, buflen) != 0 ?
1022 for (; buflen > 0; ) {
1024 * Get the physical address for this page.
1026 if (pmap == kernel_pmap)
1027 curaddr = pmap_kextract(vaddr);
1029 curaddr = pmap_extract(pmap, vaddr);
1032 * Compute the segment size, and adjust counts.
1034 sgsize = IO_PAGE_SIZE - ((u_long)vaddr & IO_PAGE_MASK);
1035 if (buflen < sgsize)
1041 dvmoffs = trunc_io_page(dvmaddr);
1042 iommu_enter(is, dvmoffs, trunc_io_page(curaddr),
1043 (map->dm_flags & DMF_STREAMED) != 0, flags);
1044 if ((is->is_flags & IOMMU_FLUSH_CACHE) != 0) {
1045 slot = IOTSBSLOT(dvmoffs);
1046 if (buflen <= 0 || slot % 8 == 7)
1047 IOMMU_WRITE8(is, is_iommu, IMR_CACHE_FLUSH,
1048 is->is_ptsb + slot * 8);
1052 * Chop the chunk up into segments of at most maxsegsz, but try
1053 * to fill each segment as well as possible.
1056 esize = ulmin(sgsize,
1057 dt->dt_maxsegsz - segs[sgcnt].ds_len);
1058 segs[sgcnt].ds_len += esize;
1062 while (sgsize > 0) {
1064 if (sgcnt >= dt->dt_nsegments)
1067 * No extra alignment here - the common practice in
1068 * the busdma code seems to be that only the first
1069 * segment needs to satisfy the alignment constraints
1070 * (and that only for bus_dmamem_alloc()ed maps).
1071 * It is assumed that such tags have maxsegsize >=
1074 esize = ulmin(sgsize, dt->dt_maxsegsz);
1075 segs[sgcnt].ds_addr = dvmaddr;
1076 segs[sgcnt].ds_len = esize;
1088 iommu_dvmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
1089 struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
1093 static bus_dma_segment_t *
1094 iommu_dvmamap_complete(bus_dma_tag_t dt, bus_dmamap_t map,
1095 bus_dma_segment_t *segs, int nsegs, int error)
1097 struct iommu_state *is = dt->dt_cookie;
1100 iommu_map_insq(is, map);
1102 iommu_dvmamap_vunload(is, map);
1106 map->dm_flags |= DMF_LOADED;
1109 segs = dt->dt_segments;
1114 iommu_dvmamap_unload(bus_dma_tag_t dt, bus_dmamap_t map)
1116 struct iommu_state *is = dt->dt_cookie;
1118 if ((map->dm_flags & DMF_LOADED) == 0)
1121 iommu_dvmamap_vunload(is, map);
1122 iommu_map_insq(is, map);
1124 map->dm_flags &= ~DMF_LOADED;
1128 iommu_dvmamap_sync(bus_dma_tag_t dt, bus_dmamap_t map, bus_dmasync_op_t op)
1130 struct iommu_state *is = dt->dt_cookie;
1131 struct bus_dmamap_res *r;
1136 if ((map->dm_flags & DMF_LOADED) == 0)
1138 if ((map->dm_flags & DMF_STREAMED) != 0 &&
1139 ((op & BUS_DMASYNC_POSTREAD) != 0 ||
1140 (op & BUS_DMASYNC_PREWRITE) != 0)) {
1142 SLIST_FOREACH(r, &map->dm_reslist, dr_link) {
1143 va = (vm_offset_t)BDR_START(r);
1146 * If we have a streaming buffer, flush it here
1150 if ((IOMMU_GET_TTE(is, va) &
1151 IOTTE_STREAM) != 0) {
1153 iommu_strbuf_flush(is, va);
1155 len -= ulmin(len, IO_PAGE_SIZE);
1160 iommu_strbuf_sync(is);
1163 if ((op & BUS_DMASYNC_PREWRITE) != 0)
1170 * Perform an IOMMU diagnostic access and print the tag belonging to va.
1173 iommu_diag(struct iommu_state *is, vm_offset_t va)
1178 if ((is->is_flags & IOMMU_FIRE) != 0)
1181 IOMMU_WRITE8(is, is_dva, 0, trunc_io_page(va));
1182 membar(StoreStore | StoreLoad);
1183 printf("%s: tte entry %#lx", __func__, IOMMU_GET_TTE(is, va));
1184 if (is->is_dtcmp != 0) {
1185 printf(", tag compare register is %#lx\n",
1186 IOMMU_READ8(is, is_dtcmp, 0));
1189 for (i = 0; i < 16; i++) {
1190 tag = IOMMU_READ8(is, is_dtag, i * 8);
1191 data = IOMMU_READ8(is, is_ddram, i * 8);
1192 printf("%s: tag %d: %#lx, vpn %#lx, err %lx; "
1193 "data %#lx, pa %#lx, v %d, c %d\n", __func__, i,
1194 tag, (tag & IOMMU_DTAG_VPNMASK) << IOMMU_DTAG_VPNSHIFT,
1195 (tag & IOMMU_DTAG_ERRMASK) >> IOMMU_DTAG_ERRSHIFT, data,
1196 (data & IOMMU_DDATA_PGMASK) << IOMMU_DDATA_PGSHIFT,
1197 (data & IOMMU_DDATA_V) != 0, (data & IOMMU_DDATA_C) != 0);
1201 #endif /* IOMMU_DIAG */
1203 struct bus_dma_methods iommu_dma_methods = {
1204 iommu_dvmamap_create,
1205 iommu_dvmamap_destroy,
1206 iommu_dvmamap_load_phys,
1207 iommu_dvmamap_load_buffer,
1208 iommu_dvmamap_waitok,
1209 iommu_dvmamap_complete,
1210 iommu_dvmamap_unload,
1212 iommu_dvmamem_alloc,