2 * Copyright (c) 2001 Jake Burkholder.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <machine/asm.h>
28 __FBSDID("$FreeBSD$");
30 #include <machine/asi.h>
31 #include <machine/asmacros.h>
32 #include <machine/pstate.h>
33 #include <machine/upa.h>
40 .set kernbase,KERNBASE
43 * void _start(caddr_t metadata, u_long o1, u_long o2, u_long o3,
49 * Initialize misc state to known values. Interrupts disabled, normal
50 * globals, windows flushed (cr = 0, cs = nwindows - 1), no clean
51 * windows, pil 0, and floating point disabled.
53 wrpr %g0, PSTATE_NORMAL, %pstate
55 wrpr %g0, 0, %cleanwin
61 * Get onto our per-cpu panic stack, which precedes the struct pcpu in
64 SET(pcpu0 + (PCPU_PAGES * PAGE_SIZE) - PC_SIZEOF, %l1, %l0)
65 sub %l0, SPOFF + CCFSZ, %sp
70 wrpr %g0, PSTATE_KERNEL, %pstate
73 * Do initial bootstrap to setup pmap and thread0.
79 * Get onto thread0's kstack.
81 sub PCB_REG, SPOFF + CCFSZ, %sp
84 * And away we go. This doesn't return.
93 * void cpu_setregs(struct pcpu *pc)
96 ldx [%o0 + PC_CURPCB], %o1
99 * Disable interrupts, normal globals.
101 wrpr %g0, PSTATE_NORMAL, %pstate
104 * Normal %g6 points to the current thread's pcb, and %g7 points to
105 * the per-cpu data structure.
113 wrpr %g0, PSTATE_ALT, %pstate
116 * Alternate %g5 points to a per-cpu panic stack, %g6 points to the
117 * current thread's pcb, and %g7 points to the per-cpu data structure.
126 wrpr %g0, PSTATE_INTR, %pstate
129 * Interrupt %g7 points to the per-cpu data structure.
134 * Normal globals again.
136 wrpr %g0, PSTATE_NORMAL, %pstate
139 * Force trap level 1 and take over the trap table.
141 SET(tl0_base, %o2, %o1)
146 * Re-enable interrupts.
148 wrpr %g0, PSTATE_KERNEL, %pstate