2 * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. Berkeley Software Design Inc's name may not be used to endorse or
13 * promote products derived from this software without specific prior
16 * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * from BSDI: locore.s,v 1.36.2.15 1999/08/23 22:34:41 cp Exp
31 * Copyright (c) 2002 Jake Burkholder.
32 * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org>
33 * All rights reserved.
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * 2. Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in the
42 * documentation and/or other materials provided with the distribution.
44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
57 #include <sys/cdefs.h>
58 __FBSDID("$FreeBSD$");
60 #include <sys/param.h>
61 #include <sys/systm.h>
64 #include <sys/kernel.h>
66 #include <sys/mutex.h>
69 #include <sys/sched.h>
73 #include <vm/vm_param.h>
75 #include <vm/vm_kern.h>
76 #include <vm/vm_extern.h>
77 #include <vm/vm_map.h>
79 #include <dev/ofw/openfirm.h>
81 #include <machine/asi.h>
82 #include <machine/atomic.h>
83 #include <machine/bus.h>
84 #include <machine/cpu.h>
85 #include <machine/md_var.h>
86 #include <machine/metadata.h>
87 #include <machine/ofw_machdep.h>
88 #include <machine/pcb.h>
89 #include <machine/smp.h>
90 #include <machine/tick.h>
91 #include <machine/tlb.h>
92 #include <machine/tte.h>
93 #include <machine/ver.h>
95 #define SUNW_STARTCPU "SUNW,start-cpu"
96 #define SUNW_STOPSELF "SUNW,stop-self"
98 static ih_func_t cpu_ipi_ast;
99 static ih_func_t cpu_ipi_preempt;
100 static ih_func_t cpu_ipi_stop;
103 * Argument area used to pass data to non-boot processors as they start up.
104 * This must be statically initialized with a known invalid CPU module ID,
105 * since the other processors will use it before the boot CPU enters the
108 struct cpu_start_args cpu_start_args = { 0, -1, -1, 0, 0, 0 };
109 struct ipi_cache_args ipi_cache_args;
110 struct ipi_tlb_args ipi_tlb_args;
111 struct pcb stoppcbs[MAXCPU];
115 cpu_ipi_selected_t *cpu_ipi_selected;
117 static vm_offset_t mp_tramp;
118 static u_int cpuid_to_mid[MAXCPU];
119 static int has_stopself;
121 static volatile u_int shutdown_cpus;
123 static void cpu_mp_unleash(void *v);
124 static void spitfire_ipi_send(u_int mid, u_long d0, u_long d1, u_long d2);
125 static void sun4u_startcpu(phandle_t cpu, void *func, u_long arg);
126 static void sun4u_stopself(void);
128 static cpu_ipi_selected_t cheetah_ipi_selected;
129 static cpu_ipi_selected_t spitfire_ipi_selected;
131 SYSINIT(cpu_mp_unleash, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
133 CTASSERT(MAXCPU <= IDR_CHEETAH_MAX_BN_PAIRS);
134 CTASSERT(MAXCPU <= sizeof(u_int) * NBBY);
135 CTASSERT(MAXCPU <= sizeof(int) * NBBY);
143 mp_tramp = (vm_offset_t)OF_claim(NULL, PAGE_SIZE, PAGE_SIZE);
144 if (mp_tramp == (vm_offset_t)-1)
145 panic("%s", __func__);
146 bcopy(mp_tramp_code, (void *)mp_tramp, mp_tramp_code_len);
147 *(vm_offset_t *)(mp_tramp + mp_tramp_tlb_slots) = kernel_tlb_slots;
148 *(vm_offset_t *)(mp_tramp + mp_tramp_func) = (vm_offset_t)mp_startup;
149 tp = (struct tte *)(mp_tramp + mp_tramp_code_len);
150 for (i = 0; i < kernel_tlb_slots; i++) {
151 tp[i].tte_vpn = TV_VPN(kernel_tlbs[i].te_va, TS_4M);
152 tp[i].tte_data = TD_V | TD_4M | TD_PA(kernel_tlbs[i].te_pa) |
153 TD_L | TD_CP | TD_CV | TD_P | TD_W;
155 for (i = 0; i < PAGE_SIZE; i += sizeof(vm_offset_t))
159 * On UP systems cpu_ipi_selected() can be called while
160 * cpu_mp_start() wasn't so initialize these here.
162 if (cpu_impl == CPU_IMPL_ULTRASPARCIIIi ||
163 cpu_impl == CPU_IMPL_ULTRASPARCIIIip)
165 if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
166 cpu_ipi_selected = cheetah_ipi_selected;
168 cpu_ipi_selected = spitfire_ipi_selected;
172 * Probe for other CPUs.
175 cpu_mp_setmaxid(void)
181 all_cpus = 1 << curcpu;
185 for (child = OF_child(OF_peer(0)); child != 0; child = OF_peer(child))
186 if (OF_getprop(child, "device_type", buf, sizeof(buf)) > 0 &&
187 strcmp(buf, "cpu") == 0)
196 return (mp_maxid > 0);
203 return (smp_topo_none());
207 sun4u_startcpu(phandle_t cpu, void *func, u_long arg)
217 (cell_t)SUNW_STARTCPU,
222 args.func = (cell_t)func;
223 args.arg = (cell_t)arg;
228 * Stop the calling CPU.
238 (cell_t)SUNW_STOPSELF,
241 openfirmware_exit(&args);
242 panic("%s: failed.", __func__);
246 * Fire up any non-boot processors.
252 volatile struct cpu_start_args *csa;
261 mtx_init(&ipi_mtx, "ipi", NULL, MTX_SPIN);
263 if (OF_test(SUNW_STOPSELF) == 0)
266 intr_setup(PIL_AST, cpu_ipi_ast, -1, NULL, NULL);
267 intr_setup(PIL_RENDEZVOUS, (ih_func_t *)smp_rendezvous_action,
269 intr_setup(PIL_STOP, cpu_ipi_stop, -1, NULL, NULL);
270 intr_setup(PIL_PREEMPT, cpu_ipi_preempt, -1, NULL, NULL);
272 cpuid_to_mid[curcpu] = PCPU_GET(mid);
274 csa = &cpu_start_args;
275 for (child = OF_child(OF_peer(0)); child != 0 && mp_ncpus <= MAXCPU;
276 child = OF_peer(child)) {
277 if (OF_getprop(child, "device_type", buf, sizeof(buf)) <= 0 ||
278 strcmp(buf, "cpu") != 0)
280 if (OF_getprop(child, cpu_impl < CPU_IMPL_ULTRASPARCIII ?
281 "upa-portid" : "portid", &mid, sizeof(mid)) <= 0)
282 panic("%s: can't get module ID", __func__);
283 if (mid == PCPU_GET(mid))
285 if (OF_getprop(child, "clock-frequency", &clock,
287 panic("%s: can't get clock", __func__);
288 if (clock != PCPU_GET(clock))
289 hardclock_use_stick = 1;
292 sun4u_startcpu(child, (void *)mp_tramp, 0);
294 while (csa->csa_state != CPU_TICKSYNC)
297 csa->csa_tick = rd(tick);
298 if (cpu_impl >= CPU_IMPL_ULTRASPARCIII) {
299 while (csa->csa_state != CPU_STICKSYNC)
302 csa->csa_stick = rdstick();
304 while (csa->csa_state != CPU_INIT)
306 csa->csa_tick = csa->csa_stick = 0;
310 cpuid_to_mid[cpuid] = mid;
311 cpu_identify(csa->csa_ver, clock, cpuid);
313 va = kmem_alloc(kernel_map, PCPU_PAGES * PAGE_SIZE);
314 pc = (struct pcpu *)(va + (PCPU_PAGES * PAGE_SIZE)) - 1;
315 pcpu_init(pc, cpuid, sizeof(*pc));
317 pc->pc_clock = clock;
323 all_cpus |= 1 << cpuid;
326 KASSERT(!isjbus || mp_ncpus <= IDR_JALAPENO_MAX_BN_PAIRS,
327 ("%s: can only IPI a maximum of %d JBus-CPUs",
328 __func__, IDR_JALAPENO_MAX_BN_PAIRS));
329 PCPU_SET(other_cpus, all_cpus & ~(1 << curcpu));
334 cpu_mp_announce(void)
340 cpu_mp_unleash(void *v)
342 volatile struct cpu_start_args *csa;
351 ctx_min = TLB_CTX_USER_MIN;
352 ctx_inc = (TLB_CTX_USER_MAX - 1) / mp_ncpus;
353 csa = &cpu_start_args;
354 csa->csa_count = mp_ncpus;
355 SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
356 pc->pc_tlb_ctx = ctx_min;
357 pc->pc_tlb_ctx_min = ctx_min;
358 pc->pc_tlb_ctx_max = ctx_min + ctx_inc;
361 if (pc->pc_cpuid == curcpu)
363 KASSERT(pc->pc_idlethread != NULL,
364 ("%s: idlethread", __func__));
365 pc->pc_curthread = pc->pc_idlethread;
366 pc->pc_curpcb = pc->pc_curthread->td_pcb;
367 for (i = 0; i < PCPU_PAGES; i++) {
368 va = pc->pc_addr + i * PAGE_SIZE;
369 pa = pmap_kextract(va);
371 panic("%s: pmap_kextract", __func__);
372 csa->csa_ttes[i].tte_vpn = TV_VPN(va, TS_8K);
373 csa->csa_ttes[i].tte_data = TD_V | TD_8K | TD_PA(pa) |
374 TD_L | TD_CP | TD_CV | TD_P | TD_W;
377 csa->csa_pcpu = pc->pc_addr;
378 csa->csa_mid = pc->pc_mid;
380 while (csa->csa_state != CPU_BOOTSTRAP)
391 cpu_mp_bootstrap(struct pcpu *pc)
393 volatile struct cpu_start_args *csa;
395 csa = &cpu_start_args;
396 if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
401 * Flush all non-locked TLB entries possibly left over by the
404 tlb_flush_nonlocked();
409 KASSERT(curthread != NULL, ("%s: curthread", __func__));
410 PCPU_SET(other_cpus, all_cpus & ~(1 << curcpu));
411 printf("SMP: AP CPU #%d Launched!\n", curcpu);
415 csa->csa_state = CPU_BOOTSTRAP;
416 while (csa->csa_count != 0)
419 /* Ok, now enter the scheduler. */
424 cpu_mp_shutdown(void)
429 shutdown_cpus = PCPU_GET(other_cpus);
430 if (stopped_cpus != PCPU_GET(other_cpus)) /* XXX */
431 stop_cpus(stopped_cpus ^ PCPU_GET(other_cpus));
433 while (shutdown_cpus != 0) {
435 printf("timeout shutting down CPUs.\n");
439 /* XXX: delay a bit to allow the CPUs to actually enter the PROM. */
445 cpu_ipi_ast(struct trapframe *tf)
451 cpu_ipi_stop(struct trapframe *tf)
454 CTR2(KTR_SMP, "%s: stopped %d", __func__, curcpu);
455 savectx(&stoppcbs[curcpu]);
456 atomic_set_acq_int(&stopped_cpus, PCPU_GET(cpumask));
457 while ((started_cpus & PCPU_GET(cpumask)) == 0) {
458 if ((shutdown_cpus & PCPU_GET(cpumask)) != 0) {
459 atomic_clear_int(&shutdown_cpus, PCPU_GET(cpumask));
460 if (has_stopself != 0)
462 (void)intr_disable();
467 atomic_clear_rel_int(&started_cpus, PCPU_GET(cpumask));
468 atomic_clear_rel_int(&stopped_cpus, PCPU_GET(cpumask));
469 CTR2(KTR_SMP, "%s: restarted %d", __func__, curcpu);
473 cpu_ipi_preempt(struct trapframe *tf)
476 sched_preempt(curthread);
480 spitfire_ipi_selected(u_int cpus, u_long d0, u_long d1, u_long d2)
484 KASSERT((cpus & (1 << curcpu)) == 0,
485 ("%s: CPU can't IPI itself", __func__));
489 spitfire_ipi_send(cpuid_to_mid[cpu], d0, d1, d2);
494 spitfire_ipi_send(u_int mid, u_long d0, u_long d1, u_long d2)
500 KASSERT((ldxa(0, ASI_INTR_DISPATCH_STATUS) & IDR_BUSY) == 0,
501 ("%s: outstanding dispatch", __func__));
502 for (i = 0; i < IPI_RETRIES; i++) {
504 stxa(AA_SDB_INTR_D0, ASI_SDB_INTR_W, d0);
505 stxa(AA_SDB_INTR_D1, ASI_SDB_INTR_W, d1);
506 stxa(AA_SDB_INTR_D2, ASI_SDB_INTR_W, d2);
508 stxa(AA_INTR_SEND | (mid << IDC_ITID_SHIFT),
511 * Workaround for SpitFire erratum #54; do a dummy read
512 * from a SDB internal register before the MEMBAR #Sync
513 * for the write to ASI_SDB_INTR_W (requiring another
514 * MEMBAR #Sync in order to make sure the write has
515 * occurred before the load).
518 (void)ldxa(AA_SDB_CNTL_HIGH, ASI_SDB_CONTROL_R);
520 while (((ids = ldxa(0, ASI_INTR_DISPATCH_STATUS)) &
524 if ((ids & (IDR_BUSY | IDR_NACK)) == 0)
527 * Leave interrupts enabled for a bit before retrying
528 * in order to avoid deadlocks if the other CPU is also
529 * trying to send an IPI.
538 printf("%s: couldn't send IPI to module 0x%u\n",
541 panic("%s: couldn't send IPI", __func__);
545 cheetah_ipi_selected(u_int cpus, u_long d0, u_long d1, u_long d2)
553 KASSERT((cpus & (1 << curcpu)) == 0,
554 ("%s: CPU can't IPI itself", __func__));
555 KASSERT((ldxa(0, ASI_INTR_DISPATCH_STATUS) &
556 IDR_CHEETAH_ALL_BUSY) == 0,
557 ("%s: outstanding dispatch", __func__));
561 for (i = 0; i < IPI_RETRIES * mp_ncpus; i++) {
563 stxa(AA_SDB_INTR_D0, ASI_SDB_INTR_W, d0);
564 stxa(AA_SDB_INTR_D1, ASI_SDB_INTR_W, d1);
565 stxa(AA_SDB_INTR_D2, ASI_SDB_INTR_W, d2);
568 for (cpu = 0; cpu < mp_ncpus; cpu++) {
569 if ((cpus & (1 << cpu)) != 0) {
571 (cpuid_to_mid[cpu] << IDC_ITID_SHIFT) |
572 (isjbus ? 0 : bnp << IDC_BN_SHIFT),
578 while (((ids = ldxa(0, ASI_INTR_DISPATCH_STATUS)) &
579 IDR_CHEETAH_ALL_BUSY) != 0)
582 if ((ids & (IDR_CHEETAH_ALL_BUSY | IDR_CHEETAH_ALL_NACK)) == 0)
585 for (cpu = 0; cpu < mp_ncpus; cpu++) {
586 if ((cpus & (1 << cpu)) != 0) {
587 if ((ids & (IDR_NACK << (isjbus ?
588 (2 * cpuid_to_mid[cpu]) :
595 * Leave interrupts enabled for a bit before retrying
596 * in order to avoid deadlocks if the other CPUs are
597 * also trying to send IPIs.
606 printf("%s: couldn't send IPI (cpus=0x%u ids=0x%lu)\n",
607 __func__, cpus, ids);
609 panic("%s: couldn't send IPI", __func__);