2 * Copyright (c) 2003-2008, Joseph Koshy
3 * Copyright (c) 2007 The FreeBSD Foundation
6 * Portions of this software were developed by A. Joseph Koshy under
7 * sponsorship from the FreeBSD Foundation and Google, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 #include <dev/hwpmc/pmc_events.h>
38 #include <machine/pmc_mdep.h>
39 #include <machine/profile.h>
41 #define PMC_MODULE_NAME "hwpmc"
42 #define PMC_NAME_MAX 64 /* HW counter name size */
43 #define PMC_CLASS_MAX 8 /* max #classes of PMCs per-system */
46 * Kernel<->userland API version number [MMmmpppp]
48 * Major numbers are to be incremented when an incompatible change to
49 * the ABI occurs that older clients will not be able to handle.
51 * Minor numbers are incremented when a backwards compatible change
52 * occurs that allows older correct programs to run unchanged. For
53 * example, when support for a new PMC type is added.
55 * The patch version is incremented for every bug fix.
57 #define PMC_VERSION_MAJOR 0x03
58 #define PMC_VERSION_MINOR 0x01
59 #define PMC_VERSION_PATCH 0x0000
61 #define PMC_VERSION (PMC_VERSION_MAJOR << 24 | \
62 PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
65 * Kinds of CPUs known.
67 * We keep track of CPU variants that need to be distinguished in
68 * some way for PMC operations. CPU names are grouped by manufacturer
69 * and numbered sparsely in order to minimize changes to the ABI involved
70 * when new CPUs are added.
73 #define __PMC_CPUS() \
74 __PMC_CPU(AMD_K7, 0x00, "AMD K7") \
75 __PMC_CPU(AMD_K8, 0x01, "AMD K8") \
76 __PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \
77 __PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \
78 __PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \
79 __PMC_CPU(INTEL_PII, 0x83, "Intel Pentium II") \
80 __PMC_CPU(INTEL_PIII, 0x84, "Intel Pentium III") \
81 __PMC_CPU(INTEL_PM, 0x85, "Intel Pentium M") \
82 __PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \
83 __PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \
84 __PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \
85 __PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \
86 __PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom") \
87 __PMC_CPU(INTEL_COREI7, 0x8B, "Intel Core i7") \
88 __PMC_CPU(INTEL_WESTMERE, 0x8C, "Intel Westmere") \
89 __PMC_CPU(INTEL_SANDYBRIDGE, 0x8D, "Intel Sandy Bridge") \
90 __PMC_CPU(INTEL_IVYBRIDGE, 0x8E, "Intel Ivy Bridge") \
91 __PMC_CPU(INTEL_SANDYBRIDGE_XEON, 0x8F, "Intel Sandy Bridge Xeon") \
92 __PMC_CPU(INTEL_IVYBRIDGE_XEON, 0x90, "Intel Ivy Bridge Xeon") \
93 __PMC_CPU(INTEL_HASWELL, 0x91, "Intel Haswell") \
94 __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
95 __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
96 __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
97 __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \
98 __PMC_CPU(GENERIC, 0x400, "Generic")
102 #define __PMC_CPU(S,V,D) PMC_CPU_##S = V,
106 #define PMC_CPU_FIRST PMC_CPU_AMD_K7
107 #define PMC_CPU_LAST PMC_CPU_GENERIC
113 #define __PMC_CLASSES() \
114 __PMC_CLASS(TSC) /* CPU Timestamp counter */ \
115 __PMC_CLASS(K7) /* AMD K7 performance counters */ \
116 __PMC_CLASS(K8) /* AMD K8 performance counters */ \
117 __PMC_CLASS(P5) /* Intel Pentium counters */ \
118 __PMC_CLASS(P6) /* Intel Pentium Pro counters */ \
119 __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \
120 __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \
121 __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \
122 __PMC_CLASS(UCF) /* Intel Uncore fixed function */ \
123 __PMC_CLASS(UCP) /* Intel Uncore programmable */ \
124 __PMC_CLASS(XSCALE) /* Intel XScale counters */ \
125 __PMC_CLASS(MIPS24K) /* MIPS 24K */ \
126 __PMC_CLASS(OCTEON) /* Cavium Octeon */ \
127 __PMC_CLASS(PPC7450) /* Motorola MPC7450 class */ \
128 __PMC_CLASS(SOFT) /* Software events */
132 #define __PMC_CLASS(N) PMC_CLASS_##N ,
136 #define PMC_CLASS_FIRST PMC_CLASS_TSC
137 #define PMC_CLASS_LAST PMC_CLASS_SOFT
140 * A PMC can be in the following states:
143 * DISABLED -- administratively prohibited from being used.
144 * FREE -- HW available for use
146 * ALLOCATED -- allocated
147 * STOPPED -- allocated, but not counting events
148 * RUNNING -- allocated, and in operation; 'pm_runcount'
149 * holds the number of CPUs using this PMC at
151 * DELETED -- being destroyed
154 #define __PMC_HWSTATES() \
155 __PMC_STATE(DISABLED) \
158 #define __PMC_SWSTATES() \
159 __PMC_STATE(ALLOCATED) \
160 __PMC_STATE(STOPPED) \
161 __PMC_STATE(RUNNING) \
164 #define __PMC_STATES() \
170 #define __PMC_STATE(S) PMC_STATE_##S,
175 #define PMC_STATE_FIRST PMC_STATE_DISABLED
176 #define PMC_STATE_LAST PMC_STATE_DELETED
179 * An allocated PMC may used as a 'global' counter or as a
180 * 'thread-private' one. Each such mode of use can be in either
181 * statistical sampling mode or in counting mode. Thus a PMC in use
183 * SS i.e., SYSTEM STATISTICAL -- system-wide statistical profiling
184 * SC i.e., SYSTEM COUNTER -- system-wide counting mode
185 * TS i.e., THREAD STATISTICAL -- thread virtual, statistical profiling
186 * TC i.e., THREAD COUNTER -- thread virtual, counting mode
188 * Statistical profiling modes rely on the PMC periodically delivering
189 * a interrupt to the CPU (when the configured number of events have
190 * been measured), so the PMC must have the ability to generate
193 * In counting modes, the PMC counts its configured events, with the
194 * value of the PMC being read whenever needed by its owner process.
196 * The thread specific modes "virtualize" the PMCs -- the PMCs appear
197 * to be thread private and count events only when the profiled thread
198 * actually executes on the CPU.
200 * The system-wide "global" modes keep the PMCs running all the time
201 * and are used to measure the behaviour of the whole system.
204 #define __PMC_MODES() \
212 #define __PMC_MODE(M,N) PMC_MODE_##M = N,
216 #define PMC_MODE_FIRST PMC_MODE_SS
217 #define PMC_MODE_LAST PMC_MODE_TC
219 #define PMC_IS_COUNTING_MODE(mode) \
220 ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
221 #define PMC_IS_SYSTEM_MODE(mode) \
222 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC)
223 #define PMC_IS_SAMPLING_MODE(mode) \
224 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
225 #define PMC_IS_VIRTUAL_MODE(mode) \
226 ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC)
229 * PMC row disposition
232 #define __PMC_DISPOSITIONS(N) \
233 __PMC_DISP(STANDALONE) /* global/disabled counters */ \
234 __PMC_DISP(FREE) /* free/available */ \
235 __PMC_DISP(THREAD) /* thread-virtual PMCs */ \
236 __PMC_DISP(UNKNOWN) /* sentinel */
240 #define __PMC_DISP(D) PMC_DISP_##D ,
244 #define PMC_DISP_FIRST PMC_DISP_STANDALONE
245 #define PMC_DISP_LAST PMC_DISP_THREAD
248 * Counter capabilities
250 * __PMC_CAPS(NAME, VALUE, DESCRIPTION)
253 #define __PMC_CAPS() \
254 __PMC_CAP(INTERRUPT, 0, "generate interrupts") \
255 __PMC_CAP(USER, 1, "count user-mode events") \
256 __PMC_CAP(SYSTEM, 2, "count system-mode events") \
257 __PMC_CAP(EDGE, 3, "do edge detection of events") \
258 __PMC_CAP(THRESHOLD, 4, "ignore events below a threshold") \
259 __PMC_CAP(READ, 5, "read PMC counter") \
260 __PMC_CAP(WRITE, 6, "reprogram PMC counter") \
261 __PMC_CAP(INVERT, 7, "invert comparision sense") \
262 __PMC_CAP(QUALIFIER, 8, "further qualify monitored events") \
263 __PMC_CAP(PRECISE, 9, "perform precise sampling") \
264 __PMC_CAP(TAGGING, 10, "tag upstream events") \
265 __PMC_CAP(CASCADE, 11, "cascade counters")
270 #define __PMC_CAP(NAME, VALUE, DESCR) PMC_CAP_##NAME = (1 << VALUE) ,
274 #define PMC_CAP_FIRST PMC_CAP_INTERRUPT
275 #define PMC_CAP_LAST PMC_CAP_CASCADE
280 * These are generated from the definitions in "dev/hwpmc/pmc_events.h".
285 #undef __PMC_EV_BLOCK
286 #define __PMC_EV_BLOCK(C,V) PMC_EV_ ## C ## __BLOCK_START = (V) - 1 ,
287 #define __PMC_EV(C,N) PMC_EV_ ## C ## _ ## N ,
292 * PMC SYSCALL INTERFACE
296 * "PMC_OPS" -- these are the commands recognized by the kernel
297 * module, and are used when performing a system call from userland.
299 #define __PMC_OPS() \
300 __PMC_OP(CONFIGURELOG, "Set log file") \
301 __PMC_OP(FLUSHLOG, "Flush log file") \
302 __PMC_OP(GETCPUINFO, "Get system CPU information") \
303 __PMC_OP(GETDRIVERSTATS, "Get driver statistics") \
304 __PMC_OP(GETMODULEVERSION, "Get module version") \
305 __PMC_OP(GETPMCINFO, "Get per-cpu PMC information") \
306 __PMC_OP(PMCADMIN, "Set PMC state") \
307 __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC") \
308 __PMC_OP(PMCATTACH, "Attach a PMC to a process") \
309 __PMC_OP(PMCDETACH, "Detach a PMC from a process") \
310 __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
311 __PMC_OP(PMCRELEASE, "Release a PMC") \
312 __PMC_OP(PMCRW, "Read/Set a PMC") \
313 __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
314 __PMC_OP(PMCSTART, "Start a PMC") \
315 __PMC_OP(PMCSTOP, "Stop a PMC") \
316 __PMC_OP(WRITELOG, "Write a cookie to the log file") \
317 __PMC_OP(CLOSELOG, "Close log file") \
318 __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list")
323 #define __PMC_OP(N, D) PMC_OP_##N,
329 * Flags used in operations on PMCs.
332 #define PMC_F_FORCE 0x00000001 /*OP ADMIN force operation */
333 #define PMC_F_DESCENDANTS 0x00000002 /*OP ALLOCATE track descendants */
334 #define PMC_F_LOG_PROCCSW 0x00000004 /*OP ALLOCATE track ctx switches */
335 #define PMC_F_LOG_PROCEXIT 0x00000008 /*OP ALLOCATE log proc exits */
336 #define PMC_F_NEWVALUE 0x00000010 /*OP RW write new value */
337 #define PMC_F_OLDVALUE 0x00000020 /*OP RW get old value */
338 #define PMC_F_KGMON 0x00000040 /*OP ALLOCATE kgmon(8) profiling */
340 #define PMC_F_CALLCHAIN 0x00000080 /*OP ALLOCATE capture callchains */
343 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/
344 #define PMC_F_NEEDS_LOGFILE 0x00020000 /*needs log file */
345 #define PMC_F_ATTACH_DONE 0x00040000 /*attached at least once */
347 #define PMC_CALLCHAIN_DEPTH_MAX 32
349 #define PMC_CC_F_USERSPACE 0x01 /*userspace callchain*/
352 * Cookies used to denote allocated PMCs, and the values of PMCs.
355 typedef uint32_t pmc_id_t;
356 typedef uint64_t pmc_value_t;
358 #define PMC_ID_INVALID (~ (pmc_id_t) 0)
361 * PMC IDs have the following format:
363 * +--------+----------+-----------+-----------+
364 * | CPU | PMC MODE | PMC CLASS | ROW INDEX |
365 * +--------+----------+-----------+-----------+
367 * where each field is 8 bits wide. Field 'CPU' is set to the
368 * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode
369 * PMCs. Field 'PMC MODE' is the allocated PMC mode. Field 'PMC
370 * CLASS' is the class of the PMC. Field 'ROW INDEX' is the row index
373 * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total
374 * number of hardware PMCs on this cpu.
378 #define PMC_ID_TO_ROWINDEX(ID) ((ID) & 0xFF)
379 #define PMC_ID_TO_CLASS(ID) (((ID) & 0xFF00) >> 8)
380 #define PMC_ID_TO_MODE(ID) (((ID) & 0xFF0000) >> 16)
381 #define PMC_ID_TO_CPU(ID) (((ID) & 0xFF000000) >> 24)
382 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX) \
383 ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) | \
384 (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF))
387 * Data structures for system calls supported by the pmc driver.
393 * Allocate a PMC on the named CPU.
396 #define PMC_CPU_ANY ~0
398 struct pmc_op_pmcallocate {
399 uint32_t pm_caps; /* PMC_CAP_* */
400 uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
401 enum pmc_class pm_class; /* class of PMC desired */
402 enum pmc_event pm_ev; /* [enum pmc_event] desired */
403 uint32_t pm_flags; /* additional modifiers PMC_F_* */
404 enum pmc_mode pm_mode; /* desired mode */
405 pmc_id_t pm_pmcid; /* [return] process pmc id */
407 union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */
413 * Set the administrative state (i.e., whether enabled or disabled) of
414 * a PMC 'pm_pmc' on CPU 'pm_cpu'. Note that 'pm_pmc' specifies an
415 * absolute PMC number and need not have been first allocated by the
419 struct pmc_op_pmcadmin {
420 int pm_cpu; /* CPU# */
421 uint32_t pm_flags; /* flags */
422 int pm_pmc; /* PMC# */
423 enum pmc_state pm_state; /* desired state */
427 * OP PMCATTACH / OP PMCDETACH
429 * Attach/detach a PMC and a process.
432 struct pmc_op_pmcattach {
433 pmc_id_t pm_pmc; /* PMC to attach to */
434 pid_t pm_pid; /* target process */
440 * Set the sampling rate (i.e., the reload count) for statistical counters.
441 * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE.
444 struct pmc_op_pmcsetcount {
445 pmc_value_t pm_count; /* initial/sample count */
446 pmc_id_t pm_pmcid; /* PMC id to set */
453 * Read the value of a PMC named by 'pm_pmcid'. 'pm_pmcid' needs
454 * to have been previously allocated using PMCALLOCATE.
458 struct pmc_op_pmcrw {
459 uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
460 pmc_id_t pm_pmcid; /* pmc id */
461 pmc_value_t pm_value; /* new&returned value */
468 * retrieve PMC state for a named CPU. The caller is expected to
469 * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
474 char pm_name[PMC_NAME_MAX]; /* pmc name */
475 enum pmc_class pm_class; /* enum pmc_class */
476 int pm_enabled; /* whether enabled */
477 enum pmc_disp pm_rowdisp; /* FREE, THREAD or STANDLONE */
478 pid_t pm_ownerpid; /* owner, or -1 */
479 enum pmc_mode pm_mode; /* current mode [enum pmc_mode] */
480 enum pmc_event pm_event; /* current event */
481 uint32_t pm_flags; /* current flags */
482 pmc_value_t pm_reloadcount; /* sampling counters only */
485 struct pmc_op_getpmcinfo {
486 int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
487 struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
494 * Retrieve system CPU information.
498 struct pmc_classinfo {
499 enum pmc_class pm_class; /* class id */
500 uint32_t pm_caps; /* counter capabilities */
501 uint32_t pm_width; /* width of the PMC */
502 uint32_t pm_num; /* number of PMCs in class */
505 struct pmc_op_getcpuinfo {
506 enum pmc_cputype pm_cputype; /* what kind of CPU */
507 uint32_t pm_ncpu; /* max CPU number */
508 uint32_t pm_npmc; /* #PMCs per CPU */
509 uint32_t pm_nclass; /* #classes of PMCs */
510 struct pmc_classinfo pm_classes[PMC_CLASS_MAX];
516 * Configure a log file for writing system-wide statistics to.
519 struct pmc_op_configurelog {
521 int pm_logfd; /* logfile fd (or -1) */
527 * Retrieve pmc(4) driver-wide statistics.
530 struct pmc_op_getdriverstats {
531 int pm_intr_ignored; /* #interrupts ignored */
532 int pm_intr_processed; /* #interrupts processed */
533 int pm_intr_bufferfull; /* #interrupts with ENOSPC */
534 int pm_syscalls; /* #syscalls */
535 int pm_syscall_errors; /* #syscalls with errors */
536 int pm_buffer_requests; /* #buffer requests */
537 int pm_buffer_requests_failed; /* #failed buffer requests */
538 int pm_log_sweeps; /* #sample buffer processing passes */
542 * OP RELEASE / OP START / OP STOP
544 * Simple operations on a PMC id.
547 struct pmc_op_simple {
554 * Flush the current log buffer and write 4 bytes of user data to it.
557 struct pmc_op_writelog {
558 uint32_t pm_userdata;
564 * Retrieve the machine specific address assoicated with the allocated
565 * PMC. This number can be used subsequently with a read-performance-counter
569 struct pmc_op_getmsr {
570 uint32_t pm_msr; /* machine specific address */
571 pmc_id_t pm_pmcid; /* allocated pmc id */
577 * Retrieve a PMC dynamic class events list.
580 struct pmc_dyn_event_descr {
581 char pm_ev_name[PMC_NAME_MAX];
582 enum pmc_event pm_ev_code;
585 struct pmc_op_getdyneventinfo {
586 enum pmc_class pm_class;
587 unsigned int pm_nevent;
588 struct pmc_dyn_event_descr pm_events[PMC_EV_DYN_COUNT];
593 #include <sys/malloc.h>
594 #include <sys/sysctl.h>
596 #include <machine/frame.h>
598 #define PMC_HASH_SIZE 16
599 #define PMC_MTXPOOL_SIZE 32
600 #define PMC_LOG_BUFFER_SIZE 4
601 #define PMC_NLOGBUFFERS 64
602 #define PMC_NSAMPLES 512
603 #define PMC_CALLCHAIN_DEPTH 8
605 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "."
610 * (b) - pmc_bufferlist_mtx (spin lock)
611 * (k) - pmc_kthread_mtx (sleep lock)
612 * (o) - po->po_mtx (spin lock)
619 struct pmc_syscall_args {
620 register_t pmop_code; /* one of PMC_OP_* */
621 void *pmop_data; /* syscall parameter */
625 * Interface to processor specific s1tuff
631 * Machine independent (i.e., the common parts) of a human readable
636 char pd_name[PMC_NAME_MAX]; /* name */
637 uint32_t pd_caps; /* capabilities */
638 enum pmc_class pd_class; /* class of the PMC */
639 uint32_t pd_width; /* width in bits */
645 * This structure records all the target processes associated with a
650 LIST_ENTRY(pmc_target) pt_next;
651 struct pmc_process *pt_process; /* target descriptor */
657 * Describes each allocated PMC.
659 * Each PMC has precisely one owner, namely the process that allocated
662 * A PMC may be attached to multiple target processes. The
663 * 'pm_targets' field links all the target processes being monitored
666 * The 'pm_savedvalue' field is protected by a mutex.
668 * On a multi-cpu machine, multiple target threads associated with a
669 * process-virtual PMC could be concurrently executing on different
670 * CPUs. The 'pm_runcount' field is atomically incremented every time
671 * the PMC gets scheduled on a CPU and atomically decremented when it
672 * get descheduled. Deletion of a PMC is only permitted when this
678 LIST_HEAD(,pmc_target) pm_targets; /* list of target processes */
679 LIST_ENTRY(pmc) pm_next; /* owner's list */
682 * System-wide PMCs are allocated on a CPU and are not moved
683 * around. For system-wide PMCs we record the CPU the PMC was
684 * allocated on in the 'CPU' field of the pmc ID.
686 * Virtual PMCs run on whichever CPU is currently executing
687 * their targets' threads. For these PMCs we need to save
688 * their current PMC counter values when they are taken off
693 pmc_value_t pm_savedvalue; /* Virtual PMCS */
697 * For sampling mode PMCs, we keep track of the PMC's "reload
698 * count", which is the counter value to be loaded in when
699 * arming the PMC for the next counting session. For counting
700 * modes on PMCs that are read-only (e.g., the x86 TSC), we
701 * keep track of the initial value at the start of
702 * counting-mode operation.
706 pmc_value_t pm_reloadcount; /* sampling PMC modes */
707 pmc_value_t pm_initial; /* counting PMC modes */
710 uint32_t pm_stalled; /* marks stalled sampling PMCs */
711 uint32_t pm_caps; /* PMC capabilities */
712 enum pmc_event pm_event; /* event being measured */
713 uint32_t pm_flags; /* additional flags PMC_F_... */
714 struct pmc_owner *pm_owner; /* owner thread state */
715 int pm_runcount; /* #cpus currently on */
716 enum pmc_state pm_state; /* current PMC state */
719 * The PMC ID field encodes the row-index for the PMC, its
720 * mode, class and the CPU# associated with the PMC.
723 pmc_id_t pm_id; /* allocated PMC id */
726 union pmc_md_pmc pm_md;
730 * Accessor macros for 'struct pmc'
733 #define PMC_TO_MODE(P) PMC_ID_TO_MODE((P)->pm_id)
734 #define PMC_TO_CLASS(P) PMC_ID_TO_CLASS((P)->pm_id)
735 #define PMC_TO_ROWINDEX(P) PMC_ID_TO_ROWINDEX((P)->pm_id)
736 #define PMC_TO_CPU(P) PMC_ID_TO_CPU((P)->pm_id)
742 * Record a 'target' process being profiled.
744 * The target process being profiled could be different from the owner
745 * process which allocated the PMCs. Each target process descriptor
746 * is associated with NHWPMC 'struct pmc *' pointers. Each PMC at a
747 * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]'
748 * array. The size of this structure is thus PMC architecture
753 struct pmc_targetstate {
754 struct pmc *pp_pmc; /* target PMC */
755 pmc_value_t pp_pmcval; /* per-process value */
759 LIST_ENTRY(pmc_process) pp_next; /* hash chain */
760 int pp_refcnt; /* reference count */
761 uint32_t pp_flags; /* flags PMC_PP_* */
762 struct proc *pp_proc; /* target thread */
763 struct pmc_targetstate pp_pmcs[]; /* NHWPMCs */
766 #define PMC_PP_ENABLE_MSR_ACCESS 0x00000001
771 * We associate a PMC with an 'owner' process.
773 * A process can be associated with 0..NCPUS*NHWPMC PMCs during its
774 * lifetime, where NCPUS is the numbers of CPUS in the system and
775 * NHWPMC is the number of hardware PMCs per CPU. These are
776 * maintained in the list headed by the 'po_pmcs' to save on space.
781 LIST_ENTRY(pmc_owner) po_next; /* hash chain */
782 LIST_ENTRY(pmc_owner) po_ssnext; /* list of SS PMC owners */
783 LIST_HEAD(, pmc) po_pmcs; /* owned PMC list */
784 TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */
785 struct mtx po_mtx; /* spin lock for (o) */
786 struct proc *po_owner; /* owner proc */
787 uint32_t po_flags; /* (k) flags PMC_PO_* */
788 struct proc *po_kthread; /* (k) helper kthread */
789 struct pmclog_buffer *po_curbuf; /* current log buffer */
790 struct file *po_file; /* file reference */
791 int po_error; /* recorded error */
792 short po_sscount; /* # SS PMCs owned */
793 short po_logprocmaps; /* global mappings done */
796 #define PMC_PO_OWNS_LOGFILE 0x00000001 /* has a log file */
797 #define PMC_PO_SHUTDOWN 0x00000010 /* in the process of shutdown */
798 #define PMC_PO_INITIAL_MAPPINGS_DONE 0x00000020
801 * struct pmc_hw -- describe the state of the PMC hardware
803 * When in use, a HW PMC is associated with one allocated 'struct pmc'
804 * pointed to by field 'phw_pmc'. When inactive, this field is NULL.
806 * On an SMP box, one or more HW PMC's in process virtual mode with
807 * the same 'phw_pmc' could be executing on different CPUs. In order
808 * to handle this case correctly, we need to ensure that only
809 * incremental counts get added to the saved value in the associated
810 * 'struct pmc'. The 'phw_save' field is used to keep the saved PMC
811 * value at the time the hardware is started during this context
812 * switch (i.e., the difference between the new (hardware) count and
813 * the saved count is atomically added to the count field in 'struct
814 * pmc' at context switch time).
819 uint32_t phw_state; /* see PHW_* macros below */
820 struct pmc *phw_pmc; /* current thread PMC */
823 #define PMC_PHW_RI_MASK 0x000000FF
824 #define PMC_PHW_CPU_SHIFT 8
825 #define PMC_PHW_CPU_MASK 0x0000FF00
826 #define PMC_PHW_FLAGS_SHIFT 16
827 #define PMC_PHW_FLAGS_MASK 0xFFFF0000
829 #define PMC_PHW_INDEX_TO_STATE(ri) ((ri) & PMC_PHW_RI_MASK)
830 #define PMC_PHW_STATE_TO_INDEX(state) ((state) & PMC_PHW_RI_MASK)
831 #define PMC_PHW_CPU_TO_STATE(cpu) (((cpu) << PMC_PHW_CPU_SHIFT) & \
833 #define PMC_PHW_STATE_TO_CPU(state) (((state) & PMC_PHW_CPU_MASK) >> \
835 #define PMC_PHW_FLAGS_TO_STATE(flags) (((flags) << PMC_PHW_FLAGS_SHIFT) & \
837 #define PMC_PHW_STATE_TO_FLAGS(state) (((state) & PMC_PHW_FLAGS_MASK) >> \
839 #define PMC_PHW_FLAG_IS_ENABLED (PMC_PHW_FLAGS_TO_STATE(0x01))
840 #define PMC_PHW_FLAG_IS_SHAREABLE (PMC_PHW_FLAGS_TO_STATE(0x02))
845 * Space for N (tunable) PC samples and associated control data.
849 uint16_t ps_nsamples; /* callchain depth */
850 uint8_t ps_cpu; /* cpu number */
851 uint8_t ps_flags; /* other flags */
852 pid_t ps_pid; /* process PID or -1 */
853 struct thread *ps_td; /* which thread */
854 struct pmc *ps_pmc; /* interrupting PMC */
855 uintptr_t *ps_pc; /* (const) callchain start */
858 #define PMC_SAMPLE_FREE ((uint16_t) 0)
859 #define PMC_SAMPLE_INUSE ((uint16_t) 0xFFFF)
861 struct pmc_samplebuffer {
862 struct pmc_sample * volatile ps_read; /* read pointer */
863 struct pmc_sample * volatile ps_write; /* write pointer */
864 uintptr_t *ps_callchains; /* all saved call chains */
865 struct pmc_sample *ps_fence; /* one beyond ps_samples[] */
866 struct pmc_sample ps_samples[]; /* array of sample entries */
871 * struct pmc_cpustate
873 * A CPU is modelled as a collection of HW PMCs with space for additional
878 uint32_t pc_state; /* physical cpu number + flags */
879 struct pmc_samplebuffer *pc_sb[2]; /* space for samples */
880 struct pmc_hw *pc_hwpmcs[]; /* 'npmc' pointers */
883 #define PMC_PCPU_CPU_MASK 0x000000FF
884 #define PMC_PCPU_FLAGS_MASK 0xFFFFFF00
885 #define PMC_PCPU_FLAGS_SHIFT 8
886 #define PMC_PCPU_STATE_TO_CPU(S) ((S) & PMC_PCPU_CPU_MASK)
887 #define PMC_PCPU_STATE_TO_FLAGS(S) (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT)
888 #define PMC_PCPU_FLAGS_TO_STATE(F) (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK)
889 #define PMC_PCPU_CPU_TO_STATE(C) ((C) & PMC_PCPU_CPU_MASK)
890 #define PMC_PCPU_FLAG_HTT (PMC_PCPU_FLAGS_TO_STATE(0x1))
895 * CPU binding information.
899 int pb_bound; /* is bound? */
900 int pb_cpu; /* if so, to which CPU */
907 * struct pmc_classdep
909 * PMC class-dependent operations.
911 struct pmc_classdep {
912 uint32_t pcd_caps; /* class capabilities */
913 enum pmc_class pcd_class; /* class id */
914 int pcd_num; /* number of PMCs */
915 int pcd_ri; /* row index of the first PMC in class */
916 int pcd_width; /* width of the PMC */
918 /* configuring/reading/writing the hardware PMCs */
919 int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
920 int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
921 int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
922 int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
924 /* pmc allocation/release */
925 int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
926 const struct pmc_op_pmcallocate *_a);
927 int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
929 /* starting and stopping PMCs */
930 int (*pcd_start_pmc)(int _cpu, int _ri);
931 int (*pcd_stop_pmc)(int _cpu, int _ri);
934 int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi,
937 /* class-dependent initialization & finalization */
938 int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
939 int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
941 /* machine-specific interface */
942 int (*pcd_get_msr)(int _ri, uint32_t *_msr);
948 * Machine dependent bits needed per CPU type.
952 uint32_t pmd_cputype; /* from enum pmc_cputype */
953 uint32_t pmd_npmc; /* number of PMCs per CPU */
954 uint32_t pmd_nclass; /* number of PMC classes present */
957 * Machine dependent methods.
960 /* per-cpu initialization and finalization */
961 int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
962 int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
964 /* thread context switch in/out */
965 int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
966 int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp);
968 /* handle a PMC interrupt */
969 int (*pmd_intr)(int _cpu, struct trapframe *_tf);
972 * PMC class dependent information.
974 struct pmc_classdep pmd_classdep[];
978 * Per-CPU state. This is an array of 'mp_ncpu' pointers
979 * to struct pmc_cpu descriptors.
982 extern struct pmc_cpu **pmc_pcpu;
984 /* driver statistics */
985 extern struct pmc_op_getdriverstats pmc_stats;
989 /* debug flags, major flag groups */
990 struct pmc_debugflags {
1002 extern struct pmc_debugflags pmc_debugflags;
1004 #define PMC_DEBUG_STRSIZE 128
1005 #define PMC_DEBUG_DEFAULT_FLAGS { 0, 0, 0, 0, 0, 0, 0, 0 }
1007 #define PMCDBG(M,N,L,F,...) do { \
1008 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
1009 printf(#M ":" #N ":" #L ": " F "\n", __VA_ARGS__); \
1013 #define PMC_DEBUG_MAJ_CPU 0 /* cpu switches */
1014 #define PMC_DEBUG_MAJ_CSW 1 /* context switches */
1015 #define PMC_DEBUG_MAJ_LOG 2 /* logging */
1016 #define PMC_DEBUG_MAJ_MDP 3 /* machine dependent */
1017 #define PMC_DEBUG_MAJ_MOD 4 /* misc module infrastructure */
1018 #define PMC_DEBUG_MAJ_OWN 5 /* owner */
1019 #define PMC_DEBUG_MAJ_PMC 6 /* pmc management */
1020 #define PMC_DEBUG_MAJ_PRC 7 /* processes */
1021 #define PMC_DEBUG_MAJ_SAM 8 /* sampling */
1025 /* Common (8 bits) */
1026 #define PMC_DEBUG_MIN_ALL 0 /* allocation */
1027 #define PMC_DEBUG_MIN_REL 1 /* release */
1028 #define PMC_DEBUG_MIN_OPS 2 /* ops: start, stop, ... */
1029 #define PMC_DEBUG_MIN_INI 3 /* init */
1030 #define PMC_DEBUG_MIN_FND 4 /* find */
1033 #define PMC_DEBUG_MIN_PMH 14 /* pmc_hook */
1034 #define PMC_DEBUG_MIN_PMS 15 /* pmc_syscall */
1037 #define PMC_DEBUG_MIN_ORM 8 /* owner remove */
1038 #define PMC_DEBUG_MIN_OMR 9 /* owner maybe remove */
1041 #define PMC_DEBUG_MIN_TLK 8 /* link target */
1042 #define PMC_DEBUG_MIN_TUL 9 /* unlink target */
1043 #define PMC_DEBUG_MIN_EXT 10 /* process exit */
1044 #define PMC_DEBUG_MIN_EXC 11 /* process exec */
1045 #define PMC_DEBUG_MIN_FRK 12 /* process fork */
1046 #define PMC_DEBUG_MIN_ATT 13 /* attach/detach */
1047 #define PMC_DEBUG_MIN_SIG 14 /* signalling */
1049 /* CONTEXT SWITCHES */
1050 #define PMC_DEBUG_MIN_SWI 8 /* switch in */
1051 #define PMC_DEBUG_MIN_SWO 9 /* switch out */
1054 #define PMC_DEBUG_MIN_REG 8 /* pmc register */
1055 #define PMC_DEBUG_MIN_ALR 9 /* allocate row */
1057 /* MACHINE DEPENDENT LAYER */
1058 #define PMC_DEBUG_MIN_REA 8 /* read */
1059 #define PMC_DEBUG_MIN_WRI 9 /* write */
1060 #define PMC_DEBUG_MIN_CFG 10 /* config */
1061 #define PMC_DEBUG_MIN_STA 11 /* start */
1062 #define PMC_DEBUG_MIN_STO 12 /* stop */
1063 #define PMC_DEBUG_MIN_INT 13 /* interrupts */
1066 #define PMC_DEBUG_MIN_BND 8 /* bind */
1067 #define PMC_DEBUG_MIN_SEL 9 /* select */
1070 #define PMC_DEBUG_MIN_GTB 8 /* get buf */
1071 #define PMC_DEBUG_MIN_SIO 9 /* schedule i/o */
1072 #define PMC_DEBUG_MIN_FLS 10 /* flush */
1073 #define PMC_DEBUG_MIN_SAM 11 /* sample */
1074 #define PMC_DEBUG_MIN_CLO 12 /* close */
1077 #define PMCDBG(M,N,L,F,...) /* nothing */
1080 /* declare a dedicated memory pool */
1081 MALLOC_DECLARE(M_PMC);
1087 struct pmc_mdep *pmc_md_initialize(void); /* MD init function */
1088 void pmc_md_finalize(struct pmc_mdep *_md); /* MD fini function */
1089 int pmc_getrowdisp(int _ri);
1090 int pmc_process_interrupt(int _cpu, int _soft, struct pmc *_pm,
1091 struct trapframe *_tf, int _inuserspace);
1092 int pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples,
1093 struct trapframe *_tf);
1094 int pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples,
1095 struct trapframe *_tf);
1096 struct pmc_mdep *pmc_mdep_alloc(int nclasses);
1097 void pmc_mdep_free(struct pmc_mdep *md);
1098 #endif /* _KERNEL */
1099 #endif /* _SYS_PMC_H_ */