2 * Copyright (c) 2003-2008, Joseph Koshy
3 * Copyright (c) 2007 The FreeBSD Foundation
6 * Portions of this software were developed by A. Joseph Koshy under
7 * sponsorship from the FreeBSD Foundation and Google, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 #include <dev/hwpmc/pmc_events.h>
38 #include <machine/pmc_mdep.h>
39 #include <machine/profile.h>
41 #define PMC_MODULE_NAME "hwpmc"
42 #define PMC_NAME_MAX 64 /* HW counter name size */
43 #define PMC_CLASS_MAX 8 /* max #classes of PMCs per-system */
46 * Kernel<->userland API version number [MMmmpppp]
48 * Major numbers are to be incremented when an incompatible change to
49 * the ABI occurs that older clients will not be able to handle.
51 * Minor numbers are incremented when a backwards compatible change
52 * occurs that allows older correct programs to run unchanged. For
53 * example, when support for a new PMC type is added.
55 * The patch version is incremented for every bug fix.
57 #define PMC_VERSION_MAJOR 0x03
58 #define PMC_VERSION_MINOR 0x01
59 #define PMC_VERSION_PATCH 0x0000
61 #define PMC_VERSION (PMC_VERSION_MAJOR << 24 | \
62 PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH)
65 * Kinds of CPUs known.
67 * We keep track of CPU variants that need to be distinguished in
68 * some way for PMC operations. CPU names are grouped by manufacturer
69 * and numbered sparsely in order to minimize changes to the ABI involved
70 * when new CPUs are added.
73 #define __PMC_CPUS() \
74 __PMC_CPU(AMD_K7, 0x00, "AMD K7") \
75 __PMC_CPU(AMD_K8, 0x01, "AMD K8") \
76 __PMC_CPU(ARMV7, 0x500, "ARMv7") \
77 __PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \
78 __PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \
79 __PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \
80 __PMC_CPU(INTEL_PII, 0x83, "Intel Pentium II") \
81 __PMC_CPU(INTEL_PIII, 0x84, "Intel Pentium III") \
82 __PMC_CPU(INTEL_PM, 0x85, "Intel Pentium M") \
83 __PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \
84 __PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \
85 __PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \
86 __PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \
87 __PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom") \
88 __PMC_CPU(INTEL_COREI7, 0x8B, "Intel Core i7") \
89 __PMC_CPU(INTEL_WESTMERE, 0x8C, "Intel Westmere") \
90 __PMC_CPU(INTEL_SANDYBRIDGE, 0x8D, "Intel Sandy Bridge") \
91 __PMC_CPU(INTEL_IVYBRIDGE, 0x8E, "Intel Ivy Bridge") \
92 __PMC_CPU(INTEL_SANDYBRIDGE_XEON, 0x8F, "Intel Sandy Bridge Xeon") \
93 __PMC_CPU(INTEL_IVYBRIDGE_XEON, 0x90, "Intel Ivy Bridge Xeon") \
94 __PMC_CPU(INTEL_HASWELL, 0x91, "Intel Haswell") \
95 __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \
96 __PMC_CPU(INTEL_NEHALEM_EX, 0x93, "Intel Nehalem Xeon 7500") \
97 __PMC_CPU(INTEL_WESTMERE_EX, 0x94, "Intel Westmere Xeon E7") \
98 __PMC_CPU(INTEL_HASWELL_XEON, 0x95, "Intel Haswell Xeon E5 v3") \
99 __PMC_CPU(INTEL_BROADWELL, 0x96, "Intel Broadwell") \
100 __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \
101 __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \
102 __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \
103 __PMC_CPU(MIPS_74K, 0x202, "MIPS 74K") \
104 __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \
105 __PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \
106 __PMC_CPU(PPC_MPC85XX, 0x340, "Freescale PowerPC MPC85XX") \
107 __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \
108 __PMC_CPU(GENERIC, 0x400, "Generic")
112 #define __PMC_CPU(S,V,D) PMC_CPU_##S = V,
116 #define PMC_CPU_FIRST PMC_CPU_AMD_K7
117 #define PMC_CPU_LAST PMC_CPU_GENERIC
123 #define __PMC_CLASSES() \
124 __PMC_CLASS(TSC) /* CPU Timestamp counter */ \
125 __PMC_CLASS(K7) /* AMD K7 performance counters */ \
126 __PMC_CLASS(K8) /* AMD K8 performance counters */ \
127 __PMC_CLASS(P5) /* Intel Pentium counters */ \
128 __PMC_CLASS(P6) /* Intel Pentium Pro counters */ \
129 __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \
130 __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \
131 __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \
132 __PMC_CLASS(UCF) /* Intel Uncore fixed function */ \
133 __PMC_CLASS(UCP) /* Intel Uncore programmable */ \
134 __PMC_CLASS(XSCALE) /* Intel XScale counters */ \
135 __PMC_CLASS(ARMV7) /* ARMv7 */ \
136 __PMC_CLASS(MIPS24K) /* MIPS 24K */ \
137 __PMC_CLASS(OCTEON) /* Cavium Octeon */ \
138 __PMC_CLASS(MIPS74K) /* MIPS 74K */ \
139 __PMC_CLASS(PPC7450) /* Motorola MPC7450 class */ \
140 __PMC_CLASS(PPC970) /* IBM PowerPC 970 class */ \
141 __PMC_CLASS(E500) /* Freescale e500 class */ \
142 __PMC_CLASS(SOFT) /* Software events */
146 #define __PMC_CLASS(N) PMC_CLASS_##N ,
150 #define PMC_CLASS_FIRST PMC_CLASS_TSC
151 #define PMC_CLASS_LAST PMC_CLASS_SOFT
154 * A PMC can be in the following states:
157 * DISABLED -- administratively prohibited from being used.
158 * FREE -- HW available for use
160 * ALLOCATED -- allocated
161 * STOPPED -- allocated, but not counting events
162 * RUNNING -- allocated, and in operation; 'pm_runcount'
163 * holds the number of CPUs using this PMC at
165 * DELETED -- being destroyed
168 #define __PMC_HWSTATES() \
169 __PMC_STATE(DISABLED) \
172 #define __PMC_SWSTATES() \
173 __PMC_STATE(ALLOCATED) \
174 __PMC_STATE(STOPPED) \
175 __PMC_STATE(RUNNING) \
178 #define __PMC_STATES() \
184 #define __PMC_STATE(S) PMC_STATE_##S,
189 #define PMC_STATE_FIRST PMC_STATE_DISABLED
190 #define PMC_STATE_LAST PMC_STATE_DELETED
193 * An allocated PMC may used as a 'global' counter or as a
194 * 'thread-private' one. Each such mode of use can be in either
195 * statistical sampling mode or in counting mode. Thus a PMC in use
197 * SS i.e., SYSTEM STATISTICAL -- system-wide statistical profiling
198 * SC i.e., SYSTEM COUNTER -- system-wide counting mode
199 * TS i.e., THREAD STATISTICAL -- thread virtual, statistical profiling
200 * TC i.e., THREAD COUNTER -- thread virtual, counting mode
202 * Statistical profiling modes rely on the PMC periodically delivering
203 * a interrupt to the CPU (when the configured number of events have
204 * been measured), so the PMC must have the ability to generate
207 * In counting modes, the PMC counts its configured events, with the
208 * value of the PMC being read whenever needed by its owner process.
210 * The thread specific modes "virtualize" the PMCs -- the PMCs appear
211 * to be thread private and count events only when the profiled thread
212 * actually executes on the CPU.
214 * The system-wide "global" modes keep the PMCs running all the time
215 * and are used to measure the behaviour of the whole system.
218 #define __PMC_MODES() \
226 #define __PMC_MODE(M,N) PMC_MODE_##M = N,
230 #define PMC_MODE_FIRST PMC_MODE_SS
231 #define PMC_MODE_LAST PMC_MODE_TC
233 #define PMC_IS_COUNTING_MODE(mode) \
234 ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC)
235 #define PMC_IS_SYSTEM_MODE(mode) \
236 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC)
237 #define PMC_IS_SAMPLING_MODE(mode) \
238 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS)
239 #define PMC_IS_VIRTUAL_MODE(mode) \
240 ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC)
243 * PMC row disposition
246 #define __PMC_DISPOSITIONS(N) \
247 __PMC_DISP(STANDALONE) /* global/disabled counters */ \
248 __PMC_DISP(FREE) /* free/available */ \
249 __PMC_DISP(THREAD) /* thread-virtual PMCs */ \
250 __PMC_DISP(UNKNOWN) /* sentinel */
254 #define __PMC_DISP(D) PMC_DISP_##D ,
258 #define PMC_DISP_FIRST PMC_DISP_STANDALONE
259 #define PMC_DISP_LAST PMC_DISP_THREAD
262 * Counter capabilities
264 * __PMC_CAPS(NAME, VALUE, DESCRIPTION)
267 #define __PMC_CAPS() \
268 __PMC_CAP(INTERRUPT, 0, "generate interrupts") \
269 __PMC_CAP(USER, 1, "count user-mode events") \
270 __PMC_CAP(SYSTEM, 2, "count system-mode events") \
271 __PMC_CAP(EDGE, 3, "do edge detection of events") \
272 __PMC_CAP(THRESHOLD, 4, "ignore events below a threshold") \
273 __PMC_CAP(READ, 5, "read PMC counter") \
274 __PMC_CAP(WRITE, 6, "reprogram PMC counter") \
275 __PMC_CAP(INVERT, 7, "invert comparision sense") \
276 __PMC_CAP(QUALIFIER, 8, "further qualify monitored events") \
277 __PMC_CAP(PRECISE, 9, "perform precise sampling") \
278 __PMC_CAP(TAGGING, 10, "tag upstream events") \
279 __PMC_CAP(CASCADE, 11, "cascade counters")
284 #define __PMC_CAP(NAME, VALUE, DESCR) PMC_CAP_##NAME = (1 << VALUE) ,
288 #define PMC_CAP_FIRST PMC_CAP_INTERRUPT
289 #define PMC_CAP_LAST PMC_CAP_CASCADE
294 * These are generated from the definitions in "dev/hwpmc/pmc_events.h".
299 #undef __PMC_EV_BLOCK
300 #define __PMC_EV_BLOCK(C,V) PMC_EV_ ## C ## __BLOCK_START = (V) - 1 ,
301 #define __PMC_EV(C,N) PMC_EV_ ## C ## _ ## N ,
306 * PMC SYSCALL INTERFACE
310 * "PMC_OPS" -- these are the commands recognized by the kernel
311 * module, and are used when performing a system call from userland.
313 #define __PMC_OPS() \
314 __PMC_OP(CONFIGURELOG, "Set log file") \
315 __PMC_OP(FLUSHLOG, "Flush log file") \
316 __PMC_OP(GETCPUINFO, "Get system CPU information") \
317 __PMC_OP(GETDRIVERSTATS, "Get driver statistics") \
318 __PMC_OP(GETMODULEVERSION, "Get module version") \
319 __PMC_OP(GETPMCINFO, "Get per-cpu PMC information") \
320 __PMC_OP(PMCADMIN, "Set PMC state") \
321 __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC") \
322 __PMC_OP(PMCATTACH, "Attach a PMC to a process") \
323 __PMC_OP(PMCDETACH, "Detach a PMC from a process") \
324 __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \
325 __PMC_OP(PMCRELEASE, "Release a PMC") \
326 __PMC_OP(PMCRW, "Read/Set a PMC") \
327 __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \
328 __PMC_OP(PMCSTART, "Start a PMC") \
329 __PMC_OP(PMCSTOP, "Stop a PMC") \
330 __PMC_OP(WRITELOG, "Write a cookie to the log file") \
331 __PMC_OP(CLOSELOG, "Close log file") \
332 __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list")
337 #define __PMC_OP(N, D) PMC_OP_##N,
343 * Flags used in operations on PMCs.
346 #define PMC_F_FORCE 0x00000001 /*OP ADMIN force operation */
347 #define PMC_F_DESCENDANTS 0x00000002 /*OP ALLOCATE track descendants */
348 #define PMC_F_LOG_PROCCSW 0x00000004 /*OP ALLOCATE track ctx switches */
349 #define PMC_F_LOG_PROCEXIT 0x00000008 /*OP ALLOCATE log proc exits */
350 #define PMC_F_NEWVALUE 0x00000010 /*OP RW write new value */
351 #define PMC_F_OLDVALUE 0x00000020 /*OP RW get old value */
352 #define PMC_F_KGMON 0x00000040 /*OP ALLOCATE kgmon(8) profiling */
354 #define PMC_F_CALLCHAIN 0x00000080 /*OP ALLOCATE capture callchains */
357 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/
358 #define PMC_F_NEEDS_LOGFILE 0x00020000 /*needs log file */
359 #define PMC_F_ATTACH_DONE 0x00040000 /*attached at least once */
361 #define PMC_CALLCHAIN_DEPTH_MAX 128
363 #define PMC_CC_F_USERSPACE 0x01 /*userspace callchain*/
366 * Cookies used to denote allocated PMCs, and the values of PMCs.
369 typedef uint32_t pmc_id_t;
370 typedef uint64_t pmc_value_t;
372 #define PMC_ID_INVALID (~ (pmc_id_t) 0)
375 * PMC IDs have the following format:
377 * +--------+----------+-----------+-----------+
378 * | CPU | PMC MODE | PMC CLASS | ROW INDEX |
379 * +--------+----------+-----------+-----------+
381 * where each field is 8 bits wide. Field 'CPU' is set to the
382 * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode
383 * PMCs. Field 'PMC MODE' is the allocated PMC mode. Field 'PMC
384 * CLASS' is the class of the PMC. Field 'ROW INDEX' is the row index
387 * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total
388 * number of hardware PMCs on this cpu.
392 #define PMC_ID_TO_ROWINDEX(ID) ((ID) & 0xFF)
393 #define PMC_ID_TO_CLASS(ID) (((ID) & 0xFF00) >> 8)
394 #define PMC_ID_TO_MODE(ID) (((ID) & 0xFF0000) >> 16)
395 #define PMC_ID_TO_CPU(ID) (((ID) & 0xFF000000) >> 24)
396 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX) \
397 ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) | \
398 (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF))
401 * Data structures for system calls supported by the pmc driver.
407 * Allocate a PMC on the named CPU.
410 #define PMC_CPU_ANY ~0
412 struct pmc_op_pmcallocate {
413 uint32_t pm_caps; /* PMC_CAP_* */
414 uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */
415 enum pmc_class pm_class; /* class of PMC desired */
416 enum pmc_event pm_ev; /* [enum pmc_event] desired */
417 uint32_t pm_flags; /* additional modifiers PMC_F_* */
418 enum pmc_mode pm_mode; /* desired mode */
419 pmc_id_t pm_pmcid; /* [return] process pmc id */
421 union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */
427 * Set the administrative state (i.e., whether enabled or disabled) of
428 * a PMC 'pm_pmc' on CPU 'pm_cpu'. Note that 'pm_pmc' specifies an
429 * absolute PMC number and need not have been first allocated by the
433 struct pmc_op_pmcadmin {
434 int pm_cpu; /* CPU# */
435 uint32_t pm_flags; /* flags */
436 int pm_pmc; /* PMC# */
437 enum pmc_state pm_state; /* desired state */
441 * OP PMCATTACH / OP PMCDETACH
443 * Attach/detach a PMC and a process.
446 struct pmc_op_pmcattach {
447 pmc_id_t pm_pmc; /* PMC to attach to */
448 pid_t pm_pid; /* target process */
454 * Set the sampling rate (i.e., the reload count) for statistical counters.
455 * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE.
458 struct pmc_op_pmcsetcount {
459 pmc_value_t pm_count; /* initial/sample count */
460 pmc_id_t pm_pmcid; /* PMC id to set */
467 * Read the value of a PMC named by 'pm_pmcid'. 'pm_pmcid' needs
468 * to have been previously allocated using PMCALLOCATE.
472 struct pmc_op_pmcrw {
473 uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/
474 pmc_id_t pm_pmcid; /* pmc id */
475 pmc_value_t pm_value; /* new&returned value */
482 * retrieve PMC state for a named CPU. The caller is expected to
483 * allocate 'npmc' * 'struct pmc_info' bytes of space for the return
488 char pm_name[PMC_NAME_MAX]; /* pmc name */
489 enum pmc_class pm_class; /* enum pmc_class */
490 int pm_enabled; /* whether enabled */
491 enum pmc_disp pm_rowdisp; /* FREE, THREAD or STANDLONE */
492 pid_t pm_ownerpid; /* owner, or -1 */
493 enum pmc_mode pm_mode; /* current mode [enum pmc_mode] */
494 enum pmc_event pm_event; /* current event */
495 uint32_t pm_flags; /* current flags */
496 pmc_value_t pm_reloadcount; /* sampling counters only */
499 struct pmc_op_getpmcinfo {
500 int32_t pm_cpu; /* 0 <= cpu < mp_maxid */
501 struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */
508 * Retrieve system CPU information.
512 struct pmc_classinfo {
513 enum pmc_class pm_class; /* class id */
514 uint32_t pm_caps; /* counter capabilities */
515 uint32_t pm_width; /* width of the PMC */
516 uint32_t pm_num; /* number of PMCs in class */
519 struct pmc_op_getcpuinfo {
520 enum pmc_cputype pm_cputype; /* what kind of CPU */
521 uint32_t pm_ncpu; /* max CPU number */
522 uint32_t pm_npmc; /* #PMCs per CPU */
523 uint32_t pm_nclass; /* #classes of PMCs */
524 struct pmc_classinfo pm_classes[PMC_CLASS_MAX];
530 * Configure a log file for writing system-wide statistics to.
533 struct pmc_op_configurelog {
535 int pm_logfd; /* logfile fd (or -1) */
541 * Retrieve pmc(4) driver-wide statistics.
544 struct pmc_op_getdriverstats {
545 int pm_intr_ignored; /* #interrupts ignored */
546 int pm_intr_processed; /* #interrupts processed */
547 int pm_intr_bufferfull; /* #interrupts with ENOSPC */
548 int pm_syscalls; /* #syscalls */
549 int pm_syscall_errors; /* #syscalls with errors */
550 int pm_buffer_requests; /* #buffer requests */
551 int pm_buffer_requests_failed; /* #failed buffer requests */
552 int pm_log_sweeps; /* #sample buffer processing passes */
556 * OP RELEASE / OP START / OP STOP
558 * Simple operations on a PMC id.
561 struct pmc_op_simple {
568 * Flush the current log buffer and write 4 bytes of user data to it.
571 struct pmc_op_writelog {
572 uint32_t pm_userdata;
578 * Retrieve the machine specific address assoicated with the allocated
579 * PMC. This number can be used subsequently with a read-performance-counter
583 struct pmc_op_getmsr {
584 uint32_t pm_msr; /* machine specific address */
585 pmc_id_t pm_pmcid; /* allocated pmc id */
591 * Retrieve a PMC dynamic class events list.
594 struct pmc_dyn_event_descr {
595 char pm_ev_name[PMC_NAME_MAX];
596 enum pmc_event pm_ev_code;
599 struct pmc_op_getdyneventinfo {
600 enum pmc_class pm_class;
601 unsigned int pm_nevent;
602 struct pmc_dyn_event_descr pm_events[PMC_EV_DYN_COUNT];
607 #include <sys/malloc.h>
608 #include <sys/sysctl.h>
610 #include <machine/frame.h>
612 #define PMC_HASH_SIZE 1024
613 #define PMC_MTXPOOL_SIZE 2048
614 #define PMC_LOG_BUFFER_SIZE 4
615 #define PMC_NLOGBUFFERS 1024
616 #define PMC_NSAMPLES 1024
617 #define PMC_CALLCHAIN_DEPTH 32
619 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "."
624 * (b) - pmc_bufferlist_mtx (spin lock)
625 * (k) - pmc_kthread_mtx (sleep lock)
626 * (o) - po->po_mtx (spin lock)
633 struct pmc_syscall_args {
634 register_t pmop_code; /* one of PMC_OP_* */
635 void *pmop_data; /* syscall parameter */
639 * Interface to processor specific s1tuff
645 * Machine independent (i.e., the common parts) of a human readable
650 char pd_name[PMC_NAME_MAX]; /* name */
651 uint32_t pd_caps; /* capabilities */
652 enum pmc_class pd_class; /* class of the PMC */
653 uint32_t pd_width; /* width in bits */
659 * This structure records all the target processes associated with a
664 LIST_ENTRY(pmc_target) pt_next;
665 struct pmc_process *pt_process; /* target descriptor */
671 * Describes each allocated PMC.
673 * Each PMC has precisely one owner, namely the process that allocated
676 * A PMC may be attached to multiple target processes. The
677 * 'pm_targets' field links all the target processes being monitored
680 * The 'pm_savedvalue' field is protected by a mutex.
682 * On a multi-cpu machine, multiple target threads associated with a
683 * process-virtual PMC could be concurrently executing on different
684 * CPUs. The 'pm_runcount' field is atomically incremented every time
685 * the PMC gets scheduled on a CPU and atomically decremented when it
686 * get descheduled. Deletion of a PMC is only permitted when this
692 LIST_HEAD(,pmc_target) pm_targets; /* list of target processes */
693 LIST_ENTRY(pmc) pm_next; /* owner's list */
696 * System-wide PMCs are allocated on a CPU and are not moved
697 * around. For system-wide PMCs we record the CPU the PMC was
698 * allocated on in the 'CPU' field of the pmc ID.
700 * Virtual PMCs run on whichever CPU is currently executing
701 * their targets' threads. For these PMCs we need to save
702 * their current PMC counter values when they are taken off
707 pmc_value_t pm_savedvalue; /* Virtual PMCS */
711 * For sampling mode PMCs, we keep track of the PMC's "reload
712 * count", which is the counter value to be loaded in when
713 * arming the PMC for the next counting session. For counting
714 * modes on PMCs that are read-only (e.g., the x86 TSC), we
715 * keep track of the initial value at the start of
716 * counting-mode operation.
720 pmc_value_t pm_reloadcount; /* sampling PMC modes */
721 pmc_value_t pm_initial; /* counting PMC modes */
724 uint32_t pm_stalled; /* marks stalled sampling PMCs */
725 uint32_t pm_caps; /* PMC capabilities */
726 enum pmc_event pm_event; /* event being measured */
727 uint32_t pm_flags; /* additional flags PMC_F_... */
728 struct pmc_owner *pm_owner; /* owner thread state */
729 int pm_runcount; /* #cpus currently on */
730 enum pmc_state pm_state; /* current PMC state */
733 * The PMC ID field encodes the row-index for the PMC, its
734 * mode, class and the CPU# associated with the PMC.
737 pmc_id_t pm_id; /* allocated PMC id */
740 union pmc_md_pmc pm_md;
744 * Accessor macros for 'struct pmc'
747 #define PMC_TO_MODE(P) PMC_ID_TO_MODE((P)->pm_id)
748 #define PMC_TO_CLASS(P) PMC_ID_TO_CLASS((P)->pm_id)
749 #define PMC_TO_ROWINDEX(P) PMC_ID_TO_ROWINDEX((P)->pm_id)
750 #define PMC_TO_CPU(P) PMC_ID_TO_CPU((P)->pm_id)
756 * Record a 'target' process being profiled.
758 * The target process being profiled could be different from the owner
759 * process which allocated the PMCs. Each target process descriptor
760 * is associated with NHWPMC 'struct pmc *' pointers. Each PMC at a
761 * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]'
762 * array. The size of this structure is thus PMC architecture
767 struct pmc_targetstate {
768 struct pmc *pp_pmc; /* target PMC */
769 pmc_value_t pp_pmcval; /* per-process value */
773 LIST_ENTRY(pmc_process) pp_next; /* hash chain */
774 int pp_refcnt; /* reference count */
775 uint32_t pp_flags; /* flags PMC_PP_* */
776 struct proc *pp_proc; /* target thread */
777 struct pmc_targetstate pp_pmcs[]; /* NHWPMCs */
780 #define PMC_PP_ENABLE_MSR_ACCESS 0x00000001
785 * We associate a PMC with an 'owner' process.
787 * A process can be associated with 0..NCPUS*NHWPMC PMCs during its
788 * lifetime, where NCPUS is the numbers of CPUS in the system and
789 * NHWPMC is the number of hardware PMCs per CPU. These are
790 * maintained in the list headed by the 'po_pmcs' to save on space.
795 LIST_ENTRY(pmc_owner) po_next; /* hash chain */
796 LIST_ENTRY(pmc_owner) po_ssnext; /* list of SS PMC owners */
797 LIST_HEAD(, pmc) po_pmcs; /* owned PMC list */
798 TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */
799 struct mtx po_mtx; /* spin lock for (o) */
800 struct proc *po_owner; /* owner proc */
801 uint32_t po_flags; /* (k) flags PMC_PO_* */
802 struct proc *po_kthread; /* (k) helper kthread */
803 struct pmclog_buffer *po_curbuf; /* current log buffer */
804 struct file *po_file; /* file reference */
805 int po_error; /* recorded error */
806 short po_sscount; /* # SS PMCs owned */
807 short po_logprocmaps; /* global mappings done */
810 #define PMC_PO_OWNS_LOGFILE 0x00000001 /* has a log file */
811 #define PMC_PO_SHUTDOWN 0x00000010 /* in the process of shutdown */
812 #define PMC_PO_INITIAL_MAPPINGS_DONE 0x00000020
815 * struct pmc_hw -- describe the state of the PMC hardware
817 * When in use, a HW PMC is associated with one allocated 'struct pmc'
818 * pointed to by field 'phw_pmc'. When inactive, this field is NULL.
820 * On an SMP box, one or more HW PMC's in process virtual mode with
821 * the same 'phw_pmc' could be executing on different CPUs. In order
822 * to handle this case correctly, we need to ensure that only
823 * incremental counts get added to the saved value in the associated
824 * 'struct pmc'. The 'phw_save' field is used to keep the saved PMC
825 * value at the time the hardware is started during this context
826 * switch (i.e., the difference between the new (hardware) count and
827 * the saved count is atomically added to the count field in 'struct
828 * pmc' at context switch time).
833 uint32_t phw_state; /* see PHW_* macros below */
834 struct pmc *phw_pmc; /* current thread PMC */
837 #define PMC_PHW_RI_MASK 0x000000FF
838 #define PMC_PHW_CPU_SHIFT 8
839 #define PMC_PHW_CPU_MASK 0x0000FF00
840 #define PMC_PHW_FLAGS_SHIFT 16
841 #define PMC_PHW_FLAGS_MASK 0xFFFF0000
843 #define PMC_PHW_INDEX_TO_STATE(ri) ((ri) & PMC_PHW_RI_MASK)
844 #define PMC_PHW_STATE_TO_INDEX(state) ((state) & PMC_PHW_RI_MASK)
845 #define PMC_PHW_CPU_TO_STATE(cpu) (((cpu) << PMC_PHW_CPU_SHIFT) & \
847 #define PMC_PHW_STATE_TO_CPU(state) (((state) & PMC_PHW_CPU_MASK) >> \
849 #define PMC_PHW_FLAGS_TO_STATE(flags) (((flags) << PMC_PHW_FLAGS_SHIFT) & \
851 #define PMC_PHW_STATE_TO_FLAGS(state) (((state) & PMC_PHW_FLAGS_MASK) >> \
853 #define PMC_PHW_FLAG_IS_ENABLED (PMC_PHW_FLAGS_TO_STATE(0x01))
854 #define PMC_PHW_FLAG_IS_SHAREABLE (PMC_PHW_FLAGS_TO_STATE(0x02))
859 * Space for N (tunable) PC samples and associated control data.
863 uint16_t ps_nsamples; /* callchain depth */
864 uint8_t ps_cpu; /* cpu number */
865 uint8_t ps_flags; /* other flags */
866 pid_t ps_pid; /* process PID or -1 */
867 struct thread *ps_td; /* which thread */
868 struct pmc *ps_pmc; /* interrupting PMC */
869 uintptr_t *ps_pc; /* (const) callchain start */
872 #define PMC_SAMPLE_FREE ((uint16_t) 0)
873 #define PMC_SAMPLE_INUSE ((uint16_t) 0xFFFF)
875 struct pmc_samplebuffer {
876 struct pmc_sample * volatile ps_read; /* read pointer */
877 struct pmc_sample * volatile ps_write; /* write pointer */
878 uintptr_t *ps_callchains; /* all saved call chains */
879 struct pmc_sample *ps_fence; /* one beyond ps_samples[] */
880 struct pmc_sample ps_samples[]; /* array of sample entries */
885 * struct pmc_cpustate
887 * A CPU is modelled as a collection of HW PMCs with space for additional
892 uint32_t pc_state; /* physical cpu number + flags */
893 struct pmc_samplebuffer *pc_sb[2]; /* space for samples */
894 struct pmc_hw *pc_hwpmcs[]; /* 'npmc' pointers */
897 #define PMC_PCPU_CPU_MASK 0x000000FF
898 #define PMC_PCPU_FLAGS_MASK 0xFFFFFF00
899 #define PMC_PCPU_FLAGS_SHIFT 8
900 #define PMC_PCPU_STATE_TO_CPU(S) ((S) & PMC_PCPU_CPU_MASK)
901 #define PMC_PCPU_STATE_TO_FLAGS(S) (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT)
902 #define PMC_PCPU_FLAGS_TO_STATE(F) (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK)
903 #define PMC_PCPU_CPU_TO_STATE(C) ((C) & PMC_PCPU_CPU_MASK)
904 #define PMC_PCPU_FLAG_HTT (PMC_PCPU_FLAGS_TO_STATE(0x1))
909 * CPU binding information.
913 int pb_bound; /* is bound? */
914 int pb_cpu; /* if so, to which CPU */
921 * struct pmc_classdep
923 * PMC class-dependent operations.
925 struct pmc_classdep {
926 uint32_t pcd_caps; /* class capabilities */
927 enum pmc_class pcd_class; /* class id */
928 int pcd_num; /* number of PMCs */
929 int pcd_ri; /* row index of the first PMC in class */
930 int pcd_width; /* width of the PMC */
932 /* configuring/reading/writing the hardware PMCs */
933 int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm);
934 int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm);
935 int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value);
936 int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value);
938 /* pmc allocation/release */
939 int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t,
940 const struct pmc_op_pmcallocate *_a);
941 int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm);
943 /* starting and stopping PMCs */
944 int (*pcd_start_pmc)(int _cpu, int _ri);
945 int (*pcd_stop_pmc)(int _cpu, int _ri);
948 int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi,
951 /* class-dependent initialization & finalization */
952 int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
953 int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
955 /* machine-specific interface */
956 int (*pcd_get_msr)(int _ri, uint32_t *_msr);
962 * Machine dependent bits needed per CPU type.
966 uint32_t pmd_cputype; /* from enum pmc_cputype */
967 uint32_t pmd_npmc; /* number of PMCs per CPU */
968 uint32_t pmd_nclass; /* number of PMC classes present */
971 * Machine dependent methods.
974 /* per-cpu initialization and finalization */
975 int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu);
976 int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu);
978 /* thread context switch in/out */
979 int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp);
980 int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp);
982 /* handle a PMC interrupt */
983 int (*pmd_intr)(int _cpu, struct trapframe *_tf);
986 * PMC class dependent information.
988 struct pmc_classdep pmd_classdep[];
992 * Per-CPU state. This is an array of 'mp_ncpu' pointers
993 * to struct pmc_cpu descriptors.
996 extern struct pmc_cpu **pmc_pcpu;
998 /* driver statistics */
999 extern struct pmc_op_getdriverstats pmc_stats;
1001 #if defined(HWPMC_DEBUG)
1002 #include <sys/ktr.h>
1004 /* debug flags, major flag groups */
1005 struct pmc_debugflags {
1017 extern struct pmc_debugflags pmc_debugflags;
1019 #define KTR_PMC KTR_SUBSYS
1021 #define PMC_DEBUG_STRSIZE 128
1022 #define PMC_DEBUG_DEFAULT_FLAGS { 0, 0, 0, 0, 0, 0, 0, 0 }
1024 #define PMCDBG0(M, N, L, F) do { \
1025 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
1026 CTR0(KTR_PMC, #M ":" #N ":" #L ": " F); \
1028 #define PMCDBG1(M, N, L, F, p1) do { \
1029 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
1030 CTR1(KTR_PMC, #M ":" #N ":" #L ": " F, p1); \
1032 #define PMCDBG2(M, N, L, F, p1, p2) do { \
1033 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
1034 CTR2(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2); \
1036 #define PMCDBG3(M, N, L, F, p1, p2, p3) do { \
1037 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
1038 CTR3(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2, p3); \
1040 #define PMCDBG4(M, N, L, F, p1, p2, p3, p4) do { \
1041 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
1042 CTR4(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2, p3, p4);\
1044 #define PMCDBG5(M, N, L, F, p1, p2, p3, p4, p5) do { \
1045 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
1046 CTR5(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2, p3, p4, \
1049 #define PMCDBG6(M, N, L, F, p1, p2, p3, p4, p5, p6) do { \
1050 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \
1051 CTR6(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2, p3, p4, \
1056 #define PMC_DEBUG_MAJ_CPU 0 /* cpu switches */
1057 #define PMC_DEBUG_MAJ_CSW 1 /* context switches */
1058 #define PMC_DEBUG_MAJ_LOG 2 /* logging */
1059 #define PMC_DEBUG_MAJ_MDP 3 /* machine dependent */
1060 #define PMC_DEBUG_MAJ_MOD 4 /* misc module infrastructure */
1061 #define PMC_DEBUG_MAJ_OWN 5 /* owner */
1062 #define PMC_DEBUG_MAJ_PMC 6 /* pmc management */
1063 #define PMC_DEBUG_MAJ_PRC 7 /* processes */
1064 #define PMC_DEBUG_MAJ_SAM 8 /* sampling */
1068 /* Common (8 bits) */
1069 #define PMC_DEBUG_MIN_ALL 0 /* allocation */
1070 #define PMC_DEBUG_MIN_REL 1 /* release */
1071 #define PMC_DEBUG_MIN_OPS 2 /* ops: start, stop, ... */
1072 #define PMC_DEBUG_MIN_INI 3 /* init */
1073 #define PMC_DEBUG_MIN_FND 4 /* find */
1076 #define PMC_DEBUG_MIN_PMH 14 /* pmc_hook */
1077 #define PMC_DEBUG_MIN_PMS 15 /* pmc_syscall */
1080 #define PMC_DEBUG_MIN_ORM 8 /* owner remove */
1081 #define PMC_DEBUG_MIN_OMR 9 /* owner maybe remove */
1084 #define PMC_DEBUG_MIN_TLK 8 /* link target */
1085 #define PMC_DEBUG_MIN_TUL 9 /* unlink target */
1086 #define PMC_DEBUG_MIN_EXT 10 /* process exit */
1087 #define PMC_DEBUG_MIN_EXC 11 /* process exec */
1088 #define PMC_DEBUG_MIN_FRK 12 /* process fork */
1089 #define PMC_DEBUG_MIN_ATT 13 /* attach/detach */
1090 #define PMC_DEBUG_MIN_SIG 14 /* signalling */
1092 /* CONTEXT SWITCHES */
1093 #define PMC_DEBUG_MIN_SWI 8 /* switch in */
1094 #define PMC_DEBUG_MIN_SWO 9 /* switch out */
1097 #define PMC_DEBUG_MIN_REG 8 /* pmc register */
1098 #define PMC_DEBUG_MIN_ALR 9 /* allocate row */
1100 /* MACHINE DEPENDENT LAYER */
1101 #define PMC_DEBUG_MIN_REA 8 /* read */
1102 #define PMC_DEBUG_MIN_WRI 9 /* write */
1103 #define PMC_DEBUG_MIN_CFG 10 /* config */
1104 #define PMC_DEBUG_MIN_STA 11 /* start */
1105 #define PMC_DEBUG_MIN_STO 12 /* stop */
1106 #define PMC_DEBUG_MIN_INT 13 /* interrupts */
1109 #define PMC_DEBUG_MIN_BND 8 /* bind */
1110 #define PMC_DEBUG_MIN_SEL 9 /* select */
1113 #define PMC_DEBUG_MIN_GTB 8 /* get buf */
1114 #define PMC_DEBUG_MIN_SIO 9 /* schedule i/o */
1115 #define PMC_DEBUG_MIN_FLS 10 /* flush */
1116 #define PMC_DEBUG_MIN_SAM 11 /* sample */
1117 #define PMC_DEBUG_MIN_CLO 12 /* close */
1120 #define PMCDBG0(M, N, L, F) /* nothing */
1121 #define PMCDBG1(M, N, L, F, p1)
1122 #define PMCDBG2(M, N, L, F, p1, p2)
1123 #define PMCDBG3(M, N, L, F, p1, p2, p3)
1124 #define PMCDBG4(M, N, L, F, p1, p2, p3, p4)
1125 #define PMCDBG5(M, N, L, F, p1, p2, p3, p4, p5)
1126 #define PMCDBG6(M, N, L, F, p1, p2, p3, p4, p5, p6)
1129 /* declare a dedicated memory pool */
1130 MALLOC_DECLARE(M_PMC);
1136 struct pmc_mdep *pmc_md_initialize(void); /* MD init function */
1137 void pmc_md_finalize(struct pmc_mdep *_md); /* MD fini function */
1138 int pmc_getrowdisp(int _ri);
1139 int pmc_process_interrupt(int _cpu, int _soft, struct pmc *_pm,
1140 struct trapframe *_tf, int _inuserspace);
1141 int pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples,
1142 struct trapframe *_tf);
1143 int pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples,
1144 struct trapframe *_tf);
1145 struct pmc_mdep *pmc_mdep_alloc(int nclasses);
1146 void pmc_mdep_free(struct pmc_mdep *md);
1147 #endif /* _KERNEL */
1148 #endif /* _SYS_PMC_H_ */