2 * Copyright (c) 2014 Mateusz Guzik <mjg@FreeBSD.org>
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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32 #include <sys/systm.h>
34 #include <sys/types.h>
37 * seqc_t may be included in structs visible to userspace
39 typedef uint32_t seqc_t;
44 * seqc allows readers and writers to work with a consistent snapshot. Modifying
45 * operations must be enclosed within a transaction delineated by
46 * seqc_write_beg/seqc_write_end. The trick works by having the writer increment
47 * the sequence number twice, at the beginning and end of the transaction.
48 * The reader detects that the sequence number has not changed between its start
49 * and end, and that the sequence number is even, to validate consistency.
51 * Some fencing (both hard fencing and compiler barriers) may be needed,
52 * depending on the cpu. Modern AMD cpus provide strong enough guarantees to not
53 * require any fencing by the reader or writer.
58 * lock_exclusive(&obj->lock);
59 * seqc_write_begin(&obj->seqc);
62 * seqc_write_end(&obj->seqc);
63 * unlock_exclusive(&obj->lock);
70 * seqc = seqc_read(&obj->seqc);
73 * if (seqc_consistent(&obj->seqc, seqc))
78 * Writers may not block or sleep in any way.
80 * There are 2 minor caveats in this implementation:
82 * 1. There is no guarantee of progress. That is, a large number of writers can
83 * interfere with the execution of the readers and cause the code to live-lock
84 * in a loop trying to acquire a consistent snapshot.
86 * 2. If the reader loops long enough, the counter may overflow and eventually
87 * wrap back to its initial value, fooling the reader into accepting the
88 * snapshot. Given that this needs 4 billion transactional writes across a
89 * single contended reader, it is unlikely to ever happen.
92 /* A hack to get MPASS macro */
95 #include <machine/cpu.h>
98 seqc_in_modify(seqc_t seqcp)
105 seqc_write_begin(seqc_t *seqcp)
109 MPASS(!seqc_in_modify(*seqcp));
111 atomic_thread_fence_rel();
115 seqc_write_end(seqc_t *seqcp)
118 atomic_store_rel_int(seqcp, *seqcp + 1);
119 MPASS(!seqc_in_modify(*seqcp));
123 static __inline seqc_t
124 seqc_read(const seqc_t *seqcp)
129 ret = atomic_load_acq_int(__DECONST(seqc_t *, seqcp));
130 if (seqc_in_modify(ret)) {
140 static __inline seqc_t
141 seqc_consistent_nomb(const seqc_t *seqcp, seqc_t oldseqc)
144 return (*seqcp == oldseqc);
147 static __inline seqc_t
148 seqc_consistent(const seqc_t *seqcp, seqc_t oldseqc)
151 atomic_thread_fence_acq();
152 return (seqc_consistent_nomb(seqcp, oldseqc));
156 #endif /* _SYS_SEQC_H_ */